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Training Manual

50PJ350 Plasma Display

Advanced Single Scan Troubleshooting


50" Class HD 720p Plasma TV
(50" diagonally)

Published July 12th, 2010


Updated August 12th, 2010

OUTLINE

Overview of Topics to be Discussed

Preliminary:
Contact Information, Preliminary Matters, Specifications,
Plasma Overview, General Troubleshooting Steps,
Disassembly Instructions, Voltage and Signal Distribution
Troubleshooting: No Main Power Switch (Vacation Switch).
Circuit Board Operation, Troubleshooting and Alignment of :
Switch Mode Power Supply No VS On command input to SMPS
Y-SUS Board Delivers Logic Signals and FG5V to lower Y-Drive board.
Y-Drive Boards (1 Upper and 1 Lower).
Lower can run separately, but you MUST remove the Upper completely.

Z-SUS Output Board (Also uses one Z-SUB board for bottom panel connector)
Control Board
X Drive Boards (3)
Main Board
Interconnect Diagram: 11X17 Foldout Section used as a quick reference sheet.

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Overview of Topics to be Discussed

50PJ350 Plasma Display


The first section will cover Contact Information and Important Safety Precautions
for the Customers Safety as well as the Technician and the Equipment.
Basic Troubleshooting Techniques which can save time and money sometimes
can be overlooked. These techniques will also be presented.

The next section will get the Technician familiar with the Disassembly, Identification
and Layout of the Plasma Display Panel.
At the end of this Section the Technician should be able to Identify the Circuit
Boards and have the ability and knowledge necessary to safely remove and
replace any Circuit Board or Assembly.

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LG Contact Information
Customer Service (and Part Sales)

(800) 243-0000

Technical Support (and Part Sales)

(800) 847-7597

USA Website (GSFS)

http://gsfs-america.lge.com

Customer Service Website

us.lgservice.com

Knowledgebase Website

lgtechassist.com

LG Web Training

lge.webex.com

LG CS Academy

lgcsacademy.com

New: Software Downloads


Technical Assistance
Presentations with Audio/Video
and Screen Marks

http://136.166.4.200

LCD-DV: 32LG40, 32LH30, 37LH55, 42LG60, 42LG70, 42LH20, 42LH40, 42LH50, 42LH90, 42SL80,
47LG90, 47LH85, 47LE8500
PLASMA: 42PG20, 42PQ20, 42PQ30, 50PG20, 50PJ350, 50PK750, 50PS80, 50PS60, 60PK750,
60PS11, 60PS60, 60PS80
Also available on the Plasma Page:
PDP Panel Alignment Handbook, Schematics with Bookmarks
Plasma Control Board ROM Update (Jig required)

New Training Materials on


the Learning Academy site

Published July 2010 by LG Technical Support and Training


LG Electronics Alabama, Inc.
201 James Record Road, Huntsville, AL, 35813.

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Preliminary Matters (The Fine Print)

IMPORTANT SAFETY NOTICE


The information in this training manual is intended for use by persons possessing an adequate
background in electrical equipment, electronic devices, and mechanical systems. In any attempt
to repair a major Product, personal injury and property damage can result. The manufacturer or
seller maintains no liability for the interpretation of this information, nor can it assume any
liability in conjunction with its use. When servicing this product, under no circumstances should
the original design be modified or altered without permission from LG Electronics. Unauthorized
modifications will not only void the warranty, but may lead to property damage or user injury.
If wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for
service, they must be returned to their original positions and properly fastened.

CAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power
is required for diagnosis or test purposes, disconnect the power immediately after performing
the necessary checks. Also be aware that many household products present a weight hazard.
At least two people should be involved in the installation or servicing of such devices.
Failure to consider the weight of an product could result in physical injury.

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ESD Notice

(Electrostatic Static Discharge)

Todays sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage
the electronics in a manner that renders them inoperative or reduces the time until their next failure.
Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively,
you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before
removing a replacement part from its package, touch the anti-static bag to a ground connection point or
unpainted metal in the product. Handle the electronic control assembly by its edges only. When
repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.

Regulatory Information
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to
Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction
manual, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off and on, the user is
encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate
the receiving antenna; Increase the separation between the equipment and the receiver; Connect the
equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the
dealer or an experienced radio/TV technician for help.

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Safety and Handling, Checking Points


Safety & Handling Regulations
1.

Approximately 10 minute pre-run time is required before any adjustments are performed.

2.

Refer to the Voltage Sticker inside the Panel when making adjustments on the Power Supply, Y-SUS and Z-SUS Boards.

3.

Always adjust to the specified voltage level (+/- volt) unless otherwise specified.

4.

Be cautious of electric shock from the PDP module since the PDP module uses high voltage, check that the Power Supply
and Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.

4.

C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.

5.

The PDP Module must be carried by two people. Always carry vertical NOT horizontal.

6.

The Plasma television should be transported vertically NOT horizontally.

7.

Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.

8.

Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.

9.

New Panels and Frames are much thinner than previous models. Be Careful with flexing these panels. Be careful
with lifting Panels from a horizontal position. Damage to the Frame mounts or panel can occur.

10. New Plasma models have much thinner cabinet assemblies and mounts.
Be extremely careful when moving the set around as damage can occur.

Checking Points to be Considered


1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy.
2. Check the model label. Verify model names and board model matches.
3. Check details of defective condition and history. Example: Y-SUS or Y-Drive Board Failure, Mal-discharge on screen, etc.

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Basic Troubleshooting Steps


Define, Localize, Isolate and Correct
Look at the symptom carefully and determine what circuits could be causing the
Define
failure. Use your senses Sight, Smell, Touch and Hearing. Look for burned parts and check
for possible overheated components. Capacitors will sometimes leak dielectric material and
give off a distinct odor. Frequency of power supplies will change with the load, or listen for
relay closing etc. Observation of the front Power LEDs may give some clues.
Localize After carefully checking the symptom and determining the circuits to be checked
and after giving a thorough examination using your senses the first check should always be
the DC Supply Voltages to those circuits under test. Always confirm the supplies are not
only the proper level but be sure they are noise free. If the supplies are missing check the
resistance for possible short circuits.
Isolate
To further isolate the failure, check for the proper waveforms with the
Oscilloscope to make a final determination of the failure. Look for correct Amplitude
Phasing and Timing of the signals also check for the proper Duty Cycle of the signals.
Sometimes glitches or road bumps will be an indication of an imminent failure.
Correct The final step is to correct the problem. Be careful of ESD and make sure to
check the DC Supplies for proper levels. Make all necessary adjustments and lastly always
perform a Safety AC Leakage Test before returning the product back to the Customer.

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50PJ350 PRODUCT INFORMATION SECTION

This section of the manual will discuss the specifications of the


50PJ350 Advanced Single Scan Plasma Display Television.

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50PJ350 Specifications

1080P PLASMA HDTV


50" Class (50" diagonal)

600Hz Sub Field Driving


High Definition Resolution
3M:1 Dynamic Contrast Ratio
TruSlim Frame
Picture Wizard II (Easy Picture Calibration)
Smart Energy Saving
Intelligent Sensor
Dual XD Engine
AV Mode(Cinema, Sports, Game)
Clear Voice II
ISFccc Ready
24P Real Cinema
USB 2.0 (JPEG, MP3)
3 HDMI 1.3 Inputs
SIMPLINK Connectivity
Dolby Digital 5.1 Decoder
Infinite Sound

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For Full Specifications


See the Specification Sheet

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50PJ350 Logo Familiarization Page 1 of 3


600Hz Sub Field Firing:
Capture every moment. Tired of streaky action or unclear plays during the
game? See sports, fast action and video games like never before. The 600Hz
refresh rate virtually eliminates motion blur.

3.000,000 : 1 Contrast Ratio


Stunning detail. No more worrying about dark scenes or dull colors.
The Mega Contrast ratio of 3,000,000:1 delivers more stunning colors and
deeper blacks than you can imagine.

TruSlim Design:
At less than 1" thick the new TruSlim Frame trims away distraction without
compromising screen size.

USB 2.0:
View videos and photos and listen to music on your TV through USB 2.0.

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50PJ350 Logo Familiarization Page 2 of 3


HD RESOLUTION 720P HD Resolution Pixels: 1365 (H) 768 (V)
See and experience more. Pictures are sharper.
Colors are more vibrant. Entertainment is more real.
Everything looks better on an HDTV.
HDMI (1.3 Deep Color) Digital multi-connectivity
HDMI (1.3 Deep color) provides a wider bandwidth (340MHz,
10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors,
and also drastically improves the data-transmission speed.
Invisible Speaker
Personally tuned by Mr. Mark Levinson for LG
TAKE IT TO THE EDGE newly introduces Invisible Speaker system,
guaranteeing first class audio quality personally tuned by Mr. Mark
Levinson, world renowned as an audio authority. It provides Full Sweet
Spot and realistic sound equal to that of theaters with its Invisible
Speaker.
Dual XD Engine
Realizing optimal quality for all images
One XD Engine optimizes the images from RF signals as another XD
Engine optimizes them from External inputs. Dual XD Engine presents
images with optimal quality two times higher than those of previous
models.

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50PJ350 Logo Familiarization Page 3 of 3


AV Mode "One click" Cinema, Sports, Game mode.
AV Mode is three preset picture and audio settings. It allows the viewer
to quickly switch between common settings. It includes Cinema, Sports,
and Game Modes.

Clear Voice Clearer dialogue sound


Automatically enhances and amplifies the sound of the human voice
frequency range to provide high-quality dialogue when background
noise swells.
Save Energy, Save Money
It reduces the plasma displays power consumption.
The default factory setting complies with the Energy Star requirements
and is adjusted to the comfortable level to be viewed at home.
(Turns on Intelligent Sensor).

Save Energy, Save Money


Home electronic products use energy when they're off to power features like clock
displays and remote controls. Those that have earned the ENERGY STAR use as much
as 60% less energy to perform these functions, while providing the same performance at
the same price as less-efficient models. Less energy means you pay less on your energy
bill. Draws less than 1 Watt in stand by.

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600Hz Sub Field Driving


(600 Hz Sub Field Driving)

600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process
(vs. Comp. 8 sub-field/frame)

No smeared images during fast motion scenes

Original Image

10 Sub Fields Per Frame

Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals.

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50PJ350 Remote Control

BOTTOM PORTION

p/n AKB72914201
TOP PORTION

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50PJ350 Rear and Side Input Jacks

USB for Music, Photos


and Software
Upgrades

AC In

SIDE
INPUTS
REAR
INPUTS
USB
HDMI 3

Composite
Video/Audio

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50PJ350 Dimensions
Power:

There must be at least 4 inches of Clearance on all sides

340W (Typical)
0.1W (Stand-By)

2-3/16"
55.88mm

46-1/8"
1170.94mm

15-3/16
385.8mm

15-3/4"
400mm

30-13/16"
782.32mm

5-1/4
133.6mm

15-3/4"
400mm

28-3/8"
721.36mm

Model No.
Serial No.
Label
Remove 4 screws
to remove stand
for wall mount
7-3/8
187.2mm

2-3/8"
60.96mm

Weight:

2-3/4"
70mm
78.5 lbs with Stand
60.8 lbs without Stand

20-7/8"
530mm
12-3/16"
309.88mm

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DISASSEMBLY SECTION

This section of the manual will discuss Disassembly, Layout and Circuit
Board Identification, of the 50PJ350 Advanced Single Scan Plasma Display Panel.
Upon completion of this section the Technician will have a better
understanding of the disassembly procedures, the layout of the printed
circuit boards and be able to identify each board.

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Removing the Back Cover

To remove the back cover, remove the 32 screws


Indicated by the arrows.
(The Stand does not need to be removed).
PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTH
Of the screws when replacing the back cover.
Improper type can damage the front.

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Circuit Board Layout

Identifying the Circuit Boards

FPC

Y-Drive Upper

FPC

Panel Voltage and Panel ID Label

FPC

Z-SUS

FPC

Power Supply
(SMPS)
Y-SUS

FPC

FPC

Y-Drive Lower

FPC

Z-SUB
Main Board

Control

FPC

TCP
Heat Sink

AC In

FPC

Left X

Center X

Right X

Side
Input
(part of
main)

Conductive Tape
Conductive Tape

IR/LED
Board

Soft Touch
Keyboard

Invisible Speakers

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PANEL
p/n: EAJ60716304 (PDP50T10000.ADLGB)
p/n: EAJ60716316 (PDP50T10000.ASLGB)

Y-DRIVE
UPPER
Board

p/n: EBR63551601

P102

P101

50PJ350 Connector Identification Diagram

P2

P812

P211

P103
P201

P110

Y-SUS
Board

P204

P202

P205
p/n: EBR63551701

P203

SC101
L N

p/n: EBR63039801

P101
P203

P212

P100

P102
P3

P813
LVDS

Z-SUB Board

CONTROL
Board P101

P301
P704

P162

P161

P801
AC
In

LEFT X
Board

p/n: EBR64062301

P121

P212

P231

p/n: EBR64062201

P210

P211

P331

CENTER X

P703
P900
n/c

MAIN
Board

p/n: EBT60953802

RIGHT X
Board

p/n: EBR64062001

P101
FRONT IR
p/n: EBR65007704

Speakers (Front Right) p/n: EAB60962801

p/n: EAB60962801 Speakers (Front Left)

Front Soft Switch Key Pad

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P7
P202

P121

p/n: EBR63549501

Y-DRIVE
LOWER
Board

P122

P102
n/c

Top row Odd


Back row Even

P1

p/n: EAY60968701

P111

P101

p/n: EBR63040301

SMPS
POWER SUPPLY
Board

P210

Z-SUS
Board

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Disassembly Procedure for Circuit Board Removal


Note: 1) Remember to be cautious of ESD as some semiconductors are CMOS and prone to static failure.

Switch Mode Power Supply Board Removal


Disconnect the following connectors: P812, P813 and SC101.
Remove the 9 screws holding the SMPS in place.
Remove the board.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Also, re-confirm VSC, -Vy and Z-Bias as well.

Note: The Y-SUS does not come with the


connector to the Lower Y-Drive

Y-SUS Board Removal

Disconnect the following connectors: P210, P211, P212 and Ribbon Cable P110.
To remove P110, lift up on the locking mechanism and pull the ribbon cable out.
Remove the 16 screws holding the Y-SUS in place. Do not run the set with P117 or P118 removed.
Remove the Y-SUS board. When replacing, be sure to readjust the Va/Vs voltages in accordance with the
Panel Label.
Confirm VSC, -Vy and Z-bias as well.
Note: The Y-SUS does not come with the
Board Standoff
Y-Drive Boards Removal

connectors between the Y-SUS and Y-Drive

Disconnect the following Flexible Ribbon Connectors P101~P103 and/or P201~P203:


Disconnect P212 by pulling the ribbon cable upward. Remove P204 or P110 by lifting up
on the locking mechanism and pull the ribbon cable out. Do not run the set with these
connectors removed. Remove the 3 screws holding either of the Y-Drive boards in place.
Collar
Lift up slightly, the slide to the left. Remove the Y-Drive Board.
Note: Y-SUS, Z-SUS and Y-Drive boards are mounted on board stand-offs that have a small collar.
The board must be lifted slightly to clear these collars. Behind each board are Chocolate (dense rubber
like material) that act as shock absorbers. They may make the board stick when removing.

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Disassembly Procedure for Circuit Board Removal (2)


Z-SUS Board Removal
Disconnect the following connectors: P1 and P2, then P101, P102 and P202 by pulling out the locking
mechanism and pulling out the FPC to the panel.
Remove the 11 screws holding the board in place.
Remove the two screws in the Z-SUB board. Lift up slightly to clear the screw stand-offs and pull the
Z-SUS to the left. Unseat P3/P7 from the Z-SUB board and remove the board.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Confirm VS, -Vy and Z-bias as well.
Z-SUB Board Removal
Remove the two screws in the Z-SUB board. Remove P202 by pulling out the locking mechanism and
pulling out the FPC to the panel. Remove the board.
Main Board Removal
Disconnect the following connectors: P703 LVDS and P301 (press gently inward on the locking tabs)
and pull out, P704 and P801. Remove 1 screw in the decorative plastic piece and remove.
Remove the 4 screws holding the Main board in place and Remove the board.
Control Board Removal
Disconnect the following connectors: P12 LVDS, P111 Ribbon and P101, P102, P104 Ribbons by lifting
up the locking tab. Remove the 2 screws holding the Control board in place. Lift up the Control board to
unseat it from the two metal supports at the bottom and Remove the board.
Front IR and Key Pad Removal
FRONT IR/INTELLIGENT SENSOR and POWER BUTTON:
Disconnect P100 and P101. Note: P101 is a ribbon connector. Lift up the locking mechanism and
slide the ribbon cable out. Remove the Board by lifting up on the top tabs, lift the board and remove.
KEY PAD:
The Key Pad is a thin strip of static sensitive material attached to the front glass. It is not removable.

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X Drive Circuit Board Removal Continued


Make sure AC is removed.
Lay the Television down carefully on a padded surface.
Make sure to use at least two people for this process so as not to flex the panel glass.
a)
b)
c)
d)
e)

Remove the Back Cover.


Remove the Stand (4 Stand Screws were removed during back removal).
Remove the Stand Metal Support Bracket (5 Screws) 2 Plastic tap thread and 3 Metal thread.
Remove the two Vertical support Braces marked E.
Note: There are 5 Screws per/brace, 2 Plastic tap thread and 3 Metal thread.
(Note, the right brace has a Grounding wire from the AC input which must also be removed).
Remove the 10 screws holding the Heat Sink. (Warning: Never run the set with this heat sink
removed).
To remove the heat sink, lift up to release the tacky Chocolate (heat transfer material) and slide the
heat sink to the left to clear the connector wires on the right side.
Note: There are two large pieces of conductive tape on the right side of the Right X Board that must
be removed.
Also, note that there several pieces of Chocolate heat transfer material attached all the way across the
underside of the heat sink.

X-DRIVE LEFT, CENTER AND RIGHT REMOVAL:


Disconnect all TCP ribbon cables from the defective X-Drive board and all other Ribbon cables going to
the board.
Remove the (3 Left or Right X) or (5 Center X) screws holding the defective X-Drive board in place.
Remove the board. Reassemble in reverse order. Recheck Va / Vs / VScan / -VY / Z-Drive.

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Getting to the X Circuit Boards

With Stand removed

D
Left

D
Right

Warning:
Never run the TV with the
TCP Heat Sink removed

E
Heat Sink

Ground
Wire

Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits.

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Left and Right X Drive Connector Removal


See below to Remove the Connections on the X-Boards.
From the Control Board to the X-Boards.
There may be tape on these connectors.
P231, P232
P121, P212
P211, P331
Are the same

Disconnect connector P122


Va from the
Y-SUS to
Left X Only

Connectors from Center to Left and


Center to Right X Boards

P121 to P212
Left to Center X
Remove tape (if present) and Gently pry the
P211 to P331
locking mechanism upward and remove the ribbon
Center to Right X
cable from the connector.
Carefully lift the TCP ribbon up and off.
It may stick, be careful not to crack TCP.
(See next page for precautions)

Removing Connectors to the TCPs.

TCP
Gently lift the locking mechanism
upward on all TCP connectors
Left X: P101~108
Center X: P201~207
Right X: P301~308
Cushion (Chocolate)

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Example

Flexible ribbon cable connector

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TCP (Tape Carrier Package) Generic Removal Precautions


Tab

Lift up the lock as shown using your fingernail.


(The Lock can be easily broken.
It needs to be handled carefully.)

Tab

Separate the TCP from the connector as shown.


TCP Film can be easily damaged.
Handle with care.
Tab

The TCP has two small tabs on each


side which lock the ribbon cable
fully into the connector. They have
to be lifted up slightly to pull the
connector out.
Note: TCP is usually stuck down
to the Chocolate heat transfer
material, be Very Careful when
lifting up on the TCP ribbon cable.

Tab

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Left, Center and Right X Drive Removal


Remove the 3 screws in Left or Right X-Boards or 5 in the Center X-Board. (9 Total)
(Some screws are shared between boards)

The Left X Board drives the Right 5/16 of the side of the screen vertical electrodes
The Center X Board drives the Center 3/8 of the of the screen vertical electrodes
The Right X Board drives the Left 5/16 of the side of the screen vertical electrodes

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CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTION


50PJ350 Plasma Display
This Section will cover Circuit Operation, Troubleshooting and Alignment of the
Power Supply, Y-SUS Board, Y-Drive Boards, Z-SUS Board, Control Board,
Main Board and the X Drive Boards.

At the end of this Section the technician should understand the operation of each
circuit board and how to adjust the controls. The technician should be able with
confidence to troubleshoot a circuit board failure, replace the defective circuit and
perform all necessary adjustments.
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50PJ350 Signal and Voltage Distribution Block


SMPS TURN ON SEQUENCE

Y Drive
Upper

FPCs

5VFG (5V) measured


from Floating Ground

Step 1: RL_ON: 17V, 5V, AC_Det, Error Det,


Step 2: M_On: M5V, Va, Vs

15VFG (15V) measured


from Floating Ground

SMPS OUTPUT VOLTAGES IN STBY


STB +5V
SMPS OUTPUT VOLTAGES IN RUN
STB5V, +5V, 17V to Main Board
Vs, Va and M5V to Y-SUS,

P101

Error Com

P211

FG
FG

P103

Note:
Va not used
by Y-SUS only
fused and routed
to the X-Board

Scan
P110

FPCs
P204

P110 / P204
Floating Gnd (FG)
Drive Signals, FG5V
and Vscan.

FG5V
FG15V
16V
VSC
-VY

P201
Scan

P202

SMPS
Board

M5V, Vs, Va

Y-SUS Board

FG

SK101

16V / M5V
Note: 16V not used
by Control

Y Drive
Lower

P212
Floating Gnd (FG)
Drive Signals, FG5V

Display Panel Horizontal


Electrodes Reset, Sustain

X-Board-Left

3.3V
P122

P102

P103

P104

Z-SUB
Board

Stand By:
STB +5
Run:
AC Det +5, 17V

P121

P231

P212

P232

3.3V

P211 P311 P331


X-Board-Center

P232

P105

P703

MAIN Board

RGB Logic
Signals

3.3V
P211

P7
P202

Speakers

3.3V
Key Board
Pull Up

P704
P801

3.3V
STBY

P3

FPCs

P301

IR,
Intelligent Sensor

P100

P101

Soft Touch Keys


And Power Button

X-Board-Right

P331

Va

Va
P101

M5V, Va, Vs

P162

RGB Logic
Signals

P2

17V, +5V, AC Det

3.3V

Va

P101

16V / M5V Z Drive Control


P1 Signals

CONTROL
Board P101

P114

Z-SUS
Board

P102

P121

P111

P101

M_On

Vs

LVDS Video
Display Enable

P161
P205

P813

SMPS
Turn On
Commands
RL_ON

AC
Input
Filter

Logic Signals
To Y-SUS and Y-Drive

FG
P203

FPCs

P812

P210

P102

Display Panel
Horizontal
Electrodes
Sustain

P201

P202 P203

P204 P205

P206

P301

P302

P303

P304

P305

Display Panel Vertical Address (Colored Cell Address)

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Panel Label Explanation


(1)
(2)

(11)

(3)
(4)
(5)
(6)

(10)

(9)

(8)

(12)
(13)
(14)
(15)

(7)

(1) Panel Model Name


(2) Bar Code
(3) Manufacture No.
(4) Adjusting Voltage DC, Va, Vs
(5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb)
(6) Trade name of LG Electronics
(7) Manufactured date (Year & Month)
(8) Warning

31

(9) TUV Approval Mark (Not Used)


(10) UL Approval Mark
(11) UL Approval No.
(12) Panel Model Name
(13) Max. Watt (Full White)
(14) Max. Volts
(15) Max. Amps

July 2010

50PJ350

Plasma

Adjustment Notice

All adjustments (DC or Waveform) are adjusted in WHITE WASH.


Customers Menu, Select Options, select ISM select WHITE WASH.

It is critical that the DC Voltage adjustments be checked when;


1) SMPS, Y-SUS or Z-SUS board is replaced.
2) Panel is replaced, Check Va/Vs since the SMPS does not come with new panel
3) A Picture issue is encountered
4) As a general rule of thumb when ever the back is removed
ADJUSTMENT ORDER IMPORTANT
DC VOLTAGE ADJUSTMENTS
1) POWER SUPPLY: VS, VA (Always do first)
2) Y-SUS: Adjust Vy, VSC
3) Z-SUS: Adjust Z-Bias (VZB)
WAVEFORM ADJUSTMENTS
1) Y-SUS: Set-Up, Set-Down
The Waveform adjustment is only necessary
1) When the Y-SUS board is replaced
2) When a Mal-Discharge problem is
encountered
3) When an abnormal picture issues is
encountered

Set-Up

Remember, the Voltage Label MUST be followed,


it is specific to the panels needs.
Power Supply

-Vy

Vsc

Ve

ZBias

Panel
Rear View

All label references are from a specific panel.


They are not the same for every panel encountered.

32

July 2010

50PJ350

Plasma

SWITCH MODE POWER SUPPLY SECTION


This Section of the Presentation will cover troubleshooting the Switch Mode Power Supply for
the Single Scan Plasma. Upon completion of the section the technician will have a
better understanding of the operation of the Power Supply Circuit and will be able to
locate voltage and test points needed for troubleshooting and alignments.
DC Voltages developed on the SMPS
Adjustments VA and VS.
Always refer to the Voltage Sticker located on the back of the panel, in the upper Left Hand
side for the correct voltage levels for the VA, VS, -VY, VSC, and Z Bias as these voltages
will vary from Panel to Panel even in the same size category.
Set-Up and Ve are just for Label location identification and are not adjusted in this panel.
SMPS p/n: EAY60968701
Check the silk screen label on the top center of the Power Supply board to identify the correct part
number. (It may vary in your specific model number).
On the following pages, we will examine the Operation of this Power Supply.

33

July 2010

50PJ350

Plasma

Switch Mode Power Supply Overview


The Switch Mode Power Supply Board Outputs to the :

Y-SUS Board

Z-SUS Board

Main Board

VS

Drives the Display Panels Horizontal Electrodes.

VA

To Y-SUS, fused then to the X-Boards. (Not used by Z-SUS).


Primarily responsible for Display Panel Vertical Electrodes.

M5V

Used to develop Bias Voltages on the Y-SUS then routed to the Control
board and then to the Z-SUS Board.

VS

VS is routed to the Y-SUS first then to the Z-SUS board which


Drives the Display Panels Horizontal Electrodes.

STBY 5V

Microprocessor Circuits

17V

Audio B+ Supply, Tuner B+ Circuits

5V

Signal Processing Circuits

Also AC_Det (if missing, shuts of TV in 10 seconds) and Error_Det (not used)

Adjustments

There are 2 adjustments located on the Power Supply Board VA and VS. The
M5V is pre-adjusted and fixed. All adjustments are made referenced to Chassis
Ground. Use Full White Raster 100 IRE
VS

VR901

VA

VR502

34

July 2010

50PJ350

Plasma

Power Supply Board Layout (Drawing)


P812
VA TP

VS TP

VR901
VS Adj

T901

VS and VA
TP

F801
4A
250V

SMPS
p/n: EAY60968701

ZD803

Stand-By: 0.9V
Run: 388V

VR502
VA Adj

T902
D805

D609

ZD302
D601

ZD401

ZD301

D307

ZD101

ZD303 D303
D601
D305

Stand-By: 1.5V
Run: 388V
L601

T301

F302
2.5A
250V

D308
D309
D306

F101
10A
250V

D103
D302

D301

P813

L602

SC101

35

July 2010

50PJ350

Plasma

Power Supply Circuit Layout


Primary
Source

P812

VS VR901

VS Source

To Y-SUS
Fuse F801
0.9V Stby
388V Run
4Amp/250V

VA Source
VA VR502
Fuse F302
1.5V Stby
388V Run

17V Source

PFC
Circuit

2.5Amp/250V

RL104

STBY 5V,
5V Source

RL103

Bridge
Rectifier

N/C
To MAIN
10Amp/250V

36

Main Fuse
F101

P813
AC Input
SC 101

July 2010

50PJ350

Plasma

Power Supply Basic Operation


AC Voltage is supplied to the SMPS Board at Connector SC101 from the AC Input assembly, routed to the Standby 5V
supply. The STBY5V (standby) is B+ for the Controller chip on the back of the board (IC701) on the SMPS and output at
P813 pins 13 and 14 then sent to the Main board for Microprocessor (IC1) operation (STBY 3.46V RUN 5.14V).
When the Microprocessor (IC1) on the Main Board receives a POWER ON Command from either the Power button or
the Remote IR Signal, it outputs a high (2.43V) called RL_ON at Pin 15 of P813. This command causes the Relay Circuit to
close both Relays RL101 and RL103 routing AC to the Bridge Rectifier D101 which then routes the primary voltage to the
PFC circuit (Power Factor Controller) 388V which can be read measuring voltage at Fuses F302 and F801 from Hot
Ground. AC Detection (AC Det) is generated on the SMPS, by rectifying a small sample of the A/C Line and routed to the
Controller (IC701) where it outputs at P813 pin 16 (4.44V) and sent to P301 to the Main Board where it is sensed and
monitored by the Main Microprocessor (IC1). If AC Det is missing the set will come on, but shut off in 10 seconds.
When RL_ON arrives, the run voltage +5V source becomes active and is sent to the Main Board via P813 (5.17V at
pin 5, 6 and 7). The (Error Det) from the SMPS Board to the Main Board can be measured at pin 8 of P813 (2.85V STBY
and 4.90V RUN), but it is not used. The RL-ON command also turns on the 17V (Audio B+) which is also sent to the Main
Board. The 17V Audio supply outputs to the Main board at P813 pins 1 and 2 and used for Audio processing and
amplification.
The next step is for the Microprocessor IC1 on the Main Board to output a high (3.29V) on M_ON Line to the SMPS at P813
Pin 17 which is sensed by the Controller IC701, turning on the M5V line and outputs at P812 pins 9 and 10 to the Y-SUS
board.
The Controller (IC701) also uses the M_ON line to turn on the VA and the VS supplies. (Note there is no VS On Command
in this set). VS is output at P812 to the Y-SUS board P210. (VA pins 6 and 7 and VS pins 1 and 2). Note: The Va is fused
on the Y-SUS then routed out P203 to the X-Board Left. VS is also routed out of the Y-SUS P211 pins 4 and 5 to the Z-SUS
P2.
AUTO GND Pin 18 of P813: This pin is grounded on the Main board. When it is grounded, the Controller (IC701) works in
the normal mode, meaning it turns on the power supply via commands sent from the Main board. When AUTO GND is
floated (opened), it pulls up and places the Controller (IC701) into the Auto mode. In this state, the Controller turns on the
power supply in stages automatically. A load is necessary to perform a good test of the SMPS if the Main board is suspect.

37

July 2010

50PJ350

Plasma

50PJ350 POWER SUPPLY START UP SEQUENCE


F302 In Stand-By Primary side is 1.5V
In Run (Relay On) Primary side is 388V
F801
POWER SUPPLY
Stand-By 0.9V
(SMPS)
Run 388V

AC In

AC
Det

+5V
Regulator

Stand
By 5V Reg
STBY
3.46V

AC
Det.

RUN
5.14V

17V
Reg

5V

Stand By Error Det.


5V

Vs
Reg

Vs

Va
Reg

Va

M_On

3.3V Reg
3.3VST
IC302
2

17V
Audio
IC801

3
6

+5V HDMI
EDID
And other
circuits
5
Error Relay
Det. On
Microprocessor
IC1

Vs M5V Vs
9

M_On

Va

16V

5VFG
8

Y DRIVE Upper

7
8

3.3V

3.3V

X PWB
Center

Va

Y DRIVE Lower

X PWB
Left
2

Soft
Touch
Key Pad

Front IR
Board

July 2010

X PWB
Right

Va

Power Key

Remote Power Key

38

16V / M5V

3.3V_ST

Power On

3.3V

3.3V
8

M5V

16V / M5V

MAIN
Board

CONTROL

Z-SUS

5V
Floating
Gnd

At point 3
TV is in
Stand-By
state. It is
Energy Star
Compliant.
Less than 1
Watt

7
4

Vs

Y-SUS
8

AC Det.
If missing,
set will not
turn on.

Vs

RL On

Error Det.

Reset
C108, D1,
R62

M5V

17V

Not
Used

M5V
Reg

Va

If
missing
set
shuts
off in 10
Sec.

50PJ350

Plasma

Power Supply Board Layout (Drawing)


P812
VA TP

VS TP

VR901
VS Adj

T901

VS and VA
TP

F801
4A
250V

SMPS
p/n: EAY60968701

ZD803

Stand-By: 0.9V
Run: 388V

VR502
VA Adj

T902
D805

D609

ZD302
D601

ZD401

ZD301

D307

ZD101

ZD303 D303
D601
D305

Stand-By: 1.5V
Run: 388V
L601

T301

F302
2.5A
250V

D308
D309
D306

F101
10A
250V

D103
D302

D301

P813

L602

SC101

39

July 2010

50PJ350

Plasma

50PJ350 SMPS STATIC TEST UNDER LOAD


Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs
turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load. If
this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK.
Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the silk
screen on the SMPS and place each supply voltage under the appropriate load.
1

Pins

or

P812

100W

VS

VR901
VS Adj

T901

P812

VA VS
Test Points

Check Pins 1 or 2
for Vs voltage

100W

F801
4A 250V

Pins

Gnd

or

or

Check Pins 6 or 7
for Va voltage

VR502
VA Adj

T902

POWER SUPPLY
p/n: EAY60968701
ZD401

D609

ZD302

F302
2.5A
250V

Note:
Always test the SMPS under a
load using the 2 light bulbs.
Abnormal operational
conditions may result if not
loaded.

T301

L601
F101
10A 250V

P813

L602

SC101
Note:
To turn on the Power Supply;
1) With Main Board connected, press power.
2) Without Main Board connected SMPS will turn on automatically.

P813

Any time AC is applied to the SMPS, STBY 5V will be 3.46V and will
be 5.14V when the set turns on.
AC DET WILL NOT be present until set comes on.
If AC Det is missing, the TV will come on and shut off in 10 Seconds.

Check Pins 13 or 14
for 5V SBY (5.14V)

Check Pins 1 or 2 for


17V

Check Pin 8 for


Error Det (4.9V)

Check Pin 5,6 and 7


for (+5V) 5.17V

Check Pin 16 for


AC Det (4.44V)

40

July 2010

50PJ350

Plasma

50PJ350 Power Supply Troubleshooting


With P813 disconnected from the Main board (P301) attach two 100 Watt light bulbs, attach one end to Vs and the other end to ground.
Apply AC to SC101. If the light bulbs turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will
operate under load. If this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK.
Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the silk screen on the
SMPS and place each supply voltage under the appropriate load. Then follow the instructions below to completely test turn on sequence.
Note: Placing the two 100 Watt light bulbs from Vs to Ground will assure the power
supply will regulate with a load and no other Abnormal conditions may result.
1

Pins

or

P812

100W

VS

Use Main
Board Side
Pin 1
(Front Right)
P301

VR901
VS Adj

T901

17V

17V

Gnd

Gnd

+5V

+5V

Error Det

+5V

Gnd

10

Gnd
Gnd

VA VS
Test Points

100W

F801
4A 250V

Pins

Gnd

or

or

VR502
VA Adj

T902

POWER SUPPLY
p/n: EAY60968701
ZD401

ZD302

D609

L601
F101
10A 250V

L602

SC101

P813

11
13

AC Det 16

15

A
Auto Gnd

18

17

STBY
5V
RL
ON
M_On

When the supply is operational in its normal state the Auto Ground line at Pin 18 of P813 is held at ground by the Main Board.
This Power Supply can be powered on sequentially to test the Controller Chip IC701 operational capabilities and for
troubleshooting purposes.
Disconnect P301 from the Main board and use the holes in that end of the connector to insert the jumper and resistors.
Warning: Remove AC before adding or removing any plug or resistor.
Note: Leave previous installed 100 resistor in place when adding the next resistor.
(A) Ground the Auto Gnd Line (Pin 18) will allow the supply to be powered up one section at a time.
(B) Add a 100 watt resistor from 5V Standby to RL_ON and the AC Det, 17V and 5V Lines on P813 will become active.
(C) Add a 100 watt resistor from any 5V line to M_ON (Monitor_On) to make the M5V, VS and VA lines operational.
P812 (VS pins 1 and 2) (VA pins 6 and 7) and (M5V pins 9 and 10).

41

July 2010

50PJ350

Plasma

B
100

T301

100

F302
2.5A
250V

Gnd 12
STBY
14
5V

SMPS Connector P813 Identification, Voltages and Diode Check


P813 Connector SMPS" to Main" P301
Pin

Label

STBY

Run

Diode Mode

1-2

16V

0V

17V

3.17V

3-4

Gnd

Gnd

Gnd

Gnd

5-7

5V

0.46V

5.17V

1.16V

Error Det

2.85V

4.1V

3.09V

ac

9-12

Gnd

Gnd

Gnd

Gnd

13-14

Stby 5V

3.46V

5.14V

2.55V

15

RL On

0V

2.43V

Open

AC Det

0V

4.44V

3.06V

M_ON

0V

3.29V

Open

Auto Gnd

Gnd

Gnd

Open

16

ad

17

18

P813
1

Note: This connector has two


rows of pins.
Odd on bottom row.

a Note: The 17V, 5V, AC_Det and Error Det turn on when the RL_On command arrives.
b Note: The M5V, Va and Vs turn on when the M_On (Monitor On) command arrives.
c Note: The Error Det line is not used in this model.
d Note: If the AC Det line is Missing, the TV will shut off after 10 seconds of operation.
e Note: Pin 18 is grounded on the Main board. If this line is floated, the SMPS turns on

Automatically when AC is applied.

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

42

July 2010

50PJ350

Plasma

SMPS Connector SC101 and P812 Identification, Voltages and Diode Check
SC101 AC INPUT
Connector
SC101

Vs TP

L and N

Standby

Run

120VAC

120VAC

Diode Mode
Open

P812 "Power Supply to Y-SUS P210

P812

Va TP

Pin Number

Pin

Label

Run

Diode Mode

1, 2

*Vs

*206V

Open

n/c

n/c

n/c

4, 5

Gnd

Gnd

Gnd

6, 7

*Va

*60V

Open

Gnd

Gnd

Gnd

9, 10

M5V

5V

2.16V

* Note: This voltage will vary in accordance with Panel Label


Y-SUS routes Va to bottom X-Left. Vs routed to Z-SUS from P211.
M5V routed through Y-SUS to Control board and then to Z-SUS.

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

43

July 2010

50PJ350

Plasma

Y-SUS BOARD SECTION

(Overview)

Y-SUS Board develops the V-Scan drive signal to the Y-Drive boards.
This Section of the Presentation will cover alignment and troubleshooting the Y-SUS Board
for the Single Scan Plasma. Upon completion of the Section the technician will have a better
understanding of the operation of the circuit and will be able to locate voltage and
Diode mode test points needed for troubleshooting and alignments.
Adjustments
DC Voltage and Waveform Checks
Diode Mode Measurements
Operating Voltages
SMPS Supplied

VA
VS
M5V

VA supplies the Panels Vertical Electrodes (Routed to the Left X-Board)


VS Supplies the Panels Horizontal Electrodes. Also Routed to the Z-SUS board.
M5V Supplies Bias to Y-SUS. (From Y-SUS routed to the Control Board then Z-SUS).

Y-SUS Developed

-VY VR502
VSC VR501
V SET UP VR401
V SET DN VR402
16V

Floating Ground

FG 5V
FG 15V

-VY Sets the Negative excursion of Reset in the Drive Waveform


VSC Sets the amplitude of the complex waveform.
SET UP sets amplitude of the Top Ramp of Reset in the Drive Waveform
SET DOWN sets the Pitch of the Bottom Ramp for Reset in the Waveform
Used internally to develop the Y-Drive signal. (Also routed to the Control Board
then routed to the Z-SUS board).

Used on the Y-Drive boards (Measured from Floating Gnd)


Used in the Development of the Y-Drive Waveform (Measured from Floating Gnd)

44

July 2010

50PJ350

Plasma

Y-SUS Block Diagram


Power Supply Board - SMPS

Simplified Block Diagram of


Y-Sustain Board
Y-SUS Board

Distributes
VA

Left X Board

Circuits generate
Y-Sustain Waveform

Z-SUS Board

Distributes Vs, Va and M5V


Distributes
16V / M5V

Receive M5V, Va, Vs


from SMPS

VA

Distributes Vs

Distributes 16V and M5V

Control Board

Generates Vsc and -Vy


from M5V by DC/DC Converters
Also controls Set Up/Down

FETs amplify Y-Sustain


Waveform

Generates Floating Ground


5V/15V by DC/DC Converters
FG5V

Logic signals needed to


scan the panel

Y-Drive Boards

Display Panel

Receive Scan Waveform


Logic signals needed to generate drive waveform

45

July 2010

50PJ350

Plasma

Y-SUS Board Layout


VR402
Set Up

p/n: EBR63039801

P211

FS203 (VS)
4A/250V

VS to the Z-SUS

Floating Gnd
P210

To Y-Drive Upper

Floating Gnd

VS, VA and M5V


Input from the SMPS

Scan Signal

FS201 (VA)
10A/125V
-Vy TP
FS202 (M5V)
10A/125V

VR401
Set Dn
VSC TP
FS204 (16V)
2A/125V

Floating Gnd
To Y-Drive Lower

VR501
VSC

Floating Gnd
Logic Signals to
Lower Y-Drive Board
P212

P101

VR502
-Vy

16V (pins 1~3)


to Control for Z-SUS
M5V (pins 4-7)
Ribbon
Logic Signals from
the Control Board

P203

c
Va to Left X Board Pins 5~7

46

July 2010

50PJ350

Plasma

50PJ350 Y-SUS
Layout Drawing

VR402
Set-Up

Example:
Model : PDP 50T1###
Voltage Setting: 5V/ Va:60/ Vs:206
N.A. / -198 / 135 / N.A. / 95
Max Watt : 330 W (Full White)

P211 Connector Y-SUS to Z Drive P2

P211

D401

FS203 VS
Diode Check reads Open with
Board Disconnected or Connected

FS203 4A
VS

Label

Run

1~2

Gnd

Gnd

n/c

n/c

n/c

4~5

+Vs

*206V

Open

n/c

n/c

6
FG

7~11

D409
D407

P210

VSC

SUS_DN (FG)

FG

SUS_DN (FG)

FG

FG

YB_OC2

2.63V

1.47V

YB_OC2

2.63V

1.47V

YT_DATA

0V

1.38V

VS

n/c

n/c

p/n: EBR63039801

4~5

Gnd

Gnd

Gnd

6~7

VA

*60V

Open

Gnd

Gnd

Gnd

9~10

M5V

5.1V

1.19V

Diode Check

YT_DATA

0V

1.38V

YTB_OC1

2.2V

1.47V

YTB_OC1

2.2V

1.47V

FS201 10A
VA

2.8V

1.37V

2.8V

1.37V

11

YB_CLK

0.86V

1.38V

12

YB_CLK

0.86V

1.38V

13

SUS_DN (FG)

FG

FG

14

SUS_DN (FG)

FG

FG

15

FG5V

4.9V

1.82V

16

FG5V

4.9V

1.82V

17

SUS_DN (FG)

FG

FG

VSC
TP

D503
T302

VSC

FG

IC502
D501
IC302

Q502
D513

P212

D514

2
1
3
2
1
3

Label

Run

Diode Check

1~3

Pin

+15V

16V

1.61V

4~7
8

+5V
Gnd

4.9V
Gnd

1.19V
Gnd
1.54V

FS202
10A
5VDC

VR502
-Vy

IC503

D502 Q503

P101 Connector Y-SUS to Control P111

VR401
Set-Dn

D504

ZD501

YB_STB
YB_STB

TP

IC508
D511
D512

T502

9
10

VSC
TP

FS202 M5V
Diode Check reads
0.97V Board Connected
or 1.19 Disconnected

-Vy
TP
-VY

FG

Scan

*195V

Diode
Check
Open

n/c

FS201 Va
Diode Check reads Open with
Board Disconnected or Connected

VR501
VSC

Run

P212 Connector Y-SUS to Y-Drive B P205


Run

Label

1~2

WARNING:
Both Y-DRIVE Boards must be
removed completely if P205 /
P204 / P110 is pulled.

Label

Open

Y-SUS BOARD
Scan

Pin

n/c

ER_PASS 98V~102V

P210 Connector Y-SUS to SMPS P813


Pin

-Vy

Diode
Check
Gnd

Pin

D515

FS204 2A
16VDC

P101

FS204 Protects 16V Creation


D501 and IC501.
Diode Check 1.61V
With Board Disconnected or
1.59V Connected

IC509

P203

47

July 2010

CTRL_OE

0V

10

Gnd

Gnd

Gnd

11

OE

0V

1.75V

12

Gnd

Gnd

Gnd

13

Gnd

Gnd

Gnd

14

OC2

1.78V

1.19V

15

Delta_VY_Det

2.08V

1.18V

16

DATA

0V

1.02V

17

SET_ON

2.09V

1.14V

18

OC1

1.43V

1.14V

19

Det_Level_Sel

0.03V

1.14V

20

STB

1.97V

1.14V

21

Slope_Rate_Sel

1.34V

1.14V

22

CLK

0.59V

1.14V

23

YER_DN

0V

1.14V

24

SET_UP

0.24V

1.14V

25

YSUS_DN

0.95V

1.14V

26

Ramp_Slope

1.01V

1.14V

27

YER_UP

0.62V

1.14V

28

Y_Pass_Top

1.08V

1.14V

29

YSUS_UP

0.06V

1.14V

30

Gnd

Gnd

Gnd

50PJ350

Plasma

VSC and -VY Adjustments

CAUTION: Use the actual panel label and not the book for exact voltage settings.
This is just for example

These are DC level Voltage Adjustments

Set should run for 15 minutes, this is the Heat Run mode.
Set screen to White Wash.
1) Adjust Vy VR502 to Panels Label voltage (+/- 1V)
2) Adjust VSC VR501 to Panels Label voltage (+/- 1V)
-Vy

VSC

-Vy TP

Location: Bottom Left of the board

VSC TP

VR501
VSC Adj

VR502
-Vy Adj

Voltages Reads
Positive
Location: Bottom Center of board
Just above Transformer

48

July 2010

50PJ350

Plasma

Y-Drive Signal Overview


Y-Drive Lower Test Point
(Top Buffer)

2MSec

Overall signal observed 2mS/div

75 to 90 VRMS

548V p/p

White to Black

d Highlighted signal from waveform


above observed 200uS/div

200uSec

NOTE: The Waveform Test


Points are fragile. If by
accident the land is torn and
the run lifted, make sure
there are no lines left to right
in the screen picture.

e Highlighted signal from


waveforms above observed
100uS/div

There are several other test points on either the


Upper or Lower Y-Drive boards that can be used.
Basically any output pin on any of the FPC
to the panel are OK to use.

100uSec

49

July 2010

50PJ350

Plasma

Locking on to the Y-Drive Waveform Tip


Note, this TP (VS_DA) can be used as an
External Trigger for scope when locking onto
the Y-Drive (Scan) or the Z-Drive signal.
This signal can also be used
to help lock the scope when observing
the LVDS video signals.

50

July 2010

50PJ350

Plasma

Observing (Capturing) the Y-Drive Signal for Set Up Adjustment

Adjustment
Area

Set must be in WHITE WASH


All other DC Voltage adjustments should have already been made.

Fig 1:
As an example of how to lock in to the Y-Drive Waveform.
Fig 1 shows the signal locked in at 2ms per/div.
Note the 2 blanking sections.
The area for adjustment is pointed out within the Waveform
Fig 2:
At 200uSec per/division, the area of the waveform to
use for SET-UP or SET-DN is now becoming clear.
Now the only two blanking signals are present.

Area to
expand

FIG1
2mS
Blanking

Blanking

Adjustment
Area

FIG2
200uS

Area to
expand
Blanking

Expanded from above

Fig 3:
At 100us per/div the area for adjustment of SET-UP or SET-DN
is now easier to recognize. It is outlined within the Waveform.
Remember, this is the 1st large signal to the right of blanking.

FIG3
100uS
Expanded from above

TIP: If you expand to 100uSec per/division, the


adjustment for:
SET-UP can be made using VR402 and the
SET-DN can be made using VR401.
It will make this adjustment easier if you use the
Expanded mode of your scope.

Area for Set-Up


adjustment

224V
p/p

Area for Set-Dn


adjustment

180 uSec

51

July 2010

50PJ350

Plasma

Set Up and Set Down Adjustments

Set must be in WHITE WASH


All other DC Voltage adjustments should have already been made.

Observe the Picture while making these adjustments. Normally, they do not have to be done.
ADJUSTMENT LOCATION:
Top Left of the board.

VR402
Y-Drive Test Point
Lower Y-Drive Top Buffer

SET-UP ADJUST:
1) Adjust VR402 and set the (A) portion of the signal to
match the waveform above. (224V p/p 5V)

SET-DN ADJUST:
2) Adjust VR401 and set the (B) time of the signal to match
the waveform above. (180uSec 5uSec)

VR401
ADJUSTMENT LOCATION:
Lower Center Right
of the board.

52

July 2010

50PJ350

Plasma

Set Up Adjustment Too High or Low


Set Up swing is Minimum 181V Max 266V p/p

53

July 2010

50PJ350

Plasma

Set Down Adjustment Too High or Low


Set Dn swing is Minimum 116uSec Max 205uSec
Normal
180uSec

23V off the


Floor
Floor

Too Low
116uSec

54

July 2010

50PJ350

Plasma

Y-SUS Board Troubleshooting VScan

TIP: Use the Scan Output Screw Lugs to test for


V-Scan signal if the Y-Drive boards are removed

Y-SUS Board develops the V-Scan drive signal to the


Y-Drive boards.
This Section of the Presentation will cover troubleshooting
the Y-SUS Board.
Warning: Never run the Y-SUS with P212 (Y-SUS) or
P204/P110 (Y-Drives) removed unless the Y-Drive boards
are removed completely. Board Failure will occur.

P/N EBR6303801

Scan

Scan

55

July 2010

50PJ350

Plasma

Y-SUS Board P212 Connector to P205 Lower Y-Drive (Logic and FG5V)
TIP: Connectors do not come with a new Y-SUS or Y-Drives.
TIP: Use Scan Screw Lugs to test for Y-Scan signal if the Y-Drive boards are removed.
P205

P212

FGnd
FG5V (4.9V) measured from Pins 15 or 16
To Floating Gnd
Use screw just above P212 on the Y-SUS

c
Y-Drive Lower

Y-SUS Board

56

July 2010

50PJ350

Plasma

Y-SUS Board P212 to Lower Y-Drive P205 Logic Signals Explained


P212 Connector

c
FGnd
P205

P212

c
c
Y-Drive Lower

Y-SUS Board

Pin

Label

17

SUS_DN (FG)

16

FG5V

15

FG5V

14

SUS_DN (FG)

13

SUS_DN (FG)

12

YB_CLK

11

YB_CLK

10

YB_STB

YB_STB

YTB_OC1

YTB_OC1

YT_DATA

YT_DATA

YB_OC2

YB_OC2

SUS_DN (FG)

SUS_DN (FG)

Pins 3~12

(4mSec per/div)
The signal for these pins look very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
DO NOT hook scope Gnd to Floating Gnd TP
without an Isolation Transformer.

All logic pins about (400V p/p)

Pins 3~12 are Logic (Drive) Signals to the Y-Drive Upper.

57

July 2010

50PJ350

Plasma

Y-SUS P212 Connector Diode Mode Testing

Meter in the Diode Mode

P212 "Y-SUS" to "Lower "Y-Drive" P205

FGnd
P205

P212

c
c
Y-Drive Lower

Y-SUS Board

Y-Drive Board should be


disconnected for this test.

Red Lead on FG

Pin

Label

Run

Diode Check

Diode Check

17

SUS_DN (FG)

FG

FG

FG

16

FG5V

4.9V

1.82V

0.56V

15

FG5V

4.9V

1.82V

0.56V

14

SUS_DN (FG)

FG

FG

FG

13

SUS_DN (FG)

FG

FG

FG

12

YB_CLK

0.86V

1.38V

0.54V

11

YB_CLK

0.86V

1.38V

0.56V

10

YB_STB

2.8V

1.37V

0.66V

YB_STB

2.8V

1.37V

0.66V

YTB_OC1

2.2V

1.47V

0.68V

YTB_OC1

2.2V

1.47V

0.68V

YT_DATA

0V

1.38V

0.54V

YT_DATA

0V

1.38V

0.55V

YB_OC2

2.63V

1.47V

0.68V

YB_OC2

2.63V

1.47V

0.68V

SUS_DN (FG)

FG

FG

FG

SUS_DN (FG)

FG

FG

FG

58

July 2010

50PJ350

Plasma

Y-SUS Floating Ground (FG 15V) and (FG 5V) Checks


Voltage Measurements for the Y-SUS Board

P118

D511
FG 19.86V

D512
FG 9.17V

TIP: These components are on the back of the board. To Test


these voltages, remove the board completely, supply Ground
and any 5V supply to M5V fuse FS202.
Floating Ground checks must be made from
Floating Ground.
Use bottom two or top two screws on the far left
hand side of the Y-SUS.

FG 15V
Regulator
IC508

D513
FG 15.24V

Location

D514
FG 4.97V

FG 5V
Regulator
IC509

FG5V (Floating Ground 5V). Checked at IC509 Bottom Leg.


FG15V (Floating Ground 15V). Checked at IC508 Bottom Leg.

59

Location
Back Side of Board

July 2010

50PJ350

Plasma

Y-SUS 16V Generation Checks

Location

Voltage Measurements for the Y-SUS Board


16V Test Point
Used in the Y-SUS for Waveform Creation and Leaves the
Y-SUS board on P101 pins 1~3 to the Control Board.
Checked at Cathode Side D515.
Standby: 0V

Run: 16V

Diode Check: 1.32V

T502

D515
16V Source
Cathode Right Side
Just above T502

60

July 2010

50PJ350

Plasma

P101 Y-SUS to Control Board Fuse Information


Locations

Diode Check
Open
With Board
Disconnected
or Connected

FS201 (M5V)
10V/125V
Diode Check
1.19V
With Board
Disconnected.
0.97V with board
connected.

16V Pins 1 through 3


P101

FS204
(16V)
2A/125V

M5V Pins 4 through 7

FS204 Protects 16V


Creation
D501 and IC501.
Diode Check 1.61V
With Board
Disconnected or
1.59V Connected

61

July 2010

50PJ350

Plasma

Y-SUS P113 and P114 Plug Information

Voltage and Diode Mode Measurement

P210 Connector "Y-SUS" to "Power Supply" P812


Pin

Label

Run

Diode Check

1~2

Vs

*195V

Open

n/c

n/c

n/c

4~5

Gnd

Gnd

Gnd

6~7

Va

*60V

Open

Gnd

Gnd

Gnd

9~10

M5V

5.1V

1.19V

P210

P203 "Y-SUS" to "X-Drive Left" P122


Pin

Label

Run

Diode Check

1~3

Gnd

Gnd

Gnd

n/c

n/c

Open

5~7

Va

*60V

Open

P203

* Note: These voltages will vary in accordance with Panel Label


Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

62

July 2010

50PJ350

Plasma

Y-SUS P211 Plug Information

Voltage and Diode Mode Measurement

P211
P211 Connector "Y-SUS" to "Z-SUS" P2
Pin

Label

Run

Diode Check

1~2

Gnd

Gnd

Gnd

n/c

n/c

n/c

4~5

*Vs

*206V

Open

n/c

n/c

n/c

7~11

*ER_PASS

98V~102V

Open

* Note: These voltages will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

63

July 2010

50PJ350

Plasma

Y-SUS P101 to Control P111 Plug Voltage Checks

There are No Stand By


Voltages on this Connector

P101 Connector "Y-SUS" to P111 "Control"


Pin

Label

Run

Diode

Pin

Label

Run

Diode

+15V

16V

1.61V

16

DATA

0V

1.02V

+15V

16V

1.61V

17

SET_ON

2.09V

1.14V

+15V

16V

1.61V

18

OC1

1.43V

1.14V

+5V

4.9V

1.19V

19

Det_Level_Sel

0.03V

1.14V

+5V

4.9V

1.19V

20

STB

1.97V

1.14V

+5V

4.9V

1.19V

21

Slope_Rate_Sel

1.34V

1.14V

+5V

4.9V

1.19V

22

CLK

0.59V

1.14V

Gnd

Gnd

Gnd

23

YER_DN

0V

1.14V

CTRL_OE

0V

1.54V

24

SET_UP

0.24V

1.14V

10

Gnd

Gnd

Gnd

25

YSUS_DN_IN

0.95V

1.14V

11

OE

0V

1.75V

26

Ramp_Slope

1.01V

1.14V

12

Gnd

Gnd

Gnd

27

YER_UP

0.62V

1.14V

13

Gnd

Gnd

Gnd

28

Pass_Top

1.08V

1.14V

14

OC2

1.78V

1.19V

29

YSUS_UP_IN

0.06V

1.14V

15

Delta_VY_Det

2.08V

1.18V

30

Gnd

Gnd

Gnd

64

July 2010

Diode Mode Readings


taken with all connectors
Disconnected.
DVM in Diode Mode.

50PJ350

Plasma

Y-DRIVE BOARD SECTION (Y-Drive Explained)


Y-DRIVE UPPER
(TOP)
Y-DRIVE LOWER
(BOTTOM)

Y-Drive Boards work as a path supplying the


Sustain and Reset waveforms which are
made in the Y-Sustain board and sent to
the Panel through Scan Driver ICs.
The Y-Drive Boards receive a waveform
developed on the Y-SUS board then selects
the horizontal electrodes sequentially
starting at the top and scanning down the
panel.
Scanning is synchronized by receiving
Logic scan signals from the Control board.
The 50PJ350 uses 8 Driver ICs on
2 Y-Drive Boards commonly called
Y-Drive Buffers but are actually Gate
Arrays.

65

July 2010

50PJ350

Plasma

Y-Drive Board Layout


Y-DRIVE LOWER
(BOTTOM)

Y-DRIVE UPPER
(TOP)

Key Points of interest are;


If the lugs for Floating Gnd and Scan are
making contact with the Y-SUS board and the
connector P205 or the one between Upper and
lower P204/P110 are removed, the Y-SUS board
will fail.
Floating Ground is delivered to each of the
Y-Drive boards by 2 screw lugs.
Scan is delivered to each of the Y-Drive boards
by 1 screw lugs.
Each of the Y-Drive boards operate from
Floating Ground, (no reference to Chassis Gnd).
Floating Gnd 5V can be measured across C105
(Upper) or C205 (Lower).

66

July 2010

50PJ350

Plasma

Y-Drive Upper Layout

p/n: EBR63551601

PANEL
SIDE

Y-SUS
SIDE

Y-Drive signal (VSC), FG5V Volts


from the Y-SUS board and Logic
Signals from the Control board
through the Y-SUS are supplied to
the Lower Y-Drive Board on
Connector P205.

Connector P110 does not


come with a new
Y-SUS or Y-Drive.

Floating
Ground
Standoff

Warning: Never run the


Y-SUS with P110
disconnected. You must
remove the Y-Drive board
completely due to these FG
lugs.

The Floating Ground


Standoff delivers FG
To the Y-Drive Boards.
There are 2 per/board.

VScan
The VScan
Standoff delivers the
VScan signal to the
Y-Drive Boards.
There is per/board.

P110

67

July 2010

50PJ350

Plasma

Y-Drive Lower Layout

P204

PANEL
SIDE

p/n: EBR63551701

Y-SUS
SIDE

VScan

Connector P205 or P204


does not come with a new
Y-SUS or Y-Drive.

The VScan
Standoff delivers the
VScan signal to the
Y-Drive Boards.
There is per/board.

Warning: Never run the


Y-SUS with P205 or P204
disconnected. You must
remove the Y-Drive boards
completely due to these FG
lugs.

FG5V Volts from the Y-SUS


board and Logic Signals from
the Control board through the
Y-SUS are supplied to the
Lower Y-Drive Board on
Connector P205.
P204 delivers these same
signals to the Upper Y-Drive

Floating
Ground
Standoff
The Floating Ground
Standoff delivers FG
To the Y-Drive Boards.
There are 2 per/board.

P205

68

July 2010

50PJ350

Plasma

Y-Drive Diode Check Scan and FG


This checks the output Buffers.
PANEL
SIDE

Y-SUS
SIDE

Floating Gnd
Floating Gnd

Scan Signal

Any Connector to the Panel


(Buffer Output TP)

Scan Signal

Diode Mode Reading from Floating Ground


Scan Signal TP
Open with Red Lead on Scan
0.7844V with Black Lead on Scan
FL201
FG5V Fuse

Floating Gnd

Floating Gnd

69

FG5V TP
Open with Red Lead on Scan
0.41V with Black Lead on Scan
Any Output Buffer TP
Open with Red Lead on Scan
0.79V with Black Lead on Scan

July 2010

50PJ350

Plasma

Y-Drive Buffer Troubleshooting


YOU CAN CHECK FOR A SHORTED BUFFER ICs OUTPUT USING THIS PROCEDURE

BACK SIDE

FRONT SIDE

BUFFER IC
(FGnd)

Using the Diode Test on the DVM, check


the pins for shorts or abnormal loads.

RED LEAD On
BLACK LEAD On ANY
Floating Ground
Output Lug Reads 0.79V
Indicated by white outline

BACK
SIDE

Any of these output lugs can be tested.

BLACK LEAD On
RED LEAD On ANY
Floating Ground
Output Lug Reads Open
Indicated by white outline
6 Ribbon cables communicating with the Panels (Horizontal
Electrodes) totaling 768 lines determining the Panels Vertical
resolution pixel count.

Look for shorts indicating a defective Buffer IC

70

July 2010

50PJ350

Plasma

Y-Drive Upper P110 Connector Voltage and Diode Check


TIP: This connector does not come with a new Y-Drive.

Y-Drive Upper
P110 "Upper Y-Drive"

c
P110

P204

Black Lead
on FG

Red Lead
on FG

Pin

Label

Run

Diode Check

Diode Check

1~10

SUS_DN (FG)

FG

FG

FG

11

YSUS_DATA

0V

Open

Open

12

YT_OCR

2.4V

Open

0.53V

13

YT_OC1

2.2V

Open

0.55V

14

YT_LE(STB)

2.6V

Open

0.52V

15

YT_CLK

0.8V

Open

0.52V

16

YT_DATA

0V

Open

0.52V

17~20

SUS_DN (FG)

FG

FG

FG

21~23

FG5V

4.97V

2.8V

0.41V

24~30

SUS_DN (FG)

FG

FG

FG

Voltages taken from Floating Ground

Y-Drive Lower
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

71

July 2010

50PJ350

Plasma

Y-Drive Lower P204 Connector Voltage and Diode Check


TIP: This connector does not come with a new Y-Drive.

Y-Drive Upper
P204 "Lower Y-Drive"

c
P110

P204

Black Lead
on FG

Red Lead
on FG

Pin

Label

Run

Diode Check

Diode Check

1~7

SUS_DN (FG)

FG

FG

FG

8~10

FG5V

4.97V

Open

0.41V

11~14

SUS_DN (FG)

FG

FG

FG

15

YT_DATA

0V

Open

0.52V

16

YT_CLK

0.8V

Open

0.52V

17

YT_LE(STB)

2.6V

Open

0.52V

18

YT_OC1

2.2V

Open

0.55V

19

YT_OCR

2.4V

Open

0.53V

20

YSUS_DATA

0V

Open

Open

21~30

SUS_DN (FG)

FG

FG

FG

Voltages taken from Floating Ground

Y-Drive Lower
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

72

July 2010

50PJ350

Plasma

Removing (Panel) Flexible Ribbon Cables from Y-Drive Upper or Lower


Flexible Ribbon Cables shown are from a different model, but process is the same.
To remove the Ribbon Cable from the connector first carefully lift the Locking Tab from
the back and tilt it forward ( lift from under the tab as shown in Fig 1).
The locking tab must be standing straight up as shown in Fig 2.
Lift up the entire Ribbon Cable gently to release the Tabs on each end. (See Fig 3)
Gently slide the Ribbon Cable free from the connector.
Be sure ribbon tab is released
By lifting the ribbon up slightly,
before removing ribbon.

Gently Pry
Up Here

Locking tab in
upright position

Fig 1

Fig 3

Fig 2

To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated
securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1).

73

July 2010

50PJ350

Plasma

Incorrectly Seated Y-Drive Flexible Ribbon Cables


The Ribbon Cable is clearly improperly seated
into the connector. You can tell by observing the
line of the connector compared to the FPC, they
should be parallel.
The Locking Tab will offer a greater resistance to
closing in the case.
Note the cable is crooked. In this case the Tab on
the Ribbon cable was improperly seated at the
top. This can cause bars, lines, intermittent lines
abnormalities in the picture.
Remove the ribbon cable and re-seat it correctly.

74

July 2010

50PJ350

Plasma

Z-SUS SECTION
This Section of the Presentation will cover troubleshooting the Z-SUS Board Assembly.
Upon completion of this section the Technician will have a better understanding of the circuit and be
able to locate voltage and diode mode test points needed for troubleshooting and all alignments.

Note: The Z-SUS can not be run Stand-Alone in the 50T1 Panel Models.

Locations

DC Voltage and Waveform Test Points


Z BIAS Alignment
Diode Mode Test Points

Operating Voltages
Power Supply Supplied

VS
M5V Routed through Control Board

Y-SUS Supplied

16V Routed through Control Board

Developed on Z-SUS

Z Bias
75

July 2010

50PJ350

Plasma

Z-SUS Block Diagram


M5V and VS

Power Supply Board

Y-SUS Board
16V

M5V

Control Board

VS

M5V

16V

Z-SUS board receives VS and


M5V SMPS and 17V from the
Control board

Receives
Logic
Signals
Via 3 FPC

Circuits generate erase,


sustain waveforms

Generates Z Bias 100V

Flexible
Printed
Circuits

NO IPMs

PDP

FET Makes Drive waveform

Display

Simplified Block Diagram of Z-SUS (Sustain) Board

76

July 2010

Z-SUB

50PJ350

Panel

Plasma

Z-SUS Board Component Identification


FS1
VS
6.3A/250V

P/N EBR63040301
P101

P2
VS from Y-SUS.
Error Com to
the Y-SUS

No IPMs

Z-SUS
Output
FETs
No IPMs

P12
from
Control

Z-Bias TPs

Z-SUS
Waveform
Development
FETs

Z-SUS
Waveform
Test Point
J36

No IPMs

Z-Bias
VR201
P102
M5V from SMPS to the Y-SUS generates +16V.
M5V and 16V are routed through the Control board.
Logic Signals generated on the Control board.

P3 To Z-SUB

77

July 2010

50PJ350

Plasma

50PJ350 Z-SUS Layout Drawing


FS1
VS
D309
4A /
250V

P4
D312

P2

Z-SUS BOARD
p/n: EBR63040301

Z-Bias
Waveform
J36

VZB
TP
P1

VR201
VZB

P5

P3

78

July 2010

50PJ350

Plasma

Z-SUS Waveform
The Z-SUS (in combination with the Y-SUS) generates a
SUSTAIN Signal and an ERASE PULSE for generating
SUSTAIN and DISCHARGE in the Panel.
This waveform is supplied to the panel through two FPC
(Flexible Printed Circuit) connections P101 and P102 and
to the Z-SUB P3 to P7 and then to one FPC (Flexible
Printed Circuit) connections P202.
Reset

Y Drive
Waveform

Oscilloscope Connection Point.


J36 to check Z Output waveform.
Right Hand Side Center.

Z Drive
Waveform

(Vzb) Z Bias VR201 manipulates the


offset of this waveform segment.
Vzb voltage 95V 1V

TIP: The Z-Bias (VZB) Adjustment is a


DC level adjustment.
This is only to show the effects
of Z-Bias on the waveform.

This Waveform is just for reference to observe the effects of Zbz adjustment

79

July 2010

50PJ350

Plasma

VZB (Z-Bias) VR201 Adjustment


Read the Voltage Label on the back top center
of the panel when adjusting VR201.
VZB (Z Bias)

Bottom Left of Z-SUS Board

VZB (Z-Bias) TP

+
VZB (Z Bias)
VR201

Set should run for 15 minutes, this is the Heat Run mode.
Set screen to White Wash mode or 100 IRE White input.
All SMPS adjustments should have been completed.
1. Place DC Volt meter between VZB TPs.
2. Adjust VZB (Z Bias) VR201 in accordance with your Panels voltage label.

80

July 2010

50PJ350

Plasma

Connector P2 to Y-SUS P211 Voltages and Diode Checks


Voltage and Diode Mode Measurements
P2 Location: Top Left
There are no Stand-By voltages on this connector
Pin 1

P2 "Z-SUS" to "Y-SUS" P211


Pin

Label

Run

Diode Check

1~2

Gnd

Gnd

Gnd

n/c

n/c

n/c

4~5

+Vs

*206V

Open

n/c

n/c

n/c

7~11

ER_COM

98V~102V

Open

* Note: This voltage will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

81

July 2010

50PJ350

Plasma

Connector P1 to Control P102 Voltages and Diode Checks


Voltage and Diode Mode Measurements
P1 Location:
Bottom Left hand side

P1 "Z-SUS Board" to "Control" P101


Pin

Label

Run

Diode Check

1~2

(+15V)

16V

Open

3~4

(+5V)

4.9V

1.52V

Gnd

Gnd

Gnd

Y_OE

0.058V

3.09V

ZBIAS

1.83V

Open

SLOP_CONTROL

Gnd

Open

Z_ER

0.14V

Open

10

ZSUS_DN

0.77V

Open

11

ZSUS_UP

0.17V

Open

12

Gnd

Gnd

Gnd

Pin 1

There are no Stand-By voltages on this connector


Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

82

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Plasma

CONTROL BOARD SECTION


This Section of the Presentation will cover troubleshooting the Control Board Assembly. Upon
completion of this section the Technician will have a better understanding of the circuit and be
able to locate voltage and diode mode test points needed for troubleshooting.

DC Voltage and Waveform Test Points


Diode Mode Test Points

Signals
Main Board Supplied Panel Control and LVDS (Video) Signals
Control Board Generated Y-SUS and Z-SUS Drive Signals (Sustain)
X Board Drive Signals (RGB Address)

Operating Voltages
Y-SUS Supplied

+5V (M5V) Developed on the SMPS


+16V (Routed to the Z-SUS)
(Not used by the Control Board)

Developed on the Control Board

+1.8V for internal use


+3.3V for internal use
+3.3V for the X-Boards (TCPs)
83

July 2010

50PJ350

Plasma

Control Board Pictorial

p/n: EBR63549501

n/c (For ROM Updates)

P102

P121

P111

IC211
IC231

P101

IC801

Pattern Generator
For Panel Test
D201 Should
be blinking

P161

P162
84

July 2010

50PJ350

Plasma

Control Board Component Identification and Checks


With the unit on, if D201 is not on, check 5V supply
from FS202 on the Y-SUS.
Pins 4~7 of P111. If present replace the Control
Board. If missing, see (To Test Control Board)
Note: IC231 (3.3V Regulator)
routed to all X Boards
1~3 (16V)

LVDS Video
P121

P102
IC231

4-7 (M5V)

Ribbon Cable
Y-SUS and Y Drive Signals

CONTROL BOARD
p/n: EBR63549501

X101

IC141
IC211

P111

IC101

IC101

P101 "Control" to "Z-SUS Board" P1


Pin
Label
Run
Diode
1
(+15V)
16V
Open
2
(+15V)
16V
Open
3
(+5V)
4.9V
1.52V
4
(+5V)
4.9V
1.52V
5
Gnd
Gnd
Gnd
6
Y_OE
0.058V
3.09V
7
ZBIAS
1.83V
Open
8
Slop_Ctl
Gnd
Open
9
Z_ER
0.14V
Open
10
ZSUS_DN
0.77V
Open
11
ZSUS_UP
0.17V
Open
12
Gnd
Gnd
Gnd

Z-Drive Creation Signals


M5V and 16V to Z-SUS

IC1

16V protected by
FS204 on Y-SUS

Auto Gen P101


IC801

D201 LED

VS_DA
P162

P161

PANEL TEST: Disconnect P301,


Remove LVDS Cable. Short across
Auto Gen TPs to generate a test
pattern. When A/C power is applied.

To Test Control Board:


X-Drive Center
3.3V and X-Drive
IC231
Disconnect all connectors.
and Left
Center and Right
(1) Gnd
Jump STBY 5V from SMPS P813 Pin 13
RGB Signals
(2) 3.29V
RGB Signals
to pin 3 (bottom leg) of IC231.
(3) 4.94V
3.3V from IC231
Apply AC and turn on the Set. Observe
Pins 56~60
Control board LED D201, if its on, most
likely Control board is OK.
* If the complaint is no video and shorting the points (AutoGen)
causes video to appear suspect the Main board or LVDS cable.
Note: LVDS Cable must be removed for Auto Gen to work.

85

July 2010

IC801
(1) 1.79V
(2) 3.29V
(3) n/c
(4) 0V
(5) 0V

50PJ350

IC211
(1) Gnd
(2) 1.8V
(3) 3.27V

Plasma

Control Board Temperature Sensor Location (Chocolate)


BACK SIDE OF
THE BOARD

Be sure the Chocolate


(Heat Transfer Material) remains
in place if the board is removed.

Chocolate
(Heat Transfer Material)

Pin 1
IC121
04) 3.3V 03) Gnd
05) Gnd 02) Gnd
06) 3.3V 01) 3.3V

CONTROL BOARD TEMPERATURE


SENSOR LOCATION

Note: The temperature circuit not only protects the panel


from overheating, but it also is responsible for
manipulating the Y-Drive waveform as the panel changes
temperature.

86

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Plasma

Locking on to the Y-Drive or Z-Drive Waveform Tip


Note, this TP (VS_DA) can be used as an
External Trigger for scope when locking onto
the Y-Drive (Scan) or the Z-Drive signal.
This signal can also be used
to help lock the scope when observing
the LVDS video signals.

87

July 2010

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Checking the Crystal X101 Clock on the Control Board


Check the output of the Oscillator (Crystal) X101.
The frequency of the sine wave is 25 MHZ.
Missing this clock signal will halt operation of the panel
drive signals.

Osc. Check: 25Mhz Left Leg

X101

Osc. Check: 25Mhz Right Leg

CONTROL
BOARD
CRYSTAL
LOCATION

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July 2010

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Control Board Signal (Simplified Block Diagram)


The Control Board supplies Video Signals to the TCP (Tape Carrier Package) ICs.
If there is a bar defect on the screen, it could be a Control Board problem.

Control Board to X Board


Address Signal Flow

Basic Diagram of Control Board


IC201

This Picture shows Signal Flow Distribution to help determine the


failure depending on where the it shows on the screen.

MCM

DRAM

16 bit words

MCM IC201

To Center
X-Board

X-DRIVE BOARD

Resistor Array

EEPROM

4096 Vertical Electrodes

128 Lines per Buffer


256 Lines output Total

89

PANEL
There are 16 total TCPs.

2 Buffer
Outputs
per TCP
To Center
X-Board

CONTROL BOARD

July 2010

4986 (RGB) / 3 =
1365 Total Pixels (H)

50PJ350

Plasma

Control Board Connector P111 to Y-SUS P101 Voltages and Diode Mode Checks
These pins are very close together. Use Caution when taking Voltage measurements.

Pins 1 through 3
Receive 16V from the Y-SUS.
Protected on Y-SUS by FS204

Pin c

P111 Label Silk Screen


Pins 4 through 7
Receive M5V from the Y-SUS.
Protected on Y-SUS by FS202

All the rest are delivering


Y-SUS Waveform development and
Y-Drive logic signals to the Y-SUS
Board (Y-Drive logic signals are simply
routed right through the Y-SUS to the
Y-Drive boards).
Note: The +16V is not used by the Control
board, it is routed to the Z-SUS leaving on
P101 Pins 1~2.
The M5V also leaves on P101 Pins 3~4.

90

July 2010

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Control P111 to Y-SUS P101 Plug Information

Note: There are no voltages in Stand-By mode

P111 "Control" Odd Pins to P101 "Y-SUS"

P111 "Control" Even Pins to P101 "Y-SUS"

Pin

Label

Run

Diode Check

Pin

Label

Run

Diode Check

+15V

16V

Open

+15V

16V

Open

+15V

16V

Open

+5V

4.9V

1.4V

+5V

4.9V

1.52V

+5V

4.9V

1.4V

+5V

4.9V

1.52V

Gnd

Gnd

Gnd

CTRL_OE

0V

2.98V

10

Gnd

Gnd

Gnd

11

OE

0V

1.64V

12

Gnd

Gnd

Gnd

13

Gnd

Gnd

Gnd

14

I_OC2

1.78V

2.84V

15

I_Delta_VY_Det

2.08V

2.81V

16

I_DATA

0V

2.84V

17

I_SET_ON

2.09V

2.81V

18

I_OC1

1.43V

2.84V

19

I_Det_Level_Sel

0.03V

2.81V

20

I_STB

1.97V

2.84V

21

I_Slope_Rate_Sel

1.34V

2.81V

22

I_CLK

0.59V

2.82V

23

I_YER_DN

0V

2.81V

24

I_SET_UP

0.24V

2.82V

25

I_YSUS_DN_IN

0.95V

2.82V

26

I_Ramp_Slope_Opt1

1.01V

2.82V

27

I_YER_UP

0.62V

2.83V

28

I_Pass_Top

1.08V

2.82V

29

I_YSUS_UP_IN

0.06V

2.84V

30

Gnd

Gnd

Gnd

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

91

July 2010

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Control Board LVDS P121 Signals


LVDS Cable P121 on Control board shown.
Press two outside tabs inward to release.

P121
LVDS

Video Signals from the Main Board to the Control Board are referred
to as Low Voltage Differential Signals or LVDS. The video is
delivered in 12 bit LVDS format. Their presence can be confirmed
with the Oscilloscope by monitoring the LVDS signals with SMPTE
Color Bar input. Loss of these Signals would confirm the failure is on
the Main Board or the LVDS Cable itself.
Example of LVDS Video Signal

LVDS
LVDS Removed

Example of Normal Signals measured at 1V p/p at 10Sec

Pins are close together.

Pins 2~5, 7~8, 11~12, 15~16, 24~25 are LVDS Video Signals.
Pins 9~10 and 22~23 are clock signals for the data.

92

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Control Board LVDS P121 Connector Voltages and Diode Check


P121 Connector "Control Board to Main P703
P121 LVDS "Control" to P703 "Main"

P121 LVDS "Control" to P703 "Main"

Pin

Label

Run

Diode
Check

Pin

Label

Run

Diode
Check

Gnd

Gnd

Gnd

17

ROM_TX

3.3V

3.09V

RA2-

1.13V

1.32V

18

ROM_RX

3.29V

3.09V

RA2+

1.35V

1.36V

19

Gnd

Gnd

Gnd

RB2-

1.21V

1.36V

20

n/c

n/c

Open

21

n/c

n/c

Open

22

PC_SER_CLK

0.59V

3.08V

23

PC_SER_DATA

3.3V

3.09V

24

RE2-

1.23V

1.36V

25

RE2+

1.25V

1.36V

26

Gnd

Gnd

Gnd

27

DISP_EN

2.87V

Open

28

Module_SDA1

3.3V

Open

29

Module_SCL1

3.3V

Open

30

n/c

n/c

Open

31

Gnd

Gnd

Gnd

RB2+

1.27V

1.36V

Gnd

Gnd

Gnd

RC2-

1.26V

1.32V

RC2+

1.22V

1.36V

RCLK2-

1.23V

1.36V

10

RCLK2+

1.23V

1.36V

11

RD2-

1.21V

1.36V

12

RD2+

1.26V

1.36V

13

Gnd

Gnd

Gnd

14

Gnd

Gnd

Gnd

15

RF2-

1.23V

1.32V

16

RF2+

1.25V

1.36V

1
Pin 27 is the reason the LVDS
cable must be removed to use the
EX_AUTO_GEN shorting pins to
create multiple internal generated
test patterns (Panel Test).
Enables the
Control Board

Blue Pins indicate 12 bit


differential video signal

Note: There are no voltages in Stand-By mode.

93

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Control Board P101 Connector Pin ID and Voltages


Voltage and Diode Mode Measurements for the Control Board.
Note: There are no voltages in Stand-By mode.

P101 Label

P101 Connector "Control" to "Z-SUS Board" P1


Pin

Label

Run

Diode Check

(+15V)

16V

Open

(+15V)

16V

Open

(+5V)

4.9V

1.52V

(+5V)

4.9V

1.52V

Gnd

Gnd

Gnd

Y_OE

0.058V

3.09V

ZBIAS

1.83V

Open

SLOP_CONTROL

Gnd

Open

Z_ER

0.14V

Open

10

ZSUS_DN

0.77V

Open

11

ZSUS_UP

0.17V

Open

12

Gnd

Gnd

Gnd

5V
16V

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

94

July 2010

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P161 Connector "Control Board to Center X Board P231


P161 Connector to the Center X-Board P231

(Pins not shown are Gnd)

Pin

Run

Diode Mode

Pin

Run

Diode Mode

1.27V

0.97V

33

1.0V

0.97V

1.0V

0.97V

34

1.27V

0.97V

1.27V

0.97V

35

1.0V

0.97V

1.0V

0.97V

37

1.27V

0.97V

1.27V

0.97V

38

1.0V

0.97V

1.0V

0.97V

39

1.27V

0.97V

11

1.27V

0.97V

40

1.0V

0.97V

12

1.0V

0.97V

42

1.27V

0.97V

14

1.27V

0.97V

43

1.0V

0.97V

15

1.0V

0.97V

44

1.27V

0.97V

16

1.27V

0.97V

45

1.0V

0.97V

17

1.0V

0.97V

46

1.27V

0.97V

19

1.27V

0.97V

47

1.0V

0.97V

20

1.0V

0.97V

49

1.27V

0.97V

21

1.27V

0.97V

50

1.0V

0.97V

22

1.0V

0.97V

51

1.27V

0.97V

24

1.27V

0.97V

52

1.0V

0.97V

25

1.0V

0.97V

53

1.27V

0.97V

26

1.27V

0.97V

54

1.87V

1.2V

27

1.0V

0.97V

56

1.87V

1.2V

29

1.27V

0.97V

57

3.22V

1.2V

30

1.0V

0.97V

58

0.49V

1.1V

32

1.27V

0.97V

59

0.49V

1.1V

95

White hash
marks count
as 5

July 2010

50PJ350

Plasma

P162 Connector "Control Board to Center X Board P232


White hash marks
count as 5

56~60
3.3V

(Pins not shown are n/c or Gnd)

P162 Connector to the Center X-Board P232


Pin

Run

Diode
Mode

Pin

Run

Diode
Mode

Pin

Run

Diode
Mode

Pin

Run

Diode
Mode

1.27V

0.97V

15

1.27V

0.97V

29

1.27V

0.97V

43

1.0V

0.97V

1.0V

0.97V

17

1.0V

0.97V

30

1.0V

0.97V

46

1.27V

0.97V

1.27V

0.97V

18

1.0V

0.97V

32

1.27V

0.97V

47

1.0V

1.2V

1.0V

0.97V

19

1.27V

0.97V

33

1.0V

0.97V

48

1.27V

1.2V

1.27V

0.97V

20

1.0V

0.97V

35

1.27V

0.97V

49

1.0V

1.2V

1.0V

0.97V

22

1.27V

0.97V

36

1.0V

0.97V

50

1.27V

1.1V

1.27V

0.97V

23

1.0V

0.97V

37

1.27V

0.97V

51

1.0V

0.97V

10

1.0V

0.97V

24

1.27V

0.97V

38

1.0V

0.97V

52

1.27V

0.97V

11

1.27V

0.97V

25

1.0V

0.97V

40

1.27V

0.97V

56~60

3.3V

0.67V

12

1.0V

0.97V

27

1.27V

0.97V

41

1.0V

0.97V

14

1.27V

0.97V

28

1.0V

0.97V

42

1.27V

0.97V

96

July 2010

Note:
There are no voltages in
Stand-By mode.

50PJ350

Plasma

X BOARD (LEFT, RIGHT and CENTER) SECTION


The following section gives detailed information about the X boards. These boards
deliver the Color information signal developed on the Control board to the TCPs,
(Taped Carrier Packages). The TCPs are attached to the vertical FPCs, (Flexible
Printed Circuits) which are attached directly to the panel. The X boards are the
attachment points for these FPCs.
These boards have no adjustment.
X-BOARD OPERATIONAL VOLTAGE:
VA: Originally developed on the Switched Mode Power Supply.
VA (Voltage for Address) is routed through the Y-SUS board, out on P203 pins 5~7
and then to the Left X board via P122 pins 5~7. Va leaves P121 pins 1~5 and is sent
to the Center X-Board via P212 pins 48~50.
It then leaves on P211 pins 1~5 and goes to the Right X P331 pins 48~50.
3.3V: Control board develops 3.3V (IC231) and routes to the Center X board via
ribbon connector P232 pins 1~5. It is then distributed to the other X Boards.
To the Left X board via P212 pins 41~42 to P121 pins 11~12.
To the Right X board via P211 pins 11~12 to P331 pins 41~42.

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X Board Additional Information


There are three X boards, the Left, Center and the Right
(As viewed from the rear of the set).
The three X boards have very little circuitry. They are basically signal
and voltage routing boards.
They route Va voltage to all of the Taped Carrier Packages (TCPs).
Va is introduced to the Left X board first, then the Left X sends
Va to the Center X and then the Center X sends Va to the Right X.
They route the Logic (Color) signals from the Control board
to all of the Taped Carrier Packages (TCPs).
The X boards have connectors to 16 TCPs, 5 on the left and right.
The Center X board has connections to 6 TCPs.
There are a total of 16 TCPs and each TCP has 2 gate arrays, so
there are a total of 32 buffers feeding the panels 4986 vertical
electrodes.

98

July 2010

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X Board TCP Heat Sink Warning


NEVER run the television with this heat sink removed.
Damage to the TCPs will occur and cause a defective panel.

The Vertical Address


buffers (TCPs) have
one heat sink
indicated by the arrow.
It protects all 16 TCPs.

99

July 2010

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X Board Layout Primary Circuit Diode Check


The three X-Boards have similar circuit layouts for the connections going to the TCPs, as shown below.

VA
Pins 4~7

3.3V
Pins 32~33

VA
Pins 44~47

On Gnd
On the below:

On any Va (0.55V) TCPs connected.


On any Va (0.6V) TCPs disconnected.
On 3.3V (0.6V) TCPs connected.
On 3.3V (1.09V) TCPs disconnected.

VA source
disconnected
from Left X board

100

Gnd

On Gnd
On the below:

On any Va (Open) TCPs connected.


On any Va (Open) TCPs disconnected.
On 3.3V (1.9V) TCPs connected.
On 3.3V (2.5V) TCPs connected.

July 2010

50PJ350

Plasma

TCP (Tape Carrier Package)


This shows the layout of the bottom ribbon cables connecting to the Panels Vertical electrodes,
(Address Bus). Note that each ribbon cable has a solid state device called a TCP attached.
X Drive Board

Y-SUS Board

Logic
X_B/D

Frame
Rear panel Vertical Address
Front panel Horizontal Address

256 Vertical
Electrodes

Va

Control Board
3.3V
ctor
Conne

256 total lines


128 lines

TCP
Taped Carrier
Package

Chocolate
128 lines

Con
nect
or
Flex
ibl
Cabl e
e

TCP
Attached directly
to Flexible cable

Long Black
Heat Sink

Back side of TCP Ribbon

101

July 2010

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Plasma

TCP Testing

50PJ350 X Board TCP Connector Distribution


Any X Board to Any TCP P101~P105 or P201~P206 or P301~P305

Va: P122 5~7 from Y-SUS


Va: Routes to:

3.3V Origination
From Control board IC231 center leg.
Arrives on X board Cent P232 Pins 1~5

Leaves Center X P212 pins 47~50


To Left X : P121 pins 1~4
Leaves Center X P211 pins 1~4
To Right X : P331 pins 47~50

Leaves Center X P212 pins 40~41


To Left X : P121 pins 10~11
Leaves Center X P211 pins 10~11
To Right X : P331 pins 40~41

Must be checked on flexible cable.

Flexible Printed Ribbon Cable to TCP IC

On any Gnd
Gnd

Reversed
On Va (0.51V)
On 3.3V (0.535V)
On EC (Open)

On Va (Open)
On 3.3V (2.8V)
On EC (Open)

Gnd

Va

On the below:

Gnd Va
3.3V

n/c

n/c
1

10

15

102

20

25

30

35

40

45

Look for any TCPs


being discolored.
Ribbon Damage.
Cracks, folds
Pinches, scratches,
etc

50

July 2010

50PJ350

Plasma

TCP 3.3V B+ Check


For Connectors P162 on the
Control board, see Control
board section.

Warning: DO NOT attempt to run the set with the


Heat Sink over the TCPs removed.
Checking IC231 for 3.3V, use center pin or Case of component.

With all connectors connected, place the Red


Lead On 3.3V Diode Check (1.9V)
Black Lead On 3.3V Diode Check (0.6V)
This also test IC201 on the Center Board

IC231
Gnd

3.3V for TCPs


IC53 on
Control Board

3.29V
4.94V

3.3V in on Pins 1 ~ 5 only on P232 connector from the Control board

Center X Board P232

3.3V
All Connectors to All TCPs look very
similar for the 3.3V test point. The trace
at pins 32 and 33 of each connector.
There is a small feed trough and a Cap,
you can use for Test Points.
Example here from P204. You can only
check for continuity back to IC231, you
can not run the set with heat sink
removed.

103

July 2010

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TCP Visual Observation. Damaged TCP


Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed.
After a very short time, these ICs will begin to self destruct due to overheating.
This damaged TCP can, (at the location of the TCP).
a) Cause the Power Supply to shutdown. (VA shorted, 3.3V shorted).
b) Generate abnormal vertical bars, (colored noise).
c) Cause the entire area driven by the TCP to be All White or ALL BLACK.
d) Cause a Single Pixel Width Line defect. The line can be Red, Green or Blue.
e) A dirty contact at the connector can cause b, c and d also.

TCP
Tapped
Carrier
Package
Look for burns, pin
holes, damage, etc.

104

July 2010

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Left X Drive P122 Connector from Y-SUS P203 Information


Voltage and Diode Mode Measurement (No Stand-By Voltages)

P122 "X Drive Left" to "Y-SUS" P203

With Heat Sink

Pin

Label

Run

Diode Check

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

n/c

n/a

n/a

VA

*60V

Open

VA

*60V

Open

VA

*60V

Open

* Note: This voltage will vary in accordance with Panel Label.


There are no Stand-By voltages on this connector.

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

105

July 2010

50PJ350

Plasma

P121, P212, P211 and P331 X Board Connector (VA Diode Check)
Out

In

Out

In

Va 1~5
3.3V 11~12

Va 48~50
3.3V 41~42

Va 1~5
3.3V 11~12

Va 48~50
3.3V 41~42

On Chassis Gnd

P212 Center X

P211 Center X
+

P121 Left X

On Va (Open) Y-SUS connector removed, TCPs connected.


On Va (Open) all connectors removed,
TCPs disconnected.

106

P331 Right X

On Chassis Gnd
On Va (0.55) Y-SUS connector
removed, TCPs connected.
On Va (0.6V) all connectors removed,
TCPs disconnected.

July 2010

50PJ350

Plasma

MAIN BOARD SECTION


The following section gives detailed information about the Main board. This board contains the
Microprocessor, Audio section, video section and all input, outputs. It also receives all input
signals and processes them to be delivered to the Control board via the LVDS cable. The main
tuner (Silicon Tuner using discreet components) which provides VSB, 8VSB and QAM is located
on the main board. This board is also where the televisions software upgrades are accomplished
through the USB input.
This board has no mechanical adjustments.
The Main Board Receives its operational voltage from the SMPS:
DURING STAND-BY: From SMPS
STBY 5V
DURING RUN From SMPS : (STBY 5V remains):
+5V for Video processing
16V for Audio
DISTRIBUTION:

Distributes the Turn On Commands to the SMPS.


Distributes LVDS video to the Control Board.
Distributes Key 1 and Key 2 to the Front IR Board then to the Front Key Pad.
Receives Intelligent Sensor data from the Front IR Board (via SCL/SDA).
Drives front Power LEDs.
Distributes +3.3V_ST and +3.3V_MST to the Front IR Board.

107

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Main Board Layout and Identification


P704
to Ft IR

P703
LVDS

P301 to
SMPS

P801
Audio
Optical
Audio

HDMI

USB

IC1
Microprocessor
Video Processor
PC
Audio

Remote
RS232

PC

HDMI

RF
In

Rear
Inputs

108

July 2010

50PJ350

Plasma

50PJ350 Main Front Layout Drawing


To SMPS

C
C
A1 A2

P301

P703

IC308

D2

P704

IC201

IC202

To Ft IR

L313

IC1
L803

IC801

D1

C2
C1

L804

P801
To SPK

12Mhz
X1

Mstar
Micro/
Video

MAIN BOARD
p/n: EBT60953802

(All Pins 12.3V)

C A2
A1

IC402

X402
25Mhz
31.875Mhz
X401

E B
C

IC401
D501

Q404
Q402
E B C
D505
C B
A1
C

A2 C

B E

Q401 Q403

Tuner

C A2
D504
A1

109

July 2010

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50PJ350 Main Board Front Side Component Voltages

50PJ350 Main Board (Front Side) Component Voltages


IC202
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

7V (to IC405)
Regulator
Gnd
Gnd
Gnd
Gnd
3.3V
3.3V
Gnd
3.3V

Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

1.3V_VDDC
Regulator
Use scope:
Do not measure Pin 1: 1.4~1.7V P/P
Using DVM, set
Gnd
shuts off.
5.04V
6.07V
4.99V
1.28V
Use scope:
1.28V
Pin 8: 600mV P/P
4.27V

IC308

Q401
Pin
[B]
[E]
[C]

Tuner CVBS
Buffer (Analog)
1.19V
1.86V
Gnd

Pin
[B]
[E]
[C]

IF_P Buffer
(Digital)
1.18V
1.18V
Gnd

Pin
[B]
[E]
[C]

Tuner SIF
Buffer (Digital)
1.32V
1.99V
Gnd

Pin
[B]
[E]
[C]

IF_N Buffer
(Digital)
1.32V
1.99V
Gnd

Q402

Using DVM, set


shuts off.

Q403

Q404

110

Q502
Pin
[1 B]
[2 S]
[3 D]
[4 G]

HDMI CEC
Buffer
Gnd
3.18V
3.29V
3.3V

Pin
[A1]
[A]
[A2]

Reset
Speed Up
Gnd
0V
Gnd

Pin
[A1]
[C]
[A2]

LED-R
Routing
0V
0.13V
0.28V

D501
Pin
[A1]
[A]
[A2]

B+ Routing
to IC502
0V
4.54V
5.0V

Pin
[A1]
[A]
[A2]

B+ Routing
to IC504
0V
4.54V
5.0V

Pin
[A1]
[A]
[A2]

B+ Routing
to IC503
0V
4.54V
5.0V

D504
D1

D505
D2

50PJ350 Main Back Layout Drawing


IC301
3

IC302
2

2 1E B
3

Q301

S G
D

IC501

Q302

IC701
IC203

IC303

IC304

Q504
E B

Q303

S GE B

Q304

IC703

IC504

D502
IC306
3

A2

MAIN BOARD
p/n: EBT60953802

A1

Q501

E B
C

IC502

2
3

Q702

C E
B

Q503

E B
C

IC503

IC307
IC602

111

July 2010

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50PJ350 Main Board Back Side Component Voltages

IC203
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]

Winbond Serial
Flash
0V
3.30V
n/c
n/c
n/c
n/c
0V
3.3V
0V
Gnd
n/c
n/c
n/c
n/c
0V
0V

Pin
[1]
[2]
[3]

1.8V_MST
Regulator
0.6V
1.85V (Out)
3.3V (In)

IC303
Pin
[1]
[2]
[3]
IC304

IC501
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

1.2V_DVDD Reg
Pin
Dig Ch Only
[1] Gnd
Only on
[2] 1.2V (Out) with Dig
Channel
[3] 3.3V (In)

IC306
Pin
[1]
[2]
[3]

3.3V_TU
Regulator
Gnd
3.3V (Out)
4.97V (In)

Pin
[1]
[2]
[3]

1.8V_TU
Regulator
Gnd
1.8V (Out)
3.3V (In)

IC307
IC301

3.3V_MST
Regulator
Gnd
3.3V (Out)
5.04V (In)

IC502
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

IC503, IC504
EDID Data
For HDMI
Gnd
Gnd
Gnd
Gnd
4.52V
4.52V
3.33V
4.53V

Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

RGB
EEPROM
Gnd
Gnd
Gnd
Gnd
5.09V
5.09V
3.33V
5.09V

IC602
IC302
Pin
[1]
[2]
[3]

3.3V_VST
Regulator
Gnd
3.3V (Out)
5.09V (In)

HDCP Data
EEPROM
Gnd
Gnd
3.3V
Gnd
3.3V
3.3V
3.3V
3.3V

IC701
Pin
[1]
[2]
[3]
[4]
[5]
[6]
IC703

Q301

3.3V
5.45V
0V
0V
(-5.37V)
(-5.4V)
(-5.4V)
0V
3.3V
3.3V
n/c
n/c
0V
5.45V
Gnd
3.3V (B+)

Driver for 5V_MST


Switch Q302
0.6V
0V
Gnd

Q702

Pin
[B]
[C]
[E]

5V_MST
Switch
0V
5.09V
5.04V

D502

Pin
[G]
[S]
[D]

Q302

RS232 Tx/Rx
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]

112

USB 5V
Limiter
4.97V (In)
Gnd
3.3V (Enable)
0V
0V
4.97V (Out)

Q303

3.3V_PVSB Sw
Pin
Dig Ch Only
[G] 0V
Only on
[S] 3.3V with Dig
[D] 3.3V Channel

Q304
Pin
[B]
[C]
[E]

Driver for 3.3V_PVSB


Switch Q303
0.64V Only on
with Dig
0V
Gnd Channel

Q501, Q503
Q504
Hot Swap
Pin Switch for HDMI
[B] 0V
[C] 0V
[E] Gnd

Pin
[B]
[C]
[E]

RS232
Tx Buffer
0.6V
0V
Gnd

HDMI CEC Limite


Pin
[A1] 0V
[A2] 3.28V
[C] 3.1V

Main Board Tuner Explained


The Tuner in this set is discreet components (Silicon Tuner) and no longer a self contained unit (can).
Check for Tuner B+:
3.3V on IC306 and 1.8V on IC307

Back Side bottom left hand side

Front bottom right hand side

113

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Main Board Crystal X1, X402 and X401 Check

X1 12Mhz

X1
1.58V

1.49V

Left Side 2.6V p/p

X1 Runs all the time (Micro Halt Crystal)

Right Side 3.50V p/p

X402 25MHZ
X402

X402 Runs only


during On
(Overtone Crystal)

1.48V

Top Side 2.8V p/p

1.6V

Bottom Side 4.2V p/p

X401 31.875MHZ
X1
X401

MAIN Board

0.54V

0.66V

Crystal Location
Left Side 0.7V p/p

114

July 2010

Right Side 1V p/p

50PJ350

Plasma

Main Board Removing the LVDS Cable or Power Supply Connector


(1) Using your fingers and press in gently on the two locking tabs.
Then rock the connector out of the plug.

P301 or P703

(2) Pull the Cable from the Connector


by rocking back and forth.
If the Connector Locks have been
damaged and will not release, use a thin
object and slide straight down (as
indicated by the arrows below) and
release the locks.

115

July 2010

50PJ350

Plasma

Main Board P703 LVDS Video Signal Test Points


Waveforms Taken from P703 pins 11 and 12, but there
are actually 10 pins carrying video.
Input Signal SMPT Color Bar. 10mV per/div.
Pin 1 front row right side
Note: There are no wires
into pins 1 and 2.

Pin 11 10uSec per/div

Pin 12 10uSec per/div

Pin 11 2uSec per/div

Pin 12 2uSec per/div

MAIN Board
Main Board P703 Location

116

July 2010

50PJ350

Plasma

Main Board Plug P703 LVDS Voltages

Voltage and Diode Test for the Main Board

1
P703 Main Board Connector to P121 "Control Board
Pin

Label

Run

Diode
Check

Pin

Label

Run

Diode
Check

n/c

n/c

Open

n/c

n/c

Open

ROM_RX

3.29V

2.6V

ROM_TX

3.3V

2.6V

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Module_SCL1

3.3V

2.6V

10

Module_SDA1

3.3V

2.6V

11

RE2+

1.25V

0.77V

12

RE2-

1.23V

1.09V

13

RD2+

1.26V

0.77V

14

RD2-

1.21V

1.09V

15

RCLK2+

1.23V

0.77V

16

RCLK2-

1.23V

0.77V

17

RC2+

1.22V

0.77V

18

RC2-

1.26V

0.77V

19

RB2+

1.27V

0.77V

20

RB2-

1.21V

0.77V

21

RA2+

1.35V

0.76V

22

RA2-

1.13V

0.77V

23

PC_SER_CLK

0.59V

1.03V

24

PC_SER_DATA

3.3V

1.49V

25

DISP_EN

2.87V

0.49V

26

Gnd

Gnd

Gnd

Pin 1 front row right side


Note: There are no wires
into pins 1 and 2.
Blue Pins indicate 10 bit
differential video signal
Note:
There are no voltages in
Stand-By mode.

Diode Mode Check with the Board Disconnected.

117

July 2010

50PJ350

Plasma

Main Board Plug P704 to Ft IR


Voltage and Diode Mode Measurements for the Main Board

P704 Connector "Main Board" to P100 "Front Keys"

3&4
Soft Touch
Key Board

7&8
Intelligent
Sensor
Stand-By
3.3V

Pin

Label

STBY

Run

Diode
Check

IR

3.3V

3.76V

3.12V

Gnd

Gnd

Gnd

Gnd

Key_CTL_0

3.3V

3.29V

1.53V

Key_CTL_1

3.3V

3.29V

1.53V

LED_RED

2.7V

0.21V

Open

Gnd

Gnd

Gnd

Gnd

EYE_SCL

0V

3.27V

2.64V

EYE_SDA

0.25V

3.27V

2.64V

Gnd

Gnd

Gnd

Gnd

10

3.3VST

3.3V

3.29V

0.85V

11

3.3V_MST

0V

3.31V

0.50V

12

LED_BLUE

0V

0V

Open

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

118

July 2010

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Plasma

Main Board Plug P301 to Power Supply Voltages and Diode Check

Pin c front

Diode Mode Check with the Board Disconnected. DVM in the Diode mode.

P301 Connector "Main" to "SMPS Board" P813


Pin

Label

STBY

Run

Diode

1~2

0V

17V

Open

Gnd

Gnd

Gnd

5V

0.46V

5.17V

0.94V

Error_Det

2.85V

4.9V

3.04V

16V

3~4

Gnd

5~7

ac

9~12

Gnd

Gnd

Gnd

Gnd

13~14

STBY_5V

3.46V

5.14V

1.07V

15

RL_ON

0V

2.43V

2.62V

16

ad

AC Det

0V

4.44V

3.1V

17

M_ON

0V

3.29V

Open

Auto_Gnd

Gnd

Gnd

Gnd

18

P301

Front pins are odd


Back pins are even

a Note: The RL_On turns on +5V, 17V Error Det. and AC_DET.
b Note: The M5-On command turns on M5V, Va and Vs.
c Note: The Error Det line is not used in this model.
d Note: If the AC Det line is Missing, the TV will turn off in 10 Seconds.
e Note: Pin 18 is grounded on the Main. If opened, the power
supply turns on automatically.

119

July 2010

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Plasma

Main Board Speaker Plug P801 Voltage and Diode Check


Voltage and Diode Mode Measurements for the Main Board Speaker Plug
P8010 Connector "Main" to "Speakers"

Pin

Label

SBY

Run

Diode Mode

R-

0V

8.51V

Open

R+

0V

8.51V

Open

L-

0V

8.51V

Open

L+

0V

8.51V

Open

IC801Audio
Amp

Main Board Location

Left (+)

Left (-)

Right (+)

Right (-)

P801
Speaker
Connector

Diode Mode Check with the Board Disconnected. DVM in the Diode mode.

120

July 2010

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FRONT IR, POWER LED and SOFT TOUCH KEY PAD SECTION
The following section gives detailed information about the Front IR and Soft Touch
Key Pad. These boards contains the Infrared Receiver, Intelligent Sensor and Power
LEDs section. The Soft Touch Function Keys is actually a thin pad adhered to the
front protective shield.
The Power LED Driver and Intelligent Sensor IC communicate with the Main Board
Microprocessor (IC1) via Clock and Data lines.
These boards have no adjustments.
The Front Control Board (IR and Intelligent Sensor) receives its operational B+ from
the Main Board:

3.3V_ST from the Main Board. This voltage is generated on the Main
Board (IC302)

3.3V_MST generated on the Main Board (IC303).

The Front Power LEDs are driven by 2 separate pins from the Main board SCL/SDA
pins 7 and 8.
The IR signal is routed back to the Main Board via pin 1.
Also, the Soft Touch Key Pad is routed through the Front IR board and out P100 to
P704 pins 3 and 4.

121

July 2010

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Plasma

Front Control (IR and Intelligent Sensor) Board and Power LED Board Location
Lower Left Side (As viewed from rear).
Front IR Board

P100
To Main

P101
To Soft Touch
Key Board

Soft Touch
Key Pad

Soft Touch Key Pad


Thin strip adhered to
the protective front
glass.

To remove P101 ribbon, using your fingernail, lift up the locking


locking
mechanism. Slide the board out to the left to release the ribbon cable.
To facilitate reinstallation, slide the board to the right
just enough to place a slight bow in the ribbon cable,
then using a small object, press down gently on the ribbon. When properly
seated, the ribbon will be under the two plastic tabs in the connector.
connector.

122

July 2010

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Front Control Board Connector P100 Voltage and Pin Identification


P100 Connector "Front Keys" to P704 "Main Board"
For the Soft Touch
Key Pad section.

7&8
Front LEDs
and
Intelligent
Sensor

Stand-By
3.3V

Pin

Label

STBY

Run

Diode Check

IR

3.3V

3.76V

2.75V

Gnd

Gnd

Gnd

Gnd

Key_CTL_0

3.3V

3.29V

2.58V

Key_CTL_1

3.3V

3.29V

2.58V

LED_RED

2.7V

0.21V

3.13V

Gnd

Gnd

Gnd

Gnd

EYE_SCL

0V

3.27V

2.53V

EYE_SDA

0.25V

3.27V

2.54V

Gnd

Gnd

Gnd

Gnd

10

3.3VST

3.3V

3.29V

2.28V

11

3.3V_MST

0V

3.31V

2.85V

12

LED_BLUE

0V

0V

Open

For Readings when any Key is


touched, see Soft Key Pad Section
For Key 1 and Key 2.
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

123

July 2010

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Front IR Board Plug P101 to Soft Touch Keys (Voltages and Pin Identification)
Voltage and Diode Mode Measurements for the Main Board

P101 CONNECTOR Ft IR Board" to "Ft Key Pad


Pin

STBY

Run

Diode Check

0.07

0.16

2.4V

0.07

0.16

2.4V

0.07

0.16

2.4V

0.07

0.16

2.4V

0.07

0.16

2.4V

0.07

0.16

2.4V

0.07

0.16

2.4V

0.07

0.16

2.4V

Voltage Measured with a Scope


Measuring Voltage on Pin 1 with DVM turns the TV on. If TV is on, Input Menu pops up.

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

124

July 2010

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SOFT TOUCH KEY PAD SECTION (Board Layout and Identification)


The Soft Touch Key Pad is a thin Static sensitive pad that is adhered to the front protective shield.
The Soft Touch Key Pad requires a static sensitive key press decoder IC to change the key press
data into R2 Ladder (Resistive data) which the Microprocessor can understand. This IC is on the
Front IR board IC100 which receives key press data from P101. The output from this IC simply
selects the appropriate resistor to inject into the Key 1 or Key 2 line which is then interpreted by the
Microprocessor in the Main board IC1.
P101

IC100
static sensitive
key press
decoder

Front the static


sensitive key pad

c
Button Identification for the Front the static sensitive key pad

125

July 2010

50PJ350

Plasma

Soft Touch Key Pad


The Soft Touch Key Pad is a thin Static sensitive pad
that is adhered to the inside of the front protective shield.

Plastic Frame
Lifted up slightly

P101
Ribbon Cable

Soft Touch
Key Pad

126

July 2010

50PJ350

Plasma

Soft Touch Key


Pad Resistance
and Diode Mode
Checks
IC100 on the Front IR
Board is generating
these Resistance
changes when a Soft
Touch Key is touched.
This in turn pulls down
the Key 1 and Key 2
lines to be interpreted
by the Microprocessor.

P100 (Key 1, Key 2) Resistance Reading with Soft Touch Key pressed.
KEY

Pin 3 measured
from Gnd

KEY

Pin 4 measured
from Gnd

CH (Up)

0.61K Ohms

Volume (+)

3.6K Ohms

CH (Dn)

9K Ohms

Volume (-)

0.62K Ohms

Input

3.66K Ohms

Enter

22K Ohms

Menu

9K Ohms

P100 Voltage Measurements with Soft Touch Key pressed.


KEY

Pin 3 measured
from Gnd

KEY

Pin 4 measured
from Gnd

CH (Up)

2.1V

Volume (+)

0.89V

CH (Dn)

1.619V

Volume (-)

0.214V

Input

0.88V

Enter

2.42V

Menu

1.667V

P100 Connector IR/LED Control Board to P703 Main (No Key Pressed)
Diode Mode
Readings taken with
all connectors
Disconnected. Black
lead on Gnd. DVM
in Diode Mode.

Pin

Label

STBY

Run

Diode Mode

KEY 1

3.3V

3.29V

2.58V

KEY 2

3.3V

3.29V

1.58V

127

July 2010

50PJ350

Plasma

INVISIBLE SPEAKER SYSTEM SECTION


Invisible Speaker System Overview (Full Range Speakers)

p/n: EAB60962801

The 50PJ350 contains the Invisible Speaker system.


The Full Range Speakers point downward, so there are no front viewable speaker grills or air ports.

Installed View

Remove two screws


from the bottom
Top View

Reading
across speaker
wires, 8.2 ohm.
Cone View

128

July 2010

50PJ350

Plasma

INTERCONNECT DIAGRAM (11 X 17 Foldout) SECTION

This section shows the Interconnect Diagram called the


11X17 foldout thats available in the Paper and Adobe
version of the Training Manual.
Use the Adobe version to zoom in for easier reading.
When Printing the Interconnect diagram, print from the
Adobe version and print onto 11X17 size paper for best
results.

129

July 2010

50PJ350

Plasma

2mS

50PJ350 (50T1 Panel) CIRCUIT INTERCONNECT DIAGRAM

224V p/p
5V

VR402
Set-up

SMPS Stand-Alone Test Unplug P813 to Main board.


Use two (100W) light bulbs in series between Vs and Gnd to place a load on the SMPS.
Apply AC, all voltage should run. To Test the Set without Main board, leave P812 connected. Do not use light bulbs.
See Auto Gen on the Control board to perform a Panel Test.
If all supplies do not run when A/C is applied, disconnect P812 to isolate the excessive load.

0V

P812

VS-DA on the control PWB can be


used as a trigger for Y or Z-SUS.

VR401
Set-Dn
75VAC rms White
90VAC rms Black

VA TP

180uSec 5uSec

100V

100uS

Step 1: RL_On command turns on the 17V,


+5V, AC-Det and Error_Det. If Missing, the
set will Shut Off after 10 Seconds.
Error_Det. is not used by the Main.

Connect Scope between Waveform


TP on Y-Drive and Gnd

IC110

P101

WARNING:
Remove upper Y-DRIVE
Board completely if P110
or P204 is removed.

Y-DRIVE UPPER
BOARD
p/n: EBR63551601

D401
SET-UP
VR402

P102

Floating
GND

FS203 VS
Diode Check reads Open with
Board Disconnected or Connected

D305

FS203
4A
VS

6
7~11

P210

D407
C105

Y-SUS
p/n: EBR63039801

Scan

250V
220uf

P201

Y Signal
TP
P110

P108
N/C

P209
N/C

250V
220uf

FS201 10A
VA

250V
220uf
250V
220uf

P204
Y Signal
TP

FS202
10A
5VDC

250V
220uf

-VY
TP

Scan

IC201

ZD501 Feed Back ref


for VSC regulation

SET-DN

n/c
ER_PASS

n/c
98V~102V

Diode
Gnd
n/c
Open

L601

n/c
Open

L602

P212

P205

D514

2
1
3

Label
SUS_DN (FG)

2
3

IC204

Run
0V

FG5V

4.9V

FG5V

4.9V

SUS_DN (FG)

0V

SUS_DN (FG)

0V

YB_CLK

0.86V

YB_CLK

0.86V

YB_STB

Pin

Label

Run

VS

*195V

n/c

n/c

4~5

Gnd

Gnd

Gnd

Gnd

6~7

VA

*60V

Open

Open

Gnd

Gnd

Gnd

Gnd

9~10

M5V

5.1V

1.19V

2.1V

Run

No Load

Diode

1~2
3~4

16V

0V

Gnd

Gnd

17V

17V

3.17V

Gnd

Gnd

5~7

5V

Gnd

0.46V

5.17V

5.19V

1.13V

8
9~12

Error_Det

2.85V

4.9V

4.9V

3.0V

Gnd

Gnd

Gnd

Gnd

Gnd

3.46V

5.14V

5.19V

2.56V

15

RL_ON

0V

2.43V

0V

Open

16

AC Det

0V

4.44V

4.92V

3.1V

17

M_ON

0V

3.29V

0V

Open

18

Auto_Gnd

Gnd

Gnd

4.84V

Open

FS1 Diode Check


Open with Board
Connected or
Disconnected

FS1

50V

250V
220uf

250V
220uf

250V
220uf

100uS

248V p/p

250V
220uf

D309

P101

P2

D312

Z-SUS
p/n: EBR63040301

n/c

n/c

J36
Z-SUS
OUT
TP

2.8V

YB_STB

2.8V

10

YTB_OC1

2.2V

11

YTB_OC1

2.2V

12

YT_DATA

0V

13

YT_DATA

0V

14

YB_OC2

2.63V

15

YB_OC2

2.63V

16

SUS_DN (FG)

FG

17

SUS_DN (FG)

FG

Note:
Connectors
between
P212~P205
and
P204~P110
DO NOT
come with
a new
board

FS204 Protects 16V Creation


D501 and IC501.
Diode Check 1.61V
With Board Disconnected or
1.59V Connected

Note: IC231 (3.3V Regulator)


routed to all X Boards
To Check for Y-SUS Drive Waveform
With the Y-Drive boards Disconnected
Use the 3rd screw on the left from the bottom.

WARNING:
Va Remove lower Y-DRIVE
Board completely if P212
or P205 is removed.
P203 Y-SUS and P122 X-Left
Pin
1,2,3
4
5,6,7

Y-DRIVE Lower
p/n: EBR63551701

Run
Gnd
nc
VA Voltage

Diode Check
Gnd
nc
Open

IC231

4-7 (M5V)

Ribbon Cable
Y-SUS and Y Drive Signals

P111

P102

P103

Ft IR
Intelligent
Sensor P100

CONTROL
BOARD
p/n:
EBR63549501

No Load
17V
Gnd
5.19V
4.9V
Gnd
5.19V
0V
4.92V
0V

P102

VR201

3.3V from IC231


Pins 56~60

P162

PANEL TEST:
Disconnect P301,
Remove LVDS Cable.
Short across Auto Gen
TPs to generate a test
pattern. When A/C
power is applied.

3.3V and X-Drive


Center and Right
RGB Signals
P231

P201

P202

P7
NOTE: Diode tests are conducted with the board disconnected.
P202

LVDS

P704

To Ft IR

IC303

STBY Run
3.3V
Gnd
3.3V
3.3V
2.7V
Gnd
0V
0.25V

3.76V
Gnd
3.29V
3.29V
0.21V
Gnd
3.27V
3.27V

Q301

B E1 2
C 3 IC302 STBY
Regulator
G S

Q302

D1
A

1~8

Stby/Run

Diode

0.07V/0.16V

2.4V

Diode
Gnd
0.85V
0.50V
Open

D501

D504

A2

IC202

C2

IC1
Mstar
Micro/
Video

X1
12Mhz

L313
IC701

IC203

IC402
IC304
2

B E G S

L804

MAIN BOARD
p/n: EBT60953802

IC703
D502

Q304

X402
25Mhz

B E
C

Q504

1
31.875Mhz
X401

Q402
Q404
E B C
D505
C

A1 A2

Q401

C
B E
C

A1

Q501

IC401

IC503

A2
A1

IC308

IC501

Q303

P801

IC502

STBY Run
Diode Pin Label
Gnd Gnd
3.12V 9 Gnd
3.3V 3.29V
Gnd 10 3.3V_ST
1.53V 11 3.3V_MST 0V 3.31V
0V
0V
1.53V 12 LED Blue
Open
Gnd
2.64V
2.64V

C1

P703

Grayed out components


are on the back

IC801

L803

IC201

P101 (Ft IR) to Key Pad

IC301
1 3

D2

A1 A2

Tuner

B E
C

Q503

E
Q702 B C

B
E B E
C
C
B E

P203

X-Board Center
p/n: EBR64062201

3
IC307
2

IC602

P204

P205

P211
Va out on pins 1-5
3.3V out on pins 11 & 12

P206

P331

X-Board Right
p/n: EBR64062001

Va in on pins 48-50
3.3V in on pins 41~42

P301

P302

P303

P304

A1 C
A2

IC504

3Q403
IC306
2

VA, 3.3V and X-Drive Right RGB Signals


P232
3.3V in on
Pins 1-5

Va in on pins 48-50
3.3V out on pins 41~42

P201

To SMPS

Measuring Voltage on
Pin 1 of P101 with DVM
turns the TV on. If TV is
on, Input Menu pops up.
Pin

P3

Ft Key Pad

P704 Main to P100 (Ft IR)


Pin Label
1
IR
2
Gnd
3
Key 1
4
Key 2
5 LED-R
6
Gnd
7
SCL
8
SDA

The Z-SUS can NOT be run Stand-Alone

Diode
Open
Gnd
0.94V
3.04V
Gnd
1.07V
2.62V
3.1V
Open

P101

IR Board
p/n: EBR65007704

VS_DA

D201
LED

* If the complaint is no video and


shorting the points (AutoGen) causes
video to appear suspect the Main
board or LVDS cable.
Note: LVDS Cable must be removed
for Auto Gen to work.

VA, 3.3V and X-Drive


Left RGB Signals

P105

Run
17V
Gnd
5.17V
4.9V
Gnd
5.14V
2.43V
4.44V
3.29V

To SPK

X-Drive Center and Left


RGB Signals

P212

P1

P301

IC211
IC211 (1) Gnd
(2) 1.8V
IC101 (3) 3.27V

P161

Va out on pins 1~5


3.3V in on pins 11~12

P104

IC141

IC101

IC801

To Test Control Board:


Disconnect all connectors.
Jump STBY 5V from SMPS P813 Pin 13 to pin
3 (bottom leg) of IC231.
Apply AC and turn on the Set. Observe Control
board LED D201, if its on, most likely Control
board is OK.

P121

X-Board Left
p/n: EBR64062301

IC231
(1) Gnd
(2) 3.29V
(3) 4.94V

X101

Auto Gen P101

P122

P101

P301 "Main" to "SMPS" P813


Pin
Label
STBY
1~2
16V
0V
3~4
Gnd
Gnd
5~7
5V
0.46V
8
Error_Det
2.85V
9~12
Gnd
Gnd
13~14
STBY_5V
3.46V
15
RL_ON
0V
16
AC Det
0V
17
M_ON
0V

IC1
IC801
(1) 1.79V
(2) 3.29V
(3) n/c
(4) 0V
(5) 0V

VZB TP
+
-

Z-Drive Creation Signals

P101 Connector "Control" to "Z-SUS Board" P1


Pin
Label
Run
Diode
1
(+15V)
16V
Open
2
(+15V)
16V
Open
3
(+5V)
4.9V
1.52V
4
(+5V)
4.9V
1.52V
5
Gnd
Gnd
Gnd
6
Y_OE
0.058V
3.09V
7
ZBIAS
1.83V
Open
8
Slop_Ctl
Gnd
Open
9
Z_ER
0.14V
Open
10
ZSUS_DN
0.77V
Open
11
ZSUS_UP
0.17V
Open
12
Gnd
Gnd
Gnd

P102
1~3 (16V)

If AC-Det is missing, as a work around test,


Jump the STBY-5V to the AC-Det line. If the set works
normally, then the SMPS is defective.
If the Main board is the problem, perform the normal
Panel Test to confirm the Main is the only problem.

Note: The RL_On turns on +5V, 17V Error Det. and AC_DET.
Note: The M5-On command turns on M5V, Va and Vs.
c
Note: The Error Det line is not used in this model.
d
Note: If the AC Det line is Missing, the TV will turn off in 10 Seconds.
e
Note: Pin 18 is grounded on the Main. If opened, the power
supply turns on automatically.
b

Control Board Test


With the unit on, if D201 is not on, check 5V
supply from FS202 on the Y-SUS.
Also on pins 4~7 of P111. If present
replace the Control Board. If missing,
See (To Test Control Board)

FS202 M5V
Diode Check reads
0.97V Board Connected
or 1.19 Disconnected

P212 "Y-SUS" to P205


Pin

P203

P813

P210 P812
Diode Diode
Open Open

1~2

FS201 Va
Diode Check reads Open
with Board Disconnected
or Connected

P203

Test FG5V
across C205

F101
10A
250V

D103

P121

D503 Cathode Source for -Vy


D512 Cathode Source for 5VFG
D511 Cathode Source for 15VFG

IC509 D512

P202

C205

T301

SC101

D504

Anode = 5VFG

F302
2.5A
250V
D302

D301

ZD502 FB ref
for 15VFG

VR401
Grayed out components
D503
-VY
are on the back
ZD501
VR502
T302
IC503
VSC
IC202
D501
VSC
FS204 2A
TP
IC502
P101
16VDC
Floating
Anti PRV D502
IC302
D515 Cathode
GND
Source for +16V
Q503
Q502
D515
IC510
IC508
Anode = 15VFG
FG5V
2
1
D511
3
FL201
D504 Cathode Source for VSC
D513
T502

IC203

ZD301
ZD101
ZD303 D303
D601

D308
D309
D306

STBY

P1 "Z-SUS Board" to "Control" P101


Pin
Label
Run
Diode
P2 Z-SUS to
*1~2
(+15V)
16V
Open
Y-SUS P111
*3~4
(+15V)
16V
Open
Pin Diode
5
Gnd
Gnd
Gnd
6
Y_OE
0.058V Open
1~2
Gnd
7
ZBIAS
1.83V 2.82V
n/c
3
Slope_Ctl 0.086V 2.82V
8
4~5 Open
9
Z_ER
0.14V 2.82V
6
n/c
10 ZSUS_DN 0.77V 2.82V
11 ZSUS_UP 0.17V 2.82V
7~11 Open
12
Gnd
Gnd
Gnd
* If 16V is missing check FS204 on the Y-Sus.

D609 ZD401

ZD302
D307

Stand-By: 1.5V
Run: 388V

P211 Y-SUS to Z-SUS P2


Pin
Label
Run
1~2
Gnd
Gnd
3
n/c
n/c
4~5
+Vs
*206V

P210 Y-SUS to SMPS P812

P103

VA
ADJ

D805

D601

Label

D409

IC130

Test FG5V
across C105
IC140

SMPS
p/n: EAY60968701

ZD803

Pin

13~14 STBY_5V

T902

Step 2: M5 On command Turns on M5V,


then Va, then Vs.

P211

IC120

Stand-By: 0.9V
Run: 388V

Connect Scope between


Waveform TP J36 on Z board
and Gnd. Use RMS
information just to check for
board activity.
VS-DA on the control PWB can be
used as a trigger for Y or Z-SUS.

P813 "SMPS" to P301 "Main"

VS
ADJ

VS TP
F801
4A
250V

548V p/p

T901

50VAC rms White


46VAC rms Black

P305

50PJ350 Main Board (Front Side) Component Voltages


IC202
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

7V (to IC405)
Regulator
Gnd
Gnd
Gnd
Gnd
3.3V
3.3V
Gnd
3.3V

Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

1.3V_VDDC
Regulator
Do not measure
Gnd
5.04V
6.07V
4.99V
1.28V
1.28V
4.27V

IC308

Q401
Pin
[B]
[E]
[C]

Tuner CVBS
Buffer (Analog)
1.19V
1.86V
Gnd

Pin
[B]
[E]
[C]

IF_P Buffer
(Digital)
1.18V
1.18V
Gnd

Pin
[B]
[E]
[C]

Tuner SIF
Buffer (Digital)
1.32V
1.99V
Gnd

Pin
[B]
[E]
[C]

IF_N Buffer
(Digital)
1.32V
1.99V
Gnd

Q402

Use scope:
Pin 1: 1.4~1.7V P/P
Using DVM, set
shuts off.

Q403

Q404
Use scope:
Pin 8: 600mV P/P
Using DVM, set
shuts off.

Q502
Pin
[1 B]
[2 S]
[3 D]
[4 G]

HDMI CEC
Buffer
Gnd
3.18V
3.29V
3.3V

Pin
[A1]
[A]
[A2]

Reset
Speed Up
Gnd
0V
Gnd

Pin
[A1]
[C]
[A2]

LED-R
Routing
0V
0.13V
0.28V

D501
Pin
[A1]
[A]
[A2]

B+ Routing
to IC502
0V
4.54V
5.0V

Pin
[A1]
[A]
[A2]

B+ Routing
to IC504
0V
4.54V
5.0V

Pin
[A1]
[A]
[A2]

B+ Routing
to IC503
0V
4.54V
5.0V

D504
D1

D505
D2

50PJ350 Main Board (Back Side) Component Voltages


IC203
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]

Winbond Serial
Flash
0V
3.30V
n/c
n/c
n/c
n/c
0V
3.3V
0V
Gnd
n/c
n/c
n/c
n/c
0V
0V

Pin
[1]
[2]
[3]

1.8V_MST
Regulator
0.6V
1.85V (Out)
3.3V (In)

IC303
Pin
[1]
[2]
[3]
IC304

IC501
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

1.2V_DVDD Reg
Pin
Dig Ch Only
[1] Gnd
Only on
[2] 1.2V (Out) with Dig
Channel
[3] 3.3V (In)

IC306
Pin
[1]
[2]
[3]

3.3V_TU
Regulator
Gnd
3.3V (Out)
4.97V (In)

Pin
[1]
[2]
[3]

1.8V_TU
Regulator
Gnd
1.8V (Out)
3.3V (In)

IC307
IC301

3.3V_MST
Regulator
Gnd
3.3V (Out)
5.04V (In)

IC502
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

IC503, IC504
EDID Data
For HDMI
Gnd
Gnd
Gnd
Gnd
4.52V
4.52V
3.33V
4.53V

Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]

RGB
EEPROM
Gnd
Gnd
Gnd
Gnd
5.09V
5.09V
3.33V
5.09V

IC602
IC302
Pin
[1]
[2]
[3]

3.3V_VST
Regulator
Gnd
3.3V (Out)
5.09V (In)

HDCP Data
EEPROM
Gnd
Gnd
3.3V
Gnd
3.3V
3.3V
3.3V
3.3V

IC701
Pin
[1]
[2]
[3]
[4]
[5]
[6]
IC703

USB 5V
Q301
Limiter
4.97V (In)
Gnd
3.3V (Enable)
0V
0V
Q302
4.97V (Out)
RS232 Tx/Rx

Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]

3.3V
5.45V
0V
0V
(-5.37V)
(-5.4V)
(-5.4V)
0V
3.3V
3.3V
n/c
n/c
0V
5.45V
Gnd
3.3V (B+)

Q303

Driver for 5V_MST


Switch Q302
0.6V
0V
Gnd

Q702

Pin
[B]
[C]
[E]

5V_MST
Switch
0V
5.09V
5.04V

D502

Pin
[G]
[S]
[D]

3.3V_PVSB Sw
Pin
Dig Ch Only
[G] 0V
Only on
[S] 3.3V with Dig
[D] 3.3V Channel

Q304
Pin
[B]
[C]
[E]
Q501, Q503
Q504
Pin
[B]
[C]
[E]

Driver for 3.3V_PVSB


Switch Q303
0.64V Only on
with Dig
0V
Gnd Channel

Hot Swap
Switch for HDMI
0V
0V
Gnd

Pin
[B]
[C]
[E]

RS232
Tx Buffer
0.6V
0V
Gnd

HDMI CEC Limiter


Pin
[A1] 0V
[A2] 3.28V
[C] 3.1V

Connector P703 Configuration


- indicates signal pins.
2

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

15 and 16
Is the Video Clock and
Data lines

End of Presentation

This concludes the Presentation


Thank You

133

July 2010

50PJ350

Plasma