EEEB273 Electronics Analysis & Design II

Learning Outcome
Able to:
Describe the mechanism by which a differential-mode
signal and common-mode signal are produced in a
BJT diff-amp.
Describe the dc transfer characteristics of a BJT diffamp.
Define common-mode rejection ratio.

Reference: Neamen, Chapter 11

5.1)

5.1)

Differential amplifier, also called diffamp, is a fundamental building block of

analog circuits.
It is the input stage of virtually every opamp, and is the basis of a high-speed
emitter-coupled logic (ECL) circuit family.
Matched/identical transistor
characteristics are critical to the design of
the IC diff-amp, which in general
incorporates current-source biasing and
active loads.

5.1)

Fig 11.1: Diff-amp block diagram

Figure 11.1 shows a block diagram of the diff-amp.
There are 2 input terminals and 1 output terminal.
Ideally the output signal is proportional to only the
difference between the two input signals.
vO=Ad(v1 - v2)
(11.1)
In ideal case, if v1=v2 then the output is zero.
Define the differential-mode input voltage as
vd=v1 - v2
(11.2)
Define the common-mode input voltage as
vcm=(v1 + v2) / 2
(11.3)

5.2)

If v1=v2 then vd=0 and vcm= v1 = v2

If v1 = +10V and v2 = -10V then vd = 20V and vcm= 0
If v1 = 110V and v2 = 90V then vd = 20V
but vcm= 110V
If each pair of input voltages were applied to the ideal
diff-amp, the output case would be exactly the same.

However, amplifiers are not ideal, and the

common-mode input signal does affect the
output.
One goal of the design of diff-amp is to
minimize the effect of the common-mode
input signal.

Figure 11.2 shows the basic BJT differential-pair

configuration.
Two identical transistor Q1 and Q2,
whose emitters are connected
together, are biased by a constant
current source IQ which is
connected to a negative supply V_
The collectors of Q1 and Q2 are
connected through RC to a positive
supply V+
By design, Q1 and Q2 are to remain
biased in the forward-active region.
Fig 11.2: Basic
If input signal voltages at base are
BJT differentialzero, Q1 and Q2 are still biased in
pair configuration forward-active region by the current
source.

Lecturer: Dr Jamaludin Bin Omar

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EEEB273 Electronics Analysis & Design II

5.3)

5.3)
Both base terminals are connected
together and a common-mode
voltage vcm is applied.

When base currents are negligible,

iC1

iE1

Transistors are biased on by

constant-current source, and
voltage at common emitter is

and iC2

iE2,

and vC1 = V+ - (IQ/2)RC = vC2 (11.5)

vE = vcm - VBE(on)
Fig 11.3(a): Basic
diff-amp with
applied commonmode voltage

Current IQ splits evenly between

the 2 transistors because Q1 and Q2
are matched or identical

Fig 11.3(a): Basic

diff-amp with
applied commonmode voltage

From (11.5)
for an applied
common-mode voltage vcm, IQ splits
evenly between Q1 and Q2 and the
difference between vC1 and vC2 is 0,
or
vC1 - vC2 = 0

iE1 = iE2 = IQ / 2

5.4)

5.4)
Apply differential input voltage

A potential difference now

exists between the two
collector terminals.

vB1 = +vd/2 and vB2 = -vd/2

Fig 11.3(b): Basic diffamp with applied diffmode voltage

The voltages at the bases of

Q1 and Q2 are no longer equal.
The B-E voltages on Q1 and
Q2 are no longer equal since
emitters are common, where
vBE1 > vBE2

A voltage difference is
created between vC2 and vC1
when a differential-mode input
voltage is applied, given by:
vC 2 vC1 = [V + (

iC1 increases by I above its

quiescent value and
iC2 decreases by I below
its quiescent value

5.5)

I ) RC ] [V + (

I CQ
2

+ I ) RC ] = 2 IRC

{Example 11.1}

5.5)

Assume Q1 and Q2 are matched and operating at the

same temperature (IS and VT are the same!):

iC1 = I S e vBE1 / VT , iC 2 = I S e vBE 2 / VT

Neglecting iB,

I CQ

I Q = iC1 + iC 2 = I S e

vBE 1 / VT

+e

v BE 2 / VT

From Fig 11.3(b):

Therefore:

iC1 =
iC 2 =

iC1
1
=
( v BE 2 vBE 1 ) / VT
IQ 1+ e
iC 2
1
=
( v BE 2 v BE 1 ) / VT
IQ 1 + e

vBE1 vBE 2 vd
IQ
1 + e vd / VT
IQ
1 + e + vd / VT

(11.12(a))
(11.12(b))

Equations (11.12(a)) and (11.12(b))

describe the basic current-voltage
characteristics of the diff-amp.

Lecturer: Dr Jamaludin Bin Omar

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EEEB273 Electronics Analysis & Design II

5.5)

5.5)

If the diff-mode input voltage is zero,

then the current IQ splits evenly between iC1
and iC2.

Fig 11.5 is the normalized

plot of the dc transfer
characteristics for the BJT
diff-amp.
There are 2 basic
observations from Fig 11.5:

When a diff-mode signal vd is applied, a

difference occurs between iC1 and iC2, which
in turn causes a change in the collector
terminal voltage. This is the fundamental
operation of the diff-amp.

1) The gain of diff-amp is proportional to the slopes

of transfer curves about the point vd = 0. For a
linear amplifier
the excursion of vd about zero
must be kept small.

If a common-mode signal vCM = vB1 = vB2

is applied, the bias current IQ still splits
evenly between the two transistors.

2) As magnitude of vd becomes sufficiently large,

essentially all of IQ goes to one transistor, and
the other transistor effectively turns off.

5.6)

Figure 11.5

5.6)
Differential input signals:

Magnitude of small-signal
collector current in each
transistor is then (gmvd)/2

v1 = +vd/2 and v2 = -vd/2

Forward-transconductance:
gf =
Fig 11.7: BJT diff-amp
with differential-mode
input signal

IQ
4VT

Linear approximations for the

collector currents:

1 IQ / 2 1
= gm
2 VT
2

where (IQ/2) is quiescent

collector current in Q1 and Q2
and gm is individual transistor
transconductance

5.6)

Fig 11.7: BJT diff-amp

with differential-mode
input signal

iC 2

IQ

vd
2
v
=
gm d
2
2

iC1 =

2
IQ

+ gm

5.7) !" #

Define Two-sided output voltage as

vO = vC2 vC1

(11.16)

Two-sided output voltage is defined as the

difference between two collector voltages, as
given by Equation (11.16) above.
The output voltage can be written as

] [

vO = V + iC 2 RC V + iC1 RC = (iC 1 iC 2 ) RC

or

vO =

IQ

I
g v
g v
+ m d Q m d
2
2
2
2

RC = g m RC vd

Fig 11.8: Equivalent ac circuit of diff-amp with

differential-mode input signal and
(a) Two-sided output voltage, and
(b) One-sided output voltage

Lecturer: Dr Jamaludin Bin Omar

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EEEB273 Electronics Analysis & Design II

5.7) !" #

5.7) !" #

Assume an ideal current source

RO is infinite.

For Figure 11.8(a):

One-sided output voltage is defined as the

voltage at any collector terminal with respect
to ground, as shown in Figure 11.8(b).

Two-sided output voltage, vo is

If the output to be vc2, the one-sided output

voltage, vo is

v o = vc 2 v c 1 =

g m vd
g m vd
RC
RC = g m RC vd
2
2

Differential-mode gain, Ad is
Ad =

g m vd
RC
2

vo =

Differential gain, Ad is

I Q RC

vo
= g m RC =
vd
2VT

Ad =

vO g m RC I Q RC
=
=
vd
2
4VT

(11.21)

5.8) Small-signal Equivalent Circuit Analysis

5.8) Small-signal Equivalent Circuit Analysis (Cont)

Assuming the operation in the linear range

Can also derive the gain and other characteristics
of the diff-amp, using the small-signal equivalent
circuit.

Assume that Early voltage is infinite (VA = ), and

non-ideal constant-current source is represented by
a finite output impedance (Ro
)
RB represents the output resistance of the signal
voltage source.
Since two transistors are biased at the same
quiescent current:
then

r 1 = r 2 r

and

g m1 = g m 2 g m

Fig 11.9: Small-signal equivalent circuit,

bipolar differential amplifier

5.8) Small-signal Equivalent Circuit Analysis (Cont)

KCL equation at node Ve

5.8) Small-signal Equivalent Circuit Analysis (Cont)

From the circuit

V 1 Vb1 Ve
=
r
r + RB

V 1
V
V
+ g mV 1 + g mV 2 + 2 = e
r
r
Ro
1+
1+
V
+ V 2
= e
r
r
Ro

or

V 1

where

g m r =

and

V 2 Vb 2 Ve
=
r
r + RB

Then

(Vb1 + Vb 2 2Ve )

Solving for Ve, Ve =

Lecturer: Dr Jamaludin Bin Omar

1+
V
= e
r + RB
Ro

Vb1 + Vb 2
r + RB
2+
(1 + )Ro

(11.24)

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EEEB273 Electronics Analysis & Design II

5.8) Small-signal Equivalent Circuit Analysis (Cont)

For a one-sided output at collector of Q2, then

Vo = Vc 2 = (g mV 2 )RC =

RC (Vb 2 Ve )
r + RB

(11.25)

r + RB
Vb1
(1 + )Ro
r + RB
2+
(1 + )Ro

(11.29(b))

For a linear amplifier, superposition applies.

Equations (11.29(a)) and (11.29(b)) then simply state
that the two input signals can be written as the sum
of a differential-mode input signal component and a
common-mode input signal component.

5.8) Small-signal Equivalent Circuit Analysis (Cont)

Differential-mode gain is

Ad =

Common-mode gain is

Acm =

RC

2(r + RB )

For an ideal current source, RO =

(11.27)

Vo
Rc
=
Vd 2(r + RB )

(11.28)

5.8) Small-signal Equivalent Circuit Analysis (Cont)

Substituting (11.29(a)) and (11.29(b)) into (11.26)
and rearranging terms result in the following:

(11.29(a))

Therefore,

2(r + RB )

which for RB = 0 is identical to Equation (11.21), that

was developed from voltage transfer characteristics.

From Equations (11.2) and (11.3), Vb1 and Vb2 can

be expressed as

and

Ad =

(11.26)

5.8) Small-signal Equivalent Circuit Analysis (Cont)

Vd
2
Vd
Vb 2 = Vcm
2

Rc (Vb 2 Vb1 )

Diff-mode input is Vd = Vb1 Vb 2

Diff-mode gain is

Vb 2 1 +

Vb1 = Vcm +

In an ideal constant-current source, output

resistance Ro = , and Equation (11.26) reduces to

Vo =

Substitute (11.24) into (11.25) and rearrange

Vo = g m Rc

5.8) Small-signal Equivalent Circuit Analysis (Cont)

Vo =

RC
g m RC
.Vd
.V
2(1 + )Ro cm
2(r + RB )
1+
r + RB

The output voltage in general form (superposition)

Vo = Ad Vd + AcmVcm
where
and

Ad is the differential-mode gain

Acm is the common-mode gain

5.9) Differential- and Common-mode Gains

5.9.1) Differential-mode Signals
Reconsider the differential-amplifier when pure
differential-mode signal is applied.

g m RC
2(1 + )Ro
1+
r + RB
so Acm = 0.

But if RO is finite, Acm 0 and differential amplifier

(one-sided output) is not ideal.

Fig 11.13: (a) Equivalent ac circuit of diff-amp with applied

sinusoidal diff-mode input signal, and resulting signal
current directions and (b) differential-mode half-circuits

Lecturer: Dr Jamaludin Bin Omar

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EEEB273 Electronics Analysis & Design II

5.9) Differential- and Common-mode Gains (Cont)

5.9) Differential- and Common-mode Gains (Cont)

5.9.1) Differential-mode Signals (Cont)

5.9.2) Common-mode Signals

For pure differential-mode signal applied:

Two sinusoidal input signals vb1 and vb2 are 180
out of phase.
Therefore, vb1 + vb2 = 0.
From (11.24), ve remain at signal ground.
Can treat each half of the differential-amp as a
common-emitter circuit, as shown in Fig 11.13(b)
When analyzing the differential-mode diff-amp
characteristics using the half-circuit small-signal
parameters, remember that the half-circuit is biased
at IQ /2.

5.9) Differential- and Common-mode Gains (Cont)

For pure common-mode signal applied:

Two sinusoidal input signals vb1 and vb2 are in
phase.
Current source is represented as an ideal current
source IQ in parallel with its output resistance RO
Current iq = time-varying component of current
source.
Can treat each half of the differential-amp as a
common-emitter configuration with an emitter resistor,
as shown in Fig 11.14(b)
Each half-circuit is biased at IQ /2.

$ %

(Cont)

For basic BJT diff-pair, the

CMRR can be expressed as
CMRR =

Fig 11.14: (a) Equivalent ac circuit of diff-amp with

common-mode input signal, and resulting signal current
directions and (b) common-mode half-circuits

5.10)

$ %

Common-mode rejection ratio (CMRR) is the ability

of a diff-amp to reject a common-mode signal.

5.9.2) Common-mode Signals (Cont)

5.10)

Reconsider the differential-amplifier when pure

common-mode signal is applied.

(1 + )I Q Ro
Ad
1
= 1+
Acm
2
VT

Common-mode gain
decreases as Ro increases.
Therefore, CMRR increases
as Ro increases.

CMRR is a figure-of-merit for diff-amp, defined as

CMRR =

Ad
Acm

Usually, CMRR is expressed in decibels, as follows:

CMRR dB = 20 log 10

Ad
Acm

For an ideal diff-amp, Acm = 0 and CMRR =

5.11) Differential- and Common-Mode Input Impedances

The input resistance determines the loading

effect of the circuit on the signal source.
Two input resistances for the diff-amp:
1) The differential-mode input resistance
the resistance seen by a differentialmode signal source
1) The common-mode input resistance
the resistance seen by a commonmode signal source

Lecturer: Dr Jamaludin Bin Omar

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EEEB273 Electronics Analysis & Design II

5.11) Differential- and Common-Mode Input Impedances (Cont)

5.11) Differential- and Common-Mode Input Impedances (Cont)

5.11.1) Differential-Mode Input Resistance, DMIR

5.11.1) Differential-Mode Input Resistance (Cont)

The DMIR is the effective

resistance between the two
input base terminals when a
diff-mode signal is applied.
The applicable diff-mode halfcircuits are shown in Figure
11.12(b). For this circuit

Another common diff-amp

configuration uses emitter
resistors, as in Figure 11.16.
Using the resistance reflection
rule to find Rid, then

vd / 2
= r + (1 + )RE
ib

vd / 2
= r
ib
Fig 11.15: BJT diff amp
Therefore,
with diff-mode input
signal, showing diff
input resistance (Rid)

Rid =

vd
= 2 r
ib

Rid =
Fig 11.16: BJT diff
amp with emitter
resistors

vd
= 2[r + (1 + )RE ]
ib

Rid increases significantly when

emitter resistors are included.

5.11) Differential- and Common-Mode Input Impedances (Cont)

5.11) Differential- and Common-Mode Input Impedances (Cont)

5.11.2) Common-Mode Input Resistance

5.11.2) Common-Mode Input Resistance (Cont)

Since the half-circuits are in parallel, then

2 Ricm = r + (1 + )(2 Ro ) (1 + )(2 Ro )

This is a first approximation for determining Ricm

Fig 11.17: (a) BJT diff amp with common-mode input signal,
including finite current source resistance and (b) equivalent
common-mode half-circuit

Normally, Ro is large, and Ricm is

typically in the megaOhm range.
Therefore, transistor output resistance
ro and the base-collector resistance r
may need to be included in calculation.

5.11) Differential- and Common-Mode Input Impedances (Cont)

5.11.2) Common-Mode Input Resistance (Cont)

Fig 11.17(b) shows the more complete

equivalent half-circuit model. For this model,
2 Ricm = r || [(1 + )(2 Ro )] || [(1 + )ro ]

Therefore,
Ricm =

r
2

[(1 + )(Ro )] (1 + )

ro
2

Lecturer: Dr Jamaludin Bin Omar

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