A SVM based Four-level Open-end Winding-Induction

Motor Drive with Voltage Balancing of DC-link

Capacitors using SVM based HCC Front-end Converter
B. Venugopal Reddy, V.T. Somasekhar
Department of Electrical Engineering
National Institute of Technology, Warangal, India
bvenugopal_reddy@yahoo.co.in, vtsomasekhar@rediffmail.com
Abstract A four-level open-end winding induction motor drive
can be obtained by feeding an induction motor with open-end
windings with two two-level inverters, operating with unequal
DC-input voltages, which are in the ratio 2:1. A total of 64 space
vector combinations, distributed over 37 space vector locations
are rendered by this drive. With the conventional 2-level, 3-ph,
VSI, the hexagonal space vector area is divided into 6 sectors
only. The same area is divided into 54 sectors with a 4-level
inverter, facilitating a better resolution for the synthesis of the
reference voltage vector. In this paper, a space vector Pulse
Width Modulation (SVPWM) scheme is proposed, which uses
only the instantaneous phase reference voltages, obviating the
necessity for sector identification and look up tables. Also, this
PWM strategy automatically ensures that the inverter, operating
with a higher DC-link voltage is switched with a lower frequency.
Some of the vector combinations produced by this power circuit
configuration overcharge the DC-link capacitor of the inverter
operating with lower voltage. This paper describes as to how such
an overcharging could be avoided by using a SVM based
Hysteresis current controlled Front End Converter (FEC)
instead of the conventional 6-diode bridge rectifier.

effect of inverter switching combinations on the DC-link

capacitor of lower voltage feeding one of the inverters. A
Front End Converter (FEC) is employed at lower DC link
voltage side to maintain stiff dc link voltage and also maintain
the nearly unity power factor at line side. A Space vector
based Hystereis Current Controlled (HCC) PWM technique is
employed for the front-end PWM converter to achieve above
objective.
II.

FOUR-LEVEL DUAL INVERTER FED OPEN-END WINDING

INDUCTION MOTOR DRIVE CONFIGURATION

The open-end winding induction motor drive is obtained by

opening the neutral point of the star connected stator windings
of the conventional three-phase induction motor and feeding
the motor from either end using two two-level inverters with
asymmetrical DC-link voltages in the ratio of 2:1 is shown in
Fig.1. In this circuit configuration, DC-link voltages of
Inverter-1 and Inverter-2 are 2Vdc/3, Vdc/3 respectively.

Keywords- Four-level inverter, Induction motor, Hysteresis

current controller, Over charging, Open-end winding, Space
vector modulation, Unequal DC-link voltages.

I.

INTRODUCTION

Multilevel voltage-source inverters are gained more interest in

the recent past for high and medium power induction motor
drive applications. Various multi-level inverter topologies and
pulse-width modulation techniques [1-9] are suggested to
reducing the harmonic content of the inverter output at low
switching frequency. The dual two-level inverter fed open-end
winding induction motor drives offer certain advantages
compared to the other inverter topologies are redundancy of
the space vector combinations for the same number of space
vector locations and multilevel inversion is achieved using the
conventional two-level inverters as a basic building block. In
the work reported in [3], a method of obtaining four-level
inversion with open-end winding configuration has been
described, which uses unequal DClink voltages. However,
the space vector based PWM strategy proposed in [3], requires
the knowledge of the sector identification, making it
cumbersome to implement. In this paper, an improved space
vector PWM strategy is proposed, where it obviates the need
for the sector identification. This paper also describes the

2Vdc
3

Vdc
3

Fig.1. Four-level inverter drive with open-end winding topology

Fig.2 .Space vector locations for inverter-1 (Left) and inverter-2 (Right)

Each inverter can produce eight space vector locations

independent of the other is shown in Fig.2, where + means
that the top switch of a leg is turned on and -means that the
bottom switch of the leg is turned on. The numbers 1 to 8 refer
to the states assumed by inverter-1, similarly the numbers 1' to
8' indicate same for inverter-2. Thus, a total of 64(8*8) voltage
space vector pairs are derivable from this power circuit
configuration, distributed over 37 space vector locations,
constituting 54 equilateral triangular sectors (of side 1/3 Vdc)
as shown in Fig.3. OU represents the DC link voltage of the
equivalent two-level inverter, which is equal to Vdc.

(Fig.3). In order to synthesize the vector OT, the inverter-1 is

clamped to one of its null state(7 or 8) and inverter-2 is
switched among the three nearest vertices of the sector in
which the tip of the reference vector is situated i.e. 7'-4'-5'-8'.
0

180

16'

Vsr

17'

15'

11'

18'

17'

18'

13'

12'
P

14'

OU = VDC
OG = 2/ 3 VDC
OA = 1/ 3 VDC

Fig.4 Principle of biasing inverter PWM strategy for outer 2-layers

Fig.3. Resultant space-vector combinations of the dual-inverter scheme

Pole voltage of inverter-1(let VAO), assumes two values,

which are Vdc/3 and Vdc/3. Similarly, the pole voltage
corresponding to the A-phase leg of inverter-2, denoted as
VA'O', assumes two values, Vdc/6 and Vdc/6. As the pole
voltage of each inverter is capable of assuming two values
independently of the other, the difference of pole voltages
assumes four values as shown in Table-I.
Pole-voltage of
inverter-1(VA0)
-VDC/3

TABLE -I
Pole-voltage of
inverter-2 (VA0')
VDC/6

Motor phase voltage

VAA' = VA0 - VA0'
-VDC/2

-VDC/3

-VDC/6

-VDC/6

VDC/3

VDC/6

VDC/6

VDC/3

-VDC/6

VDC/2

Fig.4 shows the space vector diagram of biasing inverter

PWM scheme for the outer two layers. The tip of the reference
vector OT is located in sector 7 is shown in Fig.4. In order to
synthesize the reference vector (OT) inverter-1 is clamped to
state 1 and inverter-2 must switched among the states 8-1-6-7,
so that the switching combinations 18, 11, 16 and 17 are
used to construct the reference vector in the average sense.
The switching algorithm described in reference [4] for the
implementation of centre space SVM for a 2 level inverter feeding a conventional induction motor is extended for the
computation of the switching timings for inverter-2 of the
dual-inverter system. However, while synthesizing the
reference vector (OT) switching combination 11, 16 is used
for short duration of period, in this period top switch of
inverter-1 and top switch of inverter-2 of A-phase leg is
connected to positive rail of the DC bus. Inverter-1 directly
sees the inverter-2, where inverter-2 is overcharged by
inverter-1 even under no-load condition of the motor.

II. BIASING INVERTER SPACE VECTORMODULATION

PWM STRATEGY:
A space vector based biasing inverter PWM scheme is
proposed to generate the switching time periods for the vectors
of four-level inverter with minimum switching per phase. The
inverter switching vectors and the time duration for which the
vectors to be switched are determined directly from the
instantaneous amplitude of the phase reference voltages.
Hence, it avoids the use of a look-up table for sector
identification. In Fig.3, assume tip of the reference voltage
space vector (OT) situated in sector -1 of core hexogen

Fig.5.Space-vector combinations which cause for overcharging of the lower

DC link capacitor of the inverter-2.

Assume reference voltage space vector OT is situated in

sector-26, this can be resolved into two components namely

OG and GT. The component OG is obtained by clamping

inverter-1 at state-1(+ - -) and the other component GT is
realised in the average sense by switching inverter-2 among
the states 8-5-6-7. The switching combinations 18, 15,
16 and 17 are used to realize the reference space vector OT.
The switching combination 16 must be used for some
duration, in which it tries to over-charge the lower DC-link of
inverter-2 under loading condition. The troublesome
combinations, which could result in the overcharging of lower
DC-link capacitor is shown in Fig.5.The simulation and
experimental results for the motor phase voltage and lower
DC-link voltage at modulation index of 0.4 is shown in Fig.6
and Fig.7 respectively.

As explained above, some of the space vector

combinations like 11,22, 33,.12,16,23,21etc
tries to overcharge the DC-link voltage of inverter-2. To
avoid this, either Decoupled space vector modulation
algorithm [5] should be employed where two inverters
are switched, otherwise Front End Converter (FEC) is
employed at lower DC-link voltage side, which
maintains constant DC-link voltage of inverter-2 and
also maintains the unity power factor at line side.
III. OPEN-END WINDING INDUCTION MOTOR DRIVE WITH SVM
BASED HCC FRONT-END CONVERTER CONFIGURATION

2Vdc
3

Vdc
3

(a)
Fig.8. Four-level dual inverter fed open-end winding induction motor drive
with front-end converter.

(b)
Fig.6 (a) Simulated Motor phase voltage (VAA) (b) Experimentally
obtained motor phase voltage for ma = 0.4. scale: X-axis:10ms/div;
Y-axis:100V/div.

Proposed power circuit configuration of a 4-level open-end

winding induction motor with asymmetrical DC link voltages
is shown in Fig.8. Inverter-2 is operated with a DC-link
voltage of Vdc/3 which is supplied by Front End PWM
Converter is shown in Fig.9. Hysteresis current control
technique plays most important role in current-controlled pulsewidth modulated converters. Hysteresis current controller
(HCC) is a popular technique, Considering easy
implementation, maximum current limit, fast dynamic
response, and insensitivity to load parameter variation.

V dc
3

(a)

Fig.9. Front end PWM converter

(b)
Fig.7 (a) Simulated DC-link voltage of inverter-2 (b) experimentally
obtained DC link voltage of inverter-2 for ma = 0.4 under no-load
condition. Scale: X-axis:10s/div; Y-axis:50V/div

The SVM based hysteresis current controlled PWM[9]

technique is employed for the Front End Converter (FEC) to
maintain constant DC link voltage for inverter-2 under all
modulation indices and also maintain the line power factor

unity. The main significance of this SVM based HCC PWM

technique is to utilize the all advantages of HCC and SVM
techniques. The controller determines a set of space vectors
including zero vectors from a given sector and deploy a space
vectors through the Hysteresis current controller. This PWM
technique gives the same space vectors as those obtained with the
SVM technique and significantly reduces the number of
switching compared to the conventional HCC. The region
detector is utilized to detect a region of the reference space
voltage vector for FEC from normalized phase reference
voltages and it confines vectors to be applied as in the SVM
technique is shown in Fig.10.

(b)
Fig.10 Region Detector for front-end PWM converter

Simulations are carried out using MATLAB/SIMULINK

and results are presented for proposed power circuit
configuration. As mentioned earlier, if the tip of the reference
vector lies in the middle layer of the hexagon, vector
combinations such as 11, 16 are needed to synthesize the
reference voltage vector. With the conventional diode bridge
rectifier, these combinations could result in the over-charging
of the DC-link capacitor of invertert-2 under no-load condition
of motor (Fig.7). However, the results obtained with FEC
clearly indicate the avoidance of such an over charging, as the
DC-link voltages of the respective inverters are stiffly
maintained in the ratio of 2:1 as shown in Fig.11(b). It is
shown in the Fig.11(a), that the line current is in anti-phase to
the phase voltage, this clearly indicates the inverter mode of
operation, wherein the energy flow is reversed. Any attempt of
the DC-link capacitor of inverter-2 to overcharge is
immediately suppressed by the HCC-FEC. Figure11(c) shows
the phase voltage and phase current of A-phase winding of
induction motor at modulation index of 0.4.

(a)

(c)
Fig.11. (a) Phase voltage and current (a-phase) waveforms of front-end
converter (b) DC link voltage of inverter-1(top) and inverter-2 (bottom) (c)
phase voltage and current of A-phase winding of induction motor at ma=0.4

Figure 12(a) shows the input source voltage and the line
current waveforms of the FEC for ma of 0.8, when the motor is
not loaded. In this case, the DC-link voltage of inverter-1 is
not connected to that of inverter-2 as mentioned earlier and
hence there is no overcharging of the DC-link capacitor of
inverter-2. Hence the FEC operates in the rectifying mode,
wherein the net energy flow is from the ac-input line into the
DC-link capacitor of inverter-2. Consequently, the line current
is almost in phase to the phase voltage PWM Converter
indicating a near Unity PF operation. Figure 12(b) shows the
DC-link voltages of inverters. It is evident that the DC-link
voltages are stiff and are in the ratio 2:1. Figure.12(c) shows

the motor phase voltage waveform (top) and corresponding

motor phase current waveform (bottom) for modulation index
of 0.8.

(a)

IV.

CONCLUSION

Four-level inversion is obtained by unequal DC-link

voltages, which are in the ratio of 2:1, are used to achieve this
objective. Biasing inverter Space-vector based PWM strategy
is described for a four-level dual-inverter fed open-end
winding induction motor drive. Effect of switching
combinations on the lower DC link voltage of inverter-2 is
investigated. Overcharging of inverter-2 by inverter-1(higher
DC-link voltage) is avoided by employing SVM based
Hysteresis current controlled PWM technique for Front End
Converter (FEC) at inverter-2 side, which maintains a stiff DC
link voltage under all loading conditions of the open-end
induction motor. The front-end PWM converter is also
maintains nearly unity power factor at line side. The zerosequence current is avoided to flow in this circuit as two
isolated DC power supplies are employed to feed individual
inverters.
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phase voltage(top) and phase current(bottom) of A-phase winding of
induction motor at ma=0.8

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