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TOPIC-COMPUTER ARCHITCTURE

SUB TOPIC - POWER SYSTEM ETC


Q1
Electronic instrument is based on __ principles for its measurement function
(a) Electrical
(b) Mechanical
(c) Electronic
(d) Both a and c
Q2
To use electronic instruments intelligently, one needs to understand their__________.
(a)
Prices
(b)
Quality
(c)
Operating principles
(d)
all of the above
Q3
Closeness with which an instrument reading approaches the true value
being measured is known as
(a)
Precision
(b)
Accuracy
(c)
Sensitivity
(d)
Resolution

of variable

Q4
________ is the smallest change in measured value to which the instrument will respond .
(a)
Accuracy
(b)
Precision
(c)
Resolution
(d)
Sensitivity
Q5
Use of different instruments to perform the same experiment; provide good technique for
increasing _________.
(a)
precision
(b)
sensitivity
(c)
accuracy
(d)
both a and c
Q6
In making ________ measurements , it is advisable to record a series
rather than rely on one observation
(a)
precision
(b)
accuracy
(c)
sensitivity
(d)
resolution

of observations

Q7
__________ is composed of two characteristics i.e. conformity and number of
significant figures to which measurement may be made.
(a)
accuracy
(b)
precision
(c)
sensitivity
(d)
resolution

Q8
The more significant figures, the greater the _______ of the measurement.
(a)
accuracy
(b)
sensitivity
(c)
resolution
(d)
precision
Q9
The errors due to the shortcomings of the instruments are called
(a)
gross errors
(b)
random errors
(c)
systematic errors
(d)
environmental error
Q10
The _______ of an infinite number of data is the square root of the sum
of all the individual deviations squared divided by the no. of readings
(a)
average deviation
(b)
Standard deviation
(c)
mean square deviation
(d)
both b and c
Q11
Measures of quantities in thermal, electrical and illumination disciplines are defined as
------------ units.
(a)
primary
(b)
auxiliary
(c)
secondary
(d)
derived
Q12
Giorgi pointed out that the units of current, voltage, energy and power were compatible
with the --------------- system.
(a)
CGS
(b)
SI
(c)
MKS
(d)
Practical
Q13
Statcolumb is the unit of charge in ----------------- system.
(a)
SI
(b)
CGS
(c)
CGSe
(d)
CGSm
Q14
Gauss is the name given to the unit of ----------------.
(a)
magnetic flux density
(b)
magnetic flux
(c)
magnetic field intensity
(d)
magnetic field strength
Q15
Dimensions of magnetic flux are -----------(a)
L^2MT^-2I^2
(b)
L^2MT^-3
(c)
LT^-2
(d)
L^2MT^-2I^-1

Q16
----------------- system defines the second fundamental unit as
the weight of mass
(a)
absolute
(b)
gravitational
(c)
ft-lb-s
(d)
MTS
Q17
MTS system has been specifically for ---------------- purposes.
(a)
engineering
(b)
experimental
(c)
measurement
(d)
practical
Q18
The unit for magnetic field strength has been given the name
--------------.
(a)
Gilbert
(b)
orested
(c)
Maxwell
(d)
gauss
Q19
SI unit for permittivity is ------------------(a)
a) F/m
(b)
V/m
(c)
H/m
(d)
C/m2
Q20
------------------ law relates electric current to
magnetic field strength.
(a)
Faraday
(b)
Gauss
(c)
Ampere
(d)
Coloumb
Q21
One of the main functions of ______ standards is the verification and calibration of
secondary standards .
(a)
International
(b)
Primary
(c)
Working
(d)
None of the above
Q22
_______ standards are the basic reference standards used in industrial measurements
laboratories
(a)
international
(b)
Primary
(c)
Secondary
(d)
Working

Q23
The metric unit of mass was originally defined as the mass of a cubic decimeter of
_______ at its temperature of maximum density.
(a)
Water
(b)
Benzene
(c)
Alcohal
(d)
None of the above
Q24
Secondary standards of mass, kept by the international laboratories generally have an
accuracy
(a)
1
(b)
2
(c)
3
(d)
4
Q25
he ________, established by the Weights and Measures Act of 1963, is defined as equal
to 0.45359237 kg exactly
(a)
Pascal
(b)
Gram
(c)
Pound
(d)
None of the above
Q26
The yard is defined as _________ meter exactly.
(a)
0.5166
(b)
0.9144
(c)
0.8261
(d)
None of the above
Q27
The unit of ________ is a derived quantity and is not represented by an internal standard.
(a)
Mass
(b)
Length
(c)
Time Volume
(d)
Volume
Q28
A mean solar second, is then equal to _________ of the mean solar day.
(a)
1/50,000
(b)
1/65,900
(c)
1/86,400
(d)
None of the above
Q29
________ recognizes the fact that the earth is subjected to polar motion.
(a)
UT0
(b)
UT1
(c)
UT2
(d)
None of the above
Q30
The primary ________ standard is derived from the ohm and the farad.
(a)
Capacitance
(b)
Inductance
(c)
Resistance
(d)
None of the above

Q31
The practical coil area generally ranges from approximately ____ cm square.
(a)
0.2 to 0.8
(b)
0.5 to 2.5
(c)
0.5 to 3.5
(d)
None of the above
Q32
Flux densities usually range from _______ gauss.
(a)
1000 to 1500
(b)
1500 to 5000
(c)
2000 to 5000
(d)
None of the above
Q33
The galvanometer is a simple indicating instrument in which the deflection
of the pointer is ________ to the magnitude of to current applied to the coil.
(a)
Directly proportional
(b)
Inversely proportional
(c)
Equal
(d)
None of the above
Q34
The motion of a moving coil in a magnetic field is characterized by ________
quantities.
(a)
Two
(b)
Three
(c)
Four
(d)
Five
Q35
Galvanometer damping is provided by _________ mechanism/s.
(a)
One
(b)
Two
(c)
Three
(d)
Four
Q36
The power requirement of the d'Arsonval movement are ________
(a)
Small
(b)
Medium
(c)
Large
(d)
None of the above
Q37
Accuracy of the PMMC instrument is generally on the order of ________ percent of fullscale reading.
(a)
1 to 3
(b)
2 to 4
(c)
2 to 5
(d)
None of the above
Q38
The resistance material has a very _______ temperature co-efficient.
(a)
Low
(b)
High
(c)
Both of the above
(d)
None of the above

Q39
The multirange voltmeter uses a ______ position switch.
(a)
Two
(b)
Three
(c)
Four
(d)
Five
Q40
The meter with the _______ sensitivity or ohms-per-volt rating gives the most reliable
result.
(a)
Lower
(b)
Medium
(c)
Higher
(d)
None of the above
Q41
The usual secondary transformer voltage is _______V.
(a)
60
(b)
90
(c)
120
(d)
180
Q42
The ______ sometimes has a primary and always has a secondary winding.
(a)
CT
(b)
PT
(c)
Both of the above
(d)
None of the above
Q43
The ________ is rated to deliver a certain power to the secondary load or burden.
(a)
CT
(b)
PT
(c)
Both of the above
(d)
None of the above
Q44
The Kelvin bridge is a modification of the Wheat stone bridge and provides
greatly increased accuracy in the measurement of ____value resistances.
(a)
Low
(b)
Moderate
(c)
High
(d)
None of the above
Q45
According to the AC bridge balance condition, the products of the magnitudes of the
opposite arms must be _________,
(a)
Directly proportional
(b)
Inversely proportional
(c)
Unequal
(d)
Equal
Q46
According to the second condition of balance bridges , the ________ of the phase angles
of the opposite arms must be equal.
(a)
Difference
(b)
Sum
(c)
Product
(d)
None of the above

Q47
The Maxwell bridge is limited to the measurement of _______ Q-coils.
(a)
Low
(b)
Medium
(c)
High
(d)
None of the above
Q48
The ________ bridge has a resistor in series with standard capacitor.
(a)
Maxwell
(b)
Hay
(c)
Kelvin
(d)
None of the above
Q49
A good quality mica capacitor has very low losses and therefore a phase angle of
approximately _______ degrees.
(a)
30
(b)
60
(c)
90
(d)
180
Q50
The _______ bridge is derived from Maxwell-capacitance bridge.
(a)
Hay
(b)
Wein
(c)
Anderson
(d)
None of the above
Q51
Oscilloscope take/s ________ element/s to perform the electron beam focusing.
(a)
one
(b)
two
(c)
three
(d)
four
Q52
The meshless tubes results in ________ oscilloscopes.
(a)
smaller
(b)
larger
(c)
heavier
(d)
lighter
Q53
The phosphorus absorbs kinetic energy of the bombarded electron and
re-emits energy at a _________frequency.
(a)
higher
(b)
medium
(c)
lower
(d)
none of above
Q54
When dc measurements are to be made, the __________ can be removed from the
uncompensated attenuator.
(a)
resistor
(b)
capacitor
(c)
inductor
(d)
power supply

Q55
If the target voltage is low, the target is _________
(a)
written
(b)
erased
(c)
stored
(d)
none of above
Q56
The preaccelerating anode is a hollow cylinder that is at a potential a few hundred volts
more ________than the cathode.
(a)
positive
(b)
negative
(c)
stronger
(d)
none of above
Q57
Most laboratory oscilloscopes have _______ time bases that may interact in various
ways.
(a)
two
(b)
three
(c)
four
(d)
five
Q58
A ________ CRT can retain the display much longer, upto several hours after the image
was first written on phosphorus.
(a)
storage
(b)
sampling
(c)
digital storage
(d)
none of above
Q59
The ________ tube can retain an image for varying lengths of time and
levels of image brightness.
(a)
bistable
(b)
halftone
(c)
both of above
(d)
none of above

at different

Q60
Another method of alternate time-base operations is to switch the sweep speed
_______the delay time.
(a)
before
(b)
after
(c)
at
(d)
none of above
Q61
An ideal op-amp has _______ output impedance.
(a)
Zero
(b)
One
(c)
Finite
(d)
Infinite

Q62
A practical op-amp has _______ bandwidth.
(a)
Narrow
(b)
Wide
(c)
Finite
(d)
Infinite
Q63
The voltage amplifier is usually a class _____ amplifier that provides additional op-amp
gain.
(a)
A
(b)
B
(c)
C
(a)
D
Q64
A differential amplifier is the _____ stage for the op-amp.
(a)
Input
(b)
Output
(c)
Both of the above
(d)
None of the above
Q65
In the signal-ended mode, when signal is applied to the non-inverting input with the
inverting input grounded ,a _____ ,amplified signal voltage appears at the output.
(a)
Inverted
(b)
Non-inverted
(c)
Both of the above
(d)
None of the above
Q66
The amplified difference between the two inputs appears on the output in _______ mode.
(a)
Signal-Ended input
(b)
Differential input
(c)
Common-mode input
(d)
None of the above
Q67
In the common mode, two signal voltages of the _______ phase,
amplitude are pplied to the two inputs.
(a)
Same
(b)
Different
(c)
None of the above

frequency, and

Q68
The open-loop voltage gain of an op-amp is the ____ voltage gain of the device and
represents the ratio of output voltage to input voltage when there are no external
components
(a)
Internal
(b)
External
(c)
Both of the above
(d)
None of the above
Q69
The _________ input impedance is the total resistance between the inverting and noninverting inputs.
(a)
Differential
(b)
Common-mode

(c)
(d)

Both of the above


None of the above

Q70
The wavelength involved with fiber optics communication are very ____
with the wavelengths associated with the radio spectrum.
(a)
Small
(b)
Large
(c)
Long
(d)
None of the above

compared

Q71
Light wavelengths are measured in ________ meters.
(a)
Centi
(b)
Milli
(c)
Nano
(d)
None of the above
Q72
Index of refraction of the glass is ______ than/to air.
(a)
Lower
(b)
Higher
(c)
Equal
(d)
None of the above
Q73
Which of the following is more convenient quantity to use when calculating the osses in a
fiber optic system.
(a)
Acceptance angle
(b)
Numerical aperture
(c)
Both of the above
(d)
None of the above
Q74
Some of the light energy is simply absorbed by the glass and is called,
Absorption loss
Rayleigh scattering
Microbending loss
None of the above
Q75
The numerical aperture of a diode is essentially,
(a)
1
(b)
2
(c)
3
(d)
4
Q76
Time required for a reflection tp arrive after the generate of the light pulse is the____
the time for the light to propagate to the reflection.
(a)
Twice
(b)
Thrice
(c)
Equal
(d)
None of the above
Q77
If each photon could release one electron for conduction , the diode would be ______%
efficient.
(a)
75

(b)
(c)
(d)

80
90
100

Q78
The detector diodes are ______ biased diodes.
(a)
Forward
(b)
Reversed
(c)
Both of the above
(d)
None of the above
Q79
Circuits that include flip flop are usually classified by
(a)
the function thy perform
(b)
the name of sequential circuit
(c)
the combination of gates
(d)
none of the above
Q80
An n-bit register consists of a group of
(a)
2^n flip flops
(b)
n flip flops
(c)
2^n + 1 flip flops
(d)
2^n - 1 flip flops
Q81
The D-flip flop does not have a condition for
(a)
no change
(b)
reset
(c)
set
(d)
all of the above
Q82
A register capable of shifting its binary information in one or both directions is called
(a)
transfer register
(b)
shift register
(c)
both of the above
(d)
None of the above
Q83
Operations in digital computers are usually done in
(a)
parallel
(b)
serial
(c)
both of the above
(d)
none of the above
Q84
______ operation is faster mode of operation
(a)
serial
(b)
parallel
(c)
both of the above
(d)
none of the above
Q85
Serial operations have the advantage of requiring
(a)
less time
(b)
less equipment
(c)
both of the above

(d)

none of the above

Q86
Parallel adder is a
(a)
combinational circuit
(b)
sequential circuit
(c)
both a & b
(d)
none of the above
Q87
A register capable of shifting in one direction only is a
(a)
bidirectional shift register
(b)
universal shift register
(c)
unidirectional shift register
(d)
none of the above
Q88
A receiver does a conversion from
(a)
parallel-to-serial
(b)
serial-to-parallel
(c)
both of the above
(d)
none of the above
Q89
A counter that follows a binary number sequence is called a
(a)
decimal counter
(b)
BCD counter
(c)
binary counter
(d)
none of the above
Q90
An n-bit binary counter consists of n-flip flops and can count in binary from
(a)
1 to 2^n - 1
(b)
0 to 2^n - 1
(c)
1 to 2^n + 1
(d)
0 to 2^n + 1
Q91
A decimal counter follows a sequence of ten states and return to 0 after a count of
(a)
9
(b)
10
(c)
15
(d)
16
Q92
A decimal digit is represented by a binary code with at least
(a)
4 bits
(b)
8 bits
(c)
16 bits
(d)
none of the above
Q93
A ripple counter is a/an
(a)
synchronous sequential circuit
(b)
asynchronous sequential circuit
(c)
both a & b
(d)
none of the above

Q94
The up-down binary counter has
(a)
an up control input
(b)
a down control input
(c)
both of the above
(d)
none of the above
Q95
In up-down binary counter when the up and down inputs are both 1, the
circuit counts
(a)
up
(b)
down
(c)
both of the above
(d)
none of the above
Q96
A circuit with n-flip flops has________ binary states
(a)
2^n
(b)
2^n 1
(c)
2^n + 1
(d)
2n
Q97
A k-bit switch tail ring counter will go through a sequence of ____ states
(a)
2k
(b)
2^k
(c)
2^k - 1
(d)
2k 1
Q98
Random-access memory can perform
(a)
write operation
(b)
read operation
(c)
both a & b
(d)
none of the above
Q99
Read-only memory can perform
(a)
read operation
(b)
write operation
(c)
both a & b
(d)
none of the above
Q100
The memory units with a capacity of 1k words of 16 bits each can accommodate
(a)
2k bytes
(b)
4k bytes
(c)
8k bytes
(d)
10k bytes
Q101
The number of bits in the address is determined from the relationship
(a)
2^k >= m
(b)
2^k <= m
(c)
2^k = m
(d)
none of the above

Q102
ROM is
(a)
non-volatile
(b)
volatile
(c)
both a & b
(d)
none of the above
Q103
Programs and data that cannot be altered are stored in
(a)
ROM
(b)
RAM
(c)
both a & b
(d)
none of the above
Q104
The internal construction of a random-access memory of m words and n bits per word
consists of
(a)
2^m * 2^n binary storage cells
(b)
m * n binary storage cells
(c)
2^m -1 binary storage cells
(d)
2^n -1 binary storage cells
Q105
A memory with 2^k words of n bits per word requires k address lines that go into a
(a)
2^k * k decoder
(b)
k * 2^k decoder
(c)
2^k * n decoder
(d)
n * 2^k decoder
Q106
The syndrome value C consists of k bits and has a range of _____ values between 0 and
2^k - 1
(a)
2^k - 1
(b)
2^k + 1
(c)
2^k
(d)
none of the above
Q107
The relationship for establishing the number of data bits that can be used
conjunction with k check bits is
(a)
2^k - 1 <= n+k
(b)
2^k + 1 <= n+k
(c)
2^k + 1 >= n+k
(d)
2^k - 1 >= n+k

in

Q108
The type of ROM in which the previously programmed connections can
with an electrical signal is
(a)
mask programming
(b)
PROM
(c)
EPROM
(d)
EEPROM
Q109
The PROM has a
(a)
fixed AND array and programmable OR array
(b)
programmable AND array and a fixed OR array
(c)
programmable AND and OR arrays

be erased

(d)

none of the above

Q110
The size of PLA is specified by
(a)
number of inputs
(b)
number of product terms
(c)
number of outputs
(d)
all of the above
Q111
Register transfers move information between
(a)
registers
(b)
registers and memory
(c)
through processing logic
(d)
all of the above
Q112
The elementary operations per formed on the data stored in registers are
register transfer operations
(a)
register transfer operations
(b)
shift operations
(c)
micro operations
(d)
none of the above
Q113
The ____ micro operation is used to set one or more bits in a register
(a)
AND
(b)
OR
(c)
XOR
(d)
none of the above
Q114
The ____ micro operation can be used to complement one or more bits in a register
(a)
AND
(b)
OR
(c)
XOR
(d)
none of the
Q115
The bus multiplexer requires a total of
(a)
2n gates
(b)
4n gates
(c)
8n gates
(d)
10n gates
Q116
The data bus is
(a)
bi-directional
(b)
uni-directional
(c)
none of the above
Q117
The ALU provides _____ arithmetic operations
(a)
2
(b)
4
(c)
8
(d)
10

Q118
The ALU provides _____ logic operations
(a)
2
(b)
4
(c)
8
(d)
10
Q119
The size of the register file is
(a)
*n
(b)
*m
(c)
2m * n
(d)
n*
Q120
There are _____ binary control inputs
(a)
13
(b)
15
(c)
17
(d)
19
Q121
A/An __________ field specifies the operation to be performed
(a)
opcode
(b)
address field
(c)
mode field
(d)
none of the above
Q122
If the location of operands is specified either by the opcode of the instructionor by an
address assigned to one of theother operands,then the operand has an
(a)
explicit address
(b)
implied address
(c)
both of the above
(d)
none of the above
Q123
The ______ command moves an operand from memory to a register
(a)
LD
(b)
ST
(c)
MOVE
(d)
none of the above
Q124
The ______ command moves an operand from a register to memory
(a)
explicit address
(b)
implied address
(c)
both of the above
(d)
none of the above
Q125
The ___ command can transfer data between registers, between memory
from memory to register or register to memory
(a)
explicit address
(b)
implied address
(c)
both of the above
(d)
none of the above

locations, or

Q126
The ______ command transfers a word from memory to stack
(a)
LD
(b)
MOVE
(c)
PUSH
(d)
POP
Q127
The ______ command transfers a word from stack to memory
(a)
LD
(b)
MOVE
(c)
MOVE
(d)
POP
Q128
In the ________ mode, the operand is specified in the instruction itself
(a)
implied mode
(b)
immediate mode
(c)
direct addressing mode
(d)
relative addressing mode
Q129
If each block has only one place it can appear in the cache, the cache is said to be
(a)
direct mapped
(b)
fully associative
(c)
set associative
(d)
n-way set associative
Q130
If a block can be placed any where in the cache, the cache is
(a)
direct mapped
(b)
fully associative
(c)
set associative
(d)
n-way set associative
Q131
If a block can be placed in a restricted set of places in the cache, the cache is
(a)
direct mapped
(b)
fully associative
(c)
set associative
(d)
n-way set associative
Q132
If there are n blocks in a set, the cache placement is called
(a)
direct mapped
(b)
fully associative
(c)
set associative
(d)
n-way set associative
Q133
In _____ policy, the information is written to both the block in the cache
and to the block in the lower level memory
(a)
write back
(b)
write through
(c)
none of the above
(d)
both a and b

Q134
In _____ policy, the information is written only to the block in the cache
(a)
write back
(b)
write through
(c)
none of the above
(d)
both a and b
Q135
The very first access to the block cannot be in the cache, so the block must
into the cache.These are also called
(a)
cold-start misses
(b)
capacity misses
(c)
conflict misses
(d)
none of the above

be brought

Q136
The model of a circuit that encapsulates a description of its functionality
or behavioral view of its input-output relationship is
(a)
VHDL
(b)
Verilog
(c)
Both of the above
(d)
None of the above
Q137
_______ Primitive corresponds to an inverter.
(a)
Not
(b)
And
(c)
Or
(d)
Xor
Q138
______ is an n-output primitive
(a)
Xor
(b)
Buf
(c)
Or
(d)
And
Q139
The left most index in the bit range of a vector is
(a)
The least significant bit
(b)
The most significant bit
(c)
Both a & b
(d)
None
Q140
Methods of verification used in Verilog are
(a)
Logic simulation
(b)
Formal verification
(c)
Both of the above
(d)
None of the above
Q141
The logic value ____ represents a condition of ambiguity
(a)
Z
(b)
X
(c)
Both
(d)
None

as a structural

Q142
The logic value ____ denotes a high impedance
(a)
Z
(b)
X
(c)
Both
(d)
None
Q143
(a)
(b)
(c)
(d)

____ is the procedural assignment operator


'
<=
=
None of the above

Q144
The time at which a procedural assignment statement execute depends
(a)
Its order in the list of statements
(b)
Delay time preceding the statements
(c)
Both of the above
(d)
None of the above
Q145
(a)
(b)
(c)
(d)

____ is the delay control operator


#
<=
=
None of the above

Q146
The primitives in Verilog have a default delay of
(a)
0
(b)
1
(c)
2
(d)
None of the above
Q147
The amount of the time that the input pulse must be constant in order for the gate to
make the transition is the
(a)
Inertial delay
(b)
Propagation delay
(c)
Transport delay
(d)
None of the above
Q148
Sequential behaviors that hardware devices exhibit are
(a)
Level sensitive behavior
(b)
Edge sensitive behavior
(c)
Both of the above
(d)
None of the above
Q149
The ? symbol in a truth table allows a input to take values
(a)
0
(b)
1
(c)
X
(d)
All of the above

Q150
The output of UDP must be declared to have type
(a)
Wire
(b)
Reg
(c)
Both of the above
(d)
None of the above
Q151
Level sensitive behavior depends on the
(a)
Inputs
(b)
Outputs
(c)
Synchronizing edge
(d)
None of the above
Q152
A falling edge transition is denoted by signal value pair
(a)
10
(b)
X0
(c)
1X
(d)
All of the above
Q153
Many modern application specific integrated circuits (ASICs) have
several____________ gates on a single chip
(a)
Hundred
(b)
Thousand
(c)
Million
(d)
Billion
Q154
___________ describes the functionality of a design.
(a)
Test bench
(b)
Behavioral modeling
(c)
Structural modeling
(d)
All of above
Q155
In Verilog, there are only __________ families of data types.
(a)
Seven
(b)
Five
(c)
Three
(d)
Two
Q156
A wire and reg have a default size of __________.
(a)
1-bit
(b)
2-bit
(c)
3-bit
(d)
4-bit
Q157
The size of an integer is at least _____________.
(a)
128-bits
(b)
64-bits
(c)
32-bits
(d)
16-bits

Q158
The keyword _________ declares a continuous assignment statement.
(a)
always
(b)
assign
(c)
forever
(d)
begin
Q159
The continuous assignment statement is a/an _____ representation of the
described by an equivalent gate level schematic
(a)
Implicit
(b)
Abstract
(c)
Compact
(d)
All of above

structure

Q160
In ___ behavior, variables are updated immediately when input changes.
(a)
Edge sensitive
(b)
Level sensitive
(c)
Transient
(d)
Steady state
Q161
The continuous assignments are convenient for modeling ________.
(a)
Small Boolean expressions
(b)
Three state behavior
(c)
Transparent latches
(d)
All of above
Q162
The keyword ________ declares a cyclic behavior corresponding to an edge triggered
flip flop.
(a)
assign
(b)
begin
(c)
parameter
(d)
always
Q163
Cyclic behaviors are used to model ________ behavior.
(a)
Level sensitive
(b)
Edge sensitive
(c)
Synchronous
(d)
All of above
Q164
The continuous assignments execute ___________.
(a)
Concurrently with each other
(b)
With gate level primitives
(c)
With all of the behavior in a design
(d)
All of the above
Q165 __________ is a Verilog concatenation operator.
(a)
()
(b)
{}
(c)
[]
(d)
<>

Q166
Register transfer level (RTL) models are written for specific architecturethat is __________.
(a)
Registers
(b)
Data paths
(c)
Machine operations
(d)
All of the above
Q167
Procedural assignments are also called __________ assignments.
(a)
Continuous
(b)
Non-blocking
(c)
Blocking
(d)
All of the above
Q168
Non-blocking assignments are made with _______ assignment operator.
(a)
Procedural
(b)
Non-blocking
(c)
Sequential
(d)
Non of the above
Q169
________ has/have the effect of suspending the execution of behavioral statement until
condition is satisfied.
(a)
Delay control operator ( # )
(b)
Event control operator ( @ )
(c)
A wait construct
(d)
All of the above
Q170
The _________ operator forms the or of the bits in a word.
(a)
or
(b)
bitwise or
(c)
reduction or
(d)
all of the above
Q171
Verilog have _______ loop constructs for describing repetitive algorithms.
(a)
Seven
(b)
Six
(c)
Five
(d)
Four
Q172
Which is not Verilog loop constructs?
(a)
repeat
(b)
while
(c)
dowhile
(d)
forever
Q173
.
(a)
(b)
(c)
(d)

'>>' is the Verilog ________ operator.


Greater than
Left shift
Right shift
All of the above

Q174
The ___ loop causes unconditional repetitive execution of the statements.
(a)
for
(b)
while
(c)
repeat
(d)
forever
Q175
________ create a hierarchical organization of the procedural statements within a
Verilog behavior.
(a)
parameter
(b)
real-time
(c)
function
(d)
task
Q176
Functions may contain __________.
(a)
Delay control
(b)
Event control
(c)
wait statement
(d)
Non of above
Q177
Functions must have at least ________ argument(s).
(a)
One output
(b)
Two output
(c)
One input
(d)
Two input
Q178
Register files are collection of registers that share the same _____ signal.
(a)
Synchronizing
(b)
Control
(c)
Both of the above
(d)
Non of the above
Q179
__________ is not Verilog reserved word.
(a)
always
(b)
forever
(c)
delay
(d)
Non of the above
Q180
_________ statement does not exist in Verilog environment.
(a)
case
(b)
casex
(c)
casexz
(d)
casz
Q181
Which is different?
(a)
Concurrent procedural assignment
(b)
Non-blocking assignment
(c)
Sequential assignment
(d)
Non of the above

Q182
APL is very ________ subject.
(a)
Interesting
(b)
Boring
(c)
Lengthy
(d)
Important
Q183
There are _______ common levels of abstraction
(a)
Two
(b)
Three
(c)
Four
(d)
Five
Q184
To translate the Boolean descriptions into an optimized netlist of combinationalgates
and storage registers is the design task of __level of abstraction.
(a)
Architectural
(b)
Logical
(c)
Physical
(d)
Both a and b
Q185
A _____ view of a logic-level model would consist of a schematic of gates that
implement the
(a)
Behavioral
(b)
Structural
(c)
Physical
(d)
Geometric
Q186
______ synthesis translates the dataflow/RTL description into a Boolean representation
and synthesizes it into a netlist.
(a)
Behavioral
(b)
Logic
(c)
RTL
(d)
High-level
Q187
The _______ engine of a synthesis tool reads and translates a Verilog- based description
of the input-output behavior of a circuit.
(a)
Translation
(b)
Optimization
(c)
Mapping
(d)
None of above
Q188
____ transforms an irredundant cover into a new cover of the same function
(a)
Expand
(b)
Reduce
(c)
Decomposition
(d)
Irredundant
Q189
_______ transformations play a key role in the misll algorithm for logic synthesis.
(a)
Two
(b)
Three
(c)
Four

(d)

Five

Q190
The ________ transform represents an individual function in terms ofintermediate nodes.
(a)
Decomposition
(b)
Factoring
(c)
Substitution
(d)
Elimination
Q191
Factoring produces a set of functions in a ________ form.
(a)
SOP
(b)
POS
(c)
Both of above
(d)
None of above
Q192
The _______ process expresses a Boolean function in terms of its inputs
function.
(a)
Decomposition
(b)
Factoring
(c)
Substitution
(d)
Elimination

and another

Q193
Sometimes the process of _________ has to be undone in the search for an optimal
realization.
(a)
Decomposition
(b)
Factoring
(c)
Substitution
(d)
Elimination
Q194
________ synthesis begins with an architecture and converts language- based
RTL statements into a set of Boolean equations.
(a)
Logical
(b)
RTL
(c)
High-level
(d)
Behavioral
Q195
High-level synthesis is also called _________
(a)
Logical
(b)
Behavioral
(c)
Architectural
(d)
Both b and c
Q196
In _______, the operations in the behavioral description are assigned to specific clock
cycles to implement the ordered activity flow of the algorithm.
(a)
Allocation
(b)
Scheduling
(c)
Decomposition
(d)
Factorization
Q197
Most EDA vendors have chosen not to support ________ in synthesis of combinational
logic

(a)
(b)
(c)
(d)

A set of continuous assignment statements


A netlist of structural primitives
A level-sensitive cyclic behavior
UDP

Q198
Functions and tasks will synthesize to ______ logic if they don't contain incomplete
case or conditional statements.
(a)
Combinational
(b)
Sequential
(c)
Both of above
(d)
None of above
Q199
A synthesis tool will synthesize a _______ rather than a priority structure
items of a case statements are mutually exclusive.
(a)
Flip-flop
(b)
Latch
(c)
Mux
(d)
All of above

if the case

An assignment to __ in a case or an if statement will be treated as a don'tcondition in synthesis


(a)
x
(b)
z
(c)
0
(d)
1

care

Q200

Q201
A continuous assignment using a conditional operator with feedback will synthesize into
_______.
(a)
Flip-flop
(b)
Latch
(c)
Mux
(d)
All of above
Q202
If the conditional operator is used in a ______ assignment, the result will be a mux with
feedback.
(a)
Continuous
(b)
Procedural
(c)
Non-blocking
(d)
All of above

Q/NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51

ANSWER
D
C
B
C
D
A
B
D
C
B
B
C
C
B
D
B
A
B
A
C
B
C
A
A
C
B
D
C
B
B
B
B
A
B
B
A
C
A
C
C
C
B
A
A
D
B
B
B
C
C
C

Q/NO
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102

ANSWER
A
C
B
B
B
A
A
B
B
A
B
A
A
A
B
A
A
A
A
C
B
B
A
A
A
D
B
A
B
A
B
A
B
B
A
C
B
C
B
A
A
B
C
A
A
A
C
A
A
A
A

Q/NO
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153

ANSWER
B
B
B
C
D
D
A
D
D
C
B
C
B
A
C
B
A
C
A
B
A
B
C
C
D
B
A
B
C
D
B
A
A
B
A
B
B
C
B
A
C
C
A
A
A
C
D
B
A
D
B

Q/NO
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202

ANSWER
B
D
A
C
D
D
B
D
D
D
D
B
D
C
D
D
C
D
C
C
D
D
D
C
C
C
C
D
D
B
B
B
B
A
B
C
A
B
C
A
B
D
B
D
A
C
A
B
A

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