Documentation

CHAPTER-1
INTRODUCTION
Power quality problems in the present day distribution systems are addressed in
the literature due to the increased use of sensitive and critical equipments such as
communication network, process industries, precise manufacturing processes etc. Power
quality problems such as transients, sags, swells and other distortions to the sinusoidal
waveform of the supply voltage affect the performance of these equipments. The
technologies such as custom power devices are emerged to provide protection against
power quality problems. Custom power devices are mainly of three categories such as
series-connected compensators known as DVR (Dynamic Voltage Restorer), shunt
connected compensators such as DSTATCOM (Distribution Static Compensator), and a
combination of series and shunt-connected compensators known as UPQC (Unified
Power Quality Conditioner). The DVR can regulate the load voltage from the problems
such as sag, swell, harmonics etc. in the supply voltages. Hence it can protect the critical
consumer loads from tripping and consequent losses. The custom power devices are
developed and installed at consumer point to meet the power quality standards.
Voltage sags in an electrical grid are not always possible to avoid because of the
finite clearing time of the faults that cause the voltage sags and the propagation of sags
from the transmission and distribution systems to the low-voltage loads. Voltage sags are
the common reasons for interruption in production plants and for end user equipment
malfunctions in general. In particular, tripping of equipment in a production line can
cause production interruption and significant costs due to loss of production. One
solution to this problem is to make the equipment itself more tolerant to sags, either by
intelligent control or by storing ride-through energy in the equipment. An alternative
solution, instead of modifying each component in a plant to be tolerant against voltage
sags, is to install a plant-wide uninterruptible power supply (UPS) system for longer
power interruptions or a DVR on the incoming supply to mitigate voltage sags for
shorter periods. DVRs can eliminate most of the sags, and minimize the risk of load
tripping for very deep sags, but their main drawbacks are their standby losses, the
equipment cost and also the protection scheme required for downstream short circuits.
Many solutions and their problems using DVRs are reported such as the voltages
in a three phase system are balanced and an energy-optimized control of DVR is
discussed. Industrial examples of DVRs are given in and different control methods are
SREE CHAITANYA INSTITUTE OF TECHNOLOGICAL SCIENCES-KARIMNAGAR
analyzed for different types of voltage sags. A comparison of different topologies and
control methods are presented for a DVR. The design of a capacitor supported DVR that
protects sag, swell, distortion, or unbalance in the supply voltages is discussed. The
performance of a DVR with the HFL (High Frequency Link) transformer is discussed. In
this paper, the control and performance of a DVR are demonstrated with a reduced rating
VSC (Voltage Source Converter). The SRF (Synchronous Reference Frame) theory is
used for the control of the DVR.
1.1 VOLTAGE SAG

Voltage sags and momentary power interruptions are probably the most
important PQ problem affecting industrial and large commercial customers. These
events are usually associated with a fault at some location in the supplying power
system. Interruptions occur when the fault is on the circuit supplying the customer. But
voltage sags occur even if the faults happen to be far away from the customer's site.
Voltage sags lasting only 4-5 cycles can cause a wide range of sensitive customer
equipment to drop out. To industrial customers, voltage sag and a momentary
interruption are equivalent if both shut their process down.
Fig.1.1: A typical example of three phase voltage sag
1.2 CHARACTERISTICS OF VOLTAGE SAGS

Voltage sags which can cause event impacts are caused by faults on the power
system. Motor starting also results in voltage sags but the magnitudes are usually not
severe enough to cause equipment mis-operation. The one line diagram given below in
fig.3.2 can be used to explain this phenomenon. Consider a customer on the feeder
controlled by breaker 1. In the case of a fault on this feeder, the customer will experience
voltage sag during the fault and an interruption when the breaker opens to clear the fault.
For temporary fault, enclosure may be successful. Anyway, sensitive equipment will
almost surely trip during this interruption. Another kind of likely event would be a
fault on one of the feeders from the substation or a fault somewhere on the
transmission system. In either of these cases, the customer will experience a voltage sag
during the actual period of fault.
Fig.1.2: One line diagram of Power System

As soon as breakers open to clear the fault, normal voltage will be restarted at the
customer's end. The customer voltage during a fault on a parallel feeder circuit that is
cleared quickly by the substation breaker i.e., total duration of fault is 150m sec. The
voltage during a fault on a parallel feeder will depend on the distance from the substation
to fault point. A fault close to substation will result in much more significant sag than a
fault near the end of feeder.
A single line to ground fault condition results in a much less severe voltage sag
than 3-phase fault Condition due to a delta--star transformer connection at the plant.
Transmission related voltage sags are normally much more consistent than those related
to distribution. Because of large amounts of energy associated with transmission faults,
they are cleared as soon as possible. This normally corresponds to 3-6 cycles, which is
the total time for fault detection and breaker operation Normally customers do not
experience an interruption for transmission fault. Transmission systems are looped
or networked, as distinct from radial distribution systems. If a fault occurs as shown

on the 115KV system, the protective relaying will sense the fault and breakers A and B
will open to clear the fault. While the fault is on the transmission system, the entire
power system, including the distribution system will experience Voltage sag.
1.3 VOLTAGE-SAG ANALYSIS

1.3.1. Load Flow:
A load flow representing the existing or modified system is required with an
accurate zero- sequence representation. The machine reactance Xd" or Xd' is also
required. The reactance used is dependent upon the post fault time frame of interest.
The machine and zero-sequence reactance are not required to calculate the voltage sag
magnitude.
1.3.2. Voltage Sag Calculation:

Sliding faults which include line-line, line to ground, line to line- to ground and
three phases are applied to all the lines in the load flow. Each line is divided into equal
sections and each section is faulted.
1.3.3. Voltage Sag Occurrence Calculation:

Based upon the utilities reliability data (the number of times each line section
will experience a fault) and the results of load flow and voltage sag calculations, the
number of voltage sags at the customer site due to remote faults can be calculated.
Depending upon the equipment connection, the voltage sag occurrence rate may be
calculated in terms of either phase or line voltages dependent upon the load connection.
For some facilities, both line and phase voltages may be required.
The data thus
obtained from load flow, Voltage sag calculation, and voltage sag occurrence
calculation can be sorted and tabulated by sag magnitude, fault type, location of
fault and nominal system voltage at the fault location.
1.3.4 Study of Results of Sag- Analysis:
The results can be tabulated and displayed in many different ways to recognize
difficult aspects. Area of vulnerability can be plotted on a geographical map or one - line
diagram. These plots can be used to target transmission and distribution lines for
enhancements in reliability. Further bar charts, and pie-charts showing the total number
of voltage sags with reference to voltage level at fault point, area/zone of fault, or the
fault type can be developed to help utilities focus on their system improvements.
Possible such system structural changes that can be identified include. Reconnection of a
customer from one voltage level to another, Installation of Ferro-resonant transformers
or time delayed under voltage, drop out relay to facilitate easy ride - through the sag
Application of static transfer switch and energy storage system., Application of fast
acting synchronous condensers, Neighborhood generation capacity addition, Increase
service voltage addition through transformer tap changing, By enhancement of system
reliability.
1.3.5 Equipment Sensitivity Studies:

Process controllers can be very sensitive to voltage sags. An electronic
component manufacturer was experiencing problems with large chiller motors tripping
off-line during voltage sag conditions. A 15VA process controller which regulates water
temperature was thought to be causing individual chillers to trip. This controller was
tested using a voltage sag simulator for voltage sags from 0.5-1000 cycles in
duration. The controller was found to be very sensitive to voltage sags tripping at around
80% of voltage regardless of duration.
1.3.6 Chip Testers:

Electronic chip testers are very sensitive to voltage variations, and because of the
complexity involved, often require 30 minutes or more to restart. In addition, the chips
involved in the testing process can be damaged and several days' later internal electronic
circuit boards in the testers may fail. A chip tester consists of a collection of electronic
loads, printers, computers, monitors etc. If any one component of the total package goes
down, the entire testing process is disrupted. The chip testers can be 50KVA or larger in
size.
1.3.7 DC Drives:
DC drives are used in many industrial processes, including printing presses and
plastics manufacturing. The plastic extrusion process is one of the common applications
where voltage sag can be particularly important. The extruders melt and grind plastic
pellets into liquid plastic. The liquid plastic may then be blowup into a bag or processed
in some other way before winder winds the plastic into spools.
1.4 SOLUTION TO VOLTAGE SAGS

Efforts by utilities and customers can reduce the number and severity of sags.
1.4.1 Utility solutions:

Utilities can take two main steps to reduce the detrimental effects of sags
(1) Prevent fault
(2) Improve fault clearing methods
Fault prevention methods include activities like tree trimming, adding line
arrests, washing insulators and installing animal guards. Improved fault clearing
practices include activities like adding line recloses, eliminating fast tripping, adding
loop schemes and modifying feeder design. These may reduce the number and /or
duration of momentary interruptions and voltage sags but faults cannot be eliminated
completely.
1.4.2 Customer solutions:

Power conditioning in power utilization helps to:
1. Isolate equipment from high frequency noise and transients.
2. Provide voltage sag ride through capability.
The following are some of the solutions available to provide ride - through capability to
critical loads:
a) Motor generator sets (M-G sets)
b) Uninterruptible Power supply (UPS's)
c) Ferro resonant, constant voltage transformers (CVT's)
d) Magnetic synthesizers
e) Super conducting storage devices (SSD's)
Fig.1.3: UPS Configurations
1.5 VOLTAGE SWELL

A swell is the reverse form of Sag, having an increase in AC Voltage for duration
of 0.5 cycles to 1 minute's time. For swells, high-impedance neutral connections, sudden
large load reductions, and a single-phase fault on a three phase system are common
sources. Swells can cause data errors, light flickering, electrical contact degradation, and
semiconductor damage in electronics causing hard server failures.
Our power
conditioners and UPS Solutions are common solutions for swells.

It is important to note that, much like sags, swells may not be apparent until
results are seen. Having your power quality devices monitoring and logging your
incoming power will help measure these events.
1.5.1 Over-Voltage:
Over-voltages can be the result of long-term problems that create swells. Think
of an overvoltage as an extended swell. Over-voltages are also common in areas where
supply transformer tap settings are set incorrectly and loads have been reduced. Overvoltage conditions can create high current draw and cause unnecessary tripping of
downstream circuit breakers, as well as overheating and putting stress on equipment.
Since an overvoltage is a constant swell, the same UPS and Power Conditioners will
work for these. Please note however that if the incoming power is constantly in an
overvoltage condition, the utility power to your facility may need correction as well.
The same symptoms apply to the over-voltages and swells however since the
overvoltage is more constant you should expect some excess heat. This excess heat,
especially in data center environments, must be monitored.
1.5.2 Swell Causes:

As discussed previously, swells are less common than voltage sags, but also
usually associated with system fault conditions as shown. A swell can occur due to a
single line-to ground fault on the system, which can also result in a temporary voltage
rise on the unfaulted phases. This is especially true in ungrounded or floating ground
delta systems, where the sudden change in ground reference result in a voltage rise on
the ungrounded phases. On an ungrounded system, the line-to ground voltages on the
ungrounded phases will be 1.73 pu during a fault condition. Close to the substation on a
grounded system, there will be no voltage rise on unfaulted phases because the
substation transformer is usually connected delta-wye, providing a low impedance path
for the fault current. Swells can also be generated by sudden load decreases. The abrupt
interruption of current can generate a large voltage, per the formula: v = L di/dt, where L
is the inductance of the line, and di/dt is the change in current flow. Switching on a large
capacitor bank can also cause a swell, though it more often causes an oscillatory
transient.
Fig.1.4: Three phase voltage swell
1.5.3 Monitoring & Testing:

As with other technology-driven products, the power quality monitoring products
have rapidly evolved in the last fifteen years. Increased complexity and performance of
VLSI components, particularly microprocessor, digital signal processors, programmable
logic, and analog/digital converters, have allowed the manufacturer's of power quality
monitoring instruments to include more performance in the same size package for the
same or reduced price. Different types of monitoring equipment are available, depending
on the user's knowledge base and requirements.
The timing and magnitude information can often identify the source of the fault.
For example, if the phase current levels of the load did not change prior to the voltage
sag; the fault is more likely upstream. If the magnitude of the sag is down to 20% of
nominal, it is likely that the fault was close by. If the sag duration was less than four
cycles, it was most likely a transmission system fault. If the swell waveform is preceded
by a oscillatory transient, it may be the result of a power factor correction capacitor
being switched on. Line-to-neutral voltage sag is often accompanied by a neutral-toground voltage swell. The location of the monitor, power supply wiring, measurement
input wiring, and immunization from RFI/EMI is especially critical with the higher
performance graphical monitors. The monitor itself must also be capable of riding
through the sag and surviving extended duration swells. The functionality of the monitor
should be thoroughly evaluated in the laboratory, under simulated disturbances, before
placing out in the field. Just because it didn't record it, does not mean it didn't happen.
Unless there is significant information pointing to the cause of the disturbance before the
monitoring begins, it is common practice to begin at the point of common coupling with
the utility service as the initial monitoring point. If the initial monitoring period indicates
that the fault occurred on the utility side of the service transformer, then further
monitoring would not be necessary until attempting to determine the effectiveness of the
solution. If the source of the disturbance is determined to be internal to the facility, the
placing multiple monitors on the various feeds within the facility would most likely
produce the optimal answer in the shortest time period.
1.6 SOLUTIONS:
The first step in reducing the severity of the system sags is to reduce the number
of faults. From the utility side, transmission-line shielding can prevent lighting induced
faults. If tower-footing resistance is high, the surge energy from a lightning stroke is not
absorbed quickly into the ground. Since high tower-footing resistance is an import factor
in causing back flash from static wire to phase wire, steps to reduce such should be
taken. The probability of flashover can be reduced by applying surge arresters to divert
current to ground.
TABLE 1.1: TRANSFORMER SECONDARY VOLTAGES (PU)
1.6.1 Ferro resonant Transformers:

Ferro resonant transformers, also called constant-voltage transformers (CVT),
can handle most voltage sags. Ferro resonant transformers can have separate input and
output windings, which can provide voltage transformation and common-mode noise
isolation as well as voltage regulation. While CVTs provide excellent regulation, they
have limited overload capacity and poor efficiency at low loads. At a load of 25% of
rating, they require an input of a minimum of 30% of nominal to maintain a +3/-6%
output. At 50% load of rating, they typically require 46% of nominal input for
regulation, which goes to 71% of nominal input at full load.
1.6.2 Magnetically Controlled Voltage Regulators:

Magnetic synthesizers use transformers, inductors and capacitors to synthesize 3phase voltage outputs. Enough energy is stored in the capacitors to ride through one
cycle. They use special autotransformers, with buck-boost windings to control the
voltage. The effect of the buck-boost windings is varied by a control winding with DC
current that affects the saturation of the core. The control-winding current is produced by
10
electronic sensing and control circuits. The response time is relatively slow (3-10
cycles).
1.6.3 Tap Switching Transformers:

Electronic tap-switching transformers have the high efficient, low impedance,
noise isolation, and overload capacity of a transformer. These regulators use solid state
switches (thyristors) to change the turns ratio on a tapped coil winding. The switching is
controlled by electronic sensing circuits, and can react relatively quickly (1-3 cycles).
Thyristor switching at zero voltage is easier and less costly than at zero current,
but can cause transient voltages in the system, as the current and voltage are only in
phase at unity power factor. Thus, switching at zero-current is preferred. The voltage
change is in discrete steps, but the steps can be small enough so as not to induce
additional problems.
1.6.4 Static UPS:

A UPS can provide complete isolation from all power line disturbances, in
addition to providing ride-through during an outage. A static UPS consist of a rectifier
AC to DC converter, DC bus with a floating battery, DC to AC inverter, and solid state
bypass switch. The rectifier converts the raw input power to DC, which keeps the
floating battery fully charged and supplies power to the inverter section. The inverters
generate 6 or 12 step waves, pulse-width modulated waves, or a combination of the two,
to create a synthetic sine-wave output.
11
CHAPTER-2
ROLE OF INVERTERS
2.1 INTRODUCTION:
The main objective of static power converters is to produce an ac output
waveform from a dc power supply. These are the types of waveforms required in
adjustable speed drives (ASDs), uninterruptible power supplies (UPS), static VAR
compensators, active filters, flexible ac transmission systems (FACTS), and voltage
compensators, which are only a few applications. For sinusoidal ac outputs, the
magnitude, frequency, and phase should be controllable. According to the type of ac
output waveform, these topologies can be considered as voltage source inverters (VSIs),
where the independently controlled ac output is a voltage waveform.
These structures are the most widely used because they naturally behave as
voltage sources as required by many industrial applications, such as adjustable speed
drives (ASDs), which are the most popular application of inverters. Similarly, these
topologies can be found as current source inverters (CSIs), where the independently
controlled ac output is a current waveform. These structures are still widely used in
medium-voltage industrial applications, where high-quality voltage waveforms are
required. Static power converters, specifically inverters, are constructed from power
switches and the ac output waveforms are therefore made up of discrete values. This
leads to the generation of waveforms that feature fast transitions rather than smooth
ones. For instance, the ac output voltage produced by the VSI of a standard ASD is a
three-level
Fig.2.1: Adujustable speed drive
12
2.2 Basic designs:

In one simple inverter circuit, DC power is connected to a transformer through
the centre tap of the primary winding. A switch is rapidly switched back and forth to
allow current to flow back to the DC source following two alternate paths through one
end of the primary winding and then the other. The alternation of the direction of current
in the primary winding of the transformer produces alternating current (AC) in the
secondary circuit.
The electromechanical version of the switching device includes two stationary
contacts and a spring supported moving contact. The spring holds the movable contact
against one of the stationary contacts and an electromagnet pulls the movable contact to
the opposite stationary contact. The current in the electromagnet is interrupted by the
action of the switch so that the switch continually switches rapidly back and forth. This
type of electromechanical inverter switch, called a vibrator or buzzer, was once used
in vacuum tube automobile radios. A similar mechanism has been used in door bells,
buzzers
and
tattoo.
As
they
became
available
with
adequate
power
ratings, transistors and various other types of semiconductor switches have been
incorporated into inverter circuit designs.
13
2.3 Output waveforms:

The switch in the simple inverter described above, when not coupled to an output
transformer, produces a square voltage waveform due to its simple off and on nature as
opposed to the sinusoidal waveform that is the usual waveform of an AC power supply.
Using Fourier analysis, periodic waveforms are represented as the sum of an infinite
series of sine waves. The sine wave that has the same frequency as the original
waveform is called the fundamental component. The other sine waves, called harmonics
that are included in the series have frequencies that are integral multiples of the
fundamental frequency.
The quality of the inverter output waveform can be expressed by using the Fourier
analysis data to calculate the total harmonic distortion (THD). The total harmonic
distortion is the square root of the sum of the squares of the harmonic voltages divided
by the fundamental voltage:
Fig.2.2: Fundamental and harmonic wave form
2.4 TYPES OF INVERTERS:

Generally inverters are of Two Types:
14
1. VOLTAGE SOURCE INVERTER

2. CURRENT SOURCE INVERTER
2.5 VOLTAGE SOURCE INVERTER

2.5.1 SINGLE-PHASE HALF-BRIDGE VOLTAGE SOURCE
INVERTERS
Single-phase voltage source inverters (VSIs) can be found as half-bridge and
full-bridge topologies. Although the power range they cover is the low one, they are
widely used in power supplies, single-phase UPSs, and currently to form elaborate highpower static power topologies, such as for instance the main features of both approaches
are reviewed and presented in the following.
Figure 2.3 shows the power topology of a half-bridge VSI, where two large
capacitors are required to provide a neutral point N, such that each capacitor maintains a
constant voltage vi=2. Because the current harmonics injected by the operation of the
inverter are low-order harmonics, a set of large capacitors (C. and C) is required. It is
clear that both switches S. and S cannot be on simultaneously because a short circuit
across the dc link voltage source vi would be produced. There are two defined (states 1
and 2) and one undefined (state 3) switch state as shown in Table 2.1. In order to avoid
the short circuit across the dc bus and the undefined ac output voltage condition, the
modulating technique should always ensure that at any instant either the top or the
bottom switch of the inverter leg is on.
15
Fig.2.3: Single-phase half-bridge VSI.

State
State
Components
+ is on and is off
V/2
conducting
+ if >0
+ of <0
- is on and + is off
-V/2
_ if >0
_ if <0
+ and are all off
-V/2 ,
_ if > 0
V/2
+ if < 0
TABLE 2.1 Switch states for a half-bridge single-phase VSI
2.5.2 The Carrier-Based Pulse width Modulation (PWM) Technique:

As mentioned earlier, it is desired that the ac output voltage. V a N follow a given
waveform (e.g., sinusoidal) on a continuous basis by properly switching the power
valves. The carrier-based PWM technique fulfils such a requirement as it defines the on
and off states of the switches of one leg of a VSI by comparing a modulating signal V c
(desired ac output voltage) and a triangular waveform Vd (carrier signal). In practice,
when Vc >Vd the switch S. is on and the switch is off; similarly, when V c < Vd the switch
S. is off and the switch S is on.
16
Fig.2.4: The half-bridge VSI. Ideal waveforms for the SPWM: (a) carrier and modulating
signals; (b) switch S. state; (c) Switch S state; (d) ac output voltage; (e) ac output
voltage spectrum; (f) ac output current; (g) dc current; (h) dc current spectrum; (i) switch
S+ current; (j) diode + current.
A special case is when the modulating signal Vc is a sinusoidal at frequency fc
and amplitude
v^
v^c
, and the triangular signal Vd is at frequency
and amplitude
. This is the sinusoidal PWM (SPWM) scheme. In this case, the modulation index
ma (also known as the amplitude-modulation ratio) is defined as

m a=
v^c
v^
-------------------- (6.1)
17
And the normalized carrier frequency mf (also known as the frequency-modulation ratio)
is
mf =
f
fc
------------------- (6.2)
Figure 6.4(e) clearly shows that the ac output voltage
v o =v aN
is basically a sinusoidal
waveform plus harmonics, which features: (a) the amplitude of the fundamental
v^
o1
component of the ac output voltage
^
v^
o 1= v aN 1=
satisfying the following expression
vi
m
2 a ------------------- (6.3)
(b) for odd values of the normalized carrier frequency fm the harmonics in the ac output
voltage appear at normalized frequencies fh centered around mf and its multiples,
specifically,
h=lmf k
where l=1,2, ..
---------------------- (6.4)
Where k = 2; 4; 6; . . . for l = 1; 3; 5; . . . ; and k = 1; 3; 5; . . . for l = 2; 4; 6; . . . ; (c) the

amplitude of the ac output voltage harmonics is a function of the modulation index ma
and is independent of the normalized carrier frequency mf form f > 9; (d) the harmonics
in the dc link current (due to the modulation) appear at normalized frequencies fp
centered around the normalized carrier frequency mf and its multiples, specifically,
p=lm f k k
where l=1,2, ..
. (6.5)
where k = 2; 4; 6; . . . for l = 1; 3; 5; . . . ; and k = 1; 3; 5; . .for l= 2; 4; 6; . . . .

Additional important issues are: (a) for small values of mf (mf < 21), the carrier signal
Vd and the modulating signal vc should be synchronized to each other(mf integer), which
18
is required to hold the previous features; if this is not the case, sub harmonics will be
present in the ac output voltage; (b) for large values of mf (mf > 21), the sub harmonics
are negligible if an asynchronous PWM
Fig.2.5: Fundamental ac component of the output voltage in a half-bridge VSI SPWM

modulated.
Technique is used, however, due to potential very low-order sub harmonics, its
use should be avoided; finally (c) in the Over modulation region (ma > 1) some
intersections between the carrier and the modulating signal are missed, which leads to
the generation of low-order harmonics but a higher fundamental ac output voltage is
obtained; unfortunately, the linearity between ma and
v^0 l
achieved in the linear
region Eq. (6.3) does not hold in the over modulation region, moreover, a saturation
effect can be observed.
The PWM technique allows an ac output voltage to be generated that tracks a
given modulating signal. A special case is the SPWM technique (the modulating signal is
a sinusoidal) that provides in the linear region an ac output voltage that varies linearly as
a function of the modulation index and the harmonics are at well-defined frequencies
and amplitudes. These features simplify the design of filtering components.
Unfortunately, the maximum amplitude of the fundamental ac voltage is v i=2 in this
19
operating mode. Higher voltages are obtained by using the over modulation region (ma >
1); however, low-order harmonics appear in the ac output voltage. Very large values of
the modulation index (ma > 3:24) lead to a totally square ac output voltage that is
considered as the square-wave modulating technique that is discussed in the next section.
Fig.2.6: The half-bridge VSI. Ideal waveforms for the square-wave modulating
technique: (a) ac output voltage; (b) ac output voltage spectrum.
2.6 Square-Wave Modulating Technique:

Both switches S. and S are on for one-half cycle of the ac output period. This is
equivalent to the SPWM technique with an infinite modulation index ma. Figure 6.6
shows the following: (a) the normalized ac output voltage harmonics are at frequencies h
= 3; 5; 7; 9; . . . , and for a given dc link voltage; (b) the fundamental ac output voltage
features amplitude given by
(6.6)
And the harmonics feature an amplitude is given by
.. (6.7)
It can be seen that the ac output voltage cannot be changed by the inverter.
However, it could be changed by controlling the dc link voltage vi . Other modulating
techniques that are applicable to half-bridge configurations (e.g., selective harmonic
elimination) are reviewed here as they can easily be extended to modulate other
topologies.
2.6.1 Selective Harmonic Elimination:

The main objective is to obtain a sinusoidal ac output voltage waveform where
the fundamental component can be adjusted arbitrarily within a range and the intrinsic
harmonics selectively eliminated. This is achieved by mathematically generating the
exact instant of the turn-on and turn-off of the power valves. The ac output voltage
20
features odd half- and quarter wave symmetry; therefore, even harmonics are not present
(voh = 0; h = 2; 4; 6; . . .). Moreover, the per-phase voltage waveform (v o = vaN in
Fig.2.6.), should be chopped N times per half-cycle in order to adjust the fundamental
and eliminate N -1 harmonics in the ac output voltage waveform. For instance, to
eliminate the third and fifth harmonics and to perform fundamental magnitude control (N
= 3), the equations to be solved are the following:
(6.8)
Where the angles 1, 2, and 3 are defined as shown in fig 2.7(a). The angles are
found by means of iterative algorithms as no analytical solutions can be derived. The
angles 1, 2, and 3 are plotted for different values of
v^
o1
= vi in Fig. 6.7a. The
general expressions to eliminate an even N -1 (N -1 = 2; 4; 6; . . .) numbers of harmonics

are
.. (6.9)
21
Fig.2.7: Chopping angles for SHE and fundamental voltage control in half-bridge VSIs:
(a) third and fifth harmonic elimination; (b) third, fifth, and seventh harmonic
elimination.
Where 1, 2, . . n should satisfy 1 < 2,< . .< n
<
similarly, to eliminate
an odd number of harmonics, for instance, the third, fifth and seventh, and to perform
fundamental magnitude control (N-1 = 3), the equations to be solved are:
(6.10)
Where the angles
angles
and
, and
are defined as shown in Fig. 14.6b. The
are plotted for different values of
in Fig. 6.7b. The general
expressions to eliminate an odd N-1 (N-1 = 3; 5; 7; . . .) number of harmonics is given by
. (6.11)
Where
should satisfy
2.6.2 Single phase Full-Bridge VSI
Fig.2.8: Single-phase full-bridge VSI

Figure 2.8 shows the power topology of a full-bridge VSI. This inverter is similar
to the half-bridge inverter; however, a second leg provides the neutral point to the load.
22
As expected, both switches
and
(or
and
) cannot be on simultaneously
because a short circuit across the dc link voltage source vi would be produced. There are
four defined (states 1, 2, 3, and 4) and one undefined (state 5) switch states as shown in
Table 2.2.
The undefined condition should be avoided so as to be always capable of
defining the ac output voltage. In order to avoid the short circuit across the dc bus and
the undefined ac output voltage condition, the modulating technique should ensure that
either the top or the bottom switch of each leg is on at any instant. It can be observed that
the ac output voltage can take values up to the dc link value v i , which is twice that
obtained with half-bridge VSI topologies. Several modulating techniques have been
developed that are applicable to full-bridge VSIs. Among them are the PWM (bipolar
and unipolar) techniques.
Table 2.2: Switch states for a full-bridge single-phase VSI
2.6.3 Bipolar PWM Technique:

States 1 and 2 (Table 2.2) are used to generate the ac output voltage in this
approach. Thus, the ac output voltage waveform features only two values, which are vi
and -vi. To generate the states, a carrier-based technique can be used as in half-bridge
configurations (Fig.2.6.), where only one sinusoidal modulating signal has been used. It
should be noted that the on state in switch
switches
and
in the half-bridge corresponds to both
being in the on state in the full-bridge configuration. Similarly,
in the on state in the half-bridge corresponds to both switches
and
being in the
on state in the full-bridge configuration. This is called bipolar carrier-based SPWM. The
23
ac output voltage waveform in a full-bridge VSI is basically a sinusoidal waveform that

features a fundamental component of amplitude
that satisfies the expression
v^
^
o 1= v
aN 1= v m .. (6.15)
i a
In the linear region of the modulating technique (ma
1), which is twice that obtained
in the half-bridge VSI. Identical conclusions can be drawn for the frequencies and
amplitudes of the harmonics in the ac output voltage and dc link current, and for
operations at smaller and larger values of odd mf (including the over modulation region
(ma > 1)), than in half bridge VSIs, but considering that the maximum ac output voltage
is the dc link voltage vi . Thus, in the over modulation region the fundamental
component of amplitude
satisfies the expression
. (6.16)
In contrast to the bipolar approach, the unipolar PWM technique uses the states
1, 2, 3, and to generate the ac output voltage. Thus, the ac output voltage waveform can
instantaneously take one of three values, namely
van, and
is used to generate
the signal vc is used to generate

.On the other hand,
thus
This is called unipolar carrier-
based PWM.
Identical conclusions can be drawn for the amplitude of the fundamental
component and harmonics in the ac output voltage and dc link current, and for
operations at smaller and larger values of mf, (including the over modulation region (ma
> 1)), than in full-bridge VSIs modulated by the bipolar SPWM. However, because the
phase voltages
are identical but 180_ out of phase, the output voltage

will not contain even harmonics. Thus, if mf is taken even, the
harmonics in the ac output voltage appear at normalized odd frequencies f h centered

around twice the normalized carrier frequency mf and its multiples. Specifically
(6.17)
24
where k =1; 3; 5; . . . and the harmonics in the dc link current appear at normalized
frequencies fp centered around twice the normalized carrier frequency mf and its
multiples. Specifically,
(6.18)
Where k = 1; 3; 5; .This feature is considered to be an advantage because it allows the
use of smaller filtering components to obtain high-quality voltage and current
waveforms while using the same switching frequency as in VSIs modulated by the
bipolar approach.
2.6.4 Selective Harmonic Elimination:

In contrast to half-bridge VSIs, this approach is applied in a per-line fashion for
full-bridge VSIs. The ac output voltage features odd half- and quarter-wave symmetry;
therefore, even harmonics are not present
Moreover, the ac
output voltage waveform (Vo = Vab in Fig 2.6), should feature N pulses per half-cycle in
order to adjust the fundamental component and eliminate N 1 harmonics. For instance,
to eliminate the third, fifth and seventh harmonics and to perform fundamental
magnitude control (N . 4), the equations to be solved are:
. (6.19)
The general expressions to eliminate an arbitrary N (N-1 = 3,5,7.) number of
harmonics are given by
. (6.20)
Where
should satisfy
Shows a special case where only the fundamental ac output voltage is controlled. This is
known as output control by voltage cancellation, which derives from the fact that its
implementation is easily attainable by using two phase-shifted square-wave switching
signals as shown in
25
Fig.2.9: The full-bridge VSI. Ideal waveforms for the unipolar SPWM :(a) carrier and
modulating signals; (b) switch
state; (c) switch
. state; (d) ac output voltage; (e)
ac output voltage spectrum; (f) ac output current; (g) dc current; (h) dc current spectrum;
(i) switch
current; (j) diode
current.
Fig.2.10: The full-bridge VSI. Ideal waveforms for the SHE technique: (a) ac output
voltage for third, fifth, and seventh harmonic elimination; (b) spectrum of (a); (c) ac
output voltage for fundamental control; (d) spectrum of (c).
26
Fig.2.11: Chopping angles for SHE and fundamental voltage control in full-bridge VSIs:
(a) fundamental control and third, fifth, and seventh harmonic elimination;(b)
fundamental control.
Thus, the amplitude of the fundamental component and harmonics in the ac output
voltage are given by
(6.21)
It can also be observed in Fig. 14.12c that for
square wave operation is achieved.
In this case, the fundamental a output voltage is given by
. (6.22)
Where the fundamental load voltage can be controlled by the manipulation of the dc link
voltage.
27
Fig.2.12: The full-bridge VSI. Ideal waveforms for the output control by voltage
cancellation: (a) switch
state; (b) switch
state; (c) ac output voltage; (d) ac output
voltage spectrum.
2.7 Current Source Inverters:

The main objective of these static power converters is tom produce ac output
current waveforms from a dc current power supply. For sinusoidal ac outputs, its
magnitude, frequency, and phase should be controllable. Due to the fact that the ac line
currents ioa, iob, and ioc feature high di=dt, a capacitive filter should be connected at the
ac terminals in inductive load applications (such as ASDs).
Thus, nearly sinusoidal load voltages are generated that justifies the use of these
topologies in medium-voltage industrial applications, where high-quality voltage
waveforms are required.
Fig.2.13: Current source inverter

Should be closed at any time; the dc bus is of the current-source type and thus it
cannot be opened; therefore, there must be at least one top switch and one bottom switch
28
(closed at all times. Note that both constraints can be summarized by stating that at any
time, only one top switch and one bottom switch must be closed.
There are nine valid states in three-phase CSIs produce zero ac line currents. In
this case, the dc link current freewheels through either the switches S1 and S4, switches
S3 and S6, or switches S5 and S2.
The remaining states produce nonzero ac output line currents. In order to generate a
given set of ac line current waveforms, the inverter must move from one state to another.
Thus, the resulting line currents consist of discrete values of current, which are ii , 0, and
ii .
The selection of the states in order to generate the given waveforms is done by the
modulating technique that should ensure the use of only the valid states.
2.7.1 Carrier-based PWM Techniques in CSIs:

It has been shown that carrier-based PWM techniques that were initially
developed for three-phase VSIs can be extended to three-phase CSIs. Obtains the gating
pattern for a CSI from the gating pattern developed for a VSI. As a result, the line current
appears to be identical to the line voltage in a VSI for similar carrier and modulating
signals.
It is composed of a switching pulse generator, a shorting pulse generator, a
shorting pulse distributor, and a switching and shorting pulse combinatory. The circuit
basically produces the gating signals..S.1...6 . .S1 . . . S6.T . According to a carrier i D and
three modulating signals .ic .iabc . .ica icb ica.T .
Therefore, any set of modulating signals which when combined result in a
sinusoidal line-to-line set of signals, will satisfy the requirement for a sinusoidal line
current pattern. Examples of such a modulating signals are the standard sinusoidal,
sinusoidal with third harmonic injection, trapezoidal and dead band waveforms. The first
component of this stage is the switching pulse generator, where the signals. [Sa]. 123. are
generated according to:
The outputs of the switching pulse generator are the signals. Sc .1...6, which are
basically the gating signals of the CSI without the shorting pulses. These are necessary to
29
free wheel the dc link current ii when zero ac output currents are required it can be
clearly seen that at most one top switch and one bottom switch is on, which satisfies the
first constraint of the gating signals as stated before.
In order to satisfy the second constraint, the shorting pulse .Sd 1. is generated
(shorting pulse generator (when none of the top switches .Sc1 . Sc3 . Sc5 . 0. or none of
the bottom switches .Sc4 . Sc6 . Sc2 . 0. are gated. Then, this pulse is added (using OR
gates) to only one leg of the CSI (either to the switches 1 and 4, 3 and 6, or 5 and 2) by
means of the switching and shorting pulse combinatory.
The signals generated by the shorting pulse generator (a) only one leg of the CSI
is shorted, as only one of the signals is high at any time; and (b) there is an even
distribution of the shorting pulse, as .Se .123 is HIGH for 120 in each period. This
ensures that the rms currents are equal in all legs. the relevant waveforms if a triangular
carrier iD and sinusoidal modulating signals .ic .abc are used in combination with the
gating pattern generator this is SPWM in CSIs.
It can be observed that some of the waveforms are identical to those obtained in
three-phase VSIs, where a SPWM technique Specifically: (i) the load line VSI is
identical to the load line current; and (ii) the dc link current is identical to the dc link
voltage in the CSI. This brings up the duality issue between both topologies when similar
modulation approaches are used. Therefore, for odd multiple of 3 values of the
normalized carrier frequency mf , the harmonics in the ac output current appear at
normalized frequencies fh centered around mf and its multiples, specifically, at
Where l . 1; 3; 5; . . . for k . 2; 4; 6; . . . and l . 2; 4; . . . for k . 1; 5; 7; . . . , such that h is

not a multiple of 3. Therefore, the harmonics will be
; . . . . For nearly sinusoidal
ac load voltages, the harmonics in the DC links voltage are at frequencies given by
Identical conclusions can be drawn for the operation at small and large values of mf in
the same way as for three phase VSI configurations. Thus, the maximum amplitude of
30
Fig.2.14: The three-phase CSI. Ideal waveforms for the SPWM .ma . 0:8, mf . 9): (a)
carrier and modulating signals; (b) switch S1 state; (c)switch S3 state; (d) ac output
current; (e) ac output current spectrum; (f) ac output voltage; (g) dc voltage; (h) dc
voltage spectrum; (i) switch S1current; ( j) Switch S1 voltage.
3 i1
^
The fundamental ac output line current is i oa1= 2
3i1
i^ oa1=m a
2
and therefore one can write
0 < ma 1
31
To further increase the amplitude of the load current, the over modulation approach can
be used. In this region, the fundamental line currents range in
To further test the gating signal generator circuit a sinusoidal set with third and
ninth harmonic injection modulating signals is used.
2.7.2 Selective Harmonic Elimination in Three-Phase CSIs:

The SHE-based modulating techniques in VSIs define the gating signals such that
a given number of harmonics are eliminated and the fundamental phase-voltage
amplitude is
Fig.2.15: The three-phase CSI. Square-wave operation: (a) switch S1 state; (b) switch S3
state; (c) ac output current; (d) ac output current spectrum.
32
Chopping angles for SHE and fundamental current control in three-phase CSIs:
fifth and seventh harmonic elimination. Synchronized with the signals .Sa.123 in order
to symmetrically distribute the shorting pulse and thus generate symmetrical gating
patterns. The circuit ensures line current waveforms as the line voltages in a VSI.
Therefore, any arbitrary number of harmonics can be eliminated and the fundamental
line current can be controlled in CSIs. Moreover, the same chopping angles obtained for
VSIs can be used in CSIs. For instance, to eliminate the fifth and seventh harmonics, the
chopping angles which are identical to that obtained for a VSI using the line current does
not contain the fifth and the seventh harmonics as expected. Hence, any number of
harmonics can be eliminated in three-phase CSIs by means of the circuit without the
hassle of how to satisfy the gating signal constrains.
2.8 APPLICATIONS
2.8.1 DC power source utilization:
An inverter converts the DC electricity from sources such as batteries, solar
panels, or fuel cells to AC electricity. The electricity can be at any required voltage; in
particular it can operate AC equipment designed for mains operation, or rectified to
produce DC at any desired voltage.
Grid tie inverters can feed energy back into the distribution network because they
produce alternating current with the same wave shape and frequency as supplied by the
distribution system. They can also switch off automatically in the event of a blackout.
33
2.8.2 Uninterruptible power supplies:

Inverters convert low frequency main AC power to a higher frequency for use
in induction heating. To do this, AC power is first rectified to provide DC power. The
inverter then changes the DC power to high frequency AC power.
2.8.3 HVDC power transmission:

With HVDC power transmission, AC power is rectified and high voltage DC
power is transmitted to another location. At the receiving location, an inverter in a static
inverter plant converts the power back to AC.
2.8.4 Variable-frequency drives:

A variable-frequency drive controls the operating speed of an AC motor by
controlling the frequency and voltage of the power supplied to the motor. An inverter
provides the controlled power. In most cases, the variable-frequency drive includes
a rectifier so that DC power for the inverter can be provided from main AC power. Since
an inverter is the key component, variable-frequency drives are sometimes called
inverter drives or just inverters.
2.8.5 Electric vehicle drives:

Adjustable speed motor control inverters are currently used to power the traction
motors in some electric and diesel-electric rail vehicles as well as some battery electric
vehicles and hybrid electric highway vehicles such as the Toyota Prius.
Various improvements in inverter technology are being developed specifically for
electric vehicle applications. In vehicles with regenerative braking, the inverter also
takes power from the motor (now acting as a generator) and stores it in the batteries.
2.8.6 Air conditioning:

A transformer allows AC power to be converted to any desired
voltage, but at the same frequency. Inverters, plus rectifiers for DC, can be designed to
convert from any voltage, AC or DC, to any other voltage, also AC or DC, at any desired
34
frequency. The output power can never exceed the input power, but efficiencies can be
high, with a small proportion of the power dissipated as waste heat.
2.9 Summary:
This chapter summarizes the function of converters which are used in the
proposed system with modulating and harmonic elimination techniques like bipolar
PWM technique, VSI and CSI are explained with waveforms and applications.
CHAPTER-3
DYNAMIC VOLTAGE RESTORER
3.1 Introduction:
Among the power quality problems (sags, swells, harmonics? voltage sags are
the most severe disturbances. In order to overcome these problems the concept of custom
power devices is introduced recently. One of those devices is the Dynamic Voltage
Restorer (DVR), which is the most efficient and effective modern custom power device
used in power distribution networks. DVR is a recently proposed series connected solid
state device that injects voltage into the system in order to regulate the load side voltage.
35
Fig.3.1: Location of DVR

It is normally installed in a distribution system between the supply and the
critical load feeder at the point of common coupling (PCC). Other than voltage sags and
swells compensation, DVR can also added other features like: line voltage harmonics
compensation, reduction of transients in voltage and fault current limitations.
3.2 Basic Configuration of DVR:

The general configuration of the DVR consists of:
i. An Injection/ Booster transformer
ii. A Harmonic filter
iii. Storage Devices
iv. A Voltage Source Converter (VSC)
v. DC charging circuit
36
vi. A Control and Protection system
3.2.1 Injection/ Booster transformer:

The Injection / Booster transformer is a specially designed transformer that
attempts to limit the coupling of noise and transient energy from the primary side to the
secondary side. Its main tasks are:
It connects the DVR to the distribution network via the HV-windings and
transforms and couples the injected compensating voltages generated by the
voltage source converters to the incoming supply voltage.
In addition, the Injection / Booster transformer serves the purpose of isolating the
load from the system (VSC and control mechanism).
3.3: Equations related to DVR:
37
The system impedance Zth depends on the fault level of the load bus. When the
system voltage (Vth) drops, the DVR injects a series voltage VDVR through the
injection transformer so that the desired load voltage magnitude VL can be maintained.
The series injected voltage of the DVR can be written as
Where
VL
The desired load voltage magnitude
ZTH :
The load impedance.
IL
The load current
VTH :
The system voltage during fault condition
The load current IL is given by,
When VL is considered as a reference equation can be rewritten as,
38
The complex power injection of the DVR can be written as,
It requires the injection of only reactive power and the DVR itself is capable of
generating the reactive power.
3.4 Operating modes of DVR:
Fig.3.4: DVR operating modes

The basic function of the DVR is to inject a dynamically controlled voltage
VDVR generated by a forced commutated converter in series to the bus voltage by
means of a booster transformer. The momentary amplitudes of the three injected phase
voltages are controlled such as to eliminate any detrimental effects of a bus fault to the
load voltage VL. This means that any differential voltages caused by transient
disturbances in the ac feeder will be compensated by an equivalent voltage generated by
the converter and injected on the medium voltage level through the booster transformer.
39
The DVR has three modes of operation which are: protection mode, standby
mode, injection/boost mode.
3.4.1 Protection mode:

If the over current on the load side exceeds a permissible limit due to short circuit
on the load or large inrush current, the DVR will be isolated from the systems by using
the bypass switches (S2 and S3 will open) and supplying another path for current (S1
will be closed).
Fig.3.5: Protection Mode (creating another path for current)
3.4.2 Standby Mode: (VDVR= 0):

In the standby mode the booster transformers low voltage winding is shorted
through the converter. No switching of semiconductors occurs in this mode of operation
and the full load current will pass through the primary.
40
Fig.3.6: Standby Mode
3.4.3 Injection/Boost Mode: (VDVR>0):

In the Injection/Boost mode the DVR is injecting a compensating voltage
through the booster transformer due to the detection of a disturbance in the supply
voltage.
3.5 Voltage injection methods of DVR:

Voltage injection or compensation methods by means of a DVR depend upon the
limiting factors such as; DVR power ratings, various conditions of load, and different
types of voltage sags. Some loads are sensitive towards phase angel jump and some are
sensitive towards change in magnitude and others are tolerant to these. Therefore the
control strategies depend upon the type of load characteristics.
There are four different methods of DVR voltage injection which are
i. Pre-sag compensation method
ii. In-phase compensation method
iii. In-phase advanced compensation method
iv. Voltage tolerance method with minimum energy injection
41
3.5.1 Pre-sag/dip compensation method:

The pre-sag method tracks the supply voltage continuously and if it detects any
disturbances in supply voltage it will inject the difference voltage between the sag or
voltage at PCC and pre-fault condition, so that the load voltage can be restored back to
the pre-fault condition. Compensation of voltage sags in the both phase angle and
amplitude sensitive loads would be achieved by pre-sag compensation method. In this
method the injected active power cannot be controlled and it is determined by external
conditions such as the type of faults and load conditions.
Fig.3.7: pre-sag compensation method
42
3.5.2 In-phase compensation method:

This is the most straight forward method. In this method the injected voltage is in
phase with the supply side voltage irrespective of the load current and pre-fault voltage.
The phase angles of the pre-sag and load voltage are different but the most important
criteria for power quality that is the constant magnitude of load voltage are satisfied.
Fig.3.8: In-phase compensation method
|VL|
|Vprefault|
43
One of the advantages of this method is that the amplitude of DVR injection
voltage is minimum for a certain voltage sag in comparison with other strategies.
Practical application of this method is in non-sensitive loads to phase angle jump.
3.5.3 In-phase advanced compensation method:

In this method the real power spent by the DVR is decreased by minimizing the
power angle between the sag voltage and load current. In case of pre-sag and in-phase
compensation method the active power is injected into the system during disturbances.
The active power supply is limited stored energy in the DC links and this part is one of
the most expensive parts of DVR. The minimization of injected energy is achieved by
making the active power component zero by having the injection voltage phasor
perpendicular to the load current phasor.
In this method the values of load current and voltage are fixed in the system so
we can change only the phase of the sag voltage. IPAC method uses only reactive power
and unfortunately, not al1 the sags can be mitigated without real power, as a
consequence, this method is only suitable for a limited range of sags.
3.5.4 Voltage tolerance method with minimum energy injection:

A small drop in voltage and small jump in phase angle can be tolerated by the
load itself. If the voltage magnitude lies between 90%-110% of nominal voltage and 5%10% of nominal state that will not disturb the operation characteristics of loads. Both
magnitude and phase are the control parameter for this method which can be achieved by
small energy injection.
44
Fig.3.9: Voltage tolerance method with minimum energy injection
3.5.5 Important Limitations of Compensation Strategies:

Above explained control strategies have certain related issues. Prior to selection
of a particular DVR control strategy to be used for a given application, the associated
issues have to be addressed. In order to get full benefit from the application of DVR,
following limits must be considered for the control strategy to be used.
Voltage limit: The DVR design has limited capability to inject voltage up to a definite
range in order to have low cost and small voltage drop across the device during nominal
conditions.
Power limit: DC-link is used to store power. This power is mostly converted from the
supply or from a larger DC storage via a converter that is also used to maintain the DClink voltage. The converter rating enforces a power limit to the DVR.
Energy limit: A DVR design that involves large energy storage is used to regulate the
load voltage to its rated value and size of energy reserve is kept as low as possible in
order to have reduced cost. However, some sags will drain the storage quickly but the
control strategy can decrease the risk of load tripping initiated by insufficient energy
storage.
45
3.6 DVRs System Topologies:

J.G. Nielsen and F.Blaabjerg have investigated four different system topologies
for series compensators (DVR) with special emphases on the methods used to obtain the
required energy during voltage sag. A comparison has been made between two
topologies that are:
System topologies without Energy Storage
System Topologies with Energy Storage
It has been already discussed that DG technologies may include energy storage
systems such as batteries, flywheels, super capacitors, superconducting coils, etc.
Moreover connection of DC/high frequency AC source type DGs (energy storage
systems) with utility system. However, integration of energy storage device (DG) with
DVR is described. Now each of the above system topology is further divided into two
types depending upon usage of energy storage system/device as listed below.
3.6.1 System Topologies without Energy Storage:

1. In this topology, energy is drawn from incoming supply through a passive shunt
converter connected to the supply side.
2. In this topology, energy is drawn from incoming supply through a passive shunt
converter connected to the load side.
3.6.2 System Topologies with Energy Storage:

1. In this topology, variable DC-link voltage is obtained from energy stored in the DClink capacitor as shown in Fig. 3.10(c).
2. In this topology, voltage at DC-link is held constant by using energy storage as shown
in Fig. 3.10(d). The stored energy can be provided from various types of energy storage
systems such as batteries, flywheel, or superconducting magnetic energy storage
(SMES), etc.
46
Fig. 3.10(a): DVR without energy storage and supply-side-connected converter
Fig. 3.10(b): DVR without energy storage and load-side-connected shunt converter
Fig. 3.10(c): DVR having energy storage and with variable DC link voltage
47
Fig. 3.10(d): DVR having energy storage and with constant DC link voltage
The above figure shows comparison of variation of total (series and shunt)
converter ratings for the DVR four topologies versus sag. The comparison result
categorizes the above explained DVR topologies regarding converter size in the
following order starting from the largest converter size and ending at the lowest.
1. Load side connected converter topology
2. Supply side connected converter topology
3. Constant DC-link topology
4. Variable DC-link topology
48
Fig. 3.10(e): Effect of variation of sag size on total converter rating of DVR
Table 3.6 summarizes the performance of different DVR topologies. Analysis
shown in Table 3.6 has revealed that the no-energy storage concept is feasible, but an
improved performance can be achieved for certain voltage sags using stored energy
topologies. However, an intermittent type of renewable energy resource (PV source) with
battery storage system is assumed as DG in this research work for analysis purpose. It is
connected with DC-link of the DVR to maintain constant DC-link voltage. Fig. 3.10(f)
shows the DVR structure employing DG (PV source with battery storage) to mitigate
deep and long duration sags. Three DVR control strategies to regulate load voltage are
thoroughly discussed in chapter V that use above mentioned assumption.
49
Very Good (++), Good (+), Poor (-), and Very Poor (- -)
Table 3.1: Comparison of different DVR topologies with grading Supply side Connected
converter
Fig. 3.10(f): DG supported DVR

50
DVR compensation mainly depends upon the energy storage device capacity of
the DC-link which is an important part of DVR. However, if DC-link is coupled with a
dispersed generation (DG) source such as photovoltaic source with battery storage
system, then issue of DVR energy storage device capacity can be handled and constant
DC-link voltage can be maintained. In this way, not only the sag mitigation capability of
the DVR for deep and long duration sags can be enhanced but DG supported DVR can
also be used to export its excess power to grid.
51
CHAPTER-4
OPERATION OF DVR
4.1 Introduction:
The schematic diagram of a DVR connected system is shown in Fig. 1 (a). The
voltage Vinj is inserted such that the load voltage, Vload is constant in magnitude and
undistorted, though the supply voltage Vs is not constant in magnitude or distorted. Fig.
1(b) shows the phasor diagram of different voltage injection schemes of the DVR.
VL(pre-sag) is a voltage across the critical load prior to the voltage sag condition.
During the voltage sag, the voltage is reduced to Vs with a phase lag angle of . Now the
DVR injects a voltage such that the load voltage magnitude is maintained at the pre-sag
condition. According to the phase angle of the load voltage, the injection of voltages can
be realized in four ways. Vinj1 represents the voltage-injected in-phase with the supply
voltage. With the injection of Vinj2, the load voltage magnitude remains same but it leads
Vs by a small angle. In Vinj3, the load voltage retains the same phase as that of the pre-sag
condition, which may be an optimum angle considering the energy source. Vinj4 is the
condition where the injected voltage is in quadrature with the current and this case is
suitable for a capacitor supported DVR as this injection involves no active power.
However, a minimum possible rating of the converter is achieved by Vinj1. The DVR is
operated in this scheme with a BESS (Battery Energy Storage System).
Fig.4.2 shows a schematic diagram of a three-phase DVR connected to restore
the voltage of a three phase critical load. A three phase supply is connected to a critical
and sensitive load through a three phase series injection transformer. The equivalent
voltage of the supply of phase A, (vMa) is connected to the point of common coupling
(PCC) (vSa) through short circuit impedance (Zsa). The voltage injected by the DVR in
phase A (vCa) is such that the load voltage (vLa) is of rated magnitude and undistorted. A
three phase DVR is connected to the line to inject a voltage in series using three singlephase transformers, Tr. Lr and Cr represent the filter components used to filter the ripples
in the injected voltage. A three-leg VSC with IGBTs (Insulated Gate Bipolar Transistors)
is used as a DVR and a BESS is connected to its dc bus.
52
Fig.4.1(a) Basic circuit of DVR, (b) Phasor diagram of the DVR voltage injection
schemes.
4.2 CONTROL OF DVR:

The compensation for voltage sags using a DVR can be performed by injecting
or absorbing the reactive power or the real power. When the injected voltage is in
quadrature with the current at the fundamental frequency, the compensation is made by
injecting a reactive power and the DVR is with a self supported dc bus. But, if the
injected voltage is in-phase with the current, DVR injects a real power and hence a
battery is required at the dc bus of VSC. The control technique adopted should consider
the limitations such as the voltage injection capability (converter and transformer rating)
and optimization of the size of energy storage.
Fig.4.3 shows a control block of the DVR in which SRF theory is used for reference
signal estimation. The voltages at PCC (v S) and at load terminal (vL) are sensed for
deriving the IGBTs gate signals. The reference load voltage (VL*) is extracted using the
derived unit vector. Load voltages (VLa,VLb,VLc) are converted to the rotating reference
frame using abc-dqo conversion using Parks transformation with unit vectors (sin, cos
) derived using a PLL (phase locked loop) as,
53
Fig.4.2: Schematic diagram of the DVR connected system.
Similarly, reference load voltages (V La*,VLb*,VLc*) and voltages at PCC (vS) are also
converted to the rotating reference frame. Then, the DVR voltages are obtained in the
rotating reference frame as,
The reference DVR voltages are obtained in the rotating reference frame as,
The error between the reference and actual DVR voltages in the rotating reference
frame are regulated using two PI (Proportional-Integral) controllers.
54
Reference DVR voltages in abc frame are obtained from a reverse Parks
transformation taking VDd* from (4), VDq* from (5), VD0* as zero as,
Reference DVR voltages (vdvra*, vdvrb*, vdvrc*) and actual DVR voltages (vdvra,
vdvrb
vdvrc) are used in a PWM controller to generate gating pulses to a VSC of DVR. The
PWM controller is operated with a switching frequency of 10 kHz.
Fig.4.3: Control block of the DVR which use the SRF method of control.
A. Control of Self Supported DVR for Voltage Sag, Swell and Harmonics
Compensation
Fig. 4.1(a) shows a schematic diagram of a capacitor supported DVR connected to
three phase critical loads and Fig. 4.1(b) shows a control block of the DVR in which
55
SRF theory is used for the control of self supported DVR. Voltages at PCC (v S) are
converted to the rotating reference frame using abc-dqo conversion using the Parks
transformation. The harmonics and the oscillatory components of the voltage are
eliminated using LPFs (Low Pass Filters). The components of voltages in d-axis and qaxis are,
The compensating strategy for compensation of voltage quality problems considers

that the load terminal voltage should be of rated magnitude and undistorted.
In order to maintain the dc bus voltage of the self-supported capacitor, a PI controller
is used at the dc bus voltage of DVR and the output is considered as a voltage (v cap) for
meeting its losses.
where, vdn(n)=vdc*-vdc(n) is the error between the reference (vdc*) and sensed dc
voltage (vdc) at the nth sampling instant. Kp1 and Ki1 are the proportional and the integral
gains of the dc bus voltage PI controller.
Fig.4.4: (a) Schematic diagram of self supported DVR (b) Control block of the DVR
which uses the SRF method of control
56
Fig.4.5: MATLAB based model of the BESS supported DVR connected system
The reference d-axis load voltage is, therefore, as,
The amplitude of load terminal voltage (VL) is controlled to its reference voltage
(VL*) using another PI controller. The output of PI controller is considered as the
reactive component of voltage (vqr) for voltage regulation of the load terminal voltage.
The amplitude of load voltage (VL) at PCC is calculated from the ac voltages
(vLa, vLb, vLc) as,
Then, a PI controller is used to regulate this to a reference value as,

57
where, vte(n)=vL*-vL(n) denotes the error between reference (VL*) and actual (VL(n)) load
terminal voltage amplitudes at nth sampling instant. Kp2 and Ki2 are the proportional and
the integral gains of the dc bus voltage PI controller.
The reference load quadrature axis voltage is as,
Reference load voltages (vLa*, vLb*, vLc*) in abc frame is obtained from a reverse
Parks transformation as in (6). The error between sensed load voltages (v La, vLb, vLc) and
reference load voltages are used over a controller to generate gating pulses to VSC of
DVR.
CHAPTER-5
58
MODELING AND SIMULATION

5.1 Introduction:
The DVR connected system consisting of a three phase supply, three phase
critical loads and the series injection transformers, is modeled in MATLAB/ Simulink
environment along with SPS (Sim-Power System) toolbox. An equivalent load
considered is a 10 kVA, 0.8pf lag linear load. Parameters of the considered system for
the simulation study are given in Appendix.
The control algorithm for the DVR is also modeled in MATLAB. The reference
DVR voltages are derived from sensed PCC voltages (v sa, vsb, vsc.) and load voltages
(vLa,vLb,vLc). A pulse width modulated (PWM) controller is used over the reference and
sensed DVR voltages to generate the gating signals for the IGBTs of the VSC of the
DVR.
The capacitor supported DVR is also modeled and simulated in MATLAB and
the performance of the systems are compared in three conditions of DVR.
5.2 PERFORMANCE OF DVR SYSTEM:

The performance of the DVR is demonstrated for different supply voltage
disturbances such as voltage sag and swell. Fig.5.1 shows the transient performance of
the system under voltage sag and voltage swell conditions. At 0.2 s, a sag in supply
voltage is created for 5 cycles and at 0.4 s, a swell in the supply voltages is created for 5
cycles. It is observed that the load voltage is regulated to constant amplitude under both
sag and swell conditions. PCC voltages (vS), load voltages (vL), DVR voltages (vC),
amplitude of load voltage (VL) and PCC voltage (Vs),
59
Fig.5.1: Dynamic performance of DVR with inphase injection during voltage sag and
swell applied to critical load.
source currents(iS), reference load voltages (vLref) and dc bus voltage (vdc) are also
depicted in Fig.5.1. The load and PCC voltages of phase A are shown in Fig.5.2, which
shows the in-phase injection of voltage by the DVR. The compensation of harmonics in
the supply voltages is demonstrated in Fig.5.3. At 0.2 s, the supply voltage is distorted
and continued for 5 cycles. The load voltage is maintained sinusoidal by injecting proper
compensation voltage by
60
Fig.5.2: Voltages at PCC and Load terminals.

the DVR. The THD (Total Harmonics Distortion) of the voltage at PCC, supply current
and load voltage are shown in Figs. 5.4,5.5 and 5.6 respectively. It is observed that the
load voltage THD is reduced to a level of 0.66% from the PCC voltage of 6.34%.
The magnitudes of the voltage injected by the DVR for mitigating the same kinds
of sag in the supply with different angle of injection are observed. The injected voltage,
series current and kVA ratings of the DVR for the four injection schemes are given in
Table-I. In Scheme-1 of Table-1, the in-phase injected voltage is V inj1 in the phasor
diagram of Fig.5.1. In Scheme-2, a DVR voltage is injection at a small angle of 30 and
in Scheme-3 is the DVR voltage is injected at an angle of 45. The injection of voltage in
quadrature with the line current is in Scheme-4. Required rating of compensation of the
same using Scheme-1 is much less than that of Scheme- 4. Performance of self
supported DVR (Scheme-4) for compensation of voltage sag is shown in Fig.5.7(a) and
of a voltage swell is shown in Fig.5.7(b). It is observed that the injected voltage is in
quadrature with the supply current and hence a capacitor can support the dc bus of DVR.
But, the injected voltage is higher compared to an in-phase injection (Scheme-1).
61
Fig.5.3: Dynamic performance of DVR during harmonics in supply voltage applied to

critical load.
Fig.5.4: PCC Voltage and harmonic spectrum during the disturbance

62
Fig.5.5: Supply current and harmonic spectrum
Fig.5.6: Load voltage and harmonic spectrum during the disturbance
63
5.3 Simulation Model and Results:
Fig.5.7: Simulation model for proposed circuit
Fig.5.8: Simulation results of dynamic performance of DVR during harmonics in supply

voltage- Source voltage (Vsabc), Load voltage (VLabc), Source current (ISabc), Load current
(ILabc), Terminal voltage (Vtms), DC-Link voltage (VDC) and DVR voltage (Vdvr)
64
Fig.5.9: Dynamic results of DVR under voltage sag condition- Source voltage (V sabc),
Load voltage (VLabc), Source current (ISabc), Load current (ILabc), Terminal voltage (Vtms),
DC-Link voltage (VDC) and DVR voltage (Vdvr)
65
Fig.5.10: Dynamic results of
DVR under voltage Swell condition- Source voltage
(Vsabc), Load voltage (VLabc), Source current (ISabc), Load current (ILabc), Terminal voltage
(Vtms), DC-Link voltage (VDC) and DVR voltage (Vdvr).
66
CHAPTER-6
CONCLUSION
The operation of a DVR has been demonstrated with a new control technique
using various voltage injection schemes. A comparison of the performance of DVR with
different schemes has been performed with reduced rating VSC including capacitor
supported DVR. The reference load voltage has been estimated using the method of unit
vectors and the control of DVR has been achieved which minimizes the error of voltage
injection. The SRF (Synchronous Reference Frame) theory has been used for estimating
the reference DVR voltages. It is concluded that the voltage injection in-phase with the
PCC voltage results in minimum rating of DVR but at the cost of an energy source at its
dc bus.
67
REFERENCES
[1] Math H.J. Bollen, Understanding Power Quality Problems- Voltage Sags and
Interruptions, IEEE Press, New York, 2000.
[2] A. Ghosh and G. Ledwich, Power Quality Enhancement using Custom Power
devices, Kluwer Academic Publishers, London, 2002.
[3] Math H. J. Bollen and Irene Gu, Signal Processing of Power Quality Disturbances,
Wiley-IEEE Press, 2006.
[4] R. C. Dugan, M. F. McGranaghan and H. W. Beaty, Electric Power Systems Quality.
2nd Edition, New York, McGraw Hill, 2006.
[5] Antonio Moreno-Munoz, Power Quality: Mitigation Technologies in a Distributed
Environment, Springer-Verlag London limited, London 2007.
[6] K.R. Padiyar, FACTS Controllers in Transmission and Distribution, New Age
International, New Delhi, 2007.
[7] lEEE Recommended Practices and Recommendations for Harmonics Control in
Electric Power Systems, IEEE Std. 5 19, 1992.
[8] V B Bhavraju and P N Enjeti, An active line conditioner to balance voltages in a
three phase system, IEEE Trans. Ind. Appl., vol. 32, no. 2, 1996, pp. 287-292.
[9] S. Middlekauff and E. Collins, System and customer impact, IEEE Trans. on
Power Del., vol. 13, no. 1, pp. 278282, Jan. 1998.
[10] M. Vilathgamuwa, R. Perera, S. Choi and K. Tseng, Control of energy optimized
dynamic voltage restorer, in Proc. IEEE IECON99, vol. 2,1999, pp. 873878.
[11] J. G. Nielsen, F. Blaabjerg, and N. Mohan, Control strategies for dynamic voltage
restorer compensating voltage sags with phase jump, in Proc. IEEE APEC01, vol. 2,
2001, pp. 12671273.
[12] A. Ghosh and G. Ledwich, Compensation of distribution system voltage using
DVR, IEEE Trans. on Power Delivery, vol. 17, no. 4, pp. 1030 1036, Oct. 2002.
[13] A. Ghosh and Joshi A, A new algorithm for the generation of reference voltages of
a DVR using the method of instantaneous symmetrical components, IEEE Power
Engineering Review, vol. 22, no.1, pp. 63 65, Jan. 2002.
68
[14] Il-Yop Chung, Dong-Jun Won, Sang-Young Park, Seung-Il Moon and Jong-Keun
Park, The DC link energy control method in dynamic voltage restorer system,
International Journal of Electrical Power & Energy Systems, vol. 25, no. 7, Sept. 2003,
[15] Eddy C. Aeloza, Prasad N. Enjeti, Luis A. Morn, Oscar C. Montero-Hernandez,
and Sangsun Kim, Analysis and Design of a New Voltage Sag Compensator for Critical
Loads in Electrical Power Distribution Systems, IEEE Trans. on Ind. Appl., vol. 39, no.
4, pp 1143-1150, Jul/Aug 2003.
[16] J. W. Liu, S.S. Choi and S. Chen, Design of step dynamic voltage regulator for
power quality enhancement, IEEE Trans. on Power Delivery, vol. 18, no.4, pp. 1403
1409, Oct. 2003.
[17] Arindam Ghosh, Amit Kumar Jindal and Avinash Joshi, Design of a capacitor
supported dynamic voltage restorer for unbalanced and distorted loads IEEE Trans. on
Power Delivery, vol.19, no. 1, pp. 405-413, Jan 2004.
[18] A. Ghosh, Performance study of two different compensating devices in a custom
power park, IEE Proc. on Generation, Transmission and Distribution, vol. 152,no. 4, pp.
521 528, July 2005.
[19] John Godsk Nielsen and Frede Blaabjerg, A detailed comparison of system
topologies for dynamic voltage restorers, IEEE Trans. on Ind. Appl., vol. 41, no. 5,
pp.1272-1280, Sept/Oct. 2005.
[20] M.R. Banaei, S.H. Hosseini, S. Khanmohamadi and G.B. Gharehpetian,
Verification of a new energy control strategy for dynamic voltage restorer by
simulation, Simulation Modeling Practice and Theory, vol.14, no. 2, pp. 112-125,
February 2006.
69

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CHAPTER-1

1.1 VOLTAGE SAG

Fig.1.1: A typical example of three phase voltage sag

1.2 CHARACTERISTICS OF VOLTAGE SAGS

Fig.1.2: One line diagram of Power System

or networked, as distinct from radial distribution systems. If a fault occurs as shown

1.3 VOLTAGE-SAG ANALYSIS

1.3.2. Voltage Sag Calculation:

1.3.3. Voltage Sag Occurrence Calculation:

The data thus

1.3.4 Study of Results of Sag- Analysis:

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1.3.5 Equipment Sensitivity Studies:

1.3.6 Chip Testers:

1.4 SOLUTION TO VOLTAGE SAGS

1.4.1 Utility solutions:

1.4.2 Customer solutions:

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Fig.1.3: UPS Configurations

1.5 VOLTAGE SWELL

conditioners and UPS Solutions are common solutions for swells.

1.5.2 Swell Causes:

Fig.1.4: Three phase voltage swell

1.5.3 Monitoring & Testing:

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TABLE 1.1: TRANSFORMER SECONDARY VOLTAGES (PU)

1.6.1 Ferro resonant Transformers:

1.6.2 Magnetically Controlled Voltage Regulators:

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1.6.3 Tap Switching Transformers:

1.6.4 Static UPS:

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Fig.2.1: Adujustable speed drive

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2.2 Basic designs:

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2.3 Output waveforms:

Fig.2.2: Fundamental and harmonic wave form

2.4 TYPES OF INVERTERS:

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1. VOLTAGE SOURCE INVERTER

2.5 VOLTAGE SOURCE INVERTER

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Fig.2.3: Single-phase half-bridge VSI.

+ and are all off

TABLE 2.1 Switch states for a half-bridge single-phase VSI

2.5.2 The Carrier-Based Pulse width Modulation (PWM) Technique:

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, and the triangular signal Vd is at frequency

ma (also known as the amplitude-modulation ratio) is defined as

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Figure 6.4(e) clearly shows that the ac output voltage

component of the ac output voltage

satisfying the following expression

Where k = 2; 4; 6; . . . for l = 1; 3; 5; . . . ; and k = 1; 3; 5; . . . for l = 2; 4; 6; . . . ; (c) the

where k = 2; 4; 6; . . . for l = 1; 3; 5; . . . ; and k = 1; 3; 5; . .for l= 2; 4; 6; . . . .

Fig.2.5: Fundamental ac component of the output voltage in a half-bridge VSI SPWM

achieved in the linear

2.6 Square-Wave Modulating Technique:

2.6.1 Selective Harmonic Elimination:

= vi in Fig. 6.7a. The

general expressions to eliminate an even N -1 (N -1 = 2; 4; 6; . . .) numbers of harmonics

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are defined as shown in Fig. 14.6b. The