COMPUTER

VISION,

GRAPHICS,

AND

IMAGE

PROCESSING

27, 115-123 (1984)

NOTE
Implementation of Cellular-Logic Operators Using 3 * 3
Convolution and Table Lookup Hardware
FRANS A. GERRITSEN
Informatics

Division,

National Aerospace
Laboratory
NLR,
1059 CM Amsterdam,
The Netherlands

Anthony

Fokkerweg

2,

AND
PIET W. VERBEEK
Pattern

Recognition

Group, Applied Physics Department,

Delf University
Lorentzweg
I, 2628 CJ, De& The Netherlands

of Technology,

Received January 12,1983; revised February 23,1983 and August 26,1983

Cellular-logic operations such as erosion, dilation, contour extraction, skeletonization, local
majority voting, and pepper-and-salt noise removal are essential in processing binary images. It
is shown that cellular-logic operations, like some homomorphic filters, can be constructed from
a 3 * 3 convolution and a nonlinear table lookup, features of many commercially available
image-processing systems. The proposed method extends the field of application of such
systems from enhancement and other preprocessing of gray-valued images to the processing
and measurement of objects in the segmented image.
1. INTRODUCTION

In a number of applications of image processing, the segmentation of gray-valued

images into binary images consisting of objects and background, and the subsequent
processing and measurement of these binary images, are found to be extremely
important and powerful. The class of object/background-oriented
operators that is
often used for these processing and measurement tasks is based on the set algebra
developed by Matheron [l] and Serra [2]. The operators that have gained the widest
attention include the erosion operator, sometimes referred to as shrinking (not to be
confused with topology-preserving thinning or shrinking), and the dilation operator.
The erosion and dilation operations may be used to build higher level operations
such as openings, closings, the medial axis transform, and binary template matching
[l-5]. The class of cellular-logic operations also includes such operations as binary
contour extraction, local majority voting and pepper-and-salt noise removal.
Over the past ten years, a number of hardware systems for the processing of
pictorial information have been designed and implemented. Some systems were
designed with the cellular-logic operators in mind, such as the Golay Logic Processor,
GLOPR [6,7], the diff3 system [8], the PICAP- system [9], the Leitz Texture
Analysis System, TAS [lo], the CLIP processor arrays [ll], the Cytocomputer [12],
and the Delft Image Processor, DIP-l [13, 141. Overviews of this class of systems
have been given by Preston et al. [15] and by Danielsson and Levialdi [16].
However, the more readily commercially available image-processing systems (such
as the COMTAL VISION/ONE
system, the VICOM system, and the De Anza and
115
0734-189X/84

$3.00

Copyright 6 1984 by Academic Press, Inc.

All rights of reproduction in any form reserved

116

GERRITSEN

AND VERBEEK

12S systems) do not include hardware specialized in cellular-logic operations. Instead, configuration options which may be incorporated into the processing loops of
such systems include lookup tables for pixel-by-pixel table lookup and also multiplication and addition hardware for (almost) real-time convolution of the image array
with a 3 * 3 filter-coefficient convolution kernel.
The purpose of this paper is to show that such commercially available image
processing systems may be programmed in a straightforward way to execute nonlinear cellular-logic operations with the same speed (and using the same hardware) as
the 3 * 3 linear filter convolutions.
As a result, the applicability of these hardware options (until now limited to
enhancement and other preprocessing) is extended into the fields of processing and
measurement of objects in the segmented image.
2. IMPLEMENTATIONS

OF THE CELLULAR-LOGIC

OPERATORS

As far as the authors are aware, the literature shows that the cellular-logic
operators may be implemented by using special-purpose hardware in one of three
(major) different ways: the neighborhood table lookup approach, the processor-array
approach, and the run-list processing approaches. These approaches will be discussed in the following sections.
2.1. The Neighborhood

Table Lookup Approach

The neighborhood table lookup approach (which is used in, e.g., GLOPR, diII3,
PICAP-1, TAS, Cytocomputer, and DIP-l) is illustrated in Fig. 1. In binary images,
512 possible 3*3 neighborhood configurations exist. By using shift registers, the
9-bit binary data of every 3 * 3 neighborhood are assembled and used as address for
table lookup in a 512-entry table memory. The contents of the table memory
determine the nature of the operation applied. Preferably, this table memory should
be writable (e.g., from a host computer).
This method of implementation is ideally suited for raster-scan-oriented applications, because (after an initial delay) results are produced at the same rate in which
operands are entered: every time a new binary pixel is shifted into the shift register,
the 3 * 3 neighborhood is translated by one position in the direction of the scan and
a new result becomes available at the output of the table memory.
Variations on this method include: hexagonal raster scanning (using 128 distinct
configurations, or 14 if only quasi-rotation-invariant
operators are allowed; originally proposed by Golay and used in GLOPR, diII3, and TAS); pipelining of
multiple stages of lookup tables (used in Cytocomputer, among other reasons, to
emulate neighborhoods larger than 3*3); the use of concurrent multiple table
lookup (illustrated in Fig. 1 and used in DIP-l), for instance to transform a binary
image into a 4-bit image, of which 1 bit indicates the presence of a binary contour
and the remaining 3 bits of each resulting pixel give the Freeman chain code of the
contour; the combination of nonrecursive table lookup as described with recursive
table lookup (proposed by Rosenfeld and Pfaltz [17]), e.g., for topology-preserving
thinning (Hilditchs method [18], used in modified form in DIP-l).
In general-purpose computers the shift registers may be circumvented by assembling the 9-bit address by sequentially OR-ing versions of the binary operand image
that have been shifted, both in position and in bitplane.

IMPLEMENTATION

OF CELLULAR-LOGIC

OPERATORS

117

SERIAL OUTPUT OF
RESULTING PIXELS
( K BIT/PIXEL L

CELLULAR - LOGIC
LOOK - UP TABLE

TAPSP*,.
., P.
from shift re&er

SHIFT REGISTER

SHIFT REGISTER

CURRENT
BINARY
NEIGHBORHOOD

SERIAL INPUT
OF BINARY PIXELS
OF SEGMENTED
IMAGE
( 1 BIT/PIXEL,
N PIXELSPER LINE )

FIG. 1. In the neighborhood table lookup approach, shift registers are used to assemble and update
the 9 bits of the current 3 * 3 binary neighborhood. These 9 bits are used as address for table lookup in a
512-entry lookup table.

Also the method proposed in this paper is a variation on this method, (ab) using
3 * 3 convolution hardware for the 9-bit address assembly.
2.2. The Processor-Array Approach
In the processor-array approach (which is used in CLIP 4, for instance) the
interconnection pattern of the processor array assures rapid access to neighboring
pixels. Each processing element receives the binary values of its neighbors and
applies the cellular-logic operation by directly computing the appropriate logical
combination of the nine neighbors. The simple logical combination needed for a
dilation may, e.g., be performed by CLIP 4 in a single (array) instruction step.
In general-purpose computers, the sequential analog of this direct computation
approach (computing the appropriate logical combination of the binary operand

118

GERRITSEN

AND VERBEEK

image and versions shifted in eight directions) may be seen as an alternative for the
neighborhood table lookup approach.
2.3. The Run-List

Processing Approaches

The run-list processing approaches were originally designed as software methods

for use in general-purpose computers. These methods drastically reduce the computational complexity by using the fact that cellular-logic operators do not affect the
interiors of object or background. Consequently, these methods operate on the image
in some coded format. Of the formats which are in use for the coding of binary
images (e.g., Freeman chain code, run-length code, run-start/stop
code, RC-code),
only the run-start/stop
code (Young et al. [19], Verbeek and Young [20]) and the
RC-code (Cederberg [21, 221) have been shown to allow direct implementation of
cellular-logic operators. As far as the authors are aware, these methods have not yet
been implemented in special-purpose hardware.
3. THE PROPOSED METHOD

3.1. Principle of the Proposed Method

The method proposed in this paper is a variation on the method described in

Section 2.1.
A 3 X 3 window is moved over the original binary image. At one position of the
window let the pixels framed be
p3 p2 Pl
p4 p* PO*
ps 4 p7
Each Pk is either 0 or 1 and may be seen as a separate bit. The bits are concatenated
into a string P 8 P 7 P 6 P 5 P4 P 3 P 2 P 1 P0 The string is then interpreted as the address
A in a 512-entry l-bit-wide table. The content at address A is the new value of the
central pixel.
This procedure is also followed in the existing method. What can be improved
pertains to commercial availability rather than to processing quality. Most commercial image-processing systems (mere display systems included) feature at least 3 * 3
convolution. They contain the moving-window mechanism and would have the
values Ps, P,, . . . , PI, PO at hand when 3 * 3 convolution would be applied to a
binary image. However, the absence of a concatenation mechanism generally prohibits fast cellular-logic operations. This is all the more unfortunate as the table
lookup option needed for the concluding step of the operations is quite common in
these systems.
We now propose to close the gap, realizing that the address string Ps, P7,. . . , PI, PO
(interpreted as the 9-bit number A) can be calculated by
A=

f:zP,.
k=O

Comparing

this to the calculation of the new gray value B of the central pixel by a

IMPLEMENTATION

OF CELLULAR-LOGIC

119

OPERATORS

A = 508,0

5 x 5 part
,mage

of bmary

bit string
of tnner product
of current
neighborhood
and filter-coefficient

COnYOlUtlOn

and cwrenf

filter

3 x 3 nelghborhood

used

caefflcientr

as address

A for

table

array

look-up

wK=zK

FIG. 2. Construction of table address by 3 * 3 convolution

linear convolution

with coefficient scheme

which is written as
8

B = c

W,P,

k=O

we find that the addresses A can be calculated through linear convolution (instead of
concatenation) when W, = 2k is chosen for the coefficient scheme (see Fig. 2). More
explicitly, the coefficient scheme is
8
16
32

4
256
64

2
1.
128

In other words, cellular-logic operators can be described as convolution with a

special coefficient scheme, followed by a table lookup. It is piquant to realize that the
alternate application of linear filters and table lookups is as old as homomorphic
filtering (see Oppenheim et al. [23]).
3.2. Extensions of the Principle
One trivial extension exploits the fact that only one bit of the usually at least 8-bit
content of lookup tables has been used so far. Clearly each of the bits may be used
to store a separate table such that up to eight operations can be performed in
parallel.
In the previous section it was suggested that all nine pixels in the 3 * 3 window
must be taken into account. However, for operations based on other connectivities

120

GERRITSEN

AND VERBEEK

than S-connectivity some dont cares may be defined through insertion of zeros in
the coefficient scheme. For 4-connectivity, the scheme is
0

4
0

2
16
8

0
1.
0

Hexagonal grids can be nicely mapped onto square grids when each line is shifted
by one-half grid-unit with respect to the previous line. For such a representation the
hexagonal 6-connectivity is mapped into Pavlidis 6-connectivity [24]. The corresponding coefficient scheme in our method is
4
8
0

2
64
16

0
1.
32

For quatemary images (where pixel values may be 0, 1, 2, or 3) the method may
be used in 4-connectivity operations. The powers of 2 must then be replaced by
powers of 4, as follows:
A = 2 4kP,k
k=O

with scheme
0

16
0

4
256
64

0
1.
0

In this case the table contents should also have double width in order to yield a
quaternary output image. One might argue that this version lies outside the field of
cellular logic.
3.3. Examples and Practical Considerations

Examples of the lookup tables used for binary pepper-and-salt noise removal,
8-connected dilation, and S-connected erosion are given in Tables 1 through 3.
As many image-processing systems have S-bit gray-value representation, their
lookup tables are possibly restricted to 256 entries. In such a case the method is

Cellular-Logic

TABLE 1
Lookup Table for Removing Binary Pepper-and-Salt Noise

Situation in current neighborhood

Not all neighbors 1
All neighbors 1
All neighbors 0
Not all neighbors 0

Center
Center
Center
Center

Address A
0
0
1
1

257

to 254

Content

255
256

0
1
0

to 511

Note. Pixels which are totally surrounded by inverse-valued pixels are set to
the value of their neighbors.

IMPLEMENTATION

Cellular-Logic

OF CELLULAR-LOGIC

OPERATORS

TABLE 2
Lookup Table for &Connected Dilation

Situation in current neighborhood

Address A

Content

All neighbors 0
Not all neighbors 0
Neighbors dont care

0
1 to 255
256 to 511

Cellular-Logic

121

Center 0
Center 0
Center 1

TABLE 3
Lookup Table for S-Connected Erosion

Situation in current neighborhood

Address A

Neighbors dont care

Not all neighbors 1
All neighbors 1

256

Center 0
Center 1
Center 1

0 to 255
to 510
511

Content
0
0
1

TABLE 4
Cellular-Logic Lookup Table for Removing Binary Pepper-and-Salt Noise
That May Be Used when the Maximum Length of the Lookup
Table is 256
Situation in current neighborhood
All neighbors 0
Not all neighbors 0
and not all neighbors 1
All neighbors 1

Address A

Content

00

1 to 254

10

255

11

Nofe. In a subsequent 8-entry table, the center pixel value is used to

choose between the 2 bits of the tables content.

adapted as follows. The coefficient scheme

8
16
32

4
0
64

2
1
128

is chosen, which implies that the value of the central pixel in the original image is
not yet taken into account. This central pixel would have determined if the first or
the second half of the 512-entry table should have been addressed. We store these
halves in two separate 256-entry tables, that can readily be combined into one
256-entry 2-bit table. The central value Ps is then used to determine if the left or the
right bit in the content found at the address A with
A = i

2kPk

k=O

is to be chosen as the new value (an example is given in Table 4). This may be

122

GERRITSEN

AND VERBEEK

achieved through a simple &entry table. Note that the number of possible parallel
operations is halved.
4. GENERAL

REMARKS

AND

CONCLUSIONS

Concluding, we may say that we provide the owners of commercially available

image-processing systems (such as VICOM, COMTAL
Vision One, 12S, and
De Anza), through a simple abuse of the convolution and table look-up abilities,
with the tool set of cellular-logic operators for binary images.
The execution speed of cellular-logic operators with our method depends, of
course, on the execution speed of 3 * 3 convolutions. For example, using the VICOM
system the execution speed of cellular-logic operators is 40 ms for images with
512 x 512 pixels.
In pipelined vector or array processors, the method can be used as a flexible test
bench until the concatenation of neighborhood bits into address strings has been
microprogrammed.
By using several bits of the table output, the method may be used to compute
several cellular-logic operations at a time.
If larger coefficient schemes are allowed, one may easily implement other sizes and
shapes of neighborhoods (which may lead to novel operators), keeping in mind that
the lookup table length restricts the number of nonzero coefficients (i.e., the number
of relevant pixels in the neighborhood).
The number of bits per pixel is easily traded off against the number of relevant
pixels in the neighborhood.
As first convolution and then table lookup are performed on the whole image, the
method is restricted to nonrecursive operations. This excludes Hilditch skeletonization [18], but allows the Arcelli skeletonization method [25].
ACKNOWLEDGMENTS

We thank J. J. Gerbrands and R. J. van Munster for trying out the method on a
VICOM system and an FPS AP-120B array processor, respectively,
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