Professional Documents
Culture Documents
CHAPTER 1
INTRODUCTION
The ViARM-2378 Development System is a full featured Development Board
for ARM-7 Core NXP LPC2378 ARM Processor. It has been designed to
allow students and engineers to easily exercise and explore the capabilities
of ARM-7 Core. It allows LPC2378 ARM Processor to be interfaced with
external Circuits and a broad range of peripheral devices, allowing a user to
concentrate on Software Development.
The LPC2378 Micro-controller is based on a 32/16 Bit ARM7TDMI-s CPU
with real time Emulation and Embedded Trace support that combines with
the microcontroller with embedded high-speed 512KB flash memory. It can
work with 16-bit Thumb Mode.
With Useful Implemented peripherals, plentiful practical code examples and a
broad set of additional on board Peripherals (10/100Mbps Ethernet,
MMC/SD, ADC, DAC, RTC, USB etc.,). ViARM Development boards make
fast and reliable tools that can satisfy the needs of experienced engineers
and beginners alike.
ViARM-2378 Development Boards achieve their small size through Modern
SMD technology and Multi layer Design. All Controller signals and ports
extend from the controller to high-density pitch Connectors of the board.
ViARM-2378 Hardware Manual Describes the boards design and functions
and also includes the Circuit Diagrams and Component Layout.
[1]
[2]
2.
3.
UART.
4.
CAN Port.
5.
Stepper Motor.
6.
Relay.
7.
8.
9.
10.
11.
Prog/Exec Switch.
12.
Joystick.
13.
TFT LCD.
14.
4 x 4 Matrix Keypad.
15.
16.
LED.
17.
SD Card Socket.
18.
19.
20.
Jtag Connector.
21.
22.
23.
J-Trace.
24.
25.
Serial EEPROM.
26.
Speaker.
27.
Temperature Sensor.
[3]
[4]
[5]
* Processor wakeup from Power Down mode via any interrupt able to
operate during Power Down mode (includes external interrupts, RTC
interrupt, and Ethernet wakeup
Interrupt).
* Two independent power domains allow fine- tuning of power
consumption based on needed features.
* Brown out detect with separate thresholds for interrupt and forced
reset.
* On-chip Power on Reset.
* On-chip crystal oscillator with an operating range of 1MHz to 24MHz.
[6]
[7]
[8]
[9]
CHAPTER - 2
HARDWARE DETAILS
ViARM-2378 Development Board features a number of peripheral Devices. In
order to enable these devices before programming, you need to check if
appropriate jumpers have been properly set.
ViARM-2378 Development Board populated with ARM7 Core LPC2378 CPU.
On Board Peripherals
1.
2.
3.
4 x 4 Matrix Keypad.
4.
5.
6.
7.
SD Card Interface.
8.
I2C Peripherals.
* Real Time Clock.
* Serial EEPROM.
* 7 Segment Display.
9.
10.
Temperature Sensor.
11.
12.
IrDA.
13.
14.
[ 10 ]
16.
17.
Accelerometer.
18.
Joystick.
19.
20.
Jtag Connector.
21.
J-Trace Connector.
22.
23.
24.
25.
SPI Interface
26.
Zigbee
27.
OLED Interface
28.
[ 11 ]
R14
LC_LED
R15
LC_LED
R15
LC_LED
R15
LC_LED
R15
LC_LED
R15
LC_LED
R15
LC_LED
R15
330
330
E
330
330
330
330
330
E
330
L22
L21
L20
L19
L18
L17
L16
L15
LED
LED
LED
LED
LED
LED
LED
LED
J38
JMP-
P3.0 P3.7
2. SWITCHES
Switches are devices that have two positions - ON and OFF, which have a
toggle to establish or break a connection between two contacts. The ViARM2378 Development Board has one 8-Way Dip Switch.
SW11
SW7
SW6
SW5
SW4
SW3
SW2
SW1
SW0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SW DIP-8
: P4.0 - P4.7
[ 12 ]
1
2
SW6
SW5
SW4
SW3
1
2
SW10
SW9
SW8
SW7
SW13
SW14
SW15
SW16
SW18
SW19
SW20
SW21
1
2
1
2
1
2
K4
K3
K2
K1
P4.8 - P4.15
Scan Lines
P4.8 - P4.11
Read lines
P4.12 - P4.15
[ 13 ]
VCC
BR
RS
DIOW
LCD_E
LC_LED
N
LC_LED
LC_LED
1
LC_LED
2
LC_LED
LC_LED
4
LC_LED R89
LC_LED
6
1K
VCC
RST
VCC
:
:
:
:
P3.0 - P3.7
P0.21
P1.28
P3.23
5. Graphics LCD
A Graphics LCD (GLCD) allows advanced visual messages to be displayed.
While a character LCD can display only alphanumeric characters, a GLCD
can be used to display messages in the form of drawings and bitmaps.
The Most commonly used graphic LCD has the screen resolution of 128x64
Pixels. Before a GLCD is connected, the user needs to set the Jumpers. The
GLCDs Contrast can be adjusted using the Potentiometer.
BR
TP2
10K
LCD2
-10V
VCC
VCC
R103
1K
SP6
SMD PAD
VCC
-10V
SP7
SMD PAD
BR
RS
DIOW
LCD_EN
LC_LED0
LC_LED1
LC_LED2
LC_LED3
LC_LED4
LC_LED5
LC_LED6
LC_LED7
CS1
CS2
LCD RST-
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
J42
JMP-3
-12V
LCD RST-
G_LCD DISPLAY
While we using the GLCD, close the jumpers J13 to J16 as Downward
Direction and close the jumper J42 as left side direction
Vi Microsystems Pvt. Ltd.,
[ 14 ]
:
:
:
:
:
:
P3.0 - P3.7
P0.12
P1.28
P3.23
P4.29
P4.28
Note:
Make sure to turn off the Power supply before placing GLCD on development
board. If the Power supply is connected while placing, GLCD unit can be
permanently damaged.
6. RS-232 Communication
RS-232 Communication enables point-to-point Data transfer. It is commonly
used in data acquisition applications, for the transfer of data between the
microcontroller and a PC. Since the Voltage levels of a microcontroller and
PC are not directly compatible with each other, a level transition buffer such
as the MAX232 must be used.
U21
ICL23
C60
0.1M
F
1
3
C1+
VCC
C1-
V+
4
C2+
0.1M
5
F
11 C2OLED_TX
12 T1IN
D
10 R1OU
T
9 T2IN
OLED_RX
R2OU
T
C61
+3.3V
VGND
T1OU
R1IN
T2OU
TR2IN
16
2
6
C59
0.1M
F
C62
15
14
13
7
8
0.1M
F
2 J34 2 J35
JM JM
PP1 21 2
RXD TXD
ViARM-2378 Development board has Two UART Termination at 9 pin Dtype male connector.
While we using the UART1, close the jumpers J1 & J2
While we using the UART2, close the jumpers J3 & J4
Vi Microsystems Pvt. Ltd.,
[ 15 ]
WP
J40
JMP-2
SD1
WP1
WP2
CD/DAT3/CS
CMD/DI
VSS1
VDD
CLK
VSS2
DAT0
DAT1
DAT2
CP1
CP2
10
R145
33K
14
R143
2K
MCIDAT3
MCICMD
+3.3V
+3.3V
MCIDAT3
R139
3
4
5
1
MCICLK
MCIDAT0
BD3
MCIDAT0
R146
MCIDAT1
MCIDAT1
R147
MCIDAT2
MCIDAT2
R138
13
15
R144
33K
470nH
+ C58
47uF/6.3V
33K
+3.3V
33K
R94
330
R95
2K
33K
33K
C54
L14
LED
18pF
SD CARD
CP
J41
1 JMP-2 2
[ 16 ]
:
:
:
:
C63
22pF
U20
PCF8583
6
7
SCL
INT
VSS
XTAL1
XTAL2
A0
SDA
VCC
1
2
Y4
32.768KHz
3
5
8
SDA0
C64
22pF
DC24
0.1MF
CMOS VCC
EEPROM
Serial-interface EEPROMs are used in a broad spectrum of consumer,
automotive, telecommunication, medical, industrial and PC related markets.
Primarily used to store personal preference data and configuration/setup
data, Serial EEPROMs are the most flexible type of non-volatile memory
utilized today. Compared to other NVM solutions, Serial EEPROM devices
offer a lower pin count, smaller packages, lower voltages, as well as lower
power consumption.
+3.3V
+3.3V
+3.3V
+3.3V
U19
24LS256
1
2
3
A0
A1
VCC
Q
A2
Q
COUT
GND
DC23
0.1MF/C
8
7
6
5
R92
3.3K
SCL0
R93
3.3K
SDA0
[ 17 ]
SA0
SB0
SC0
SD0
1
2
3
4
RN1
3.3K RN
8
7
6
5
1
2
3
4
5
6
7
8
A0
A1
A2
P0
P1
P2
P3
VSS
VDD
SDA
SCL
INTP7
P6
P5
P4
16
15
14
13
12
11
10
9
VCC
1
2
3
4
SDA0
SCL0
RN6
8
7
6
5
3.3K RN
SDP0
SG0
SF0
SE0
DISP1
D_CC
SF0
SG0
SE0
SD0
CC2
F
G
E
D
CC2
a
F f g
G
E e
d
D
A
b B
C
c DP
dpCC1
A
B
C
DP
CC1
SA0
SB0
SC0
SDP0
D_CC
LTS543
[ 18 ]
Relay
A relay is an electrical switch that opens and closes under the control of
other an electrical circuit. In the original form, the switch is operated by an
electromagnet to open or close one or many sets of contacts.
When a current flows through the coil, the resulting magnetic field attracts an
armature that is mechanically linked to a moving contact. The movement
either makes or breaks a connection with a fixed contact. When the current to
the coil is switched off, a force approximately half as strong as the magnetic
force returns the armature to its relaxed position. Usually this is a spring, but
gravity is also used commonly in industrial motor starters. Most relays are
manufactured to operate quickly. In a low voltage application, this is to
reduce noise. In a high voltage or high current application, this is to reduce
arcing.
If the coil is energized with DC, a diode is frequently installed across the coil,
to dissipate the energy from the collapsing magnetic field at deactivation,
which would otherwise generate a spike of voltage and might cause damage
to circuit components. If the coil is designed to be energized with AC, a small
copper ring can be crimped to the end of the solenoid. This "shading ring"
creates a small out-of-phase current, which increases the minimum pull on
the armature during the AC cycle. By analogy with the functions of the
original electromagnetic device, a solid-state relay is made with a thyristor or
other solid-state switching device. To achieve electrical isolation, a lightemitting diode (LED) is used with a phototransistor.
+12V
RL1
1
2
3
NC1
NO1
COM2
NC2
NO2
J801-3
RELAY SPDT
COM1
D15
1N4001
P11
COIL1
COIL2
Q2
SL100
R19
100E
P3.24
[ 19 ]
1
2
3
NC1
COM1
NO1
COM2
NC2
NO2
J801-3
D16
1N4001
P12
COIL1
COIL2
R33
Q3
SL100
RELAY SPDT
100E
P3.26
C1
1uF(TAN)
R108
R6
56K
27K
-12V
DC4
TEMP I/P
R109
1K
P8
1
2
J801 - 2PIN
7
1
C67 +
1uF(TAN)
U24
OP07
6
-12V
J801 - 2PIN
4
8
P9
1
2
0.1MFD
TP1
100K
DC5
0.1MFD
+12V
[ 20 ]
[ 21 ]
SP2
1
MOTOR VCC
3
JMP3
P7
1
2
J801-2
Jumper Position
Closed 1 and 2
Closed 2 and 3
[ 22 ]
D3
D4
D5
D6
FR107
FR107
FR107
8.2K
U9
L298N
8.2K
9
.1uF
R111
C77
R110
C74
.1uF
MOTOR VCC
10uF/16V
FR107
C73
VCC
11
2
6
P6
5 PIN RMC
RN4
8
7
6
5
1
2
3
4
5
3
7
1K
MOTOR VCC
10
13
12
14
D7
D8
D9
D10
FR107
FR107
FR107
FR107
1
2
3
4
RN3
8
7
6
5
3.3K
1
2
3
4
15
IO_P0.6
IO_P0.7
IO_P0.8
IO_P0.9
P0.6
Coil 2
P0.7
Coil 3
P0.8
Coil 4
P0.9
[ 23 ]
+3.3V
R167
TDIR
10K
RDIR
10K
R104
R107
100nF C65
+3.3V
10K
R106
100nF C66
+3.3V
4
1
2
6
5
8
IR1
TFDU4100
SC
TXD
RXD
IRED_ANODE
IRED_CATHODE
VCC1
NC
GND
(IR COMPONENT)
R105
TDIR
10K
While we using the IrDA, close the above Jumpers J13 and J14 as upward
direction.
13. Ethernet
Ethernet is a large, diverse family of frame-based computer networking
technologies that operates at many speeds for local area networks (LANs).
The name comes from the physical concept of the ether. It defines a number
of wiring and signaling standards for the physical layer, through means of
network access at the Media Access Control (MAC)/Data Link Layer, and a
common addressing format.
Ethernet has been standardized as IEEE802.3. The combination of the
twisted pair versions of Ethernet for connecting end systems to the network,
along with the fiber optic versions for site backbones, has become the most
widespread-wired LAN technology. It has been in use from the 1990s to the
present, largely replacing competing LAN standards such as coaxial cable
Ethernet, token ring, FDDI, and ARCNET. In recent years, Wi-Fi, the wireless
LAN standardized by IEEE802.11, has been used instead of Ethernet for
many home and small office networks and in addition to Ethernet in larger
installations.
Ethernet was originally based on the idea of computers communicating over
a shared coaxial cable acting as a broadcast transmission medium. The
methods used show some similarities to radio systems, although there are
major differences, such as the fact that it is much easier to detect collisions in
a cable broadcast system than a radio broadcast. The common cable
providing the communication channel was likened to the ether and it was
from this reference that the name "Ethernet" was derived.
Vi Microsystems Pvt. Ltd.,
[ 24 ]
C43
49.9E R70
TX-
RX+
3
4
5
RXC36
C37
0.01MF0.01MF
6
7
8
P22
TOUT+
TOUTTPIN+
CT
CT
TPIN-
8
7
6
5
4
3
2
1
E_RX-
E_RX+
E_TXE_TX+
RJ-45
FRONT VIEW
TX+
LPF
49.9E R63
49.9E R59
49.9E R54
18pF
NC
GND
RJ-45 CON.
[ 25 ]
BD1
RST-
1K
R51
1K
48
47
46
45
44
43
42
41
40
39
38
37
+3.3V
R52
+2.5V
+2.5V
FB0805
TX+
TX-
10uF/16V
R50
+2.5V
C38
0.1MF
CRY_IN
CRY_OUT
C35
E_MDIO
E_RXD1
E_RXD0
+3.3V
E_RX_ER
1
2
3
4
5
6
7
8
9
10
11
12
MDIO
MDC
RXD3/PHYAD1
RXD2/PHYAD2
RXD1/PHYAD3
RXD0/PHYAD4
VDDIO
GND
RXDV/PCS_LPBK
RXC
RXER/ISO
GND
GND
GND
FXSD/FXEN
RX+
RXVDDRX
PD#
LED3/NWAYEN
LED2/DUPLEX
LED1/SPD100
LED0/TEST
INT#PHYAD0
U15
KS8721BL
VDDC
TXER
TXC/REF_CLK
TXEN
TXD0
TXD1
TXD2
TXD3
COL/RMII
COL/RMI_BTB
GND
VDDIO
E_MDIO
E_MDC
RST#
VDDPLL
X1
X0
GND
GND
VDDTX
TX+
TXGND
VDDRCV
REXT
R58
10K
RX+
RXR53
1k
R61
R60
R69
R68
330E
330
33E
33E
+2.5V
+3.3V
LED100
LEDACT
PHY_INT
13
14
15
16
17
18
19
20
21
22
23
24
R62
1k
36
35
34
33
32
31
30
29
28
27
26
25
BD2
+2.5V
0.1MF
+
C41
10uF/16V
E_CRS
R67
NA
E_CRS
+3.3V
FB0805
C42
E_RX_CLK
E_TX_EN
E_TXD0
E_TXD1
E_TXD2
E_TXD3
+3.3V
R66
4.7K
+3.3V
[ 26 ]
P1.0
E_TXD1
P1.1
E_TX_EN
P1.4
E_CRS
P1.8
E_RXD0
P1.9
E_RXD1
P1.10
E_RX_ER
P1.14
E_RX_CLK
P1.15
E_MDC
P1.16
E_MDIO
P1.17
PHY_INT
P0.30
Applications
LAN on Motherboard
Media Converter
Set-Top Box
Cable/DSL Modem
Network Printer
Game console
Cable configuration
1. Cross over cable
- PC to PC or PC to Kit communication
2. Straight Cable
- PC to HUB communication
[ 27 ]
[ 28 ]
[ 29 ]
VCC
+12V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
K6
VCC
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P2.8
P2.9
P0.24
P0.23
K7
SPI_CS1
SPI_CS2
TDIR
RSTRST
+3.3V
VCC
-12V
HEADER
[ 30 ]
VCC
R26
R18
J6
JMP-2
L6
LED
3
5
4
1
0E
VCC
VREF
RXD
TXD
CANH
CANL
GND
RS
2
8
P4
CANH1
CANL1
7
6
R13
1
2
3
J801-3
10K
VCC
R27
DC2
100nF
R15
120E
1.2K
CAN_RX
CAN_TX
R14
1.2K
U5
MCP2551
VCC
+3.3V
RD2
TD2
120E
1.2K
L7
LED
RD1
TD1
DC1
100nF
R11
CAN_RX
CAN_TX
R12
1.2K
L8
LED
R25
J7
JMP-2
L9
LED
0E
U8
MCP2551
VCC
3
5
4
1
VCC
VREF
RXD
TXD
CANH
CANL
GND
RS
CANH2
CANL2
7
6
2
8
R24
10K
P5
1
2
3
J801-3
[ 31 ]
[ 32 ]
1K
C55
100nF
1K
Y_OUT
X_OUT
1K
C56
5
6
7
8
9
10
11
16
C57
100nF
1K
G_SEL1
G-SEL2
#SM
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
1
2
12
+3.3V
R102
1K
+3.3V
+3.3V
VDD
VSS
3
DC3
100nF
MMA7260Q
Z_OUT
100nF
R101
R100
1K
R98
R99
1K
R96
R97
XOUT
YOUT
ZOUT
P0.23
Z_OUT :
P0.12
18. JOYSTICK
It is an input device first found on arcade game machines, then home game
systems, and finally on computers. It consists of any stick-like object attached
to a base that can be pushed in four or more directions. Usually there's a
button in the vicinity of the joystick. Joysticks come in many shapes and
sizes, with the typical arcade joystick having a large ball at the top that can
be easily gripped; but lately, cheap button pads in many home gaming
systems have replaced joysticks. However, smaller joysticks that can be
pushed around with a single finger have been added to some of the pads as
well.
JS1
LEFT
CENTER
R164
B<4>
2
330
DOWN
A<1>
UP
R163
330
COMMON<5>
E<2>
3
C<3>
D<6>
RIGHT
JOYSTICK
[ 33 ]
P1.18
Down
P1.19
Right
P1.22
Left
P1.27
Center :
P1.25
P0.8
J18
JMP-2
R49
P20
270E
VCC
PS/2 KEYBOARD
R48
270E
1
2
3
4
5
6
J17
JMP-2
P0.7
While using PS2 Keyboard close the jumper J17 and J18.
Used Port Lines : P0.7 & P0.8
20. J-TRACE
J-Trace is a JTAG emulator designed for ARM cores which includes trace
(ETM) support. It connects via USB to a PC running Microsoft Windows 2000
or XP. J-Trace has a built-in 20-pin JTAG connector and a built in 38-pin
JTAG+Trace connector, which is compatible with the standard 20-pin
connector and 38-pin connector defined by ARM.
Vi Microsystems Pvt. Ltd.,
[ 34 ]
RSTTDO
RTCK
TCK
TMS
TDI
TRST
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
TRACECLK
P2.9
+3.3V
P2.8
TRACEPKT2
TRACEPKT1
TRACEPKT0
TRACESYNC
PIPESTAT2
PIPESTAT1
PIPESTAT0
TRACE
R135
J19
10K
1
JMP-2
TRACESYNC
While we using J-Trace close the jumpers J26 to J31 as upward direction
and also close J20, J21 as Downward direction.
Used Port Lines : P2.0 To P2.7
21. J-TAG
JTAG (Joint Test Action Group) is the usual name used for the IEEE 1149.1
standard entitled Standard Test Access Port and Boundary-Scan
Architecture for test access ports used for testing printed circuit boards using
boundary scan. While designed for printed circuit boards, JTAG is nowadays
primarily used for accessing sub-blocks of integrated circuits, and is also
useful as a mechanism for debugging embedded systems, providing a
convenient "back door" into the system. When used as a debugging tool, an
in-circuit emulator - which in turn uses JTAG as the transport mechanism enables a programmer to access an on-chip debug module which is
integrated into the CPU, via the JTAG interface.
The debug module enables the programmer to debug the software of an
embedded system.
1
3
5
7
9
11
13
15
17
19
+3.3V
10K
R141
R142
TRST
TDI
TMS
TCK
RTCK
TDO
RST-
P27
2
4
6
8
10
12
14
16
18
20
+3.3V
JTAG
10K
[ 35 ]
R85
470
VCC
DC22
+ C88
100nF
R83
10K
R87
100K
7
1
47uF/6.3V
+3.3V
P24
AUDIO JACK
10K
C47
100nP
R136
100K
C46
47pF
U16
MCP601
6
4
8
2 R82
1
3
R84
470K
R81
100
ZD1
BZV55C2V4
C45
MIC_IN
C44
47pF
47pF
ZD2
BZV55C2V4
R86
100K
C48
1uF
10uF/16V
10E
+
U17
LM386
+
-
3
2
AOUT
EXT INT
.1uF
R91
33K
J33
JM-3
R90
1K
SPEAKER
R137
C90
LS1
A_OUT
1 J32
33nF
C89
10
C49
7
6
R88
C50
.1uF
.1uF
JMP-2
1
8
4
C53
10uF/16V
AUDIO JACK
INT
C51
2
1
3
47nF
P25
VCC
EXT
C52
A_OUT
[ 36 ]
R159
ADC1
3
TP3
POT
100E
+3.3V
TP4
POT
R158
ADC2
100E
+3.3V
While we using the on-chip ADC1 and ADC2, close the Jumpers J36 and J37
as downward direction.
Vi Microsystems Pvt. Ltd.,
[ 37 ]
1. SPI Slave
There is a MASTER and a SLAVE mode. The MASTER device provides the
clock signal and determines the state of the chip select lines, i.e. it activates
the SLAVE it wants to communicate with. CS and SCKL are therefore
outputs.
The SLAVE device receives the clock and chip select from the MASTER, CS
and SCKL are therefore inputs.
This means there is one master, while the number of slaves is only limited by
the number of chip selects.
A SPI device can be a simple shift register up to an independent subsystem.
The basic principle of a shift register is always present. Command codes as
well as data values are serially transferred, pumped into a shift register and
are then internally available for parallel processing. Normally the shift
registers are 8Bit or integral multiples of it. Of course there also exist shift
registers with an odd number of bits. For example two cascaded 9Bit
EEPROMs can store 18Bit data.
[ 38 ]
[ 39 ]
CPOL
CPHA
0
1
2
3
0
0
1
1
0
1
0
1
4. SPI - Modes
Vi Microsystems Pvt. Ltd.,
[ 40 ]
[ 41 ]
[ 42 ]
[ 43 ]
[ 44 ]
ZigBee systems
Home/building automation
PC peripherals
Consumer Electronics
[ 45 ]
[ 46 ]
[ 47 ]
CC2431DK content
2 x SmartRF04EB
10 x SOC_BB (Battery Board)
2 x Evaluation Modules CC2431EM
10 x Evaluation Modules CC2431EM
12 x 2.4GHz Antennas
2 x USB cables
1 x RS232 Serial cable
1 x 10-wire flat cable for using SmartRF04EB as emulator for external
target systems
1 x Quick start guide
Develop and test your own firmware. The CC2431DK includes a USB
interface that can be used as an emulator interface for the CC2431 or
CC2431. All I/O ports are available on pin connectors on the edge of
the board to allow easy access for testing or for external I/O. SWRU07
[ 48 ]
System overview
Grid
[ 49 ]
Nodes
The CC2431 Location Engine uses the RSSI value combined with the
physical location of the Reference Nodes to calculate its own position. Any
number of Reference Nodes can be used in the system, but a node can only
calculate its position if it is within range of at least three Reference Nodes1.
Experiments have shown that one Reference Node for each 100 m2 gives
good location estimates. The nodes should be placed in a grid with one node
for each 10 meters in both directions.
2.2.1 Reference Node
A node which has static location is called a Reference Node. This node must
be configured with an X and a Y value that correspond to the physical
location. The main task for a Reference Node is to provide reference
packets to the Blind Node. Reference packets contain the X and Y
coordinates of the Reference Node.
2.2.2 Blind Node
A Blind Node will communicate with its nearest Reference Nodes, collecting
X, Y and RSSI values for each of these nodes. Then it uses the location
engine hardware to calculate its position based on the collected parameters
from several Reference Nodes.
2.2.3 Dongle
The Dongle will communicate with the entire network; it can request or
configure the X,Y values of all Reference Nodes and the A and N values of
the Blind Nodes via the Z-location Engine PC Application. The Z-location
Engine can also configure any Blind Node to automatically make a periodic
position calculation and report (by default the Blind Node is waiting for a
command to perform a position calculation.)
2.3
RSSI
The RSSI value is typically in the range -40 dBm to -90 dBm, where -40 dBm
is the highest value. -40 dBm is approximately the measured signal strength
on distance of one meter. Input to the location engine hardware is the
absolute value of the RSSI in dBm, so the range will typically be from 40 to
90, where 40 is the highest signal strength.
2.4 Program flow
The program flow for both Reference Node and Blind Node are shown in
Figure 2 and Figure 3. The figures are simplified.
Vi Microsystems Pvt. Ltd.,
[ 50 ]
Reference Node
2.5
Blind Node
Communication Flow
[ 51 ]
Introduction
OLED Features
[ 52 ]
The heart of the OLED-96-G1 is the easy to understand command set. This
comprises of a handful of easy to learn instructions that can draw lines,
circles, squares, etc, to provide a full text and graphical user interface. The
commands are sent to the OLED-96-G1 via its serial connection (5 pin
header). The command set is grouped into 3 sections:
General Command Set
Display Specific Command Set
Extended Command Set
Each Command set is described in detail in the following sections.
NOTE!
The RX and the TX signals are at 3.3V levels. If interfacing to a host
system running at voltages greater than 3.6V levels, then a 100 to 220
Ohms series resistor must be inserted between the Host TX and the
OLED RX signals as shown in the diagram below.
[ 53 ]
Command Protocol
The following are each of the commands with the correct syntax. Please note
that all command examples listed below are in hex (00hex). Due to the high
colour depth of the OLED, a pixel colour value will not fit into a single byte, a
byte can only hold a maximum value of 255. Therefore the colour is
represented as a 2 byte value, colour(msb:lsb). The most significant byte
(msb) is transmitted first followed by the least significant byte (lsb). This
format is called the big endian. So for a 2 byte colour value of 013Fhex the
byte order can be shown as (01hex),(3Fhex).
NOTE:
When transmitting the command and data bytes to the OLED, do not
include any separators such as commas , or spaces or brackets ( )
between the bytes. The examples show these separators purely for legibility;
these must not be included when transmitting data to the OLED.
When a command is sent, the OLED will reply back with a single
acknowledge byte called the ACK (06hex). This tells the host that the
command was understood and the operation is completed. It will take the
OLED anywhere between 1 to several milliseconds to reply back with an
ACK, depending on the command and the operation the OLED has to
perform. If the OLED receives a command that it does not understand it will
reply back with a negative acknowledge called the NAK (15hex).
If a command that has 5 bytes but only 4 bytes are sent, the command will
not be executed and the OLED will wait until another byte is sent before
trying to execute the command. There is no timeout on the OLED when
incomplete commands are sent. The OLED will reply back with a NAK for
each invalid command it receives. For correct operation make sure the
command bytes are sent in the correct sequence.
[ 54 ]
:
:
:
data1 to
dataN
Description:
Example1:
41hex, 01hex, 18hex, 24hex, 42hex, 81hex, 81hex, 42hex, 24hex, 18hex
This adds and saves user defined 8x8 bitmap as character number 1 into
memory as seen below.
5.2. Set Background Colour (B)
Syntax
:
cmd
:
colour(msb:lsb) :
cmd, colour(msb:lsb)
42hex, Bascii
pixel colour value: 2 bytes (16 bits) msb:lsb 65,536
colours to choose from
[ 55 ]
Text
[ 56 ]
[ 57 ]
[ 58 ]
[ 59 ]
Syntax : cmd
cmd : 45hex, Eascii
Description :
This command clears the entire screen using the current background colour.
Example :
45hex Clear the screen.
5.8
[ 60 ]
[ 61 ]
[ 62 ]
[ 63 ]
[ 64 ]
OLED reply
: 00hex, 1Fhex
[ 65 ]
[ 66 ]
[ 67 ]
[ 68 ]
[ 69 ]
[ 70 ]
[ 71 ]
[ 72 ]
Different OLED display panels that are used in the OLED range of intelligent
display modules have certain built in features that are controlled directly by
the embedded driver controller. These features otherwise would be too
cumbersome to implement in firmware and would require resources that are
not available. The Display Specific Command set utilises these built in
hardware features directly. These are detailed in this section.
Display Specific Command Set
1. Display Scroll Control ($S)
Syntax : spCmd, cmd, register, data
spCmd : 24hex, $ascii
cmd : 53hex, Sascii
reg : Scroll Control Register.
register data
0x00 (Scroll Enable/Disable) 0 = Disable, 1 = Enable
0x01 Reserved XXX
0x02 (Scroll Speed) 1 = fast, 2 = normal, 3 = slow
data : Scroll register data. Refer to above for detail.
Description : This command allows control of screen scrolling.
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[ 74 ]
[ 75 ]
[ 76 ]
[ 77 ]
[ 78 ]
x,
y,
width,
height,
colourMode,
[ 79 ]
[ 80 ]
[ 81 ]
Command
00000000
00000002
00000012
00000015
00000025
00000119
00000129
00000132
00000134
Note :
[ 82 ]
[ 83 ]
[ 84 ]
[ 85 ]
[ 86 ]
[ 87 ]
Likewise, to send a data byte we set bit 8 to specify that this is a data
transmission. The lowest 8 bits contain the desired PCF8833 data byte.
unsigned int data;
while ((pSPI->SPI_SR &
AT91C_SPI_TXEMPTY) == 0);
data = (data | 0x0100);
pSPI->SPI_TDR = data;
Using these commands is quite simple; for example, to initialize the SPI
interface and then set the contrast for the Philips controller:
InitSpi( );
// Initialize SPI interface to LCD
WriteSpiCommand(SETCON); // Write contrast (command 0x25)
WriteSpiData(0x30);
// contrast 0x30 (range is -63 to +63)
[ 88 ]
PA12
PA16
PA17
PA18
PB20
Table 1. I/O port bits used to support the SPI interface to the LCD Display
Note in Table 1 above that Olimex elected not to support the SPIO_MOSI
Master In bit (PA16) which would have allowed the user to read from the
display. The LED backlight needs a lot of current, so a 7-volt boost converter
is used for this purpose. The backlight can be turned on and off using PB20.
It looks like you might be able to PWM the backlight, but I doubt anyone
would want the backlight to be at half brightness.
[ 89 ]
[ 90 ]
Once the drawing boundaries have been established (either a single pixel or
a rectangular group of pixels), any subsequent memory operations are
confined to that boundary. For instance, if you try to write more pixels than
defined by the boundaries, the extra pixels are discarded by the controller.
The Epson S1D15G00 controller has essentially the same memory layout as
the Philips/NXP PCF8833.
12-Bit Color Data
The Philips PCF8833 LCD controller has three different ways to specify a
pixels color.
1. 12 bits per pixel
(native mode)
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[ 92 ]
WriteSpiData(0);
WriteSpiData(2);
WriteSpiData(5);
WriteSpiData(7);
WriteSpiData(9);
WriteSpiData(11);
WriteSpiData(14);
WriteSpiData(16);
WriteSpiData(0);
WriteSpiData(2);
WriteSpiData(5);
WriteSpiData(7);
WriteSpiData(9);
WriteSpiData(11);
WriteSpiData(14);
WriteSpiData(16);
WriteSpiData(0);
WriteSpiData(6);
WriteSpiData(11);
WriteSpiData(15);
Consider the following points. The resolution of the Nokia 6100 display is 132
x 132 pixels, 12 bits/pixel. Since the 8 bits/pixel encoding is converted by the
color table to 12 bits/pixel, there is no saving of display memory. The 8
bits/pixel encoding would use about 1/3 less data bytes to fill an area, so
there would be a performance gain in terms of the number of bytes
transferred. The 8 bits/pixel encoding would make a photograph look terrible.
In the authors view, theres very little to be gained by using this mode in an
ARM microcontroller environment. Therefore, I elected to not implement the
color table and 8-bit encoding in this driver.
Vi Microsystems Pvt. Ltd.,
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For this driver, I elected to use the 12-bit color pixel format exclusively.
// Color Interface Pixel Format (command 0x3A)
WriteSpiCommand(COLMOD);
WriteSpiData(0x03);
// 0x03 = 12 bits-per-pixel
In setting up the memory access controller, I elected to use the mirror x and
mirror y commands to reorient the x and y axes to agree with the silk screen
lettering on the Olimex board. If you want the default orientation, send the
data byte 0x08 instead. Finally, I had to reverse the RGB color setting to get
the color information to work properly. You may want to experiment with this
setting.
// Memory access controller (command 0x36).
WriteSpiCommand(MADCTL);
WriteSpiData(0xC8); // 0xC0 = mirror x and y, reverse rgb
I found that setting the contrast varies from display to display. You may want
to try several different contrast data values and observe the results on your
display.
// Write contrast (command 0x25)
WriteSpiCommand(SETCON);
WriteSpiData(0x30); // contrast 0x30
Delay(2000);
Now that the display is initialized properly, we can turn on the display and
were ready to start producing characters and graphics.
// Display On (command 0x29)
WriteSpiCommand(DISPON);
Note
While we are using TFT LCD close the jumper J22 to J25 as downward
direction.
Vi Microsystems Pvt. Ltd.,
[ 97 ]
CHAPTER - 3
DEVELOPMENT TOOLS
ARM IAR Embedded Workbench
The ARM IAR Embedded Workbench IDE is a very powerful Integrated
Development Environment that allows you to develop and manage complete
embedded application projects.
Creating Application Project
ARM IAR Embedded Workbench integrated development environment (IDE)
demonstrates a typical development cycle shows how you use the compiler
and the linker to create a small application for the Arm core. For instance,
creating a workspace, setting up a project with C source files, and compiling
and linking and application.
Setting up Create a New Project
Using the IAR Embedded Workbench IDE, you can design advanced project
models. You create a workspace to which you add one or several projects.
There are ready-made project templates for both application and library
projects. Each project can contain a hierarchy of groups in which you collect
your source files. For each project you can define one or several build
configurations.
Because the application in this tutorial is a simple application with very few
files, the Tutorial does not need an advanced project model.
We recommend that you create a specific directory where you can store your
entire project files. In this tutorial we call the directory projects. You can find
all the files needed for the tutorials in the arm\tutor directory. Make a copy of
the tutor directory in your Projects directory. Before you can create your
project you must first create a workspace.
CREATING A WORKSPACE WINDOW
The first step is to create a new workspace for the tutorial application. When
you start The IAR Embedded Workbench IDE for the first time, there is
already a ready-made Workspace, which you can use for the tutorial projects.
If you are using that workspace, you can ignore the first step.
Choose File>New>Workspace. Now you are ready to create a project and
add it to the Workspace.
Vi Microsystems Pvt. Ltd.,
[ 98 ]
2.
[ 99 ]
4.
[ 100 ]
6.
Give your File name Eg: DAC.C and click Save Button.
[ 101 ]
8.
[ 102 ]
Right Click the project name option for select a C file in workspace
window. Select Add >Add DAC.C Menu.
[ 103 ]
Right Click the Project name option in workspace window for adding a
header files. Choose Add >Add Files menu. Before that the header
files are store the path at where your C files is located.
12.
[ 104 ]
14.
[ 105 ]
Select Linker Category. Enable output option file and give File
name.hex Eg: LPC2378.hex.
16.
[ 106 ]
Select Config Menu. Enable Overide default option and click Browse
button for choosing a LPC2378-Flash-XCL file.
[ 107 ]
19.
If your project has no error Builting completed and Hex file generated.
[ 108 ]
[ 109 ]
[ 110 ]
[ 111 ]
5. Enable Erase Blocks for Erasing the memory locations of microcontroller, before programming in Step-2 Section.
[ 112 ]
Click the Browse Button, for Select the HEX file to be downloaded
in Step-3 Section.
[ 113 ]
11.
[ 114 ]
CHAPTER 4
ABOUT RTOS
Semaphores
Event Flags
Mutual Exclusion Semaphores (to reduce priority inversions)
Message Mailboxes
Message Queues
Task Management (Create, Delete, Change Priority, Suspend/Resume
etc.)
7. Fixed Sized Memory Block management
8. Time Management
TASK MANAGEMENT
It services that create a task, delete a task, check the size of tasks stack,
changes a task priority, suspend and resume a task.
OS FUNCTIONS
OSTaskCreate ()
OSinit ()
OSStart ()
OS_STK
OSTaskNameSet ()
Vi Microsystems Pvt. Ltd.,
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Task1stk [100];
Task2stk [100];
Task3stk [100];
Task4stk [300];
3. OSInit ()
OSInit () initializes C/OS-II and must be called prior to calling OSStart (),
which actually starts multitasking.
Eg3:
Void main ()
{
OSInit ();
//Initialize C/OS-II
OSTaskCreate (Task1, 0, &Task1stk [99], 1);
.
.
OSStart ();
//start multitasking
}
[ 116 ]
[ 117 ]
[ 118 ]
= (1 << 1);
= 0;
= 0;
= rld_cnts;
= 3;
= 0;
= 0;
= 1;
SAMPLE PROGRAMS:
1. PROGRAM FOR LEDS AND GRAPHICS LCD USING C/OS-II
#include<includes.h>
#include<images.h>
#define DEF_FALSE 0
#define DEF_TRUE 1
unsigned char data[]="DATA FROM LPC2378 DEVELOPMENT
BOARD...\n";
unsigned int value;
void *MessageStorage[10];
OS_STK
OS_STK
OS_STK
OS_STK
Task1stk[100];
Task2stk[100];
Task3stk[100];
Task4stk[300];
void uCdetails();
char KeyRead(char);
void Task1(void *pdata);
void Task2(void *pdata);
void Task3(void *pdata);
void Task4(void *pdata);
[ 119 ]
[ 120 ]
[ 121 ]
[ 122 ]
2.
3.
OS_CPU.H
OS_CPU_A.ASM
OS_CPU_C.C
OS_DBG.C
OS_DCC.C
UC_CPU
CPU.H
CPU_A.S
CPU_DEF.H
UCOS-II
4.
OS_CORE.C
OS_FLAG.C
OS_MBOX.C
OS_MEM.C
OS_MUTEX.C
OS_Q.C
OS_SEM.C
OS_TASK.C
OS_TIME.C
OS_TMR.C
UCOSII.H
[ 123 ]
Task1stk[100];
Task2stk[100];
Task3stk[100];
[ 124 ]
[ 125 ]
CHAPTER 5
SOFTWARE EXAMPLE
Example 1
#include <iolpc2378.h>
#include "irq.h"
#include "config.h"
void delay()
{
unsigned int i,j;
for(i=0;i<0x3fff;i++)
for(j=0;j<0xff;j++);
}
int main (void)
{
unsigned int Fdiv;
TargetResetInit();
PINSEL0 = 0x00000050;
U0LCR = 0x83;
Fdiv = ( Fpclk / 16 ) / 19200 ;
U0DLM = Fdiv / 256;
U0DLL = Fdiv % 256;
U0LCR = 0x03;
U0FCR = 0x07;
FIFO.
FIO3DIR = 0X008000FF;
/* DLAB = 0 */
/* Enable and reset TX and RX
while(1)
{
FIO3PIN = 0X000000ff;
delay();
FIO3PIN = 0X00000000;
delay();
}
}
[ 126 ]
#include <iolpc2378.h>
#include "irq.h"
#include "config.h"
unsigned int k;
unsigned int dat[] = {0x00,0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80};
void delay()
{
unsigned int i,j;
for(i=0;i<0x1Fff;i++)
for(j=0;j<0xff;j++);
}
int main (void)
{
TargetResetInit();
FIO4PIN = 0X0;
FIO4DIR = 0XFFFF0000;
FIO3DIR = 0X008000FF;
while(1)
{
FIO3PIN = FIO4PIN ;
}
}
Example 3
#include <iolpc2378.h>
#include "irq.h"
#include "config.h"
unsigned int k;
unsigned int Read_Key;
unsigned char scan [] = {
0x00000E00,0x00000D00,0x00000B00,0x00000700};
unsigned int i;
void delay()
{
unsigned int i,j;
for(i=0;i<0xff;i++)
for(j=0;j<0xff;j++);
}
Vi Microsystems Pvt. Ltd.,
[ 127 ]
/* DLAB = 0 */
/* Enable and reset TX and RX FIFO. */
while(1)
{
FIO4SET = 0X00000e00;
/*First Row*/
Read_Key = FIO4PIN;
Read_Key = (Read_Key & 0xf000) >> 12 ;
if((Read_Key==0x07))
{
send_serial_data('0');
FIO3PIN = 0X00000000;
}
if((Read_Key==0x0b))
{
send_serial_data('1');
FIO3PIN = 0X00000001;
}
if( (Read_Key==0x0d))
{
send_serial_data('2');
FIO3PIN = 0X00000002;
}
Vi Microsystems Pvt. Ltd.,
[ 128 ]
[ 129 ]
[ 130 ]
/* set to 1Mhz */
= (m << 0)
| (n << 16);
//PLLCFG = 11;
PLLFEED = 0xAA;
PLLFEED = 0x55;
PLLCON |= 0x01;
PLLFEED = 0xAA;
PLLFEED = 0x55;
CCLKCFG = clk_div;
[ 132 ]
U0LCR = 0x83;
// 8 bits, no Parity, 1 Stop bit
Fdiv = (60000000 / 16 ) / 19200 ; //baud rate
U0DLM = Fdiv / 256;
U0DLL = Fdiv % 256;
U0LCR = 0x03;
// DLAB = 0
U0FCR = 0x07;
// Enable and reset TX and RX FIFO.
send_serial_data('a');
install_irq( UART0_INT, (void *)UART0Handler, HIGHEST_PRIORITY ) ;
while(1)
{
send_serial_data('a');
printf("\n\r Welcome");
}
}
Vi Microsystems Pvt. Ltd.,
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[ 134 ]
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[ 136 ]
set to 1Mhz */
{
while((U0LSR & 0x20)==0);
U0THR = serial;
}
void adc_serial_tx(unsigned int ch)
{
unsigned int t1000,t100,t10,t1,temp;
t1000 = ch / 1000;
temp = ch % 1000;
t100 = temp / 100;
temp = temp % 100;
t10 = temp / 10;
t1
= temp % 10;
send_serial_data(t1000+0x30);
send_serial_data(t100 +0x30);
send_serial_data(t10+0x30);
send_serial_data(t1+0x30);
send_serial_data(0x0d);
send_serial_data(0x0a);
}
void main()
{
unsigned long int val;
unsigned int Fdiv;
TargetResetInit();
PCONP |= (1 << 12);
PINSEL1 = 0X00054000;
PINSEL0 = 0x00000050;
U0LCR = 0x83;
Fdiv = ( Fpclk / 16 ) / 19200 ;
U0DLM = Fdiv / 256;
U0DLL = Fdiv % 256;
Vi Microsystems Pvt. Ltd.,
[ 137 ]
// DLAB = 0
// Enable and reset TX and RX FIFO.
[ 138 ]
/* set to 1Mhz */
[ 139 ]
/* TEST1:0 = 00 */
/* START = 0 A/D conversion stops */
/* EDGE = 0 (CAP/MAT signal falling, trigger A/D
conversion) */
while((AD0GDR & 0X80000000)!=0X80000000);
val = (AD0GDR>>6)& 0x3ff
return(val);
}
unsigned long adc_1()
{
AD0CR = ( 0x01 << 1 ) |
/* SEL=1,select channel 0~7 on ADC0 */
( ( Fpclk / ADC_CLK - 1 ) << 8 ) | /* CLKDIV = Fpclk / 1000000 - 1 */
( 1 << 16 ) |
/* BURST = 0, no BURST, software
controlled */
( 0 << 17 ) |
/* CLKS = 0, 11 clocks/10 bits */
( 1 << 21 ) |
/* PDN = 1, normal operation */
( 0 << 22 ) |
/* TEST1:0 = 00 */
( 1 << 24 ) |
/* START = 0 A/D conversion stops */
( 0 << 27 );
/* EDGE = 0 (CAP/MAT signal
falling, trigger A/D conversion) */
while((AD0GDR & 0X80000000)!=0X80000000);
val = (AD0GDR>>6)& 0x3ff
return(val);
}
unsigned long adc_6()
{
AD0CR = ( 0x01 << 6 ) | /* SEL=1,select channel 0~7 on ADC0 */
( ( Fpclk / ADC_CLK - 1 ) << 8 ) | /* CLKDIV = Fpclk / 1000000 - 1 */
( 1 << 16 ) | /* BURST = 0, no BURST, software controlled */
( 0 << 17 ) | /* CLKS = 0, 11 clocks/10 bits */
( 1 << 21 ) | /* PDN = 1, normal operation */
( 0 << 22 ) | /* TEST1:0 = 00 */
( 1 << 24 ) | /* START = 0 A/D conversion stops */
( 0 << 27 );
/* EDGE = 0 (CAP/MAT signal falling, trigger A/D
conversion) */
while((AD0GDR & 0X80000000)!=0X80000000);
val = (AD0GDR>>6)& 0x3ff
return(val);
}
Vi Microsystems Pvt. Ltd.,
[ 140 ]
[ 141 ]
[ 142 ]
[ 143 ]
[ 144 ]
APPENDIX A
CIRCUIT DIAGRAM
[ 145 ]
USB_LINK
USB_CONNECT
U2D+
U2DVBUS
P32
P48
P36
P37
P30
SCK0
SSEL0
MISO0
MOSI0
LCD BL
P49
P50
P53
P54
P57
UP
DOWN
RIGHT
LEFT
CENTER
P46
P47
P51
P61
P56
P0.24
P0.23
Z_OUT
DIOW
P11
P13
P29
P63
E_TXD0
E_TXD1
E_TX_EN
E_CRS
E_RXD0
E_RXD1
E_RX_ER
E_RX_CLK
E_MDC
E_MDIO
PHY_INT
P136
P135
P133
P132
P131
P129
P128
P126
P125
P123
P43
CP
MCICLK
MCICMD
RS
MCIDAT0
P87
P85
P83
P82
P80
MIC_IN
AOUT
WP
P10
P8
P64
+3.3V
1K
+3.3V
SP4
MISO0
R75
MOSI0
1K
MCICLK
R131
MCICMD
R132
P0.10
R80
P0.11
R78
1K
+3.3V
1K
+3.3V
1K
+3.3V
1K
+3.3V
R65
SDA0
R64
+3.3V
1K
CS1
R127
CS2
R126
RS
R133
P0.13/USB_UP_LED2/MOSI1/AD0.7
P0.14/USB_CONNECT2/SSEL1
P0.31/USB_D+2
USB_D-2
P1.30/VBUS/AD0.4
P1.20/PWM1.2/SCK0
P1.21/PWM1.3/SSEL0
P1.23/PWM1.4/MISO0
P1.24/PWM1.5/MOSI0
P1.26/PWM1.6/CAP0.0
+3.3V
1K
+3.3V
1K
+3.3V
1K
P0.6
P0.7
P0.8
P0.9
P0.10
P0.11
P113
P112
P111
P109
P69
P70
CS1
CS2
BUT2
SDA0
SCL0
BUT1
SPI_CS5
P89
P90
P86
P35
P34
P42
P28
PI.18/USB_UP_LED1/PWM1.1/CAP1.0
P1.19/CAP1.1
P1.22/MAT1.0
P1.27/CAP0.1
P1.25/MAT1.1
6
3
VCC
OUT
NC
GND
+3.3V
CLK
12Mhz
CMOS VCC
P41
P102
P114
P138
P18
P60
P121
P14
P17
P27
CPU_CLKIN
P31
CPU_CLKOUT
P33
BUTTON SECTION...
+3.3V
R134
1K
R79
1K
+3.3V
R165
1K
R161
1K
R166
P137
P140
P144
P2
P9
P12
P16
P19
P3.23/CAP0.0/PCAP1.0
P3.24/CAP0.1/PWM1.1
P3.25/MAT0.0/PWM1.2
P3.26/MAT0.1/PWM1.3
MCIDAT3
SW21
LC_LED0
LC_LED1
LC_LED2
LC_LED3
LC_LED4
LC_LED5
LC_LED6
LC_LED7
P45
P40
P39
P38
R162
BUT1
100E
MCIDAT2
BUT2
100E
C92
18pF
C91
18pF
SW22
BUT2
U13
U22
1
P0.24/AD0.1/I2SRX_WS/CAP3.1
P0.23/AD0.0/I2SRX_CLK/CAP3.0
P0.12/MISO1/AD0.6
P1.28/PCAP1.0/MAT0.0
LCD_EN
P3.24
LCD RST
P3.26
RST
NC
VCC
A
Y
RST-
+3.3V
RST
LCD RST-
VDD
VCC
VSS
RST
GND
RST
MR
RSTSW-
NC7SPU04P5X
P1.0/ENET_TXD0
P1.1/ENET_TXD1
P1.4/ENET_TX_EN
P1.8/ENET_CRS
P1.9/ENET_RXD0
P1.10/ENET_RXD1
P1.14/ENET_RX_ER
P1.15/ENET_REF_CLK
P1.16/ENET_MDC
P1.17/ENET_MDIO
P0.30/USB_D-1
P4.0/A0
P4.1/A1
P4.2/A2
P4.3/A3
P4.4/A4
P4.5/A5
P4.6/A6
P4.7/A7
P4.8/A8
P4.9/A9
P4.10/A10
P4.11/A11
P4.12/A12
P4.13/A13
P4.14/A14
P4.15/A15
P0.17/CTS1/MISO0/MISO
P0.19/DSR1/MCICLK/SDA1
P0.20/DTR1/MCICMD/SCL1
P0.21/RI1/MCIPWR/RD1
P0.22/RTS1/MCIDAT0/TD1
P0.25/AD0.2/I2SRX_SDA/TXD3
P0.26/AD0.3/AOUT/RXD3
P1.29/PCAP1.1/MAT0.1
P4.24/OE
P4.25/WE
P4.28/MAT2.0/TXD3
P4.29/MAT2.1/RXD3
P4.30/CS0
P4.31/CS1
P0.6/I2SRX_SDA/SSEL1/MAT2.0
P0.7/I2STX_CLK/SCK1/MAT2.1
P0.8/I2STX_WS/MISO1/MAT2.2
P0.9/I2STX_SDA/MOSI1/MAT2.3
P0.10/TXD2/SDA2/MAT3.0
P0.11/RXD2/SCL2/MAT3.1
VDD1.8_3
VDD1.8_2
VDD1.8_1
U14
P0.15/TXD1/SCK0/SCK
P0.16/RXD1/SSEL0/SSEL
P0.18/DCD1/MOSI0/MOSI
P0.27/SDA0
P0.28/SCL0
P0.29/USB_D+1
P1.31/SCK1/AD0.5
ALARM
DBGEN
TD0
TDI
TMS
TRST
TCK
RTCK
RSTOUT
RESET
LPC2378
X1(4PIN)
+3.3V
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P2.8
P2.9
P2.10
MCIDAT1
MCIDAT2
MCIDAT3
BUT1
P3.0/D0
P3.1/D1
P3.2/D2
P3.3/D3
P3.4/D4
P3.5/D5
P3.6/D6
P3.7/D7
+3.3V
1K
SCL0
P0.2/TXD0
P0.3/RXD0
P107
P106
P105
P100
P99
P97
P96
P95
P93
P92
P76
P75
P73
P71
RTCX1
VDD_3V3
VDD_3V3
VDD_3V3
VDD_3V3
VDD_DCDC_3V3
VDD_DCDC_3V3
VDD_DCDC_3V3
VDDA
VREF
VBAT
P52
P55
P58
P68
P72
P74
P78
P84
MCP1319MT - 45
SW0
SW1
SW2
SW3
SW4
SW5
SW6
SW7
P88
P91
P94
P101
P104
P108
P110
P120
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSA
XTAL1
XTAL2
DC9
DC10
DC12
DC14
DC15
DC18
DC20
0.1MF
0.1MF
0.1MF
0.1MF
0.1MF
0.1MF
0.1MF
DC19
DC16
DC11
0.1MF
0.1MF
0.1MF
+3.3V
+1.8V
P26
P6
P1
P3
P4
P5
P7
P143
P20
P24
+3.3V
R55
1K
+3.3V
R159
TDO
TDI
TMS
TRST
TCK
RTCK
RSTOUTRST-
P23
R158
2
ADC1
R56
1K
TP3
POT
TP4
POT
ADC2
100E
C39
100E
+3.3V
SW12
SW23
18pF
Y3
32.768KHz
RTCX2
1K
+1.8V
SPI_CS1
SPI_CS2
TDIR
RDIR
SPI_CS3
SPI_CS4
P98
P81
P21
RSTSW-
+3.3V
K1
K2
K3
K4
K5
K6
K7
K8
P127
P124
P118
P122
P130
P134
R57
+3.3V
P141
P142
P2.0/PWM1.1/TXD1/TRACECLK
P2.1/PWM1.2/RXD1/PIPESTST0
P2.2/PWM1.3/CTS1/PIPESTST1
P2.3/PWM1.4/DCD1/PIPESTST2
P2.4/PWM1.5/DSR1/TRACESYNC
P2.5/PWM1.6/DTR1/TRACEPKT0
P2.6/PCAP1.0/RI1/TRACEPKT1
P2.7/RD2/RTS1/TRACEPKT2
P2.8/TD2/TXD2/TRACEPKT3
P2.9/USB_CONNECT1/RXD2/EXTIN0
P2.10/EINT0
P2.11/EINT1/MCIDAT1/I2STX_CLK
P2.12/EINT2/MCIDAT2/I2STX_WS
P2.13/EINT3/MCIDAT3/I2STX_SDA
R74
MOSI0
TXD0
RXD0
P0.0/RD1/TXD3/SDA1
P0.1/TD1/RXD3/SCL1
P0.4/I2SRX_CLK/RD2/CAP2.0
P0.5/I2SRX_WSK/TD2/CAP2.1
1K
P66
P67
P116
P115
R73
MISO0
RD1
TD1
RD2
TD2
RSTSW(2PIN)
P25
330E
R160
P2.10
C40
1
2
3
1
2
3
RRE KEY
18pF
P22
P44
P59
P65
P79
P103
P117
P119
P139
P15
TINNY SW
TRACE SIGNALS
SCK1
2
3
1
MISO1
MOSI1
P0.7
P2.2
J14
JM-3
P0.8
J15
JM-3
2
P2.3
PIPESTAT2
DCD1
P2.7
HEADER 10X2
P0.10
P0.11
SCL0
SDA0
MOSI0
RI1
TRACEPKT2
RTS1
X_OUT
ADC1
Y_OUT
ADC2
P0.23
P0.24
AOUT
TRACEPKT1
P23
2
4
6
8
10
12
14
16
18
20
3
2
JM-3
PWM4
P0.24
1
3
5
7
9
11
13
15
17
19
PWM6
J20
3
J36
JM-3
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
SCK0
SSEL0
MISO0
DTR1
JM-3
P0.9
+3.3V
J21
CTS1
PWM3
J30
JMP-4
1
TRACEPKT0
PIPESTAT1
DSR1
PWM5
J26
JMP-4
1
P2.5
PWM2
J29
JMP-4
1
RXD1
4
2
PIPESTAT0
J28
JMP-4
1
P2.6
PWM1
IO_P0.9
P2.1
J13
JM-3
IO_P0.8
P0.6
P2.4
IO_P0.7
TXD1
SSEL1
J12
JM-3
IO_P0.6
P2.0
TRACESYNC
J31
JMP-4
1
TRACECLK
J27
JMP-4
1
J37
JM-3
{ADC}
2
P0.23
P29
1
2
AOUT
{ADC}
J801
[ 146 ]
RX+
10K
+2.5V
C43
BD1
49.9E R70
49.9E R63
R51
1K
49.9E R59
49.9E R54
P22
1
2
3
4
5
6
7
8
9
10
11
12
E_MDIO
E_RXD1
E_RXD0
+3.3V
E_RX_ER
MDIO
MDC
RXD3/PHYAD1
RXD2/PHYAD2
RXD1/PHYAD3
RXD0/PHYAD4
VDDIO
GND
RXDV/PCS_LPBK
RXC
RXER/ISO
GND
GND
GND
FXSD/FXEN
RX+
RXVDDRX
PD#
LED3/NWAYEN
LED2/DUPLEX
LED1/SPD100
LED0/TEST
INT#PHYAD0
U15
KS8721BL
VDDC
TXER
TXC/REF_CLK
TXEN
TXD0
TXD1
TXD2
TXD3
COL/RMII
COL/RMI_BTB
GND
VDDIO
E_MDIO
E_MDC
TX-
RX+
TOUT+
TOUTTPIN+
4
5
RX+
RXR53
RX-
+2.5V
+3.3V
1k
330E
330
33E
33E
R61
R60
R69
R68
CT
CT
TPIN-
7
C36
E_RX-
E_RX+
E_TXE_TX+
NC
C37
8
LED100
LEDACT
PHY_INT
8
7
6
5
4
3
2
1
GND
0.01MF0.01MF
RJ-45 CON.
13
14
15
16
17
18
19
20
21
22
23
24
R62
1k
36
35
34
33
32
31
30
29
28
27
26
25
TX+
RJ-45
FRONT VIEW
48
47
46
45
44
43
42
41
40
39
38
37
RST#
VDDPLL
X1
X0
GND
GND
VDDTX
TX+
TXGND
VDDRCV
REXT
R58
10K
LPF
RST-
+3.3V
R130
200E
1K
RX-
CRY_IN
CRY_OUT
10uF/16V
TX+
TX-
+2.5V
FB0805
18pF
R52
+2.5V
C38
+2.5V
C35
BD2
+2.5V
+3.3V
FB0805
E_RX_CLK
E_TX_EN
E_TXD0
E_TXD1
E_TXD2
E_TXD3
C42
R67
NA
0.1MF
+
C41
E_CRS
+3.3V
10uF/16V
E_CRS
L13
LED100
+3.3V
+3.3V
LED
R66
4.7K
+3.3V
+2.5V
DC21
DC17
DC13
0.1uF
0.1uF
0.01uF
L12
LEDACT
LED
+3.3V
U12
C84
1
2
3
4
5
6
7
8
9
10
11
12
13
14
0.1MF
X1/ICLK
+3.3V
C34
Y2
20MHz
X1/ICLK
X2/ICLK
0.1MF
X2/ICLK
C82
0.1MF
R5
R6
S0
S1
S2
VDD
X1/ICLK
X2
GND
V0
V1
V2
V3
V4
R4
R3
R2
R1
R0
VDD
REF
CLK
GND
PD
V8
V7
V6
V5
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ETHERNET SECTION . . .
+3.3V
C33
0.1MF
R47
E_RX_CLK
1K
ICS525-01R
VCC
BL_PWR
R41
R120
22E
PK
10
U27
MC34063A
3
+3.3V
SWC
TCAP
SWE
NA
8
R121
330
1K
C85
47pF
LCD BL
R123
2K
C83 +
10u/6.3V
SP3
SMD PAD
+12V
+3.3V
C86
FB
5
1.2K
U10
LM317
3
TFT_DISPLAY
R124
5.6K
R125
GND
R122
Q5
BC846
LCD RST
33K
DC
R40
BL_PWR
IN5819S
150E
+ C87
LCD RST
GND
R129
VIN
C30
10MF/16V
VOUT
ADJ
LEDGND
SCK0
MOSI0
SSEL0
D12
220uH
2.2E
VCC
VLRD
R128
+3.3V
4
3
5
7
VCC
RESET
BD5
+3.3V
10uF/6.3V
SCK
DIO
CS
NC
6
1
220uF/16V
P19
VDISPLAY
VDIGITAL
BL_PWR
L10
USB_LINK
R29
100E
R34
10K
USB-B
R38
10K
VBUS
33E
33E
R45
R44
U2D- BC807
U2D+
J16
JM-3 3
Q4
1
R43
2
2.2K
USB_CONNECT
C28
C22
R30
120E
VCC
DD+
GND
SHELL
1
2
3
4
5
P16
0.1mF
LED
C23
10MF/16V/T
330E
10MF/16V/T
R39
R35
R37
22k C32
18pF
1.5K
R36
1.5K
C31
18pF
+3.3V
R31
47E
L11
LED
R46
330E
USB SECTION . . .
[ 147 ]
K8
K7
K6
K5
R149
LC_LED1
R150
LC_LED2
R151
LC_LED3
R152
LC_LED4
R153
L20
LC_LED7
R156
+3.3V
1
2
3
4
8
7
6
5
LED
L19
LED
L18
330E
R155
SW3
SW2
SW1
SW0
LED
330E
LC_LED6
8
7
6
5
RN8
33E
L21
330E
R154
1
2
3
4
LED
330E
+3.3V
RN9
33E
L22
330E
LC_LED5
8
7
6
5
SW20
SW7
SW6
SW5
SW4
LC_LED0
1
2
3
4
SW19
K5
K6
K7
K8
SW18
KEY
+3.3V
RN5
33E
SW16
KEY
SW17
SW15
KEY
3
1
8
7
6
5
SW14
KEY
1
2
3
4
SW13
K1
K2
K3
K4
K4
K3
K2
K1
SW10
SW9
SW8
SW7
+3.3V
RN10
33E
SW6
SW5
SW4
SW3
LED
SW1
L17
330E
LED
L16
330E
LED
J38
L15
330E
LED
JMP-2
SW7
SW6
SW5
SW4
SW3
SW2
SW1
SW0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SW DIP-
[ 148 ]
TXD1
C24
C75
100nF
C25
100nF
C26
100nF
100nF
28
24
1
2
27
3
23
22
+3.3V
26
T1OUT
T2OUT
T3OUT
R1IN
R2IN
R3IN
R4IN
R5IN
R1OUT
R2OUT
R3OUT
R4OUT
R5OUT
C1+
C1C2+
C2V+
V-
R2OUTB
INVALID
9
10
11
MRTS1
MTXD4
MDTR1
19
18
17
16
15
DCD1
DSR1
CTS1
RI1
J4
JMP-2
4
5
6
7
8
JMP-2
J3
T1IN
T2IN
T3IN
MDCD1
MDSR1
MRXD4
MCTS1
MRI
RTS1
20
21
DTR1
14
13
12
U7
MAX3243/SO
RXD1
FORCEON
FORCEOFF
GND
25
VCC
P2
5
9
4
8
3
7
2
6
1
MRI
MDTR1
MCTS1
MTXD4
MRTS1
MRXD4
MDSR1
MDCD1
9 PIN 'D' M
L5
MTXD4
LED
R32
L4
1.5K
VCC
MRXD4
LED
[ 149 ]
U6
ICL232
1
C19
0.1MF/C
3
4
C20
0.1MF/C
VCC
C1-
V+
C2+
V-
C2T1IN
R1OUT
T2IN
R2OUT
GND
T1OUT
R1IN
T2OUT
R2IN
16
C18
0.1MF/C
2
6
C21
0.1MF/C
15
14
13
7
8
TXD3
RXD3
5
11
12
10
9
C1+
J1
JMP
1
J2
JMP
P1
TXD0
5
9
4
8
3
7
2
6
1
RXD0
TXD3
RXD3
9 PIN 'D' M
L3
TXD3
LED
L2
R28
1.5K
+3.3V
RXD3
LED
[ 150 ]
VCC
R26
R12
1.2K
DC1
100nF
R11
120E
J6
JMP-2
CAN_RX
CAN_TX
1.2K
L7
LED
L6
LED
U5
MCP2551
VCC
3
5
4
1
R18
RD1
TD1
VCC
VREF
0E
P4
RXD
TXD
CANH1
CANL1
7
6
CANH
CANL
2
8
GND
RS
1
2
3
R13
J801-3
10K
CAN PORT - I
+3.3V
VCC
R27
R14
1.2K
120E
DC2
100nF
R15
J7
JMP-2
CAN_RX
CAN_TX
1.2K
L8
LED
L9
LED
U8
MCP2551
VCC
3
5
R25
RD2
TD2
VCC
VREF
4
1
0E
P5
RXD
TXD
CANH2
CANL2
7
6
CANH
CANL
2
8
GND
RS
1
2
3
R24
J801-3
10K
CAN PORT - II
JOYSTICK SECTION . . .
VCC
RN2
R85
470
VCC
2 R82
1
3
C47
10K
100nP
2
R136
100K
C46
47pF
CENTER
U16
MCP601
6
R81
MIC_IN
100
R84
470K
R164
+3.3V
A<1>
330
UP
330
6
C<3>
R168
33K
R163
COMMON<5>
E<2>
3
DOWN
4
5
D<6>
RIGHT
RIGHT
JOYSTICK
C44
47pF
47pF
B<4>
ZD1
BZV55C2V4
C45
4
8
AUDIO JACK
LEFT
R87
100K
P24
+3.3V
33K
JS1
100nF
R83
10K
8
7
6
5
DC22
+ C88
7
1
47uF/6.3V
+3.3V
1
2
3
4
LEFT
CENTER
DOWN
UP
ZD2
BZV55C2V4
R86
100K
P20
J18
P0.8
R49
2
JMP-2
270E
VCC
PS/2 KEYBOARD
R48
270E
EXT
C51
LS1
10E
+
R137
AOUT
J17
JMP-2
R91
33K
U17
LM386
SPEAKER
P0.7
3
7
6
A_OUT
EXT INT
10uF/16V
INT
1 J32
JMP-2
10
C89
.1uF
C49
1
8
4
C53
R88
C50
.1uF
47nF
AUDIO JACK
.1uF
+
10uF/16V
J33
JM-3
R90
1K
2
C52
2
1
3
VCC
P25
1
2
3
4
5
6
C90
33nF
A_OUT
[ 151 ]
6
7
4
SCL
INT
U23
PCF8574
C63
22pF
U20
PCF8583
1
2
3
4
5
6
7
8
RN1
XTAL1
XTAL2
A0
VSS
SDA
VCC
1
2
Y4
32.768KHz
3
5
8
1
2
3
4
SA0
SB0
SC0
SD0
8
7
6
5
3.3K RN
SDA0
16
15
14
13
12
11
10
9
VDD
SDA
SCL
INTP7
P6
P5
P4
VCC
SDA0
SCL0
RN6
1
2
3
4
3.3K RN
8
7
6
5
SDP0
SG0
SF0
SE0
C64
22pF
DC24
0.1MF
CMOS VCC
A0
A1
A2
P0
P1
P2
P3
VSS
DISP1
DC23
0.1MF/C
+3.3V
+3.3V
+3.3V
CC2
F
G
E
D
D_CC
SF0
SG0
SE0
SD0
+3.3V
CC2
a
F f g
G
E e
d
D
A
B
C
DP
CC1
SA0
SB0
SC0
SDP0
D_CC
LTS543
U19
24LS256
1
2
A
B
C
c DP
dpCC1
b
A0
A1
VCC
Q
A2
Q
COUT
GND
R92
3.3K
8
7
6
5
R93
3.3K
VCC
SCL0
SP5
SMD PAD
2
SDA0
D_CC
I2C SECTION . . .
U18
15
14
13
1K
C55
C56
100nF
1K
R101
R100
1K
R98
R99
1K
R96
R97
C57
100nF
1K
G_SEL1
G-SEL2
#SM
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
1
2
12
+3.3V
R102
1K
+3.3V
+3.3V
VDD
VSS
3
DC3
100nF
MMA7260Q
Z_OUT
Y_OUT
X_OUT
1K
100nF
5
6
7
8
9
10
11
16
XOUT
YOUT
ZOUT
CAN PORT - I
SD CARD SECTION...
J40
2
WP
1
JMP-2
SD1
WP1
WP2
CD/DAT3/CS
CMD/DI
VSS1
VDD
CLK
VSS2
DAT0
DAT1
DAT2
CP1
CP2
10
R145
33K
14
R143
2K
MCIDAT3
MCICMD
+3.3V
+3.3V
MCIDAT3
R139
33K
3
BD3
4
5
1
MCICLK
+ C58
47uF/6.3V
6
7
8
9
13
R95
MCIDAT0
R146
MCIDAT1
MCIDAT1
R147
MCIDAT2
MCIDAT2
R138
MCIDAT0
R144
33K
15
2
470nH
+3.3V
R94
330
2K
33K
33K
33K
L14
LED
C54
18pF
SD CARD
CP
J41
1 JMP-2 2
[ 152 ]
TRACE...
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
RSTTDO
RTCK
TCK
TMS
TDI
TRST
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
TRACECLK
P2.9
+3.3V
P2.8
TRACEPKT2
TRACEPKT1
TRACEPKT0
TRACESYNC
PIPESTAT2
PIPESTAT1
PIPESTAT0
TRACE
J19
R135
1
JMP-2
10K
P27
10K
1
2
3
4
+3.3V
TRST
TDI
TMS
TCK
RTCK
TDO
RST-
TRST
TDI
TMS
TDO
RN7
R148
TCK
R142
10K
R157
1 J39
RTCK
10K
10K
2
4
6
8
10
12
14
16
18
20
JTAG
10K
JTAG SECTION...
JMP-2
+12V
P11
J801-3
+12V
RL1
P12
1
2
3
NC1
COM1
NO1
COM2
NC2
NO2
RELAY SPDT
D15
COIL1
COIL2
Q2
SL100
1N4001
1
2
3
+3.3V
J801-3
R19
100E
P3.24
RL2
NC1
COM1
NO1
COM2
NC2
NO2
D16
COIL1
COIL2
RELAY SPDT
Q3
SL100
1N4001
8
7
6
5
1
3
5
7
9
11
13
15
17
19
R141
+3.3V
TRACESYNC
R33
100E
P3.26
RELAY SECTION . . .
[ 153 ]
+5V_USB
BD4
1uH
C71
0.1uF
R20
USB PORT
1.5K
5
4
+5V_USB
27
Y1
28
32
1
2
31
6MHZ
C79
27pF
C80
27pF
30
3
26
13
USBDP
RSTOUT#
RESET#
XTIN
TXDEN
TXLED#
RXLED#
XTOUT
EECS
EESK
EEDATA
TEST
FT232BM
PWRCTL
PWREN#
SLEEP#
25
24
23
22
21
20
19
18
SW2
C81
0.1uF
RXD0
TXD0
1
2
AVCC
VCC1
VCC2
VCCIO
USBDM
GND2
TXD
RXD
RTS#
CTS#
DTR#
DSR#
DCD#
R1#
J9
JUMPER
J11
JUMPER
1
2
1
2
J10
RTS JUMPER
CTS
R42
RST
330E
D11
BAT54
DSR
DCD
RI
16
12
11
14
15
10
17
27E
GND1
27E
R22
AGND
R21
3V3OUT
29
1
2
3
4
+3.3V
DC8
0.1uF
R119
22K
U11
DC7
0.1uF
0.1uF
C29
C27
33nF
P3
DC6
0.1uF
R23
470E
USB SECTION . . .
IR1
TFDU4100
C73
VCC
TXD
8.2K
TDIR
D3
D4
D5
D6
FR107
U9
L298N
8.2K
9
.1uF
FR107
C77
FR107
C74
.1uF
FR107
+3.3V
MOTOR VCC
10uF/16V
10K
R111
SC
R167
R110
11
2
RXD
R106
10K
RDIR
+3.3V
+3.3V
MOTOR VCCJMP3
10
13
12
D7
D8
D9
D10
FR107
FR107
14
R105
10K
TDIR
IR SECTION . . .
P17
+12V
C1
1uF(TAN)
+
R108
R6
56K
27K
-12V
-12V
DC4
Q1
AD590
0.1MFD
TP1
100K
TEMP I/P
U24
OP07
6
R109
1K
TEMP I/P
P8
1
2
J801 - 2PIN
7
1
C67 +
1uF(TAN)
-12V
1
2
J801 - 2PIN
4
8
P9
DC5
0.1MFD
+12V
K5
LC_LED7
LC_LED6
LC_LED5
LC_LED4
LC_LED3
LC_LED2
LC_LED1
LC_LED0
SW0
SW1
SW2
SW3
SW4
SW5
SW6
SW7
K1
K2
K3
K4
VCC
+12V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
K6
VCC
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P2.8
P2.9
P0.24
P0.23
K7
SPI_CS1
SPI_CS2
TDIR
RSTRST
+3.3V
VCC
-12V
HEADER
P7
1
2
J801-2
MOTOR VCC
1
2
3
4
FR107
C65
RN3
8
7
6
5
3.3K
100nF
100nF
C66
10K
1
2
3
4
5
3
7
1K
R107
1
2
FR107
10K
8
7
6
5
R104
1
2
3
4
15
1
2
6
5
8
IRED_ANODE
IRED_CATHODE
VCC1
NC
GND
IO_P0.6
IO_P0.7
IO_P0.8
IO_P0.9
VCC
SP2
P6
5 PIN RMC
RN4
[ 154 ]
VCC
+3.3V
+12V
MOSI1
SSEL1
SPI_CS1
P18
2
4
6
8
10
12
14
16
18
20
VCC
1
3
5
7
9
11
13
15
17
19
VCC
+3.3V
+12V
+3.3V
-12V
SCK1
MISO1
SPI_CS2
SPI_CS3
SCK1
MOSI1
(LEFT CONNECTOR)
2
4
6
8
10
12
14
16
18
20
VCC
+3.3V
-12V
SPI_CS5
SPI_CS4
RST-
(RIGHT CONNECTOR)
HIGH SPEED ADC & DAC . . .
P15
1
3
5
7
9
11
13
15
17
19
P0.4
P0.2
P0.3
P13
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
+3.3V
P2.2
P2.1
RSTRXD1
TXD1
2
4
6
8
10
12
14
16
18
20
P0.5
(RIGHT CONNECTOR)
(LEFT CONNECTOR)
ZIG BEE SECTION . . .
P28
C60
0.1MF
3
C61
4
0.1MF
OLED_TXD
OLED_RXD
C1-
V+
C2+
V-
C2T1IN
R1OUT
T2IN
R2OUT
GND
T1OUT
R1IN
T2OUT
R2IN
16
C59
0.1MF
OLED_RXD
OLED_TXD
VCC
HEADER 5
6
C62
0.1MF
15
14
13
7
8
+3.3V
J8
1
2
3
1
2
3
P2.2
SW
JMP-2
OLED SECTION . . .
VCC
J35
JMP-2
J34
5
11
12
10
9
C1+
RST-
1
2
3
4
5
+3.3V
U21
ICL232
+3.3V
J5
RXD1 TXD1
1
2
3
BR
VCC
R103
1K
SP6
SMD PAD
VCC
-10V
SP7
SMD PAD
-10V
VCC
VCC
BR
RS
DIOW
LCD_EN
LC_LED0
LC_LED1
LC_LED2
LC_LED3
LC_LED4
LC_LED5
LC_LED6
LC_LED7
CS1
CS2
LCD RST-
P2.1
SW
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
J42
JMP-3
TP2
10K
LCD2
1
2
3
-12V
LCD RST-
G_LCD DISPLAY
[ 155 ]
VCC
BR
RS
DIOW
LCD_EN
LC_LED0
LC_LED1
LC_LED2
LC_LED3
LC_LED4
LC_LED5
LC_LED6
R89
LC_LED7
1K
VCC
RST-
VCC
N_LCD DISPLAY
VCC
1
3
5
7
9
11
13
15
17
19
RXD1
TFT_MOSI
TFT_SCK
+3.3V
VCC
2
4
6
8
10
12
14
16
18
20
TXD1
TFT_MISO
TFT_CS
+3.3V
P0.5
TFT_MOSI
P0.4
TFT_MISO
P0.3
TFT_SCK
P0.2
TFT_CS
J22
JM-3
2
MOSI1
MISO1
SCK1
SSEL1
J23
JM-3
J24
JM-3
J25
JM-3
[ 156 ]
+12V GENERATION . . .
IND2
100uH
U26
MC34063A
1
2
3
D1
C69
IN5819
SW_CO
DR_CO
SW_EM
180E
7
Lpk_S
CT
VCC
GND
R114
R118
1E
CI_I/P
470pF
VCC
C76
100/16V
+
R117
+12V
47K
C70 +
100uF/16V
R113
5.6K
-12V GENERATION . . .
U25
MC34063A
1
2
3
IND3
100uH
IND1
100uH
C68
D2
SW_CO
DR_CO
SW_EM
Lpk_S
CT
GND
VCC
CI_I/P
8
7
6
R112
1E
470pF
VCC
IN5819
+
R116
-12V
680
+
100uF
C78
C72
100
R115
20K
[ 157 ]
C11
10MF/16V
U3
LM317
3
+3.3V GENERATION . . .
VIN
VOUT
ADJ
VOUT
ADJ
VIN
VCC
U2
LM317
3
C14
10MF/16V
+2.5V GENERATION . . .
VCC
+3.3V
+
R17
100E
C9
470MF/35V/E
C10
10MF/16V/E
+2.5V
C3
0.1mF
+
R9
100E
R8
120E
C12
+
470MF/35V/E
C13
10MF/16V/E
C4
0.1mF
R4
10E
R3
47E
U1
LM317
3
+1.8V GENERATION . . .
VIN
C8
10MF/16V
VOUT
VCC GENERATION . . .
ADJ
VOUT
ADJ
C17
10MF/16V
VIN
+9V
U4
LM317
3
VCC
+1.8V
+
R10
100E
C15
470MF/35V/E
C16
10MF/16V/E
VCC
C5
0.1mF
+
R16
330E
R5
47E
C6
+
470MF/35V/E
C7
10MF/16V/E
C2
0.1mF
R7
330E
R2
330E
VCC
D13
1N4148
L1
LED
CMOS VCC
R140
15E
BT1
D14
1N4148
R1
330E
SP1
1
2
3
1
2
3
+9V
VCC
SMD PAD
(POWER ON LED)
VCC
SW1
1
2
3
1
2
3
P10
VCC
GND
CASIO SOCKET
POWER ON/OFF SW
[ 158 ]
APPENDIX B
COMPONENT LAYOUT
[ 159 ]
[ 160 ]