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Timing corners
Each timing corner has two half-corners:
Early : setup capture, hold launch
Late : setup launch, hold capture
Corresponds to late early in some SDC commands
All half-corners
Considered for skew fixing i.e. detailed buffer size, place
adjustment to close on skew targets
2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.
2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.
2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.
2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.
These settings
typically required on
harder 28nm
designs.
Preparation
Start CCOpt session and load visualization files:
hostname$ cd CTSLAB4
hostname$ ccopt
ccopt% load_visualization SAMPLE/sc_skew.viz.gz
ccopt% load_visualization SAMPLE/mc_skew.viz.gz
Sample report files:
SAMPLE/sc_skew.rpt
SAMPLE/mc_skew.rpt
SAMPLE/sc_trees.rpt
SAMPLE/mc_trees.rpt
SAMPLE/mc_full.log
2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.
Activities
Examine the multi-corner CTS log, examples:
Clock tree balancer configuration for
skew_group:clk_fast/func_mode ...
Skew group summary at end of CTS ...
2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.
2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.
2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.
Summary
Multi-corner balancing configuration
Insertion delay variation in skew clock tree visualization
Default AZTCL script written by ccoptDesign cts
configures for multi-corner balancing
CTS automatically infers skew targets for corners which are not set
2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.
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2013 Cadence Design Systems, Inc. Cadence confidential. Internal use only.