Aug2014 PELab

ITER, ELECTRICAL ENGINEERING (SOA University)
Experiment No-1.
Aim of the Experiment: To Study the static V-I characteristics of SCR.
Apparatus Required: 1. Static characteristic SCR Module.
2. Multi meters - 3 numbers.
3. Patch Chords.
Circuit Diagram:
PE-LAB Manual of Department Of Electrical Engineering
Theory: In V-I characteristics there are three states of operation

i. Reverse blocking mode.
ii. Forward blocking mode.
iii. Forward conduction mode.
The characteristics curve is shown in fig.
Reverse Blocking Mode:
When cathode is more positive with respect to anode with switch S open, then
SCR is told to be in reverse blocking mode.
In this mode, junction J1 & J3 are reverse biased & junction J2 is forward biased.
A small leakage current will flow.
This is called off-state of thyristor.
When reverse voltage is more than a critical value known as V BR, then J1 & J3
junction will be forced fully breakdown & a huge amount of current flow. So high power
loss in SCR occurs & heat will generate which will damage the SCR. Hence reverse
voltage < VBR.
In reverse mode SCR offers high impedance, so it acts as open circuit.


Forward Blocking Mode:
In this mode anode is made positive with respect to cathode with switch S open.
In this mode, junction J1 & J3 are forward biased & junction J2 is reverse biased.
In this mode a small current called forward leakage current flows.
When forward voltage increases then at certain voltage VBO, J2 junction will
breakdown & conduction takes place.
When Va < VBO, the SCR offers high impedance & acts as open circuit.
Forward Conduction Mode:
First SCR should be forward biased & switch S should be closed.
When gate pulse is applied then SCR conducts at certain voltage less than V BO &
gate current (Ig) is inversely proportional to VBO.
Voltage drop across SCR is very small & SCR offers low impedance i.e. short
circuit.
When Ia > IL, then SCR conducts where

IL is the latching current defined as the amount of anode current above which SCR
conducts & acts as low impedance circuit or SCR jumps from forward blocking state to
forward conduction state.
IH is the holding current defined as the amount of anode current below which SCR jumps
to forward blocking region from forward conduction state and acts as high impedance
path.
IL > IH.
Procedure:
1.
Connect the circuit as per the circuit diagram.
2.
Switch ON the 230V ac supply.
3.
Now vary the gate current (Ig) and keep to a fix value.
4.
Now slowly vary the anode-cathode voltage (VAK) by varying supply voltage till
the thyristor get turned ON (means VAK=1volt), now switch off the gate current if still
VAK= 1volt then find out the corresponding supply voltage and anode current. The supply
voltage will be VBO and anode current will be IL. if after gate switch off VAK =VS that
means thyristor is not latch up. So again switch on the gate and increase the supply to
obtain VBO and IL.

5.
Further increase the VAK and note the anode current.
6.
Then decrease the VAK and take the anode current till the thyristor voltage is not
equal to supply. The moment Vs=VAK take the anode current just before that , that is the
holding current.
7.
By various gate current follow the same procedure.
8.
Then plot the graph between VAK and IA with different gate current.
Tabulation:
For a value of Ig.
SL NO.
VAK
IA(amp)
Result Analysis:
1.
2.
3.
4.
5.
Find the latching current.

Find the holding current.
Find the break over voltage.
Show with increase of gate current, break over voltage decreases.
Also find the ratio of IL/IH.
Questions:
1.
2.
3.
4.
5.
6.
What do you mean by VBO, IL, IH.

How the VBO is affected by gate current.
Thyristor is a voltage or current or charge control device, justify.
Why thyristor is called semi controlled device.
What is the basic difference between the diode and Thyristor in V-I characteristic?
For what period gate supply should be given.

Experiment No-2:
Aim of the experiment: To study the operation of the R, R-C & UJT triggering circuit in
application with a single phase half wave controlled rectifier.
Apparatus Required:
1.
2.
3.
4.
R, R-C,UJT firing circuit model.

CRO
Loading Rheostat.
Digital Multimeter.
Circuit Diagrams:

Theory:
Uni-junction transistor (UJT):
B2
B2
Eta-point
RB2
Eta-point
p-type
RB1
n-type
RB2
B2
Ve
VBB
RB1
Ie
VBB
-
B1
B1
(a)
(b)
B1
(c)
(a) Basic structure of UJT(b) Symbolic representation (c) Equivalent circuit

UJT is an n-type silicon bar in which p-type emitter is embedded. It has three terminals
base1, base2 and emitter E. Between B1 and B2 UJT behaves like ordinary resistor and
the internal resistances are given as RB1 and RB 2 with emitter open RBB RB1 RB 2 . Usually
the p-region is heavily doped and n-region is lightly doped. The equivalent circuit of UJT
is as shown. When VBB is applied across B1 and B2 , we find that potential at A is
VAB1
VBB RB1
RB1
VBB
RB1 RB 2
RB1 RB 2
is intrinsic stand-off ratio of UJT and ranges between 0.51 and 0.82. Resistor RB 2 is
between 5 to 10K.
Operation:
When voltage VBB is applied between emitter E with base 1 B1 as reference and the
emitter voltage VE is less than VD VBE the UJT does not conduct. VD VBB is

designated as VP which is the value of voltage required to turn on the UJT. Once VE is
equal to VP VBE VD , then UJT is forward biased and it conducts.
The peak point is the point at which peak current I P flows and the peak voltage VP is
across the UJT. After peak point the current increases but voltage across device drops,
this is due to the fact that emitter starts to inject holes into the lower doped n-region.
Since p-region is heavily doped compared to n-region. Also holes have a longer life time,
therefore number of carriers in the base region increases rapidly. Thus potential at A
falls but current I E increases rapidly. RB1 acts as a decreasing resistance.
The negative resistance region of UJT is between peak point and valley point. After
valley point, the device acts as a normal diode since the base region is saturated and RB1
does not decrease again.
Negative Resistance
Region
V
Cutoff e
region
VBB
Vp
Saturation
region
R load line
Peak Point
Valley Point
Vv
0 Ip
Iv
Ie
Fig 3.22 V-I Characteristics of UJT

vO
Resistance triggering:
LOAD
A simple resistance triggering circuit is as

shown. The resistor R1 limits the current
through the gate of the SCR. R2 is the variable
resistance added to the circuit to achieve
control over the triggering angle of SCR.
Resistor R is a stabilizing resistor. The
diode D is required to ensure that no negative
voltage reaches the gate of the SCR.
R1
R2
vS=Vmsint
VT
Vg
Circuit diagram for resistance firing

Design
With R2 0 , we need to ensure that
Vm
I gm , where I gm is the maximum or peak gate
R1
current of the SCR. Therefore R1
Vm
.Also with R2 0 , we need to ensure that the
I gm
voltage drop across resistor R does not exceed

Vgm
Vm R
R1 R
Vgm R1 Vgm R Vm R
Vgm R1 R Vm Vgm
R
Vgm , the maximum gate voltage
Vgm R1
Vm Vgm
Operation:
Case 1: Vgp Vgt
Vgp , the peak gate voltage is less then Vgt since R2 is very large. Therefore, current I
flowing through the gate is very small. SCR will not turn on and therefore the load

voltage is zero and vscr is equal to Vs . This is because we are using only a resistive
network. Therefore, output will be in phase with input.
Case 2: Vgp Vgt , R2 optimum value.
When R2 is set to an optimum value such that Vgp Vgt , we see that the SCR is triggered at
90 0
(since Vgp reaches its peak at 900 only). The waveforms shows that the load voltage is
zero till 900 and the voltage across the SCR is the same as input voltage till it is triggered
at 900 .
Case 3: Vgp Vgt , R2 small value.
The triggering value Vgt is reached much earlier than 900 . Hence the SCR turns on earlier
than VS reaches its peak value. The waveforms as shown with respect to Vs Vm sin t .
At
t ,VS Vgt ,Vm Vgp Vgt Vgp sin
Therefore
sin 1
But
Vgp
Therefore
sin 1
Vgt
V
gp
Vm R
R1 R2 R
Vgt R1 R2 R
Vm R
Since Vgt , R1 , R are constants R2

Resistance capacitance triggering:
RC HALF WAVE
vO
LOAD
Capacitor C in the circuit is connected

to shift the phase of the gate voltage. D1
is used to prevent negative voltage from
reaching the gate cathode of SCR.
D2
vS=Vmsint
VC
VT
-
D1
10

In the negative half cycle, the capacitor charges to the peak negative voltage of the
supply Vm through the diode D2 . The capacitor maintains this voltage across it, till the
supply voltage crosses zero. As the supply becomes positive, the capacitor charges
through resistor R from initial voltage of Vm , to a positive value.
When the capacitor voltage is equal to the gate trigger voltage of the SCR, the SCR is
fired and the capacitor voltage is clamped to a small positive value.
Case 1: R Large.
When the resistor R is large, the time taken for the capacitance to charge from Vm to Vgt
is large, resulting in larger firing angle and lower load voltage.
Vmsint
vs
Case 2: R Small
-/2 0
When R is set to a smaller value,

the capacitor charges at a faster rate
towards Vgt resulting in early
-/2 0
0
a
vo
vc
triggering of SCR and hence VL is

more. When the SCR triggers,
Vmsint
Vgt
vs
V gt
vc
vo
t
vT
vc
Vm
vc
Vm
t
vT
Vm
-Vm
-Vm
the voltage drop across it falls to 1

(a)
(b)
1.5V.
This in turn lowers, the
voltage across R & C. Low voltage across the SCR during conduction period keeps the
capacitor discharge during the positive half cycle.
(2+)
DESIGN EQUATION From the circuit VC Vgt Vd1 . Considering the source voltage and
the gate circuit, we can write vs I gt R VC . SCR fires when vs I gt R VC that is
vS I g R Vgt Vd1 . Therefore R
vs Vgt Vd1
I gt
. The RC time constant for zero output voltage
T
that is maximum firing angle for power frequencies is empirically gives as RC 1.3 .
2
11

Procedure:
Resistance Triggering:
1.
Connect the input power cable from the supply to the trainer kit.
2.
Connect one end of the load rheostat to the anode of SCR in triggering module.
3.
Connect other end of the load rheostat to the supply and cathode of SCR to other
end of supply.
4.
Connect the triggering circuit across the gate cathode of SCR using patch cords.
5.
Switch on the power supply to trainer and observe & trace the wave form of gatecathode voltage and output voltage across the load for different firing angle by varying
the rheostat.
R-C Triggering:
1.
Connect the input power cable from the supply to the trainer kit.
2.
3.
end of supply.
4.
Connect the triggering circuit across the gate cathode of SCR using patch cords.
5.
the rheostat.
UJT Triggering:
1.
Connect the G1, K1 terminals of the UJT to gate-cathode terminals of SCR.
2.
3.
end of supply.
4.
the rheostat.
12

Tabulation:
For different triggering circuits
Firing angle
Measured Vload
Calculated Vload
Result Analysis:
1. Check how the firing angle in each triggering is controlled.
2. Trace load voltage, thyristor voltage and gate-cathode voltage in each triggering
case.
3. Check whether for same firing angle for each triggering circuit load voltage
changes or not.
4. Check in which triggering gate loss is minimum.
Questions:
1.
2.
3.
4.
5.
6.
What are the drawbacks of resistance triggering?

What are the drawbacks and advantages of R-C triggering?
Why we will prefer UJT triggering circuit than the other two.
What do you mean by snow-balling effect?
In which region UJT operates.
Is the load voltage is affected by triggering circuit or not.
13

Experiment No-3:
Aim of the experiment: To study the operation of 1-phase full-bridge and 1-phase semi
controlled rectifiers for R, R-L and R-L-FD load.
Apparatus required:
1.
2.
3.
4.
5.
6.
1-phase SCR bridge converter kit.

Patch cords.
CRO.
DC Voltmeter.
CRO Probe.
Multimeter.
Circuit Diagram:
14
Theory:
In continuous mode: T1 & T2 both conduct from wt = to ( + ).

T3 & T4 conduct from ( + ) to (2 + ).
15

In discontinuous mode: T1 & T2 conduct from wt = to . For R load = .
T3 & T4 conduct from ( + ) to ( +).
From to ( + ) and ( +) to (2 + ) all the thyristors are in off state.V0 = 0
For continuous mode:
< wt < ( + ) --- I0 will flow through the path VS-T1-load-T2-VS.VT1 = VT2 = 0 , V0 =
VS , I0 = IT1 = IT2 = IS .
( + ) < wt < (2 + ) --- I0 will flow through the path VS-T3-load-T4-VS. VT3 = VT4 = 0
,V0 = -VS , I0 = IT3 = IT4 = -IS.
For discontinuous mode:

< wt < --- I0 will flow through the path VS-T1-load-T2-VS. VT1 = VT2 = 0, V0 = VS , I0
= IT1 = IT2 = IS .
< wt < ( + ) --- V0 = 0. I0 = IT1= IT2= IS = 0, VT1= VT2 = VS.
( + ) < wt < ( + ) --- I0 will flow through the path VS-T3-load-T4-VS. VT3 = VT4 = 0,
V0 = -VS ,
I0 = IT3 = IT4 = -IS.
( + ) < wt < (2 + ) --- V0 = 0. I0 = IT3= IT4= IS = 0, VT3= VT4 = -VS.
For continuous mode: circuit turn off time of thyristor tc = ( - )/w sec.
For discontinuous mode: circuit turn off time of thyristor tc = (2 - )/w sec.
Comment: Load current is always positive but source current is alternative.
16
(
)
) , X = wL.
. Where
For continuous mode:

Average output voltage V0
Average load current, I0= V0/R.

(
Rms output voltage Vor
Rms value of current Ior =( Vor / R).

Power delivered to load = Vor Ior.
Input volt amperes = (rms source voltage) (total rms line current) = VS* Ior.
Input power factor = (power delivered to load / input VA)
For discontinuous mode:
Average output voltage V0
Average load current, I0= V0/R.

Rms

output
(
voltage
Vor
)
Rms value of current Ior =( Vor / R).

Power delivered to load = Vor Ior.
Input volt amperes = (rms source voltage) (total rms line current) = VS* Ior.
Input power factor = (power delivered to load / input VA) .
Procedure:
1. Connection should be done according to circuit diagram.
2. Switch on the trainer power switch and then switch on the 24V AC switch and triggering
switch.
17

3. Vary the output voltage by varying the firing angle step by step and trace the output
voltage and thyristor voltage.
4. For each reading calculate the average output voltage and measured the same by multi
meter.
5. Then calculate the % error for each firing case and draw a plot between firing angle VS
error.
Tabulation: For R-load, R-L Load, R-L with FD.
Sl
no
Firing
angle
Calculated Avg
output Voltage
Measured Avg
output Voltage
%error
Result Analysis:
1. Verify that the Avg output voltage of R-load and R-L with FD is same for all firing
angles.
2. Verify that the continuity of load current depends on load inductance.
3. Verify that FD improves Avg output voltage for R-L Load.
4. Trace the output voltage, thyristor voltage, load current for different load at a
constant firing angle.
Questions:
1.
2.
3.
4.
5.
6.
7.
How the load current nature depends on load inductance.

How the Avg output voltage depends on load.
What do you mean by firing angle, extinction angle and conduction angle?
What is the need of freewheeling diode?
How the semi converter is superior to full converter.
For which load we will get line commutated inverter operation.
What do you mean by continuous and discontinuous mode of operation of ac to dc
converter?
8. What is the advantage of bridge converter over mid-point converter?
18

Experiment No-4:
Aim of the experiment: To study the different commutation techniques of thyristor.
Apparatus Required:
1. Thyristor forced commutated trainer.
2. CRO & CRO Probe.
3. Patch Cords.
Circuit Diagrams:
Load Commutation Circuit Diagram
Current Commutation Circuit

19
Complementary Commutation Circuit
Voltage Commutation Circuit
Theory:
Self commutation or load commutation or class A commutation:
In this type of commutation the current through the SCR is reduced below the holding
current value by resonating the load. i.e., the load circuit is so designed that even though
the supply voltage is positive, an oscillating current tends to flow and when the current
through the SCR reaches zero, the device turns off. This is done by including an
inductance and a capacitor in series with the load and keeping the circuit under-damped.
This type of commutation is used in Series Inverter Circuit.
Expression for current
At t 0 , when the SCR turns ON on the
application of gate pulse assume the current
in the circuit is zero and the capacitor
voltage is VC 0 .
Vc(0)
+ -
Load
20

I S
s 2 2
A
Taking
i t
inverse
e
Laplace
C
L
Current i
inverse
0
sin t
/2
2V
Note: For effective commutation the circuit

should be under damped.
Capacitor voltage
t
2
1
R

2L LC
That is
Gate pulse
With R = 0, and the capacitor initially

uncharged that is VC 0 0
i
V
t
sin
But
L
LC
1
LC
t
V
V
t
C
t
Therefore i
LC sin
V
sin
L
L
LC
LC
Voltage across SCR
and capacitor voltage at turn off is equal to nearly 2V.
Conduction time of SCR
Current commutation:
Assume load current to be constant.
Mode-1:
Main thyristor is fired. Load current flows through VS-Tm-load-VS.

V0 = VS. I0 = ITm.
Capacitor cant discharge as D2 is reverse biased. So capacitor holds its
potential till auxiliary thyristor is not fired.
The moment Ta is fired capacitor starts discharging through the path C-Ta-L-C.
&
).
Capacitor again recharged to opposite polarity with -VS. The moment capacitor
is recharged to opposite polarity the auxiliary thyristor will turn off.
21
Mode-2:
Now the capacitor voltage forward bias the diode D2 and IC flows through the
path C-L-D2-Tm-C.
V0 = VS + VTm.
This capacitor current opposes the thyristor current.
When the capacitor current value becomes equal to thyristor current main
thyristor will turn off.
Unless Tm is not turn off D1 cant conduct as voltage drop across Tm reverse bias
the D1.
The moment Tm will turn off IC flows through the path C-L-D2-D1-C and load
current through the path VS-C-L-load-VS. ID1 = IC I0. V0 = VS + VD1.
When capacitor current decreases to I0 then ID1 becomes 0. And D1 will off.
Then I0 = IC till capacitor is not recharged to original polarity.
The moment capacitor charges to original polarity up to VS. IC = 0 and I0 will
circulate through FD.V0 = 0.
V0 fluctuation is almost negligible.
Design:
(
(
)
(
)
22
Complementary-commutation: In complementary
commutation the current can be transferred between
two loads. Two SCRs are used and firing of one
SCR turns off the other. The circuit is shown in
figure 3.31.
IL
R1
R2
ab
iC
The working of the circuit can be explained as

follows.
C
T1
T2
Initially both T1 and T2 are off; Now, T1 is fired.

Load current I L flows through R1 . At the same time, the capacitor C gets charged to V
volts through R2 and T1 (b becomes positive with respect to a). When the capacitor
gets fully charged, the capacitor current ic becomes zero. To turn off T1 , T2 is fired; the
voltage across C comes across T1 and reverse biases it, hence T1 turns off. At the same
time, the load current flows through R2 and T2 . The capacitor C charges towards V
through R1 and T2 and is finally charged to V volts with a plate positive. When the
capacitor is fully charged, the capacitor current becomes zero. To turn off T2 , T1 is
triggered, the capacitor voltage (with a positive) comes across T2 and T2 turns off. The
related waveforms are shown in figure 3.32
23

Expression for circuit turn off time tc :
From the waveforms of the voltages across T1 and capacitor, it is obvious that tc is the
time taken by the capacitor voltage to reach 0 volts from V volts, the time constant
being RC and the final voltage reached by the capacitor being V volts. The equation for
capacitor voltage vc t can be written as
vc t V f Vi V f e t
Where V f is the final voltage, Vi is the initial voltage and is the time constant.
At t tc , vc t 0 ,
0 V 2Ve
tc
R1C
R1C , V f V , Vi V ,
tc
R1C
. Therefore V 2Ve . 0.5 e
Taking natural logarithms on both
tc
R1C
ln 0.5
tc
R1C
Therefore 0 V V V e .
tc
. tc 0.693R1C .
R1C
This time should be greater than the turn off time t q of
T1 . Similarly when T2 is
commutated tc 0.693R2C
And this time should be greater than t q of T2 . Usually R1 R2 R .
Voltage / Auxiliary-commutation:
Initially it is assumed that capacitor is charged to a

voltage of Edc with polarity shown & T1 & T2 are
initially OFF.
When T1 is ON a load current starts flowing through T1

& V0 = Edc, and capacitor gets a discharging path
through T1 and a resonant current also starts flowing
through C, T1, L,D which changes the polarity of
capacitor voltage to Edc.
24

When T2 turns ON a reverse voltage appears across T1 i.e. the Edc and turns OFF
T1.
Procedure:
For load Commutation:
1. Connection should be done as per the circuit diagram.
2. Switch on the trainer power supply.
3. Switch on the main SCR switch.
For Current Commutation:
3. Switch on the auxiliary SCR then main SCR switch.
4. Keep the frequency knob to one particular frequency and vary duty cycle step by
step and observe, trace the different wave forms.
5. Repeat the same for different frequencies.
For Complementary Commutation:
3. Switch on the auxiliary (T2) SCR then main SCR (T1) switch.
4. Keep the frequency knob to one particular frequency and vary duty cycle step by
For Voltage Commutation:
1.
2.
3.
4.
Connection should be done as per the circuit diagram.

Switch on the trainer power supply.
Switch on the auxiliary SCR then main SCR switch.
Keep the frequency knob to one particular frequency and vary duty cycle step by
25

Result Analysis:
In all commutation we have to find Thyristor voltage, load voltage, capacitor voltage
circuit turn off time. And also compare the result with theoretical result.
Questions:
1. What is the conduction period of thyristor in load commutation?
2. What is the peak current of thyristor. Does it depend on commutating elements or
not, justify.
3. In current commutation what is the conduction period of auxiliary thyristor.
4. What is the peak current of main and auxiliary thyristor.
5. In complementary commutation what is the peak current of thyristor.
6. Whether the voltage across capacitor is alternative or unidirectional.
7. In voltage commutation what is the peak current of thyristors.
8. Is the diode is essential in current commutation.
26
1.
2.
3.
4.
5.
6.
Experiment No-5:
Aim of the Experiment:
To trace the output voltage waveform of Three Phase full wave fully
controlled and semi controlled converter with R, R-L, R-L-E Load with & without FD.
Apparatus Required:
CRO & CRO Probe.
3-Phase Converter module.
50/5A Rheostat.
120mH/4A Inductive load.
Patch cords.
Multimeter.
Circuit
Diagram:
Theory:
It consists of 6 SCRs.
The odd number SCRs are positive group SCRs, even number SCRs are negative group
SCRs,
The difference between each arm SCR is 3.
Supply is given through transformer to provide isolation.
There are 3-arms, each arm consists of two SCRs.
T1, T3 and T5 are called positive group SCRs. T2, T4 and T6 are called negative group
SCRs.
Each arm SCR should be fired after 1800 from each other.
27

Each group SCRs should be fired 1200 apart.
Each SCR can be fired after be forward biased.
T1 can be fired after 300. Let firing angle delay for each SCR is . T1 will conduct at wt =
300 + .
(300 + ) < wt < (900 + ) ---- T1 & T6 are conducting. The load current flows through the
path a-T1-load-T6-b.
(
V0 = Vab = Van Vbn =
(900 + ) < wt < (1500 + ) ---- T1 & T2 are conducting. The load current flows through
the path a-T1-load-T2-c.
(
V0 = Vac = Van Vcn =
(1500 + ) < wt < (2100 + ) ---T3 & T2 are conducting. The load current flows through
the path b-T3-load-T2-c.
(
V0 = Vbc = Vbn Vcn =
the path b-T3-load-T4-a.
(
V0 = Vba = Vbn Van =
the path c-T5-load-T4-a.
(
V0 = Vca = Vcn Van =
(3300 + ) < wt < 3900 + ) ---T5 & T6 are conducting. The load current flows through the
path c-T3-load-T4-b.
(
V0 = Vcb = Vcn Vbn =
Average load voltage is:
) (
28
Vm = maximum phase voltage.

Average load current is: I0 = (V0 / R).
Rms value of output voltage:
Rms value of load current: Ior = (Vor / R).

Assuming load current to be ripple free, rms value of thyristor current:
ITH
( )
Rms value of source current ISr
( )
Procedure:
1.
Connect as per the circuit diagram.
2.
Connect the converter power circuit as shown in figure.
3.
Connect resistive load (lamp-load) across the output terminals of the power circuit.
4.
Keep the MCB in off position.
5.
In control unit side, one firing angle pot is provided. Keep it in minimum position.
6.
Connect the firing pulses terminals to gate-cathode terminals of respective SCRs.
7.
After connection over, give the3-phase supply to the power circuit through the auto
transformer and keep it in minimum position. Then switch on the MCB.
8.
Observe the output and thyristor wave forms on CRO by giving a supply voltage
for different firing. And also trace those waveforms.
9.
Measure the average output voltage and also calculate the average output voltage
and find the error.
29

Observation:
SL.NO
Average Vo in
volt(Measured)
Average Vo in
volt(calculated)
Calculation:
Calculation should be done using this formula
Average load voltage is:
) (
Vm = maximum phase voltage.
Result Analysis:
Check the firing gap of the thyristors, trace the wave forms of thyristor voltage , load
voltage .
Questions:
1. In 3-phase full converter, what is the interval of firing the three SCRs Pertaining to
one group?
o
2. In a 3-phase semi-converter, for firing angle less than or equal to 60 , what is the
conduction angle of each diode & thyristors.
0
0
3. In a 3-phase semi-converter how many output pulses exit for >=60 & <60 .
4. In 3-phase full converter output voltage ripple reduces or increases in comparison
to 1-phse .
0
5. For >=90 what is the average output voltage for R-L load.
30

Experiment No-6:
DC Jones chopper to control o/p average dc voltage at constant frequency
with different duty cycle.
Apparatus Required:
1.
2.
3.
4.
Chopper Circuit Model.

CRO & CRO Probes.
Multimeter.
Patch Cords.
Circuit Diagram:
Theory:
Jones Chopper:
Jones chopper is one kind of voltagecommutated chopper.
Some times in voltage commutated
chopper capacitor does not get
sufficient energy from L to turn-off the
Tm. So commutation failure occurs.
To avoid this type of commutation
failure we have to use coupled coil
instead of single coil.
31

Here L1 and L2 are tightly coupled inductors. They are used for boosting sufficient
energy for capacitor to turn-off Tm.
This coupled coil may be either, secondary windings of autotransformer or center
tapped coil or two reactive coils which are magnetically coupled.
Operation:
Assume load current to be constant.
Initially capacitor is charged to Vs with upper plate positive externally.
When the main thyristor is fired, load current flows through the path Vs-Tm-L2load-Vs and at the same time capacitor discharges through the path C-Tm-L1-D-C.
Capacitor current IC =
o VC =
(
o Thyristor current is ITm = I0 + IC.
Since load current always flowing through L2 and induces an e.m.f in L1. So the
capacitor recharges to a potential (Vc + E)>Vs with lower plate positive. Where E=
induced e.m.f.
The moment capacitor recharged to opposite polarity IC = 0, VC = -(VS+E), ITm =
I0 .
When auxiliary thyristor is fired the capacitor voltage reverse bias the Tm and turn
it off.
Then capacitor discharges through the path C-Ta-L2-load-Vs and again recharge to
original polarity.
Advantages:
We can use higher voltage and lower mF capacitors because the trapped energy in
the inductor L2 can be forced in to the commutating capacitor C rather than simply
charging the capacitor by supply voltage.
On time and off time can be varied individually. So there will be greater flexibility
in control.
Procedure:
1. Switch on the power ON/OFF switch.
2. Power on the switch SW1.
3. Power on the switch SW2.
4. Change the duty cycle keeping frequency constant and measured the average
output voltage of output.
5. Change the frequency keeping duty cycle constant and measured the average
output voltage of output.
32

Tabulation:
SL NO
Frequency
Duty Cycle
Measured
Vo
Calculated
Vo
%error
Calculation:
Average load voltage
(for R and R-L load)
T = Ton + Toff.
To calculate the Ton time we have to take the period from the instant load voltage equal
to the source voltage and end at the instant the load voltage is 33% of the peak value.
Result Analysis:
Trace the thyristor and load voltages and capacitor voltage, check the peak value of load
voltage, also verify that it is a modified voltage commutation circuit. Find the circuit
turns off time of each SCR
Questions:
1.
2.
3.
4.
5.
6.
What is the peak voltage of load?

What is the peak current of main thyristor.
How it is superior to voltage commutated chopper.
Which type of commutation is used?
How the output voltage varying with duty cycle.
In which control we will get small variation of output voltage(between frequency
or pulse width modulation technique) .
33

Experiment No-7:
To determine the output voltage wave form and circuit turn of time of half bridge
series inverter.
Apparatus Required:
1.
2.
3.
4.
SCR series inverter trainer.

Rheostat of 220/1A.
CRO and CRO Probe.
Patch chords.
Circuit Diagram:
Theory:
Series inverter:
Since the commutating components are permanently
connected in series with the load so these inverters are
known as series inverter. The circuit should be underdamped in nature. As current attains zero value due to
34

nature of series circuit this is also known as self-commutated inverters. These inverters
operate at frequency 200HZ-100KHZ. So sizes of commutating components are small.
Applications: 1. Induction heating. 2. Fluorescent lightning.
Basic series inverter:
R is the load resistance. L-C are commutating components. In R-L-C circuit L-C are so
chosen that circuit must be under damp.According to the firing of T 1 and T2 different
frequency of output is obtained.
Mode-1:
When T1 is fired the source or load current will flow through the path source-T1-L-C-Rsource. Io = Is. When Io reaches zero value, capacitor is fully charged to V C .Once
capacitor is fully charged it tries to discharge, the moment capacitor tries to discharge T 1
will turn off. Then after some time Toff, T2 is fired. Toff > thyristor turn off time. Unless
the two thyristors will conduct simultaneously and there is a chance of short circuit of
source and also thyristor will not get sufficient time to regain its reverse blocking
capability. The minimum time gap should be equal to Toff = (
) = dead zone time.
Where w = output frequency and wr = circuit ringing frequency. When T2 is fired then
capacitor discharges through C-L-T2-R-C. Io is ve and = Ic but Is = 0. Capacitor charges
during one half cycle and releases same charge during next half cycle. So positive half
cycle current is identical to negative half cycle current.
Drawbacks:
Load current is taken from the supply during the positive half cycle only. This increases
the peak current rating of dc source. Since source current is only flowing during positive
cycle only, its harmonics content is more pronounced. Maximum operating frequency is
limited within ringing frequency. Load voltage waveform is distorted due to dead zone.
Commutating components have to carry the load current continuously so the rating of L
and C should be high. Amplitude and duration of load current depends on the load circuit
parameters. So inverter suffers from poor output regulation.
35

Modified series inverter:
In this case no requirement of dead zone. As there is no
chance of short circuit of source. Output voltage
waveform is improved. Maximum operating frequency
can be higher than the ringing frequency. But still source
current during positive half cycle. Amplitude of load
current depends on R-L-C value. Harmonics content cant
be reduced.
Half bridge series inverter:
By this process we can overcome some disadvantages of
modified series inverter likeSource current exits for both
positive and negative half cycle. So harmonic contents
reduce. Peak current rating of source decreases. In this case
initially capacitor is charged then capacitor is charged to Vs +
Vco. When T1 is fired capacitor discharges through the path
C-T1-L-R-C. Io is positive. When T2 is fired capacitor
discharges through the path C-R-L-T2-C. Io is negative.
Procedure:
1.
2.
3.
4.
5.
6.

Switch on the power switch.
Switch on the 24V DC switch.
Observe the output wave form and thyristor wave form and trace it .
Determine the thyristor turnoff time.
Tabulate the output frequency and SCR turn off time.
Tabulation:
SL NO
Output frequency
SCR turn-off time
36

Result Analysis:
Trace the thyristor and load voltages and capacitor voltage, find the dead zone. Also find
how dead zone can be minimized to make the load current continuous.
Questions:
1.
2.
3.
4.
5.
6.
What are the drawbacks of basic series inverter?

How can we overcome these drawbacks by modified series inverter?
How half bridge inverter is superior to all?
What are the drawbacks of half bridge series inverter?
What do you mean by dead zone?
How can we make the load current continuous.
37

Experiment No-8:
To study the operation of cycloconverter and observe the output waveforms
for R and R-L Load.
Apparatus Required:
1.
2.
3.
Cycloconverter Module.
CRO & CRO Probe.
Patch Chords.
Circuit Diagram:
Theory:
Output frequency is less than the input frequency. Forced commutation is not required. It
requires only natural commutation. Midpoint Transformer is in the ratio 1:1:1. P 1, P2 are
positive group thyristors because they can only operate when supply is positive. Similarly
N1, N2 are negative group thyristors because they can only operate when supply is
negative.
38

Operation:
There is two mode of operation: 1. Continuous mode. 2. Discontinuous mode.
Continuous mode:
During positive half of supply, P1 and N1 are forward biased.
Similarly During negative half of supply, P2 and N2 are forward biased.
The conduction period of each thyristor is 1800 for continuous conduction.
Let consider an example that f0 = fs/4. For 4 complete input cycles one output cycle is
obtained. Let considered there is a firing angle delay of .
For continuous mode operation the firing scheme is given in the table:
Period.
to ( + )
Operating
thyristor.
P1
Output
voltage Vo
Vs
Period.
Operating
thyristor.
N2
(4 + )to(5 +
)
( + )to(2 +
P2
-Vs
(5 + )to(6 +
N1
)
)
(2 + )to(3 +
P1
Vs
(6 + )to(7 +
N2
)
)
(3 + )to(4 +
P2
-Vs
(7 + )to(8 +
N1
)
)
For discontinuous mode operation the firing scheme is given in the table:
Period.
Operating
thyristor.
Output
voltage Vo
Period.
to
P1
Vs
to ( + )
none
( + )to( +
+ )
( + +
)to(2 + )
(2 + )to(2 +
+ )
(2 + +
)to(3 + )
P2
-Vs
none
P1
Vs
none
(4 + )to(4 +
+ )
(4 + + )to(5
+ )
(5 + )to(5 +
+ )
(5 + + )to(6
+ )
(6 + )to(6 +
+ )
(6 + + )to(7
+ )
Output
voltage Vo
-Vs
Vs
-Vs
Vs
Operatin
g
thyristor.
N2
Output
voltage Vo
none
N1
Vs
none
N2
-Vs
none
-Vs
39

(3 + )to(3 +
+ )
(3 + +
)to(4 + )
Procedure:
1.
2.
3.
4.
P2
-Vs
none
(7 + )to(7 +
+ )
(7 + + )to(8
+ )
N1
Vs
none

Now select the desired firing angle.
For each selected frequency Observe the load output voltage waveform on CRO.
By varying firing angle observe various waveforms.
Tabulation:
Firing angle
Output
Frequency
Measured
voltage
Calculated
voltage
% error
Result Analysis:
Trace the load voltage, thyristor voltage. Check whether the rms value of output changes
with frequency change or not for a particular firing angle.
Questions:
1.
2.
3.
4.
5.
Does the output voltage affected by frequency change.

Which type of commutation is used in step down cycloconverter?
Write some application of cycloconverter.
Does the output voltage depends on load or not, give reason.
Which thyristors are called positive group thyristors and why.
40

Experiment No-9:
To study and trace the phase and line voltage waveform of a IGBT based 3- voltage
source inverter.
Apparatus Required:
1.
2.
3.
4.
5.
Inverter Module and Firing module.

CRO & CRO Probe.
Patch Chords.
Lamp load (3-phase)
Variac.
Circuit Diagram:
41

Theory:
There Phase Voltage Source Inverters:
For providing adjustable frequency power to industrial applications, 3-phase inverters
are more common.
It takes dc supply from battery or rectifier.
It consists of 6 thyristors or IGBTs and 6 diodes. Now a days IGBTs are very popular.
It has three arms, each arm has two switches. The naming of switches is in such a way
that the difference between arm switches is 3.
All the switches are so connected that they all should be forward biased by the dc
source.
A large capacitor is connected across source to provide constant dc voltage and also
suppress the harmonics feed back to dc source.
There are two possible of firing the switches
1. 1800 conduction mode. That is, each switch conducts for 1800.
2. 1200 conduction mode. That is, each switch conducts for 1200.
There phase 1800 mode VSI:
Assumptions:
1. Each switch is considered
as ideal switch.
2. Load is star connected.
3. IGBTs are preferred for
switches.
Each switch conducts for 1800.
There is 1800 firing gap between the arm switches.
42

There should be 1200 gap between positive group switches. That means the firing gap
between S1, S3 and S5 is 1200. Similarly the firing gap between negative group switches
S2, S4 and S6 is 1200.
(0 < wt < 600):
S1, S6 and S5 are conducting. Load current flows through the path VsS1-a-R-n-R-b- S6-Vs and also along the path Vs- S5-c-R-n-R-b- S6-Vs.
(600 < wt < 1200):

S1, S6 and S2 are conducting. Load current flows through the path VsS1-a-R-n-R-b- S6-Vs and also along the path Vs- S1-a-R-n-R-c- S2-Vs.
43
.
(1200 < wt < 1800):
S1, S3 and S2 are conducting. Load current flows through the path VsS1-a-R-n-R-c- S2-Vs and also along the path Vs- S3-b-R-n-R-c- S2Vs.
.
(180 < wt < 240 ):
0
S3, S4 and S2 are conducting. Load current flows through the path VsS3-b-R-n-R-a- S4-Vs and also along the path Vs- S3-b-R-n-R-c- S2-Vs.
.
(2400 < wt < 3000):
S4, S3 and S5 are conducting. Load current flows through the path
Vs- S3-b-R-n-R-a-S4-Vs and also along the path Vs- S5-c-R-n-R-aS4-Vs.
44
.
0
(300 < wt < 360 ):

S5, S4 and S6 are conducting. Load current flows through the path VsS5-c-R-n-R-a- S4-Vs and also along the path Vs- S5-c-R-n-R-b- S6-Vs.
.
The rms value of phase voltage is given by:
The rms value of fundamental component of phase voltage is given by:
There phase 1200 mode VSI:
Assumptions:
4. Each switch is considered
as ideal switch.
5. Load is star connected.
6. IGBTs are preferred for
switches.
45

Each switch conducts for 1200. There is 1800 firing gap between the arm switches.
There should be 1200 gap between positive group switches. That means the firing gap
between S1, S3 and S5 is 1200. Similarly the firing gap between negative group switches
S2, S4 and S6 is 1200.
(0 < wt < 600):

S1and S6 are conducting. Load current flows through the path Vs- S1-a-Rn-R-b- S6-Vs.
(600 < wt < 1200):

S1 and S2 are conducting. Load current flows through the path Vs- S1-a-Rn-R-c- S2-Vs.
46

(1200 < wt < 1800):
S3 and S2 are conducting. Load current flows through the path Vs- S3-bR-n-R-c- S2-Vs.
(1800 < wt < 2400):

S3 and S4 are conducting. Load current flows through the path Vs- S3-b-Rn-R-a- S4-Vs.
.
(2400 < wt < 3000):
S4 and S5 are conducting. Load current flows through the path Vs- S5-cR-n-R-a- S4-Vs.
.
(3000 < wt < 3600):
47

S5 and S6 are conducting. Load current flows through the path Vs- S5-c-R-n-R-b- S6-Vs.
The rms value of line voltage is given by:
The rms value of fundamental component of line voltage is given by:
Procedure:
1.
2.
3.
4.
5.
6.
Connect according to circuit diagram.

Set the control module in single pulse either in 1800 or 1200 mode.
Then give power supply to inverter.
Observe the tracings across the phase and line voltages.
To observe phase current connect CRO probe between Ir and ground.
Measure the rms values of phase and line voltages.
Result Analysis:
Trace the load phase and line voltages, trace the phase currents, measure the voltages and
compare with calculated values and verify the line voltage in 180 0 is more than 1200
mode.
Questions:
1.
2.
3.
4.
5.
6.
Which mode has higher line voltage?

What is the drawback of each mode?
How many switches are on at a time in each mode?
What is the need of capacitor parallel to DC source?
Commutation gap exit in which mode.
In which mode load current is discontinuous.
48

Experiment No-10:
To study and trace the output waveform of a single Phase AC Voltage Controller Using
TRIAC.
Apparatus Required:
1.
2.
3.
4.
Triac Module and Firing module.

CRO & CRO Probe.
Patch Chords.
R and R-L load
Circuit Diagram:
Theory:
SCR is an unidirectional device conduct only from A to K by giving a proper

gate signal in forward blocking mode.
A TRIAC is a bidirectional device which can conduct from A to K and K to A

with a proper gate signal.
49
As it can conduct in both direction the terms A & K are not applicable to
TRIAC. Its three terminals are MT1 (Main terminal 1), MT2 (Main terminal 2)
& Gate.
When a +ve gate voltage w.r.t MT1 is applied in ve half it conducts from MT1
to MT2.
When a +ve gate voltage w.r.t MT2 (or -ve voltage w.r.t MT1) is applied in -ve
half it conducts from MT1 to MT2.
50

S1 & S2 get turn OFF naturally at & 2 respectively due to resistive load as
current falls below IH.
In this experiment we use one TRIAC in place of two switch S1 & S2.
Procedure:
7. Connect according to circuit diagram.
8. Set the control module.
9. Then give power supply to both modules.
10.Observe the tracings across the load and TRIAC.
11.Measure load voltage for different firing angle.
Tabulation:
Firing angle
Measured load
voltage
Calculated load
voltage
% error
Result Analysis:
Trace the load voltage, TRIAC voltage, for both R and R-L load and observe that in R-L
load the output voltage is not regulated till the firing angle is greater than power factor
angle. Measure the voltages and compare with calculated values.
Questions:
1.
2.
3.
4.
5.
How TRIAC is different from SCR.

How can we change TRIAC by SCR for same AC voltage control?
What is the condition to get regulated ac voltage in R-L load?
To get regulated output voltage load current will be continuous or discontinuous.
Give 4 application of TRIAC.
51

Aug2014 PELab

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Aug2014 PELab

Uploaded by

Copyright:

Available Formats

ITER, ELECTRICAL ENGINEERING (SOA University)

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

Theory: In V-I characteristics there are three states of operation

Reverse Blocking Mode:

A small leakage current will flow.

This is called off-state of thyristor.

In reverse mode SCR offers high impedance, so it acts as open circuit.

ITER, ELECTRICAL ENGINEERING (SOA University)

In this mode a small current called forward leakage current flows.

First SCR should be forward biased & switch S should be closed.

When Ia > IL, then SCR conducts where

ITER, ELECTRICAL ENGINEERING (SOA University)

Find the latching current.

What do you mean by VBO, IL, IH.

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

R, R-C,UJT firing circuit model.

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

(a) Basic structure of UJT(b) Symbolic representation (c) Equivalent circuit

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

Fig 3.22 V-I Characteristics of UJT

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

A simple resistance triggering circuit is as

Circuit diagram for resistance firing

current of the SCR. Therefore R1

voltage drop across resistor R does not exceed

Vgm , the maximum gate voltage

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

t ,VS Vgt ,Vm Vgp Vgt Vgp sin

Since Vgt , R1 , R are constants R2

Capacitor C in the circuit is connected

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

When R is set to a smaller value,

triggering of SCR and hence VL is

the voltage drop across it falls to 1

. The RC time constant for zero output voltage

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

What are the drawbacks of resistance triggering?

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

1-phase SCR bridge converter kit.

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

In continuous mode: T1 & T2 both conduct from wt = to ( + ).

ITER, ELECTRICAL ENGINEERING (SOA University)

For discontinuous mode:

PE-LAB Manual of Department Of Electrical Engineering

ITER, ELECTRICAL ENGINEERING (SOA University)

For continuous mode:

Average load current, I0= V0/R.

Rms output voltage Vor

Rms value of current Ior =( Vor / R).

Average load current, I0= V0/R.