Master of Computer Applications (MCA) Semester 1

Master of Computer Applications (MCA) Semester 1 Assignments
Name: Satrajit Mukherjee
Roll Number: 520920574
Learning Centre: Computer Point, Ballygunge Phari (LC Code: 1597)
Subject: Computer Programming “C” Language (MC0061) Assignment No.: 1
Date of Submission at the Learning Centre: 31/10/2009
Sikkim Manipal University – Directorate of Distance Education Page 1

1. Explain the following operators with an example for each:
a. Conditional Operators
b. Bitwise Operators
c. gets () and puts () function with a programming example for each.
a) Conditional Operators: Conditional operators in ‘C’ programming allow the user to

construct conditional expressions which are of the form e1? e2:e3. Here e1, e2 and e3
stand for expression 1, 2 and 3 respectively. Here the conditional operator is ‘?’. In this
case e1 is evaluated first. If e1 is true, then e2 is evaluated and it becomes the value of the
expression. If e2 is false, then e3 is evaluated and if true, the same becomes the value of
the expression. The above is explained in the example below:
A = 200;
B= 400
C = (A>B)? A: B;
Here the compiler first evaluates the expression A>B. Then it evaluates A and checks that
A is false. Then it verifies that B is actually greater than A. Hence the value of B is
assigned to C. Hence C = 400.
b) Bitwise Operators: The bitwise operators operate on integers thought of as binary

numbers or strings of bits. These operators allow the user to work with the individual bits
of a variable. A common use is to treat an integer as asset of single-bit flags. One
example of a bitwise operator is ‘&’ which stands for the AND.
c) The gets () and puts () functions: The gets () and puts () functions help in the transfer
of strings between the computer and the standard I/O devices. Each function accepts a
single argument. Which must be a data item representing a string (array of characters). In
case of gets (), string is entered from the keyboard and terminates with a newline
character. The following example illustrates the use of gets () and puts () functions.
#include <stdio.h>
#include <conio.h>
Void main ()
{
Char line [100];
Gets (“Hello World\n”);
Puts (“Hello World”);
}
2. Explain the following with a programming example for each:
a. Arrays of Structures
b. Unions
a) Arrays of Structures: Structures are used to describe the format of a number of

related variables. Let’s say we want to analyze the marks obtained by a class of students.

We can use a template to describe student names and marks obtained in various subjects
and declare all the students as structure variables. Hence an ‘array of structures’ can be
declared where each element of the array represents a structure variable. For example
struct stclass student [100] defines an array called ‘student’ consisting of ‘100’ elements
and each element are defined to be of the type ‘struct stclass’.
Example:
#include <stdio.h>
#include <conio.h>
Struct student
{
Int rollnumber;
Char name [30];
Int marks1;
Int marks2;
Int marks3;
}
Void main ()
{
Int i, j, n, t, tot [50];
Student s [50], temp;
Printf (“Enter number of students: \n”);
Scanf (“%d”, &n);
Printf (“Enter Roll number\tName\tMarks1\tMarks\tMarks3 of each student\n”);
For (i = 0; i<n; i++)
{
Scanf (“%d”, &s[i].rollnumber);
Gets (s[i].name);
Scanf (“%d”, &s[i] marks1);
Tot[i] = s[i] marks1 + s[i] marks2 + s[i] marks3;
}
For (i = 0; i<n; i++)
{
For (j = i + 1; j<n; j++)
{
If (tot[i] <tot[j]
{
Temp = s[i];
S[i] = s[j];
S[j] = temp;
T = tot[i];
Tot[i] = tot[j];
Tot[j] = t;

}
}
}
Printf (“Rollnumber\tName\t Total marks in descending order of total marks is:\n”);
For (i = 0; i<n; i++)
{
Printf (“%d”, s[i].rollnumber);
Printf (“%s”, s[i].name);
Printf (“%d”, s[i].tot);
}
Getch ();
}
b) Unions: Unions look similar to structures. They have identical declaration syntax and
member access but serve a different purpose. Accessing members of a union is via a
member operator (“.”) or for pointers to unions, the -> operator. A union holds the value
of one variable at a time. The compiler allocates storage for the biggest member of the
union. The type retrieved from the union must be of type most recently stored. Otherwise
the result is implementation dependent. Unions are used to store one of a set of different
types. These are commonly used to implement a variant array. There are other advanced
uses of unions.
Example:
#include <stdio.h>
#include <conio.h>
Void main ()
{
Union
{
Int I;
Float f;
Double d;
} u;
Printf (“%d”, sizeof (u));
u.i = 100;
Printf (“%d%f%f”, u.i, u.f, u.d);
u.f = 0.5;
u.d = 0.0166667;
}

3. Write a program demonstrating the usage of pointers with one dimensional and two
dimensional arrays.
Pointers and one-dimensional arrays: Relationship between an array and a pointer
#include<stdio.h>
#include<conio.h>
Void main ()
{
Int a[10];
Int i;
For (i = 0; i < 10; i++);
Scanf (“%d”, &a[i]);
For (i = 0; i < 10; i ++)
Printf (“I = %d, a[i] = %d; *(a + i) = %d, &a[i] = %u, a + i = %u”, i, a[i], *(a + i), &a[i],
a +i);
}
4. Describe the following with suitable programming examples:
a) Input/output operations on files: For each of the I/O library functions used in C
programming, there is a companion function which accepts an additional file pointer
argument telling it where to read from and write to. In case of ‘printf’, companion
function is ‘fprintf’ and the file pointer argument comes first. To print a string to the
output.dat file, a function like “fprintf (“Hello”);” can be called. For ‘getchar’, the
companion function is ‘getc’ where the file pointer is its only argument. To read a
character from an input.dat file, “int c; c = getc (ifp);” may be called. Similarly, ‘putc’ is
the companion to ‘putchar’ and file pointer argument comes last.
Example: Writing a data to the file
#include<stdio.h>
Void main ()
FILE *fp;
Char stuff [25];
Int index;
Fp =fopen (“TENLINES.TXT”,”w”);

Strcpy (stuff, “This is example line.”);
For (index = 1; index <= 0; index ++);
Fprintf (fp, “%s Line Number %d”, stuff, index);
Fclose (fp);
b) Predefined Streams: There are 3 pre-defined streams besides existing file pointers
(called by ‘fopen’). A file pointer corresponding to standard input is ‘stdin’ while ‘stdout’
is the file pointer corresponding to standard output. They can be sued anywhere a file
pointer is called. The third predefined stream is ‘stderr’ connected to the screen by
default. When standard output is redirected, ‘stderr’ is not redirected. In case of UNIX or
MSDOS, ‘program > filename’ invocation ensures that anything printed to ‘stdout’ is
redirected to the file but anything printed to ‘stderr’ still goes to the screen. The intention
behind ‘stderr’ is that it is the ‘standard error output’ error messages printed to it will not
disappear into an output file.
Example: To read a data file input.dat consisting of rows and columns of numbers
#define MAXLINE 100
#define MAXROWS 10
#define MAXCOLS 10
#include<stdio.h>
#include<conio.h>
Int array [MAXROWS][MAXCOLS];
Char *filename = “input.dat”;
FILE *ifp;
Char line [MAXLINE];
Int nrows = 0;
Int n;

Int t;
Ifp = fopen (filename, “r”);
If (ifp == NULL)
Fprintf (stderr, “can’t open %s”, filename);
Exit (EXIT_FAILURE);
While (fgetline (ifp, line, MAXLINE) ! = EOF)
If (nrows >= MAXROWS)
Fprintf (stderr, “too many rows”);
N = getwords (line, words, MAXCOLS);
For (I = 0; I < n; I ++)
Array [nrows][i] = atoi (words [i]);
Nrows ++;
c) Error handling during I/O operations: The standard I/O functions maintain two
indicators in each open stream to show the end-of-file and error status of the stream.
These can be interrogated and set by the following functions namely:
i) Clearer (clears the error and EOF indicators for the stream).
ii) Feof (returns non-zero if the stream’s EOF indicator is set, zero otherwise).

iii) Ferror (returns non-zero if the stream’s error indicator is set, zero otherwise) and
iv) Perror (prints a single-line error message on the program’s standard output)
prefixed by a string pointed to by‘s’ with a colon and a space appended.
The error message is determined by the value of the error and is intended to give some
explanation of the condition causing the error.
Example: Printing an error message ‘Bad File Number
#include<stdio.h>
#include<stdlib.h>
#include<conio.h>
Void main ()
{
Fclose (stdout);
If (fgetc (stdout) > = 0)
{
Fprintf (stderr, “What – No Error!”);
}
Perror (“fgetc”);
Exit (EXIT_SUCCESS);
}
/* Result- fgetc: Bad file number */
d) Random access to files: The file I/O routines all work in the same way unless user
takes explicit steps to change the position indicator from where files will be read and
written sequentially. A read followed by a write followed by a read (if permitted) will
cause the 2nd read to start immediately following the end of the data just written. For
controlling this, the Random Access functions allow control over the implied read/write
position in the file. The file position indicator is moved without the need for a read or a
write and indicates the byte to be the subject of the next operation on the file. Three types
of function exist which allow the file position indicator to be examined or changed. They
are:
i) Ftell: Returns the current value measured in characters of the file position indicator if
the stream refers to a binary file. For a text file, a ‘magic’ number is returned which may
only be used on a subsequent call to fseek to reposition to the current file position
indicator. On failure, -1L is returned and errno is set.
ii) Rewind: It sets the current file position indicator to the start of the file indicated by the
stream. The file’s error indicator is reset by a call of rewind. No value is returned.
iii) Fseek: Allows the file position indicator for the stream to be set to an arbitrary value
for binary files. In case of text files it position indicator to be set to a position obtained
from ftell depending on certain conditions.

Example:
#include<stdio.h>
Long ftell (FILE *stream); /* return file position indicator*/
Int fgetpos (FILE *stream, fpos_t *pos);
Void rewind (FILE *stream) /* set file position indicator to zero*/
Int fseek (FILE *stream, long offset, int ptrname);

Int fsetpos (FILE *stream, const fpos_t *pos); /* set file position indicator*/

Subject: Computer Programming “C” Language (MC0061) Assignment No.: 2

1. With the help of programming examples, explain the following constants:
a) Integer Constants: An integer constant refers to a sequence of digits. There are

decimal, octal and hexadecimal integers. Decimals range from 0 to 9 with a ‘+’ or ‘-‘sign
preceding (i.e. 12, -546). Octals range from 0 to 7 with a leading 0 (i.e. 0567 etc0 and
hexadecimals are sequences of digits preceded by 0X or 0x (i.e. 0X6, 0Xbcd). Largest
integer value that can be stored is machine-dependent. 16-bitmachines can store 32767
while 32-bit machines can store a value of 2147483647.
Example:
#include<stdio.h>
Void main ()
Printf (“Integer values”);
Printf (“%d%d%d”, 32767, 32767 +1, 32767 + 10);
b) Real Constants: The numbers containing fractional parts are called real or floating
point constants (i.e. 67.45, -8.5, and 0.056). A real number may be expressed in the form
mantissa e exponent where ‘mantissa’ is either a real number expressed in decimal
notation or an integer. The exponent is an integer with optional positive or negative sign
preceding itself (i.e. 12e-2, 4e3). These constants are expressed usually as double
precision quantities.
Example:
#include<stdio.h>
Void main ()
Printf (“Real Constants”);
Printf (“%f%f%f”, 34.45, 10e-3, 5e6);

c) Character Constants: A single character constant contains a single character enclosed

within a pair of single quote marks (i.e. ‘X’, ‘6’). These constants have integer values
known as ASCII values.
Example:
#include<stdio.h>
#include<conio.h>
Void main ()
Printf (“%d”, ‘a’); /* Prints ASCII value of ‘a’ that is 97.
Printf (“%c”, ’97); /* Prints letter a.
d) String Constants: A string constant is a sequence of characters enclosed within

double quotes. The characters may be letters, numbers, special characters and blank
spaces.
Example:
#include<stdio.h>
#include<conio.h>
Void main ()
Printf (“%s”, “Hello”); /* Prints Hello.
Printf (“%s”, “1947”); /* Prints 1947.

e) Backslash Character Constants: ‘C’programming supports some special backlash

character constants that are used in output functions. Each such constant represents one
character although they consist of two characters. These character combinations are
called escape sequences (i.e. \n is a newline; \t represents horizontal tab and \b is a back
space).
Example:
#include<stdio.h>
#include<conio.h>
Void main ()
Printf (“Welcome\n”);
Printf (“\t Enter the Name \t Address and \t Phone number”);
2. Describe the following and give appropriate programming examples for each:
a) Function Prototypes: It’s a good practice to use prototype declarations for all
functions that are called. They help ensure that the compiler can generate the correct code
for calling the functions and notice errors. The syntax is data-type name (type1, type2)
like int sample (int a, int b). The prototype is required in the caller if function definition is
written after the definition of the caller function and optional for reverse case. For library
functions like ‘printf’ and ‘scanf’, their prototypes reside in the header files (<stdio.h>,
<conio.h> etc).
Example: Change characters from lowercase to uppercase.
#include<stdio.h>
#include<conio.h>
Char lower_to_upper (char ch)
{
Char c;
C = (ch>=’a’ && ch<=’z’)? (‘A’ + ch – ‘a’): ch;
Return c;
}

Void main ()
{
Char lower, upper;
Printf (“Please enter a lowercase character\n”);
Scanf (“%c”, &lower);
Upper = lower_to_upper (lower);
Printf (“The uppercase equivalent of %c is %c\n”, lower, upper);
}
b) Recursion: Recursion is a process by which a function calls itself repeatedly until

some specified condition has been met. This is used for repetitive computations in which
each action is stated in terms of a previous result. If a problem is to be solved recursively
two conditions must be satisfied. First, the problem must be written in recursive form and
secondly, the problem statement must contain a stopping condition.
Example: Calculate factorial of a given positive integer.
#include<stdio.h>
#include<conio.h>
Void main ()
{
Int n;
Long int fact (int);
Printf (“n! = %ld\n”, fact (n));
}
Long int fact (int n)
{
If (n==0)
Return 1;
Else
Return (n*fact (n-1));
}
3. Describe the following with respect to Structures and Unions:
a) Structures and Functions: Programs can be written with structures using modular
programming. We can write a function that returns the structure. While writing the
function the type of structure to be returned must be specified. The return statement
should return the structure using a variable. It’s possible to pass a structure as an
argument. We can modify a member of the structure by passing the same as an argument.
The changes in the member made by the function are retained in the called module. This
is not against the principle of call by value because we are not modifying the structure
variable but are changing the members of the structure.
b) Arrays of Structures: We can use structures to describe the format of a number of

related variables. For example, in analyzing the marks obtained by a class of students, we

may use a template to describe student name and marks obtained in various subjects and
then declare all students as structure variables. In such cases, we may declare an array of
structures where each element of the array represents a structure variable. For example
struct stclass student [100] defines an array called student consisting of 100 elements.
Each element is defined to be of type struct stclass.
c) Pointers and Structures: The pass by value may be very inefficient if the structure is
large meaning it has many members. They have identical declaration syntax and member
access but they serve a very different purpose. Defining pointer types is the same as for
variables of primitive types.
d) Self – Referential Structures: This is the ability to refer to (i.e. point to) an
incomplete type, including itself, as an important property for constructing a variety of
data structures. Examples are linked lists, binary trees, hash tables and more. Linked lists
come in two basic varieties namely single linked and doubly linked. List contains a set of
nodes where each node contains an item and a pointer to another list node.
4. Describe the following with the help of suitable programming examples:
a) Abstract Data Types: An Abstract Data Type (ADT) is a data type organized in such
a manner that the specification of the objects and those of the operations on the objects is
separated from the representation of the objects and implementation of the operations.’C’
doesn’t have an explicit mechanism for implementing ADTs. The specification consists
of the names of every function, arguments type and the type of its result. There should be
a description of what the function does without appealing to the internal representation or
implementation details. This requirement is only important and it implies that ADT is
implementation independent. Functions of an ADT can be classified into
a) Creator/constructor: The functions create a new instance of the designated type.

b) Transformers: These functions also create an instance of the designated type
using one or more other instances.
c) Observers/reporters: These provide information about an instance of the type but
don’t alter the instance.
An ADT definition will include at least one function from each of these 3 categories.
b) Stack as an Abstract Data Type: A stack is a simple list of elements with insertions
and deletions permitted at one end called the ‘stack top’. This means that it’s possible to
remove elements from stack in reverse order from the insertion of elements into the stack.
Thus a stack data structure exhibits the LIFO (last in first out) properly. Push and pop are
the operations that are provided for the insertion of an element into the stack and the
removal of an element from the stack respectively. Since a stack is basically a list, it can
be implemented by using an array or by using a linked representation.
Example: Implement a stack using an array

#include<stdio.h>
#include<stdlib.h>
#define MAX 10
Void push (in stack [], int *top, int value)

{
If (*top < MAX)
{
*top = *top + 1;
Stack [*top] = value;
}
Else
{
Printf (“the stack is full and cannot push a value\n”);
Exit (0);
}
}
Void pop (in stack [], int *top, int *value)

{
If (*top > = 0)
{
Value = stack [*top];
*top = *top – 1;
}
Else
{
Printf (“The stack is empty and cannot pop a value\n”);
Exit (0);
}
}
Void main ()
{
Int stack [MAX];
Int top = -1;
Int n, value;
Do
{
Do
{
Printf (“Enter the element to be pushed\n”);
Scanf (“%d”, &value);
Push (stack, &top, value);
Printf (“Enter 1 to continue\n”);


} while (n ==1);
Printf (“Enter 1 to top an element\n”);
While (n==1)
{
Pop (stack, &top, &value);
Printf (“The value popped is %d\n”, value);
Printf (“Enter 1 to pop an element\n”);
}
} while (n ==1)
}
c) Queue as an Abstract Data Type: A queue is also a list of elements with insertions
permitted at one end called the rear and deletions permitted from the other end known as
the front. This means that the removal of elements from a queue is possible in the same
order which the insertion of elements is made into the queue. Thus a queue data structure
exhibits the FIFO (first in first out) property. Insert and delete are the operations provided
for insertion of elements into the queue and the removal of elements from the queue
respectively. A queue can also be implemented by using an array or a linked
representation.
Example: Implement a queue using a linked representation
#include<stdio.h>
#include<stdlib.h>
Struct node
{
Int data;
Struct node *link;
}
Void insert (struct node **front, struct node **rear, int value)
{
Struct node *temp;
Temp = (struct node *) malloc (sizeof (struct node));
If (temp ==NULL)
{
Printf (“No Memory Available. Error\n”);
Exit (0);
}
Temp -> data = value;
Temp -> link = NULL;
If (*rear ==NULL)

{
* Rear = temp;
* Front = *rear;
}
Else
{
(*rear) -> Link = temp;
*rear = temp;
}
}
Void delete (struct node **front, struct node **rear, int *value)
{
Struct node *temp;
If (*front == *rear) && (*rear ==NULL)
{
Printf (“The queue is empty and cannot delete\n”);
Exit (0);
}
*value = (*front) -> data;
Temp = *front;
*front = (*front) -> link;
If (*rear ==temp)
*rear = (*rear) -> link;
Free (temp);
}
Void main ()
{
Struct node *front = NULL, *rear = NULL;
Int n, value;
Do
{
Do
{
Printf (“Enter the element to be inserted\n”);
Scanf (“%d”, &value);
Insert (&front, &rear, value);
} while (n ==1);
Printf (“Enter 1 to delete an element\n”);
While (n ==1)
{
Delete (&front, &rear, &value);
Printf (“The value deleted is %d\n”, value);

Printf (“Enter 1 to delete an element\n”);

}
} while (n ==1);
}
Subject: Digital Systems, Computer Organization & Architecture (MC0062) Assignment No.: 1

1. Describe the following and give appropriate numerical examples.
a) Binary Number System: This system uses base 2 and is represented by 0 and 1 only
which are also known as bits or Binary Digits. The position of each bit in a given
sequence has a numerical weight. It makes use of the Octal Point. Hence this system can
be shown as a weighted sum of bits.
Example: 101.11(2) is a binary number where ‘2’ is the base within the parenthesis. This
number can be represented as a weighted sum. So
101.11(2) = 1*22+0*21+1*20+1*2-1+1*2-2

Counting is analogous as the decimal system. Count begins with 0 and then 1. Since all
symbols are exhausted start with combining two bit combination by placing a 1 to the left
of 0 and to get 10 and 11. Similarly continuing placing a 1 to the left again gives 100,
101, 110 and 111.
b) Octal Number System: This system uses base 8 and is represented by 0,1,2,3,4,5,6,7
only which are also known as bits or Octal Digits. The position of each bit in a given
sequence has a numerical weight. It makes use of the Binary Point. Hence this system
can be shown as a weighted sum of bits.
Example: 710.16(8) is an octal number where ‘8’ is the base within the parenthesis. This
number can be represented as a weighted sum. So
710.16(8) = 7*82+1*81+0*80+1*8-1+6*8-2
Counting is analogous as the decimal and binary systems. Count begins with 0 and then 1
till 7. Since all symbols are exhausted start with combining two bit combination by
placing a 1 to the left of 0 and to get 10, 11, 12 till 17. Similarly continuing placing a 1 to
the left again gives 100, 101, 102, 107, 110 etc.
c) Hexadecimal Number System: This system uses base 16 and uses alpha-numeric
symbols 0, 1, 2 to 9 and A to F. Since 10 decimals and 6 numeric symbols are used, the
number system gets its name. This system is used to replace 4-bit combination of binary
unlike decimal, binary and octal systems. This system is used in microprocessors,
assemblers etc. Counting methodology is similar to decimal, binary and octal systems.
Example: 1A62.B53 (16) is a hexadecimal number where ‘16’ is the base within the
parenthesis.
2. Describe the Canonical Logical Forms:
a) Sum of Products Form: In Boolean algebra the product of two variables can be
represented with AND function and the sum of any two variables can be represented with
OR function. Therefore AND and OR functions are defined with two or more input gate
circuitries. Sum of Products (SOP) expressions is two or more AND and OR functions
expressed together. The AND terms are known as miniterms. A popular method of
representation of SOP form is with miniterms. Since the miniterms are OR functions, a
summation notation with the prefix m is used to indicate SOP. If ‘n’ is number of
variables used then the miniterms are noted with a numeric representation starting from 0
to 2n. SOP is a useful form as it can be implemented easily with logic gates. Such
implementations are always 2-level gate network meaning a signal will pass from a
maximum of 2 gates from the input to the output.
Example: f = abc + abc + abc + abc

Here, the function has 4 miniterms. Each miniterms has 3 variables. Hence the miniterms
can be represented with the associated 3-bit representation. Representation of miniterms
with 3-bit binary and equivalent decimal number can be noted. Hence abc = 101 (2) = 5,
abc = 011 (2) = 3, abc = 110 (2) = 6 and abc = 111 (2) = 7.
Hence f = ∑ (5, 3, 6, 7)
m
b) Product of Sums Form: Product of Sum (POS) expression is the AND representation
of two or more OR functions The OR terms are known as maxterms. POS is also useful
as it can be implemented easily with logic gates. Such implementations are always 2-
level gate network meaning a signal will pass from a maximum of 2 gates from the input
to the output. Similar to SOP, a popular method of representation of POS form is with
maxterms. Since the maxterms are ANDed a product notation with the prefix ‘M’ is used.
If ‘n’ is number of variables used then the maxterms are noted with a numeric
representation starting from 0 to 2n.
Example: f = (a+b+c) (a+b+c) (a+b+c).
There are 4 maxterms containing 3 variables each. Hence the maxterms can be
represented with the associated 3-bit representation. Representation of maxterms with 3-
bit binary and equivalent decimal number can be noted. Hence (a+b+c) = 010 (2) = 2,
(a+b+c) = 001 (2) = 1, (a+b+c) = 100 (2) = 4.
Hence f = ∏ (2, 1, 4)
M
3. Explain the universal NAND and NOR gates with suitable examples.
The concept of the universal gate is that the given gate should be able to generate all the
basic gate functions/logics (AND, NOT and OR). NAND and NOR gates are universal as
they can realize all basic gates. They are explained below with suitable examples.
a) NOT realization using NAND: A two input NAND is used with both input terminals
supplied with the same input function. Here f = a.a = a.
a f
b) AND realization using NAND: f = a.b = a.b

a
f
c) OR realization using NAND: f = a.b = a + b = a + b
d) NOT realization using NOR: f = a + a = a.
a f
e) AND realization using NOR: f = a + b = a.b = a.b
b
f) OR realization using NOR: f = a + b = a + b.
a
f
4. Describe the following with appropriate block diagrams
a) Control Unit: This is the portion of the processor that actually causes things to
happen. It controls the system operations by routing the selected data items to the
selected processing hardware at the right time. It’s a nerve center for other units. It
decodes and translates the instructions and generates the necessary signals for other units.
This unit a) interprets instructions and b) sequences the instructions. In instruction
interpretation, the unit reads instructions from the memory and recognizes the instruction
type, gets necessary operand and sends them to correct functional unit. Signal needed to
perform desired operation is taken to processing unit and results are sent to the correct
section. In instruction sequencing, it determines the address of the next instruction to be
executed and loads it into program counter. Control circuits govern the transfer of signals
and data transfer from processor to memory.
b) Bus Structure: A bus contains 1 or more wires. Computers have several buses
connecting different units. The size of the bus is the number of wires in the bus.
Individual wires or groups of wires can be represented by subscripts. A bus can be drawn
as a line with a dash across it to indicate if there is more than one wire. The dash is
labeled with number of wires and designation of those wires. A bus allows any number of
devices to hook up with it. Devices share the bus. Only one device can use it at a time.

Most devices have a certain number of connections and do not permit dedicated
connections to other devices. A bus doesn’t have this problem. A bus diagram is
presented below. A slant slash goes across a horizontal line meaning more than 1 wire.
The slant dash is labeled ‘32’ meaning there are 32 wires and A 31-0 signifies individual 32
wires from A0 to A31.
32
Bu
s
A31-0
c) Von Neumann Architecture
This architecture is based on three key concepts:
• Data and instructions are stored in a single read-write memory.

• The content of this memory is addressable by location, without regard to the type
of data contained there.
• Execution occurs in a sequential fashion unless explicitly modified from one
instruction to the next.
The Von-Neumann architecture consists of
• A main memory which stores instructions and data.

• An arithmetic logic unit (ALU) capable of operating on binary data.
• A control unit which interprets the instructions in memory and causes them to be
executed.
• Input and Output (I/O) equipment operated by the control unit.
Arithmetic Logic Unit (ALU)
Main I/O
Memor Devices
y
Program Control Unit (CU)

5. Discuss the different types of Addressing Modes with suitable examples
The different types of addressing modes are as follows:
• Direct Addressing Mode: Here EA (effective or actual address of the location

containing the referenced operand) = A (contents of an address field in the
instruction) meaning address field contains address of the operand.
Example: ADD A means ‘add contents of cell A to accumulator’. Look in

memory at address A for operand. Memory is referred to once for accessing data.
• Immediate Addressing Mode: The operand is actually present in the instruction.

The operand can be used to define and use constants and set initial values. The
operand is part of the instruction and is same as the address field.
Example: ADD 5 means ‘add 5 to the contents of the accumulator’ where 5 is the
operand. Memory is not referred to fetch data.
• Indirect Addressing Mode: Here the memory cell is pointed to by the address
field. It contains the address of the operand. Here EA = A. Hence the processor
will look at A, find address (A) and look there for operand.
Example: ADD A means ‘add contents of cell pointed to by contents of A to

accumulator’. The address space is large (equal to 2n where n is word length).
Memory is accessed multiple times to find the operand.
• Register Addressing Mode: Here the operand is held in the register named in the
address field. EA = R. Here very small address fields are needed; shorter
instructions needed and they are fetched faster; memory access is not required. It
requires good assembly programming.
Example: In C programming say ‘register int a’. The operand ‘a’ is held in the
register named in the address field.
• Register Indirect Addressing Mode: Here EA = R. the operand is in the

memory cell pointed to by contents of register R. The address space is large
(equal to 2n). Needs fewer memories access than indirect addressing mode. This
is same as indirect addressing mode.
• Displacement addressing mode: Here EA = A + R. The address field holds two

values namely A (base value) and R (register that holds displacement) or vice
versa.

• Relative addressing mode: it’s a version of displacement addressing where R =

PC (program counter). EA = A + PC meaning operand A is obtained from the
current location pointed to by PC.
• Base-Register addressing mode: A holds displacement and R holds pointer to

base address. R may be implicit or explicit. Segment registers in 80*86 are
examples.
• Indexing: EA = A + R where A is base value and R is the displacement. This

mode is good for accessing arrays. Hence EA = A + R and then R++.
• Stack Addressing: The operand is implicitly on top of the stack. ADD means pop
two items from stack and add.
• Auto increment mode: This mode is useful for accessing data items in successive
locations in the memory. The EA of the operand is the contents of a register
specified in the instruction. After accessing the operand, the contents of this
register are automatically incremented to point to the next item in a list. This is
denoted by putting specified register in a parenthesis to show the register content
being used as EA followed by a plus sign indicating that the same are to be
incremented after the operand is accessed. Hence this mode is written as (Ri) +.
6. Describe the following:
a) Programmed I/O: When the CPU is executing a program and encounters an

instruction to I/O; it executes the former by issuing a command to the appropriate I/O
module. With this technique, the I/O module will perform the requested action and then
set appropriate bits in the status register. The I/O module does not take any further action
to alert the CPU. It doesn’t interrupt the CPU. Hence the CPU periodically checks the
status of the I/O module until it finds that operation is complete. The sequence of actions
taking place here is:
• CPU requests I/O operation.

• I/O module performs operation.
• I/O module sets status bits.
• CPU checks status bits periodically.
• I/O module doesn’t inform CPU directly.
• I/O module doesn’t interrupt CPU.
• CPU may wait or come back later.
b) Interrupt Driven I/O: In this process the CPU issues an I/O command to the I/O
module which then interrupts the CPU when it’s ready to exchange data with the latter.
Then CPU executes data transfer and resumes its former processing. Hence CPU doesn’t
need to check on the I/O module and it saves time. Interrupts enable transfer of control
from program to program to be initiated by an event that is external to the computer.

Execution of interrupted program resumes post completion of execution of interrupted

service routine. This concept is useful in operating systems and in many control
applications where processing of certain routine has to be accurately timed relative to
external events. The sequence of actions is as follows:
• CPU issues read command.

• I/O module gets data from peripherals while CPU does other work.
• I/O module interrupts CPU.
• CPU checks status and if no errors are present, requests data
• I/O module transfers data.
• CPU reads data and stores in main memory.

Subject: Digital Systems, Computer Organization & Architecture (MC0062) Assignment No.: 2

1. Describe Binary Adders and Binary Subtractors with appropriate block diagrams.
Binary Adders: The concept here is to realize a circuitry to perform the binary addition
using discrete gates. In case of ‘Half Adders’, the four basic rules of binary addition are 0
+ 0 = 0; 0 + 1 = 0; 1 + 0 = 0 and 1 + 1 = 10. The operations were carried out by a half
adder logic circuit which accepts two binary digits as its input and produces two binary
digits on its output terminals known as sum bit and carry bit. The outputs are a) Sum = a
+ b and b) Carry = ab. From the above expressions implementation requirement for a
half adder function requires one Ex-OR gate for Sum generation and an AND gate for
Carry generation. The truth table and block diagram is shown below:
a Su
Inputs Outputs
m
a b Sum Carry
Half 0 0 0 0
Adder
0 1 1 0
1 0 1 0
b 1 1 0 1
Carry
In case of ‘Full Adders’, three one bit inputs are accepted to generate a Sum and a Carry
output meaning it accepts one more bit than a half adder. If we want to add two binary
numbers with two or more bits each, LSBs can be added using a half adder. Carry
generated is carried forward to the next significant bit addition. The outputs here are a)
Sum = a + b + Cin and b) Carry = ab + (a + b) Cin. From the above expressions
implementation requirement for a full adder function requires two Ex-OR gate for Sum
generation and two AND gates, one Ex-OR gate and one OR gate for Carry generation.
The truth table and block diagram is shown below:
Inputs Outputs
a
Su a b Cin Sum Carry
m 0 0 0 0 0
Full 0 0 1 1 0
b Adder 0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
Carry 1 1 0 0 1
Cin
1 1 1 1 1
Binary Subtractors: The concept here is to realize a circuitry to perform the binary
subtraction using discrete gates. The four basic rules of binary subtraction are 0 - 0 = 0; 1
- 1 = 0; 1 - 0 = 1 and 0 - 1 = 10 – 1 = 1. In case of ‘Half Subtractors’, an arithmetic
circuit subtracts the LSB of the subtrahend from the LSB of the minuend when a binary

number is to be subtracted from the other. Here a logic circuit accepts two binary digits
as its input and produces two binary digits in its output terminals known as Difference Bit
and Borrow Bit. The outputs are given by a) Diff = a + b and b) Borrow = ab.
Implementation requires one Ex-OR gate for difference generation and one AND with a
NOT gate for Borrow generation. Block diagram and truth table is shown below.
a Diff
Inputs Outputs
a a b Diff Borrow
Half 0 0 0 0
Subtr 0 1 1 1
actor
1 0 1 0
b Borrow
1 1 0 0
a
A logic circuitry which performs the subtraction of two bits with borrow generated if any,
during the previous LSB subtraction is known as ‘Full Subtraction’. The block diagram
and corresponding truth table is shown below.
a Inputs Outputs
a b Bin Sum Carry
Diff
0 0 0 0 0
Full 0 0 1 1 1
Subtracto 0 1 0 1 1
b r 0 1 1 0 1
1 0 0 1 0
Borrow 1 0 1 0 0
1 1 0 0 0
Bin
1 1 1 1 1
Q Q
1 1
2. Describe the following Asynchronous Counters:
1 2
a. Negative edge triggered 2-bit ripple Up-counter: Two-bit ripple counter used two flip
flops. There are J4 possible states
O from 2-bit up-counting namely
J 00, 01, 10 and 11. The
O
block diagram represents the counter and the other figure is the timing diagram for the
clock pulse and outputs of two flip-flops.
CLK CLK
Cloc
k
K K
O O
CLR CLR
CLEAR =
1
Block Diagram of counter
CL
K
Q1 0 0 0
1 1 1
Q2 0 1 0
Timing Diagram
• The counter is initially assumed to be at state 00 when the outputs of the two flip-
flops are Q1 (forms MSB) and Q2 (forms LSB).
• For the negative edge of the first clock pulse, output of first flip-flop FF 1 toggles its
state. Q2 remains at 0 and Q1 toggles to 1 and counter state reads 01.
• During the negative edge of the input clock pulse FF1 toggles and Q1 = 0. The output
Q1 being a clock signal for the second flip flop FF2 and the present transition acts as a
negative edge for FF2 thus toggles its state Q2 = 1. The counter state is now read 10.
• For the next negative edge for the input clock to FF1, output Q1 toggles to 1. This
transition from 0 to 1 being a positive edge for FF2 output Q2 remains at 1. The
counter state is now read as 11.

• For the next negative edge for the input clock, Q1 toggles to 0. This transition from 1
to 0 acts as a negative edge clock for FF2 and its output Q2 toggles to 0. This starting
edge 00 is obtained.
b. Negative edge triggered 2-bit ripple Down-counter: This counter counts from 11 to 10
to 01 to 00 back to 11. The block diagram represents the counter and the other figure is
the timing diagram for the clock pulse and outputs of two flip-flops. Here Q1 of the first
flip-flop FF1 is connected to the clock input of the second flip-flop FF2.
Q Q
1 1
1 2
J Q1 J
Q1
CLK CLK
Cloc
k
K Q1 K
Q1
CLR CLR
CLEAR =
1
CL
K

Q1 0 0 0 1
1 1
Q2 0 1 0
Timing Diagram
• The counter is initially assumed to be at state 00 when the outputs of the two flip-
flops are Q1 (forms LSB) and Q2 (forms MSB). Q1 is now at 1.
• For the negative edge of the first clock pulse, output of first flip-flop FF1, Q1 toggles
to 1 and output Q1 toggles to 0. Since Q1 is connected to FF2 the toggling of Q1 from 1
to 0 acts as a negative edge clock for FF2 which drives its output Q2 to toggle from 0
to 1. The counter state is now read at 11.
• During the negative edge of the input clock pulse FF1 toggles and Q1 = 0 and Q1 = 1.
The output Q2 remains at 1 and counter state reads 10.
• For the next negative edge for the input clock to FF 1, output Q1 toggles to 1 and Q1 =
0. This transition from 1 to 0 of Q1 is a negative edge clock pulse for FF2 whose
output Q2 toggles to 0. The counter state is now read as 01.
• For the next negative edge for the input clock, Q1 toggles to 0 and Q1 to 1. This
transition of Q1 from 0 to 1 being a positive edge clock for FF2 and its output Q2
remains at 0. This starting edge 00 is obtained.
c. Negative edge triggered 2-bit ripple up/down-counter: This counter follows a logic by
which a mechanism for up or down counting is undertaken. An external control signal
up/down is used along with the first flip-flop outputs Q1 and Q1. The block diagram is
shown below. The clock signal to second flip-flop FF2 = Q1 * (up/down) + Q1 *
(up/down).
• If up/down =1 then the clock signal to second flip-flop FF2 is Q1.

• If up/down =0 then the clock signal to second flip-flop FF2 is Q1.
Up/down
1 Q1 1 Q2
Q1 J Q1
J
CLK CLK
CLOC
K Q1 Q1
K
K
CLR CLR
CLEAR =
3. Discuss with a numerical example error correction and detection codes.
When digital codes are being transferred from channel to channel, errors can occur in the
form of changes in the bits making up the coded information. A 1 can change to 0 or vice
versa due to addition of noise over the channel. In order to detect a single bit error,
systems employ a parity bit. A binary word has either even or odd number of 1s. By
adding an even parity bit number of 1s will be even and an odd parity will give an odd
total of 1s. Hence the given system will work either with an even or an odd parity or not
with both kinds. Assuming even parity being used in a system, a check on the received
group for the even number of 1s gives a measure of the occurrence of error in
transmission. The parity bit can be attached to the core group at the beginning or end of
the bit group. Total number of 1s is always even for even parity and odd for odd parity
usages including the parity bit added. The table below is a partial representation of the
parity bits assigned to binary numbers:
Even Parity Odd Parity

Parity Bit Binary Number Parity Bit Binary Number
0 0000 1 0000
1 0001 0 0001
1 0010 0 0010
… … … …
0 1111 1 1111
Detecting an Error: A parity bit is useful in detecting a single bit error. However it cannot
detect two errors. Assume a binary code 1010 is transmitted with an even parity bit 0 added.
Hence transmitted bit is 01010.

Let’s assume that an error occurred in the fourth bit from the left so that 01010 is transmitted as
01000. Ehen the receiver end gets this code the parity check circuit determines that there is only
odd number of 1s indicating error inception. The error doesn’t indicate in which bit the same has
occurred. If 2 bit error occurs for given code 01010 with an error in 3 rd and 4th bit places, the
transmitted code is 01101. The parity check circuit checks for the parity and it indicates it as a
correct code.
Similarly an odd parity bit can also be added for the transmission of group of bits by checking
whether the number of bits is odd or not. For example for binary code 1010 to be transmitted
with an odd parity then an odd parity bit 1 is added. The transmitted bit is 11010.
Example: For the binary numbers below assign proper even parity bits
Binary Number Even Parity Bit Transmitted Pattern
0101 0 00101
111000 1 1111000
0100 1 10100
Example: For the binary numbers below assign proper odd parity bits
Binary Number Odd Parity Bit Transmitted Pattern
01010 1 10101
111000 0 0111000
0100 0 00100
a) Elements of Bus Design
The various elements of Bus Design are described in brief below:
Bus Types: There are two kinds of buses namely a) Dedicated and b) Multiplexed. The
Dedicated types are permanently assigned to either one function or to a physical subset of
components. A ‘functional dedication’ indicates the bus has a specific function like
‘Address Bus’, ‘Data Bus’ etc while ‘physical dedication’ represents use of multiple
buses, each of which connects only a subset of components uses the bus like I/O buses
which only interconnect I/O modules. Multiplexed indicates that the same bus may be
used for various functions. These are also known as ‘non-dedicated’ bus types.
Method of Arbitration: This can be a) Centralized or b) Distributed. In case of
Centralized, a single hardware device or bus controller allocates time on the bus to
various components. Distributed indicates that there is no central controller. Each module
contains access control logic and the modules act together to share the bus. For both

cases, one device is designated as the master which initiates data transfer with other
devices which act as slaves.
Bus Timing: This may be a) Synchronous or b) Asynchronous. For Synchronous type, the
bus includes a clock line. The clock determines event occurrence on the bus. A single 1-0
transmission on clock signal means 1 clock cycle or ‘bus cycle’ and defines a time slot.
This timing is less flexible but easy to implement and test. For Asynchronous timings,
occurrence of one event on a bus follows and depends on the occurrence of a previous
event.
Bus Width: Number of memory units can be addresses with Bus Width of Address Lines.
Size of memory units can be addressed using Bus Width of Data Lines.
Bus Speed: The speed of the bus refers to how fast one can change the data on the bus
and still have devices to be able to read the values correctly. The bus size can limit the
speed. Speed can be measured in MHz meaning up to 106 changes per second.
b) Bus Structures
Bus performance can suffer if multiple devices are connected to it as a) for more device
connections, longer bus length means longer data propagation time and b) Bus may
become a bottleneck. Hence multiple buses make up a structure. The types are discussed
in brief below:
Single Bus System: In this type of interconnection the three units share a single bus.
Hence information exchange is possible only between two units at a time. Here I/O units
use same memory address space. It simplifies programming of I/O units and no special
instructions are needed. Information transfer is not possible at a speed comparable to
operating speeds of connected devices. Keyboards and printers are slow while main
memory operates at electronic speeds. Hence for smooth communication between
devices, buffer register is added with the devices to hold the information during transfers.
This helps in smoothening out the timing.
I/O Units Processor Memory
Single Bus System

Two Bus Organizations: In this case the I/O units are connected to the processor through
an I/O bus and the processor is connected to the memory through the memory bus. The
I/O bus consists of device address bus, data bus and control bus. Device address bus
carries the address of I/O units to be accessed by the processor. Data bus carries a word

from the addressed input unit to the processor and from the processor ro the addressed
unit. Control bus carries control commands from processor to I/O units and status
information of I/O units to the processor. In this case the processor completely supervises
the information transfer to and from the I/O units. All information is taken to processor
and then to memory.
DA MA
B BB
I/O Units Processor Memory

C C
B B
Two Bus Organizations
a. Cache Memory: The CPU accesses memory a number of times to fetch instructions and
operands. The memory cycle time limits the CPU operation speed as memory cycle and
processor cycle times mismatch. Hence a small, fast memory is provided between CPU
and main memory to exploit the principle of locality. This is Cache memory containing
copy of portions of main memory. If CPU attempts to read a word from main memory,
first cache is checked and if the word exists there, it’s delivered to CPU. At any time a set
of main memory resides in the lines of cache. Each cache line has a tag identifying
location in memory of the block it contains. Hence the word is delivered to the CPU. If
not then a block of main memory consisting of fixed number of words is read into this tag
is usually a portion of the main memory address. The collections of tags which are
currently assigned to the cache are stored in a special memory. This is cache tag memory
or directory. Cache memory access takes less time than main memory.
Cache tag memory Cache data

(directory) memory

Cache
Addres Dat
Control a
s
Smaller and faster
CPU Cache Main Memory
Word Bloc
Transfer k
Larger and Slower
Cache and Main Memory
b. External Memory: External memory can be in the form of magnetic tape, optical
memory and magnetic disk. The magnetic disk is a circular platter constructed of metal or
plastic content with a magnetic material. Data is recorded on and later retrieved from the
disk via a conducting coil or the head. During a read/write operation the head is
stationary and the platter rotates beneath it. Writing is achieved by producing a magnetic
field which records a magnetic pattern on the magnetic surface. The head is capable of
reading or writing from a portion of the platter rotating beneath it. This gives rise to
organization of data on the platter in a concentric set of rings called Tracks. Each track is
the same width as the head. Adjacent tracks are separated by gaps that minimize errors
due to misalignment of head. Data is transferred to and from the disk in blocks. The block
is smaller than the capacity of a track. Data is stored in block regions which is an angular
part of a track and is referred to as a Sector. Typically 10-100 sectors are present per
track. The sectors may be of fixed or variable length.
Inter-track
gap
Secto
r
Inter-sector
gap
Track
6. Discuss the following:
a. Vector processing requirements: A vector processor executes vector instructions on

arrays of data. Each instruction involves a string of repeated operations which are ideal
for pipelining with one result per cycle.
Characteristics: A vector operand contains an ordered set of ‘n’ elements where ‘n’ is the
vector length. Each element in a vector is a scalar quantity which may be an integer or
character or floating point number. Register based vector instructions appear in most of
the register-to-register vector processors like Cray supercomputer. Memory based vector
operations are found in memory-to-memory vector processors. In order to manipulate
vector data, special instructions may be used. In general machines suitable for pipelining
should have the following characteristics:
a) Identical processes/functions are invoked repeatedly, each of which can be
subdivided into sub processes/sub-functions.
b) Successive operands are fed through the pipeline segments and require as few buffers
and local controls are as possible.

c) Operations executed by distinct pipelines should be able to share expensive resource

such as memories and buses in the system.
Hence most vector processors have pipeline structures. Vector instructions need to
perform the same set of operations on different data sets repeatedly. This is false for
scalar processing over a pair of operands. Vector processing eliminates overhead caused
by loop control mechanism. Vector instructions are specified by:
a) Operation code to select functional unit or reconfigure a multifunctional unit to

perform specified operation.
b) Base addresses for memory-reference instruction.
c) Address Increment between elements.
d) Address Offset relative to base address.
e) Vector length to determine termination of a vector instruction.
Pipeline vector configurations can be classified in to two types based on operands

received. They are:
a) Memory-to-memory architecture where source operands, intermediate and final

results are retrieved directly from the main memory. Information of the base address,
offset, the increment and vector length must be specified to enable data streams
transfer between main memory and pipelines.
b) Register-to-register architecture involves operands and results being retrieved
indirectly from the main memory through the use of a large number of vectors or
scalar registers.
The vector length can affect processing efficiency as long vectors require subdivisions
thereby increasing overhead. An optimized object code must be produced to maximize
utilization of pipeline resources to enhance vector-processing capability. A number of
approaches have been suggested. They are:
a) Enriching the vector instructions: This avoids excessive memory access and poor
resource utilization.
b) Combining scalar instructions: grouping of same type scalar instructions avoids
overhead.
c) Choosing suitable algorithms: A fast algorithm may be effective in increasing
processing efficiency.
d) Using a vectorizing compiler: an intelligent compiler must be developed to detect
concurrency among vector instructions which can be realized with pipelining or
chaining of pipelines. This compiler would regenerate parallelism lost in the use of
sequential languages.
b. Super scalar processors: Here multiple instruction pipelines are used. Multiple
instructions are used per cycle and multiple results are generated per cycle.

Emergence: The path to its widespread use took some time as it emerged in 3 consecutive
phases namely a) conception of an idea b) architecture proposals and prototype machines
and c) commercial products. Super scalar RISC processors emerged a) as a result of
converting an existing scalar RISC into superscalar one and b) as a result of conception
of a new architecture and its implementation as a superscalar from the beginning.
Superscalar CISC processors emerged after a long delay as these have to decode multiple
variable length instructions. CISC architecture (memory type) is more difficult to
implement than RISC (load/store) architecture. These processors have a low issue rate of
around 2 due to complexity of the architecture. The RISC processors have an issue rate of
4.
Specific Tasks: The first task is parallel decoding as superscalar processing involves
issuing of multiple instructions per cycle. This decoding is complex. Higher issue rate
can unduly lengthen the decoding cycle or can give rise to multiple decoding cycles
unless decoding is enhanced. An increasingly common method of enhancement is
predecoding. This is a partial decoding performed in advance of common decoding while
instructions are loaded into the instruction cache. To achieve higher performance these
processors have introduced instruction issue policies involving advanced techniques like
shelving, register naming and speculative branch processing.
Parallel Superscala Preserving Preserving

r Parallel
Decodi the the
Instruction Instruction
ng sequential sequential
Issue consistency consistency
of execution of exception
processing
Specific Tasks of Superscalar Processors

Subject: Discrete Mathematics (MC0063) Assignment No.: 1
1. A computer company wants to hire 25 programmers to handle systems programming and

40 programmers for applications programming. Of those hired, ten will be expected to
perform jobs of both types. How many programmers must be hired?

Here 25 programmers can work on systems while 40 can work only on applications
programming. Of the hired programmers, 10 will do both types of work. If A = {25} and
B = {40}, then as per the problem C = A∩B = {10}.
Hence the number of programmers need to be hired = (A + B) – (A ∩B) = (25 + 40) – 10
= 55.
2. If A = {1, 2, 3}, B= {2, 4, 5} find
(a) (A∩B) × (A–B)
A∩B = {2}
A–B = {1, 3}
Hence (A∩B) × (A–B) = {2} × {1, 3} = {(2, 1), (2, 3)}.
(b) A × (A–B)
A = {1, 2, 3}
A–B = {1, 3}
Hence A × (A–B) = {1, 2, 3}× {1, 3} = {(1, 1), (1, 3), (2, 1), (2, 3), (3, 1), (3, 3)}.
3. Prove that the set of real numbers is an Abelian group with respect to Multiplication.
Let R be a set of real numbers such that a, b ε R. The word ‘Abelian’ means
‘commutative’. If we can prove that regarding multiplication R obeys ‘closed’,
‘associative’, ‘identity’ and ‘inverse’ properties, R can be termed as Abelian. In order to
prove this we have to consider R as a set of real numbers where R = R – {0}.
Closed: Let a and b be two elements such that a, b ε R. Let it be such that a * b = c. if a =
5 and b = 6, then c = 30 which is real. If a = - 6 and b = 7, c = -42 which is also a real
number. Hence for all a and b belonging to R, we can say that c ε R. Hence ‘R’ is closed
w.r.t multiplication.
Associative: Let a, b and c ε R. Let it be such that a * (b * c) = (a * b) * c. if a = 5, b = 6

and c = 2, d = 5 * (6 * 2) = 60 = (5 * 6) * 2. If a = -5, b = 6 and c = -3, then d = -5 * (6 *
-2) = 60 = (-5 * 6) * (-2). Hence for all a, b, c belonging to R, associative property is
satisfied.
Identity: The property suggests that a * e = a. In this case e = 1 where ‘e’ is known as
identity. Also e * a = a implies e = 1. Again 1 is a real number belonging to R. Hence R
satisfies identity property.
Inverse: This property says that a * a’ = e meaning a * a = 1. Hence a ε R. Now a-1 is 1/a.
If a is not equal to zero (0), then 1/a is also a real number. Hence 1/a ε R meaning that
inverse property is satisfied.

Since R satisfies all four properties, R is an Abelian group with respect to multiplication.
4. Prove that a given connected graph G is Euler graph if and only if all vertices of G are of
even degree.
Proof: Let’s assume that G is an Euler graph meaning G contains an Euler line. Hence a
closed walk exists running through all the edges of G exactly once. Let v ε V be a vertex
of G. tracing the walk sees it going through two incident edges on v with one entered v
and the other exited.
V
This is true for intermediate vertices of the walk and terminal vertex because we exited
and entered at the same vertex at the beginning and ending of the walk. Therefore if v
occurs k times in the Euler line then d (v) = 2k. Thus if G is an Euler graph, then the
degree of each vertex is even.
Converse: Suppose all the vertices of G are of an even degree. We have to construct a
closed walk starting at an arbitrary vertex v and running through all the edges of G
exactly once. To find a closed walk, let’s start from the vertex v. Since every vertex is of
even degree, we can exit from every vertex we entered. The tracing cannot stop at any
vertex but at ‘v’. Since ‘v’ is also of even degree, we shall eventually reach ‘v’ when the
tracing comes to an end. If this closed walk (say h) includes all the edges of G, then G is
an Euler graph. Suppose the closed walk h doesn’t include all the edges. Then the
remaining edges form a subgraph h1 of G. Since G and h have their vertices of an even
degree, the degree of the vertices of h1 is also even. Moreover h1 must touch at least one
vertex ‘a’ because G is connected. Starting from ‘a’ we can again construct a new walk in
graph h1. Since all the vertices of h1 are of even degree and this walk h1 must terminate at
vertex ‘a’ this walk h1 combined with h forms a new walk which starts and ends at vertex
v and has more edges than those are in ‘h’. This process is repeated until we obtain a
closed walk travelling through all the edges of G. in this way we can get an Euler line.
Thus G is an Euler graph.
5. Prove that a connected planar graph with n vertices and e edges has e – n + 2 regions.
Let G be a connected graph where n, e and f are the number of vertices, edges and faces
(or regions) respectively. Then we need to prove that or
Proof: (Using mathematical induction on the number of faces f).
Part i): Suppose f = 1.
Then G has only one region. If G contains a cycle, then it’ll have at last two faces which
is a contradiction. Hence G has no cycles.
Since G is connected, we have that G is a tree. In a tree, we know that n = e + 1. So e – n
+ 2 = e – (e + 1) + 2 = 1 = f. Hence the statement is true for f = 1.

Part ii) Induction hypothesis: Suppose f>1 and the theorem is true for all connected
planar graphs with the number of faces less than f.
Since f>1, G isn’t a tree as a tree contains only one infinite region.
Then G has an edge k which is not a bridge (since G is a tree and only if every edge of G
is a bridge).
K F1
F2
Graph G with 4 faces Graph G – k with 3 faces
So the subgraph G – k is still connected. Since any subgraph of a plane graph is also a
plane graph, we have that G – k is also a plane graph. Since k is not a bridge, we have
that k is a part of a cycle (since an edge e of G is a bridge if and only if e is not a part of
any cycle in G). So it separates two faces F1 and F2 of G from each other. Hence in G – k,
these two faces F1 and F2 combined to form one face of G – k. we can observe this fact in
above graphs.
Let n (G – k), e (G – k) and f (G – k) denote number of vertices, edges and faces of G – k

respectively.
Now we have n (G – k) = n, e (G – k) = e – 1 and f (G – k) = f – 1.
By our induction hypothesis, we have that or

or
Hence by mathematical induction e conclude that the statement is true for all connected
planar graphs.
6. Find the values of the Boolean function f = ( x ∧ y ′) ∨ z ′ .
x y z x’ y’ z’ ( x ∧ y ′) f = ( x ∧ y ′) ∨ z ′

0 0 0 1 1 1 0 1
0 0 1 1 1 0 0 0
0 1 0 1 0 1 0 1
0 1 1 1 0 0 0 0
1 0 0 0 1 1 1 1
1 0 1 0 1 0 1 1
1 1 0 0 0 1 1 1
1 1 1 0 0 0 1 1

Subject: Discrete Mathematics (MC0063) Assignment No.: 2

1. Prove that a POset has atleast one greatest element and atmost one least element.
Proof: Let’s assume for the maximal element that contrary to the concept, the POset S
contains no greatest element. Let x1 ε S. Since x1 is not maximal, there exists x2 in S in
such a way that x2 > x1. Since x2 is not maximal, there exists x3 in such a way that x3 > x2.
If we continue this process, we get an infinite sequence of distinct elements x1, x2, x3…
Such that xi + 1> xi for each i. This is a contradiction to the fact that S contains only a finite
number of elements since S is a finite POset. Hence we conclude that S contains at least
one greatest/maximal element.
Hence by logic it can be said that S contains one minimal/least element. If one element is
the greatest, there has to be at least one element which will be the least. Hence the
statement is true for finite POset.
2. In how many ways the letters of the word MISSISSIPPI can be arranged so that the 4S’s
are not together.
In the word MISSISSIPPI, there are a total of 11 letters. Hence n = 11. Out of the 11
letters, there are 4 Ss, 4 Is, 2 Ps and 1 M. Since there are repetitions, considering that
repetitions are allowed, the total number of ways the letters can be arranged in
If the 4 Ss are kept together then the number of ways the letters can be arranged
Hence the number of ways by which the 4 Ss can be kept apart C = A – B = 34650 – 105
= 34545.
3. Prove that the function f(x) = 2x + 3 is one to one
i) To prove that f(x) is one-one:
Let f(x1) = f(x2) for some x1, x2 ε R implying

2x1 + 3 = 2x2 + 3
Or x1 = x2.
Thus for every x1, x2 ε R, f (x1) = f(x2) implies x1 = x2. Hence f (x) is one-one.
ii) To prove that f(x) is onto:
Let y ε R. Then to find x ε R such that f(x) = y i.e. 2x + 3 = y.

Solving for x, we get x = (y – 3)/2.
Since y ε R, x = (y-3)/2 ε R.

Hence for every y ε R exists x = (y-3)/2 ε R such that f{(y-3)/2} = y. Therefore f(x) is
onto.
Hence f(x) is one-to-one as it is both, one-one and onto.
4. Let B be a Boolean algebra. Show that for all a∈ B, there exists a unique complement a ′ .
Here B is a Boolean algebra defined as a non empty set defined by two binary operations
‘+’ and ‘.‘, a unary operation named complementation (‘) and two distinct elements 0 and
1. It is denoted by (B, +, ., ‘, O, 1). We can prove the above by showing that preliminary
results can be verified with complementation. In a Boolean algebra, we’ll prove that for
all a∈ B, i) a + a = a, ii) a.a = a and iii) a + 1 = 1.
a) a + a = a
Proof: a = a + 0 (Identity law)

= a + a.a’ (complement law)
= (a + a). (a + a’) (Distributive law)
= (a + a).1 (complement law)
= a + a.
b) a.a = a
Proof: a.a = a.a + 0 (Identity law)

= a.a + a.a’ (complement law)
= a. (a + a’) (distributive law)
= a.1
= a (complement law and identity)
c) a + 1 = 1
Proof: a + 1 = a + a + a’ (complement law)

= (a + a) + a’ (associative law)
= a + a’
= 1 (complement law)
5. Discuss about the different applications of fuzzy sets.
6. Prove that the vertices of every planar graph can be properly colored with five colors.
A ‘properly colored graph; means that:
a) For a graph ‘G’, all the vertices of the same are painted with a given ‘n’ number of
colors such that no two adjacent vertices have the same color and
b) A graph where each vertex has been assigned a color according to ‘proper coloring’.

A given graph can be colored in different ways as shown below.
V1 V1
V1
Red Red
Red
V2 Blue V2 Blue V2 Blue
V3 V4 V3 V4
V3 V4
Gree Yellow Yellow Yellow
Green Yellow n
V5 V5
V5
Red Red
Pink
Graph C with
Graph A with Graph B with
3 colors
5 colors 4 colors
a) In the above figure, graph A is a 5-chromatic graph, B is a 4-chromatic and C is a 3-

chromatic graph.
b) If G has loop at vertex v, then v is adjacent to itself meaning no proper coloring is
possible. Hence we assume that in any coloring context, the graph considered will
have no loops.
c) For coloring, disconnected graphs are not considered as coloring of one vertex will
not affect the other in any way.
d) Parallel edges between any pair of vertices can be replaced by a single edge without
affecting the adjacency of vertices.
e) For coloring problems only simple connected graphs or planar graphs need to be
considered.
Proof: Consider graph A where there are 5 vertices namely v1 to v5. Each vertex is
assigned a different color. Graph A shows that no adjacent vertices are colored with the
same color. In case of the other graphs, one or more color is repeated. Hence the other
graphs are not properly colored as color is not unique. Also adjacent vertices have the
same color. Hence a planar graph can be properly colored with 5 different colors.

Subject: Basic Web Development (Internet, HTML, Stylesheets & Basics of Multimedia)
(MC0064)
Assignment No.: 1

a) Internet Technologies: Today technology makes the internet what it is. Development
of new technologies is increasing the potent of the net. There are many technologies of
which five namely E-commerce, Java, Jini, XML and Wireless communication is
discussed below:
E-commerce: In earlier times, company websites only provided information to customers

about itself and products they have to offer. Customers could only view the products. At
present times, people can view the products, browse for different types of products and
shop for the same meaning they can place an order or orders over the internet and make
payments by credit/debit cards. This exchange is helped by new software called
‘shopping cart’ which recognizes customers’ purchases and computes all transactional
details like prices, taxes etc. Secure server links enable people to make payments.
Java: This is one of the most important technologies of the net. It’s an advanced object
oriented programming language that can be used for many applications including a web
page. It has a unique quality. Java programs can run without any modifications on a
broad variety of computers.
Jini: This is a connection technology based on the principle that ‘devices should work
together; they should simply connect to each other without drivers, operating systems or
wired cables/connectors. This technology works right away without a fuss and allows a
user to create his/her personal network.
XML: It’s primarily intended to meet the requirements of large scale web content
providers for industry specific markup, vendor neutral data exchange, media-independent
publishing, one-t-one marketing and processing of web documents by intelligent clients.
It’s also expected to find use in certain metadata applications.
Wireless Communications: This is one of the best technologies. Earlier it was difficult to
use such communications but now with advancements in science this is becoming more
and more useful. The advent of internet and email allows us to remain connected.
Wireless data communications first need mobile computing device like PCs, cell phones,
pagers itself. Then comes the wireless modem. Some devices have built-in modems
while others have to have a third party device. Lastly a user will require a subscription.
b) Networks: Computer network is an interconnected collection of autonomous

computers. If two or more computers exchange information among themselves, they are
said to be interconnected. There are different types of networks:
Point-to-Point Network: It consists of many connections between individual pairs of

machines. A circuit connects two nodes directly without intermediate nodes. P packet
going from source to destination may have to go through an intermediate node. As a rule,
large networks use this network but there are exceptions.

Local Area Networks (LAN): This uses direct, high speed cables to share hardware,
software and data resources. The connection spans a short distance and doesn’t use
telephone company wires. Computers connected by a LAN may be spread over a room or
several floors in a building. A LAN is confined to a small area and integrate up to several
hundred computers.
Wide Area Networks (WAN): This network is installed when widely separated locations
come into the picture. They have elements scattered over a large geographical region.
Parts of this network may be connected by cables while satellites and microwave connect
other parts. These require special media provided by telephone companies and other
firms specializing in this service. They require special hardware. They enable, remote
database access, file exchange, teleconferencing etc.
Metropolitan Area Network (MAN): Bigger than LANs and smaller than WANs. MANs
extend beyond the confines of a local area network. This is limited to a single city.
c) Media Access Control: There are two access methods used by the network
determined by NIC.
Ethernet: This is the most popular LAN technology. It strikes a good balance between
speed, price and ease of installation. The speeds can range from 10 million bits/second or
100 million bits/second. The latter is known as Fast Ethernet. The technology considers
collisions as normal events as it’s expected that when two stations send packets at same
time, the former will happen. It employs CSMACD using all nodes which listen to the
traffic on the network and try to send data only when it’s quiet. If two nodes transmit data
at same time, collisions are detected and the nodes go quiet and try to re-send the same.
Since the periods are random, one node will sent first and gain control of the network.
This can be configured in either a bus or start topology.
Token Ring: This is a major alternative to Ethernet. It avoids collisions all together. The
key is in token ring passing. Here only one station transmits data at one time. Prior actual
information is sent, a packet (token) is sent from one station to another. When sender gets
the token back, actual information packet is sent. It travels in one direction around the
ring, passing all other stations. The receiving station copies it but the packet continues
around the ring returning to the sender. The latter removes the former and sends a free
token to the next station around the ring. Hen ce a message in token format is sent from
node to node in one direction. At receiving node, user examines the token while other
nodes can only listen to the network. Token passing continues till original sender node
receives the token from the last network node, which acknowledges that the intended
receiver has seen the message.
2. Describe various mail protocols.
The various Email protocols are described in brief below:

SMTP: Simple Mail Transfer Protocol (SMTP) allows transmission of Email through the
internet. It’s a part of TCP/IP. It uses TCP providing a reliable means of communication
for transferring of messages between computer systems. Most host computers run on
UNIX. Hence many transport agents run under UNIX. Most of these machines use a
‘send mail’ transport agent which runs automatically in the background and is ready to
respond to whatever requests it may receive. SMTP is fast and efficient and since at least
one computer uses a transport agent that sends and receives mail according to SMTP,
emails are possible. For SMTP, both nodes have to be on-line for communication. Hence
POP comes in picture. SMTP governs the way. A US establishes a connection with a
MTA and transmits the email.
POP: Post Office Protocol (POP) is a mail collection and distribution centre. It works on
the offline principle with the mail server. It allows single user hosts to read mail from a
server. It allows creating a mailbox for each user having a mail account with the server.
Using POP a mail server on the internet system lets ys grab our mails and download
them to our PCs. Like SMTP, POP uses plain ASCII and independent platforms and
operating systems. It depends on SMTP to send mails and handles access to the
messages. POP3 is latest version of POP.
IMAP: Internet Mail Access Protocol (IMAP) allows hierarchical storage of mail and a
message retrieval system allowing selective access to the mailbox. Using IMAP, we can
organize our mails and read them on the server itself. For slow dial-up connections,
IMAP allows the user to download only the header or the body of the message containing
a large attachment. It allows a user to access multiple mail servers and multiple users to
share one mailbox. IMAP can work on online, offline or disconnected operation modes
of communication.
MIME and S/MIME: SMTP can handle text only containing 7-bit ASCII text. It cannot
handle binary data and other multimedia formats that we now send as attachments. Hence
Multipurpose Internet Mail Extensions (MIME) that packs data in other format into a
format that SMTP can handle. SMIME stands for Secure MIME. This allows addition of
security to MIME messages. Security services allowed are authentication and privacy.
SMIME is not specific to internet and can be used in any electronic mail environment.
UUCP: This is a UNIX based network. It’s built in to machines operating on UNIX. It
connects UNIX based machines but less powerful than TCP/IP. UUCP doesn’t allow
remote login, mail is slower and more awkward than TCP/IP. It is cheap and reliable over
dial-up or hardwired connections. It’s a standard part of UNIX. It allows UNIX systems
to connect together forming a chain. Internet and UUCP connections cannot be compared
if we consider all connections in internet as permanent and messages are transmitted
quickly. To send mail to UUCP address, the route to be taken by the message must be
specified. Post creation of message, the user system will start the message until a contact
is established and within seconds the message will be transmitted. If a user has no idea
about the path or path is too long, a UUCPMAPPING PROJECT is used allowing the
user to use a UUCP address similar to an internet address.

3. Explain various HTML tags associated with creation of lists on a web page and write an
application that uses all these tags and show the corresponding web page as a screenshot.
There are 8 tags associated with lists and each of them is explained below:
<UL>…. </UL>: This stands for unordered lists. Here different items can be written in a
list form without any numbers associated with them. Here the items are in bulleted form.
<OL>…..</OL>: This stands for ordered lists. Here different items are written in a list
form and the same is numbered in order. Here roman or Arabic numbers like 1, 2, 3
accompany each item.
<LI>: This is a singleton tag and is associated with <UL> and <OL> tags. This is a child
element used to create a list item in an ordered list, unordered list, menu list or directory
list.
<DT>: This is a singleton tag. It’s a child element and can only be used in a definition
list element. It creates a term that can be defined in a definition list. It’s known as
Definition Term.
<DD>: This stands for Definition. It’s a singleton tag marking the definition for a term in
a glossary list. It’s used for glossaries or other lists in which a single term/line needs to be
associated with a block of indented text.
<DL>……</DL>: This stands for Definition List. It requires two special elements
namely the <DT> and <DD> tags. This list is rendered without bullets.
<DIR>……</DIR>: This stands for Directory List. This block level element marks
unbulleted list of short element such as filenames. <LI> tag is the only item contained
here.
<MENU>…..</MENU>: This stands for Menu List. Encloses a menu list where each
element is a word or short phrase that fits on a single line. This list is more compact than
other lists. <LI> tag is the only item contained here.
Application:
<HTML>
<BODY>
<TITLE> Lists </TITLE>
<BODY>
<H1> <CENTER> Example Showing Use of All List Tags in HTML </CENTER></H1>
<UL>
<LI> Romance
<OL>
<LI> Romeo and Juliet

<LI> Love and Passion

</OL>
<LI> Horror
<OL>
<LI> Count Dracula
<LI> The Monster
</OL>
</UL>
<DL>
<DT> Dweeb <DD> A person who may mature into a complete nerd or geek
<DT> Hacker <DD> A clever programmer
<DT> Nerd <DD> Technically bright but socially inept person
</DL>
<DIR>
<LI> File.doc
<LI> Books.dat
</DIR>
<MENU>
<LI> Buttermilk
<LI> Rolls
</MENU>
</BODY>
</HTML>

4. Describe the following with respect to Form Controls:
a) Form Controls: These allow users to interact with forms. The control’s ‘control name’
is given by its name attribute. Each control has an initial and current value. Both these
values are character strings. The initial value may be specified with the control element’s
value attribute. The current value is first set to the initial value. Then the current value
may be modified through user interaction and scripts. The initial value doesn’t change. If
a form is reset, each control’s current value resets to initial value. If a form is submitted,
some controls have their name paired with the current value and the pairs are submitted
with the form.
b) The FORM element: This element has a number of attributes which specify actions to
be performed by the form. The attribute definitions are below:
Action: Specifies a form processing agent.
Method: specifies which HTTP method will be used for submission.
Enctype: specifies content type used to submit the form to the server.
Accept-charset: Specifies list of character encodings for input data accepted by the server
processing this form.
Accept: specifies a comma-separated list of content types that a server processing this
form will handle correctly.
Name: It names the element so that it may be referred to from style sheets or scripts.
c) The INPUT element
The attribute definitions associated with this element are described below in brief:
Type = text|password|checkbox|radio|submit|reset|file|hidden|image|button: This

specifies the type of control to create. Default value is ‘text’.
Name = cdata: Assigns control name.
Size: Tells the user agent the initial width of the control. Width is in pixels in general.
Maxlength: When this has value ‘text’ or ‘password’ it specifies the maximum number of
characters the user may enter.
Checked: If ‘radio’ or ‘checkbox’ is the value this Boolean attribute specifies that the
button is on.

SRC: When this has ‘image’ value it specifies the location of the image to be used to
decorate the graphical submit button.
d) The BUTTON element
Buttons created with this element function same as those created by INPUT element but
offer richer rendering possibilities. This element may have content. Visual user agents
may render BUTTON buttons with relief and an up/down motion when clicked, while
they may render INPUT buttons as flat images. The various attributes associated with
BUTTON element are:
Name: Assigns control name.
Value: Assigns initial value to the button.
Type: Declares type of button. Possible values are reset (creates reset button), button
(creates a push button) and submit (creates a submit button).
e) Write the appropriate code showing the usage of the above concepts and show the
appropriate web page output as a screen shot.
<HTML>
<HEAD> <TITLE> Forms </TITLE>
</HEAD>
<BODY>
<FORM action = "http://somesite.com/prog/adduser" method = "post">
<P>
Firstname <INPUT type = "text" name = "firstname"> <BR>
Lastname <INPUT type = "text" name = "lastname"> <BR>
Email Address <INPUT type = "text" name = "email"> <BR>
<INPUT type = "radio" name = "Sex" value = "Male" > Male <BR>
<INPUT type = "radio" name = "Sex" value = "Female" > Female <BR>
<BUTTON name = "submit" value = "Submit" type = "Submit">
</BUTTON>
<BUTTON name = "Reset" type = "Reset">
</BUTTON>
</P>
</FORM>
</BODY>
</HTML>


Learning Centre: 1597
Subject: Basic Web Development (Internet, HTML, Stylesheets & Basics of Multimedia)
(MC0064)
Assignment No.: 2

a) How Internet Works: The internet uses the TCP/IP (Transmission Control
Protocol/Internet Protocol) in order for different computers across different locations to
exchange messages. TCP/IP is a set of rules framed to connect computers across a WAN.
Let’s say A and B has two internet accounts at a and b respectively. When A sends a
message to B, TCP/IP breaks that message down into packets, assigns an identification
number (sequence number) to each packet and transmits them from a to b. At b, TCP/IP
reconstructs the original message by collecting all the packets in sequence. Hence B gets
to see the message from A. The computer networks are packet switched. The networks
send blocks of data (like a file or an email etc) and these are transmitted while
undergoing collisions if many stations communicate at the same time. However
multiplexing techniques ensure that the colliding packets do not go to waste as network
resources are shared by the stations.
b) RFCs: The internet follows a large number of protocols and conventions. A protocol
explained in a technical way is called RFC (request for comment). RFC is a detailed
technical description to describe how something is supposed to work. It’s not an
invitation to send different types of comments. Each RFC is given a particular
identification number and is made available to anyone who wants to read it. In this way,
this technical way is distributed around the world in an organized and reliable manner.
Hence developers and engineers who want to design different types of products to work
with the internet protocols can download the RFCs and use them as reference materials.
c) Internet Technologies: Today technology makes the internet what it is. Development
of new technologies is increasing the potent of the net. There are many technologies of
which five namely E-commerce, Java, Jini, XML and Wireless communication are very
important. For example, E-commerce allows users/customers to browse company
websites for products and can purchase the same by placing orders and making payment
in secure modes. Java technology is widely used in the development of web applications
in conjugation with other technologies. Jini is a connection technology that allows
trouble free working of machines connected to networks. XML is used in certain metadata
applications and wireless communications allow users to connect to the net without using
wires or speak to others using a cell phone.
d) OSI Model: When computers are used to develop data communication systems
serving many users located over a wide physical range and with many needs, the
protocols used in the network require more than a network standard for formatting and
interconnection. The standards have been established by ISO in Geneva, Switzerland and
are represented by the Open Systems Interconnection (OSI) and are usually referred to as
OSI reference model. This model has seven layers ranging from the lowest where
physical and electrical connections to the network exist to the highest where user data has
been passed resides. The layers are:
i. Level 7 or Application layer (highest)

ii. Level 6 or Presentation layer

iii. Level 5 or Session layer

iv. Level 4 or Transport layer
v. Level 3 or Network layer
vi. Level 2 or Data link layer
vii. Level 1 or physical layer
2. Describe the following using HTML:
a) Various definitions associated with HTML: The various definitions that are
associated with HTML are:
i. Author: An author is a person or program that writes or generates HTML

documents. An authoring tool is a special case of an author namely it’s a program
that generates HTML.
ii. User: A user is a person who interacts with a user agent to view, hear or
otherwise use a rendered HTML document.
iii. HTML user agent: This is any device that interprets HTML documents. These
include visual browsers, search robots, proxies etc.
b) SGML: SGML is a system for defining markup languages. Authors markup their
documentation by representing structural, presentational and semantic information
alongside content. HTML is a markup language. Each markup language defined in
SGML is called an SGML application which is characterized by:
i. An SGML declaration specifying types of characters and delimiters that’ll appear

in the application
ii. A document type definition (DTD) which defines the syntax of markup
constructs.
iii. A specification describing the semantics to be ascribed to the markup and imposes
syntax restrictions that cannot be expressed within the DTD.
iv. Document instances containing data and markup. Each instance contains a
reference to the DTD to be used to interpret it.
c) Constructs used in HTML: The various constructs used in HTML are described
below:
i. Tags: These are elements contained within angle brackets (<>) that tell the
browser that the element is an HTML command. They are generally paired
meaning they have an opening and a closing tag. For example
<B>……………..</B> stands for ‘bold’ tag. It bolds the text font. <B> is the
opening and </B> is closing tag. Some tags like <LI> are singleton meaning they
don’t have a closing tag.
ii. Attributes: These are extra information provided within the tags itself. They
mostly work without quote marks. Some require quote marks. <H1 ALIGN =
‘CENTER’> signifies a heading that has to be centered.

iii. Structure tags: They provide the browser with information concerning document
characteristics like version, introductory information and title. These do not
appear in the HTML document and work ‘behind the scenes telling the browser
where to include elements and method of display. Each HTML document must
have nested and ordered five structure tags.
iv. Elements of HTML syntax: This describes how a web browser recognizes and
interprets the instructions contained in markup tags. The angle brackets (<>) are
the special control characters that separate HTML markup from ordinary text. The
browser uses the markups inside the brackets to display information.
v. Text: This is actual content that gets modified by the tags. For example <i> This is
an HTML document </i> will make the text look like this: This is an HTML
document.
d) Basic structure of a HTML document: An HTML document is basically divided into

three parts:
a. A head that identifies a document as HTML and establishes its title.

b. A body containing the content for a web page. This part holds all information that
is displayed on a page including text, links to graphics, multimedia, locations
inside the same file and to other web documents
c. A footer that labels a page by identifying its author, date of creation and version
number.
3. Describe the following elements used in constructing tables:
a) The TABLE element: The attributes associated with this element are:
i. Summary: Provides a summary of the table’s purpose and structure for user agents
rendering to non-visual media.
ii. Align = left/right/center: Specifies the table position with respect to the document.
‘Left’ signifies table is to be left aligned and so on.
iii. Width: Specifies desired table width and is intended for visual user agents. User
agents will determine the width if no specification is given.
This element contains other elements specifying format, caption etc. User agents render
incrementally meaning rows arrive one after other rather than the whole table appearing
at once. In this element, the directionality is also a matter. Tables may be left-to-right or
right-to-left. If extra cells are added to a row, the cells may be added to the right of the
table for LTR tables and so on.

b) The CAPTION element: The only attribute is:
Align = top/bottom/left/right: Specifies position of the caption with respect to the table
for visual user agents. ‘Top’ means caption should be at the top of the table and so on.
This element’s text should describe the nature of the table. This element is permitted
immediately after the TABLE opening tag. Only one CAPTION element should be
present for a TABLE element. If non-visual agents are used, people may not be able to
understand the table description. Hence authors should provide more information
summarizing the purpose and structure of the table using summary attribute of TABLE
element.
c) THEAD, TFOOT, and TBODY elements: Table rows maybe grouped into a table
head, table foot and one or more table body sections using THEAD, TFOOT and
TBODY respectively. It enables user agents to support scrolling of table bodies
independent of the table head and foot. For long tables, head and foot information may be
repeated on each page containing table data. Head and foot should have information
about table’s columns. The table body should contain rows of table data. When present,
each element contains a row group. Each row group must contain at least one row
determined by the TR element. All elements must have same number of columns. If these
elements are used then:
i. TFOOT must appear before TBODY so that user agents can render the foot
before receiving all of the data rows.
ii. TBODY opening tag is always required except the case when table has one body
and no head or foot.
iii. THEAD and TFOOT start tags are required when head and foot sections are
present. Corresponding end tags are not required.
d) COLGROUP and COL elements: Columns groups allow authors to create structural
divisions within a table. Authors may highlight this structure through style sheets or
HTML attributes. A table may either contain a single implicit column group (no
COLGROUP element delimits the columns) or any number of explicit column groups
(each delimited by an instance of the COLGROUP element). The COL element allows
authors to share attributes among several columns without implying any structural
grouping. The ‘span’ of the COL element is the number of columns that will share the
element’s attributes.
<HTML>
<HEAD> <TITLE> Grouped rows and columns </TITLE>
</HEAD>
<BODY>

<TABLE border = "2" align = center frame= "hsides" rules = "groups" Summary =
"Code page support in different versions of MS WINDOWS.">
<COLGROUP align = "center">
<COLGROUP align = "left">
<COLGROUP align = "center" span = "2">
<COLGROUP align = "center" span = "3">
<CAPTION align = bottom> Code-page support in different versions of Microsoft
Windows </CAPTION>
<THEAD valign = "CENTER">
<TR>
<TH> Code Page ID
<TH> Name
<TH> ACP <TH> DEMCP
<TH> Windows NT 3.1 <TH> Windows NT 3.51 <TH> Windows 95
<TBODY>
<TR><TD>1200<TD>Unicode<TD><TD><TD>X<TD>X<TD>
<TR><TD>1250<TD>Windows 3.1 Eastern European <TD>X<TD> <TD>X<TD>
<TD>X<TD>
<TR><TD>1251<TD>Windows 3.1 Cyrillic <TD>X<TD> <TD>X<TD> <TD>X<TD>
<TBODY>
<TR><TD>437<TD>MS-DOS United States<TD> <TD>X <TD>X <TD>X <TD>X
<TR><TD>708<TD>Arabic (ASMO 708) <TD>X <TD> <TD> <TD>X
<TR><TD>710<TD>Arabic (Transparent Arabic) <TD> <TD>X <TD> <TD> <TD>X
<TFOOT valign = "CENTER">
<TR>
<TH> Code Page ID
<TH> Name
<TH> ACP <TH> DEMCP
<TH> Windows NT 3.1 <TH> Windows NT 3.51 <TH> Windows 95
</TABLE>
</BODY>
</HTML>

4. Discuss the following with respect to Frames:
a) The FRAMESET element: The major attributes associated with this element are:
i. Rows: specifies layout of the horizontal; frames. It’s a comma separated list of
pixels, percentages and relative strengths.
ii. Cols: specifies layout of vertical frames. It’s a comma separated list of pixels,
percentages and relative strengths.
iii. Rows and Cols: both attributes can be set at the same time to create a grid. Frames
are created left-to-right for columns and top-to-bottom for rows. When both
attributes are specified, views are created left-to-right in the top row, left-to-right
in the second row and so on.
Framesets may be nested to any level. Authors may share data among frames by
including this data via OBJECT element.
b) The FRAME element: The attributes associated with this element are:
i. Name: Assigns a name to the frame. The name may be used as a target of
subsequent links.
ii. Longdesc: specifies a link to a long description of the frame. This description
should supplement the short description provided using the title attribute and
maybe useful for non-visual user agents.
iii. SRC: specifies the location of the initial contents to be contained in the frame.

iv. Noresize: this Boolean tells the user agent that the frame window mustn’t be
resizable.
v. Scrolling: specifies scroll information for the frame window. Possible values are
‘Yes’, ‘No’ and ‘Auto’.
vi. Frameborder: Provides the user agent with information about the frame border.
Possible values are ‘0’ and ‘1’.
vii. Marginwidth: specifies amount of space to be left between the frame’s contents in
its left and right margins. Value must be greater than zero.
viii. Marginheight: specifies amount of space to be left between the frame’s contents
in its top and bottom margins.
The FRAME element defines the contents and appearance of a single frame.
c) Specifying target frame information: The only attribute associated with this is
‘target’. It specifies the name of a frame where a document is to be opened. By assigning
a name to a frame using the name attribute the author can refer to it as the target of links
defined by other elements. This attribute may be set for elements that create links, image
maps and forms. When many links in the same document designate the same target, it’s
possible to specify the target once and dispense with the target attribute of each element.
This is done by setting the target attribute of the BASE element.
d) Alternate content: Authors should supply alternate content for user agents that do not
support frames or are configured not to display frames.
i. NOFRAMES element: This specifies content that should be displayed only by user
agents that don’t support frames or cannot display frames. This element is a part
of both the transitional and frameset DTDs. A document where DTD is used,
NOFRAMES may be used at the end of the FRAMESET section of the document.
NOFRAMES may be used in a document which is a source of a frame using
transitional DTD allowing the author to explain the document’s purpose in cases
when it’s viewed out of the frameset or with a user agent that doesn’t support
frames.
ii. Long description of frames: The Longdesc attribute allows authors to make frame
documents more accessible to people using non-visual user agents. It designates a
resource providing a long description of frames. Authors should note that long
descriptions are attached to the frame itself and not the contents. Since the
contents are variable, the initial long description is likely to become in appropriate
for the frame’s later contents. In particular, authors should not include an image
as the sole content of the frame. The image should be specified in a separate
HTML document and therein annotated with the appropriate alternate text.

<HTML>
<HEAD> <TITLE> Frames </TITLE>
</HEAD>
<FRAMESET cols = "30%, 30%, 40%">
<FRAMESET rows = "100, 150, 200">
<FRAME src = "contents_of_frame1.html">
<FRAME src = "contents_of_frame2.gif">
</FRAMESET>
<FRAME src = "contents_of_frame2.html">
<NOFRAMES>
<P> This frameset document contains:
<UL>
<LI> Some neat contents
<LI> A neat image
<LI> Some other neat contents
</UL>
</NOFRAMES>
</FRAMESET>
</HTML>

Subject: Financial Management & Accounting (MC0065) Assignment No.: 1
1. What is Depreciation?

Depreciation is used to spread the cost of an asset over the span of several years. In
simple words we can say that depreciation is the reduction in the value of an asset due to
usage, passage of time, wear and tear, technological outdating or obsolescence, depletion,
inadequacy, rot, rust, decay or other such factors. In accounting, depreciation is a term
used to describe any method of attributing the historical or purchase cost of an asset
across its useful life, roughly corresponding to normal wear and tear. Depreciation is
often mistakenly seen as a basis for recognizing impairment of an asset, but unexpected
changes in value, where seen as significant enough to account for, are handled through
write-downs or similar techniques which adjust the book value of the asset to reflect its
current value. Therefore, it is important to recognize that depreciation, when used as a
technical accounting term, is the allocation of the historical cost of an asset across time
periods when the asset is employed to generate revenues.
2. What are the elements of an accounting system?
The elements of an accounting system are its ‘Accounting Principles’. These are rules of
action or conduct adopted by the accountant’s university in recording accounting
transactions. Different professional bodies across the world have made recommendations
on accounting principles in recent years. The principles are collectively known as GAAP
(Generally Accepted Accounting Principles). Accounting principles are classified into
a) Accounting Concepts and

b) Accounting Conventions.
Accounting Concepts:
They are postulates, assumptions or conditions upon which accounting records and
statements are based. They are developed to convey the same meaning to everyone. Some
of the major concepts are:
a) Entity Concept
b) Dual Aspect Concept
c) Going Concern Concept
d) Money measurement Concept
e) Cost Concept
f) Cost-attach concept
g) Accounting Period Concept
h) Accrual Concept
i) Periodic Matching of Cost and Revenue Concept
j) Realization Concept and
k) Verifiable Objective Evidence Concept
Accounting Conventions:

Conventions are the customs or traditions guiding the preparation of accounting

statements. They are adapted to make financial statements clear and meaningful. The
major conventions are:
a) Convention of Disclosure
b) Convention of Materiality
c) Convention of Consistency and
d) Convention of Conservatism.
3. How do you prepare Flexible Budget?
The following illustration represents how a flexible budget can be prepared. A budget is
to be prepared for 6000 and 8000 units production. Administrative expenses are fixed for
all levels of production. The expenses budget for production of 10000 units in a factory is
displayed below:
Per units
Details (Rs)
Materials 70
Labor 25
Variable overheads 20
Fixed overheads (Rs 100000) 10
Variable Expenses (Direct) 5
Selling Expenses (10% fixed)13 13
Distribution Expenses (20% fixed) 7
Administration Expenses (Rs 50000) 5
Total 155
Table 1: Expenses budget for 10000 units production for company ABC
Solution:
a) Materials, labor, direct expenses and variable overheads are variable costs. Hence
cost/unit will be the same in all production levels.
b) Fixed overheads are constant for all production levels.
c) Selling and distribution expenses are partly fixed and partly variable. Variable
part/unit will be same for all levels. Fixed part in total will be constant for all
levels.
At 10000 units, selling expenses per unit is 13 of which 10% is fixed. Hence fixed part is
10% of 13 = 1.3.
Total fixed cost is 1.3*10000 = Rs 13000.
Variable cost/unit = 90%*13 = Rs 11.70

The variable cost for 10000 units = Rs 11.70 * 10000 = Rs 111700.

Total selling expenses for 10000 units = Rs 117000 + Rs 13000 = Rs 130000.
Similarly for 6000 units, variable expenses =Rs 70200 and Fixed will be Rs 13000.
Hence total selling expenses for 6000 units = Rs 83000.
Similarly, distribution expenses are calculated.
6000 8000
Cost units units 10000 units
Per Per Per
unit Total unit Total unit Total
7 42000 7 56000
Materials 0 0 0 0 70 700000
2 15000 2 20000
Labor 5 0 5 0 25 250000
Direct
Expenses 5 30000 5 40000 5 50000
60000 80000
Prime Costs 100 0 100 0 100 1000000
Factory
overheads
10000 10000
Fixed 16.67 0 12.5 0 10 100000
12000 16000
Variable 20 0 20 0 20 200000
82000 10600
Factory Cost 136.67 0 132.5 00 130 1300000
Administrative 8.33 50000 6.25 50000 5 50000
87000 11100
Expenses 145 0 138.75 00 135 1350000
Selling
&Distribution
Expenses
10660 13000
Selling 13.87 83200 13.32 0 13 0
Distribution 7.93 47600 7.35 58800 7 70000
10008 12754 15500
Total Cost 166.8 00 159.35 00 155 00
Table 2: Flexible budget calculations for 6000 and 8000 units production
4. Briefly explain concept of Profit/Volume Ratio.
This is popularly known as P/V Ratio. It expresses the relationships between contribution
and sales. It’s expressed in percentage. P/V ratio can be calculated in either of the
following ways:

…………… (1)
OR
Where C = Contribution (difference between sales and variable costs),
S = Sales and
V = Variable Costs.
P/V ratio can be determined by expressing change in profit or loss in relation to change in
sales. P/V ratio indicates the relative profitability of different products, processes and
departments. If information about two periods is given, P/V ratio is calculated as:
P/V ratio is more important to watch in business. It’s the indicator of the rate at which the
organization is earning profit. A high ratio indicates high profitability and a low one
indicates low profitability. It’s useful to calculate Break Even Point and at a given level
of sales, what sales are required to earn a certain amount of profit etc. Higher P/V
indicates that a firm is in good financial health. P/V ratio can be improved by taking the
following steps:
a) Sales increase
b) Reduction in marginal costs and
c) Concentration on sales of profitable product.
Limitations:
a) Depends heavily on contribution

b) Indicates only relative profitability.
c) Over simplification may lead to wrong conclusions.
d) Higher ratio shows the most profitable item only when other conditions are constant.
e) Fails to consider the capital outlays required by additional productive capacity.
Factors affecting P/V Ratio:
a) Fixed Cost
b) Sales Volume
c) Selling Price and
d) Variable Cost/Unit.
5. Briefly explain features of cash flow statements.
The following basic information is needed to prepare cash flow statements:

a) Comparative Balance Sheet: Balance sheets at the beginning and at the end of the
accounting period indicate the amount of changes that have taken place in assets,
liabilities and capital.
b) Profit and Loss Account: The P&L a/c of the current period enables to determine the
amount of cash provided by or used in operations during the accounting period after
making adjustments for non-cash, current assets and current liabilities
c) Additional Data: In addition to the above statements, additional data are collected to
determine how cash has been provided or used like sale or purchase of assets for cash.
Cash Flow Statements (CFS) differ from Funds Flow Statements (FFS) in the following
manner:
a) FFS is based on accrual accounting system while CFS preparation involves all
transactions effecting cash or cash equivalents.
b) FFS analyzes sources and application of funds of long-term nature and net
increase/decrease I long-term funds will be reflected on the firm’s working capital.
CFS only considers increase/decrease in current assets and liabilities in calculating
cash flow of funds from operations
c) FF analysis is useful for long range financial planning while CF analysis identifies
and rectifies current liquidity problems of the firm.
d) FFS is a broader concept compared to CFS.
e) CFS is mandatory unlike FFS.
f) FFS tallies funds generated from various sources with various uses to which they are
put. CFS starts with opening balance of cash and reach to the closing balance of cash
by proceedings through sources and uses of cash.
6. Write a short note on:
a) Computation of changes in Working Capital: This statement is a part of a Funds

Flow Statement. It follows the Statement of Sources and Applications of Funds. It’s
primary purpose is to explain the net change in Working Capital, as arrived in the Funds
Flow Statement. Here, all Current Assets and Current Liabilities are individually listed.
Against each account, the figure pertaining to that account at the beginning and at the end
of the accounting period is shown. The net change in its position is also shown. The
changes taking place with respect to each account should add up to equal the net change
in working capital, as shown by the Funds Flow Statement.
b) Funds from operations: During the course of trading activity, a company generates
revenue mainly in the form of sale proceeds and pay for costs. The difference between
these two items will be the amount of funds generated by trading operations. The funds
generated can be calculated either from the operation (depreciation, depletion, dividends
etc) of the firm itself or by preparing Adjusted Profit and Loss Account statement.
c) Sources and Application of Funds
Sources:

a) Funds raised from Shares, Debentures and Long-term loans: The long-term funds
are injected into the business during the year by issue of shares/debentures and by
raising long-term loans. Any premiums collected also are a part of this source.
b) Sale of fixed assets and Long term investments: Amounts generated from sale of
fixed assets are a source of funds. FFS preparation here involves gross sale
proceeds from the sale. This activity doesn’t produce fresh funds but it releases
funds to finance the assets.
Application:
a) Repayment of Preference Capital or Debentures or long-term debit: It represents

the application of firm’s funds released from business through redemption of
preference shares or debentures, repayment of long-term loans previously made
by the firm. A reduction in equity capital is also an application of funds.
b) Purchase of fixed assets or long-term investments: Funds used to purchase long-
term assets are the most significant application of funds during the year. This
includes capital expenditures on land, machinery, furniture etc.
c) Distribution of dividends and payment of taxes: Dividends distributed to
shareholders and tax paid during the year is application of funds for the firm.
d) Loss from operation: Losses in trading activities use up funds. If costs are more
than revenue, a cash outflow will be the result.
d) Illustration: Following are the summarized Balance Sheet of ‘X’ Ltd as on

31/12/2004 and 2005. Additional Information: a) Dividend of Rs 11500 was paid, b)
Depreciation written off on plant Rs 7000 and on buildings Rs 5000 and c) Provisions for
tax was made during the year for Rs 16500. A funds flow statement is to be prepared for
31/12/2005 with the help of the Balance Sheet.
Liabilities 2004 2005 Assets 2004 2005

Share Capital 100000 125000 Goodwill 0 2500
General Reserve 25000 30000 Buildings 100000 95000
P & L a/c 15250 15300 Plant 75000 84500
Bank Loan (Long-term) 35000 67600 Stock 50000 37000
Creditors 75000 0 Debtors 40000 32100
Provision for Tax 15000 17500 Bank 0 4000
Cash 250 300
Total 265250 255400 265250 255400
Table 1: Summarized Balance Sheet of company for 31/12/2004 and 31/12/2005

Increases Decrease
Particulars 2004 2005 (-) s (+)
Current Assets
Cash 250 300 50
Bank 0 4000 4000 7900
Debtors 40000 32100
Stock 50000 37000
90250 73400
Current Liabilities
Creditors 75000 75000
Working Capital 15250 73400
Net increase in Working
Capital 58150 58150
73400 73400 79050 79050
Table 2: Schedule of changes in working capital (Rs)
Sources Rs Particulars Rs
Funds from
operations 45050 Purchase of Plant 16500
Issue of Shares 25000 Income tax paid 14000
Bank Loan 32600 Dividend Paid 11500
Goodwill Paid 2500
Net increase in Working
capital 58150
Total 102650 102650
Table 3: Funds Flow Statement
7. What is Combined Ratios?
Combined Ratios or Inter-Statement Ratios relate two items or two groups of items of
which one is from the Balance Sheet and one is from the revenue statements. The
different types of combined ratios are:
a) Return on Capital Employed (ROCE)

b) Return on Proprietor’s Funds
c) Earnings per share
d) Dividend Payout Ratio and
e) Debtor’s Turnover Ratio (Debtors’ Velocity)

8. What is an audit?
An audit, or an audit of financial statements, is the review of the financial statements of a

company or any other legal entity (ex: governments), resulting in the publication of an
independent opinion on whether or not those financial statements are relevant, accurate,
complete, and fairly presented. Financial audits are typically performed by firms of
practicing accountants due to the specialist financial reporting knowledge they require.
The financial audit is one of many assurance or attestation functions provided by
accounting and auditing firms, whereby the firm provides an independent opinion on
published information. Many organizations separately employ or hire internal auditors
who do not attest to financial reports but focus mainly on the internal controls of the
organization. External auditors may choose to place limited reliance on the work of
internal auditors.

Subject: Financial Management & Accounting (MC0065) Assignment No.: 2

1. What is the purpose of Trial Balance? Explain the contents of trial balance.
A trial balance is the list of accounts showing debit and credit balances. It serves the
following purposes:
a) To ascertain the arithmetical accuracy of the accounts opened in the ledger.

b) To know the balance of any Ledger Account.
c) To serve as an evidence of the fact that the double entry has been completed in
respect of every transaction.
d) To facilitate the preparation of final accounts promptly.
e) To help the proprietor to draw conclusions by comparing the balances of past and
present.
The contents of a trial balance are as follows:
a) Heading: The heading of a trial balance is written at the top. It is essential to mention
the date on which accounts have been closed and trial balance is extracted.
b) Columns: A trial balance has four columns. The first column is meant for recording
names or heads of those accounts in the ledger whose balances or totals are to be
entered. The second column is meant for recording the number of that page in the
ledger where the accounts concerned appear. The third and fourth columns are meant
for recording the amounts of debit and credits respectively
c) Total: The debit and credit balances of all accounts appearing in the ledger are
entered in the trial balances and totaled. The total of the debit and credit columns
must match.
2. What is balance Sheet Ratios?
Balance Sheet Ratios or Financial Ratios deal with the relationships between two items
or groups of items which are together found in the balance sheet. Ratio of current assets
and current liabilities, ratio of stock to working capital etc. are some examples. This ratio
falls under the traditional classification of ratios.
3. Explain Classification of Ratios.
There is no dearth of financial ratios today. There are ratios for different purposes for
different types of users and for different types of analysis. The ratio can be primarily
grouped into:
a) Traditional classification of ratios,

b) Functional classification and
c) User’s angle.
Traditional classification of ratios includes the following types:
a) Balance Sheet Ratio or Financial Ratios,

b) Revenue Statement Ratios or Income Statement Ratios and
c) Inter-statement Ratios or Combined Ratios.
Functional classification includes:
a) Liquidity Ratios,
b) Leverage Ratios,
c) Activity Ratios and
d) Profitability Ratios.
From the user’s point of view, ratios can be classified into:
a) Shareholders’ point of view.

b) Short-term creditors’ point of view and
c) Long-term creditors’ and Management point of view.
4. What is the difference between Funds flow statement and P & L A/C?
The following are the main differences between a Funds Flow Statement and a Profit and
Loss a/c:
a) Objective: The main objective of preparing a Funds Flow Statement is to ascertain the
funds generated from operations. This reveals the source of funds and their users. In
case of a P&L a/c, the objective is to ascertain the net profit earned/loss incurred by
the company out of the business operations at the end of a particular period.
b) Basis: FFS is prepared based on financial statement of two consecutive years while
the latter is prepared on the basis of nominal accounts in the ledger
c) Usefulness: FFS is useful for creditors and management while the latter is useful to
outside parties, shareholders including creditors and management.
d) Type of data used: FFS takes into account only funds available from trading
operations and funds available from other sources like issue of share capital and sale
of fixed assets etc. The latter use only income and expenditure transactions relating to
trading operations of a particular period. If shares are issued for cash, the same is
shown in FFS but in P&L a/c it’s not shown as income.
5. What are overheads and non-cost Items?
Overheads: These are an aggregate of indirect cost. It’s also known as ‘on cost’ or
‘Supplementary Cost’. It arises as a result of overall operation of a business. It arises as a
result of overall protection of a business. According to Weldon ‘overhead’ means ‘the
cost of indirect material, indirect labor and such other expenses including services cannot
be conveniently be charged to direct specific cost units. It includes all manufacturing and
non-manufacturing supplies and services. These costs cannot be associated with a
particular product. The principal feature is the lack of direct traceability to individual
product. It remains relatively constant from period to period. The amount of overheads is
not directly chargeable meaning it has to be properly allocated apportioned and absorbed
on some equitable basis.

Non-cost Items: These are items that do not form part of cost of a product. These
shouldn’t be considered while ascertaining cost of a product. These are items included in
profit and loss A/C as per principles of Financial Accountancy but not related to the
product. For examples, paid income tax, interest on capital, transfer fees received,
commission to Partners or Managing Directors, donations, brokerage are not related to
business. These are non-cost items.
6. How do you classify the Cash flows?
The cash flow statement during a period is classified into three main categories of cash
inflows and outflows. This classification is mandatory as per Accounting Standard 3
issued by the institute of Chartered Accountants of India.
a) Cash flows from operating activities: This is the principal revenue-producing activity.
They include cash effects of those transactions and events that enter into the
determination of net profit or loss.
b) Cash flows from Investing Activities: They include acquisition and disposal of long-
term assets and other investments not included in cash equivalents. Transactions and
events involving purchase and sale of long-term productive assets not held for re-sale
and other investments are examples.
c) Cash flow from Financing Activities: These activities result in changes in the size and
composition of owners’ capital and borrowings of the enterprise.
7. Briefly explain Merits and Demerits of Budgetary Control.
Merits:
a) It establishes a basis for internal audit by regularly evaluating departmental results.

b) It economizes on management time and maximizes efficiency by reporting
information which has not gone according to plan.
c) Scarce resources are allocated optimally thereby controlling expenditure.
d) Management is forced to plan ahead to achieve long-term goals.
e) Communication is increased and improves co-ordination.
f) Areas of efficiency and inefficiency are identified and remedial actions can be taken.
g) Allows people to participate in setting of budgets and have a motivational effect on
the work force. Individual and corporate goals are aligned.
h) The performance can be evaluated with the help of budgetary control. Comparisons
between actual budget and the past helps in evaluating performance.
i) It allows clear delineation of areas of responsibility as people are responsible for
items of cost and revenue.
Demerits:
a) Work force perceives this as pressure devices imposed by management and can affect
labor relations.

b) An apathetic work force is difficult to be motivated.

c) It can lead to inaccurate record keeping.
d) Managers can over-estimate costs to avoid trouble in the future.
e) Resource allocation can lead to inter-departmental competition and blame if targets
are not achieved.
f) Uncertainties can always develop.
g) Individual and corporate goals are difficult to align.
h) If responsibility and control is not matched, a manager can feel demotivated.
i) Managers are often accused of wasting expenditure.
j) This is based on assumptions. Hence actual circumstances may vary.
k) Sub-optimal decisions may be taken if a manager tries to improve short-term
performances thereby having a negative effect on long-term performances.
l) Tasks are performed with respect to volume rather than time.
m) They compare current costs with estimates based only on historical analysis.
n) They provide only short-term results sometimes at the expense of long-term goals.
o) They have built-in bias that tends to perpetuate inefficiencies.
p) The game of ‘beating the system’ may take more energy than running the business.
q) The fragile internal logic of static budget will be destroyed if top management reacts
to draft budgets by requiring changes to be made to particular items which are then
not reflected through the whole budget.
8. What is the difference between Historical Costing Vs Standard Costing?
Historical Costing: How inadequate in controlling costs.

This gives an account of costs actually incurred in producing output. Actual costs can
determine cost of production per unit but to the management, this doesn’t help in
decision-making. Actual costs cannot provide any norm to evaluate and compare the
operating performance of the executives. What costs should’ve been incurred is more
important than the same incurred in controlling costs and judging the operating results.
The difference between predetermined and actual costs indicates the degree of efficiency
or inefficiency with which costs have been incurred. Predetermined costs are future costs
and help in decision-making. Actual costs are thus irrelevant for decision-making.
Nature of Standard Costing:

Standard costing is a management technique of using predetermined costs for evaluating
performance and controlling costs. To find out whether or not costs incurred deviate from
costs that should’ve been incurred, the difference between actual and standard costs is
calculated. The difference is ‘cost variance’. Cost variance can be favorable or adverse. A
favorable variance indicates actual costs are less than standard costs meaning efficient
control and performance while an adverse one indicate that remedial actions are
necessary. Once a variance is calculated, it needs proper management attention as it
needs analysis and explanation. Significant variances should be reported to appropriate
levels of management for corrective actions. Depending on feedback post analysis,
remedial actions should be taken.


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Master of Computer Applications (MCA) Semester 1 Assignments

Name: Satrajit Mukherjee

Roll Number: 520920574

Learning Centre: Computer Point, Ballygunge Phari (LC Code: 1597)

Subject: Computer Programming “C” Language (MC0061) Assignment No.: 1

Date of Submission at the Learning Centre: 31/10/2009

Sikkim Manipal University – Directorate of Distance Education Page 1

1. Explain the following operators with an example for each:

a) Conditional Operators: Conditional operators in ‘C’ programming allow the user to

b) Bitwise Operators: The bitwise operators operate on integers thought of as binary

2. Explain the following with a programming example for each:

a) Arrays of Structures: Structures are used to describe the format of a number of

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Pointers and one-dimensional arrays: Relationship between an array and a pointer

4. Describe the following with suitable programming examples:

Example: Writing a data to the file

Char stuff [25];

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Strcpy (stuff, “This is example line.”);

For (index = 1; index <= 0; index ++);

Fprintf (fp, “%s Line Number %d”, stuff, index);

#define MAXLINE 100

Int array [MAXROWS][MAXCOLS];

Char *filename = “input.dat”;

Char line [MAXLINE];

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Ifp = fopen (filename, “r”);

Fprintf (stderr, “can’t open %s”, filename);

While (fgetline (ifp, line, MAXLINE) ! = EOF)

If (nrows >= MAXROWS)

Fprintf (stderr, “too many rows”);

N = getwords (line, words, MAXCOLS);

For (I = 0; I < n; I ++)

Array [nrows][i] = atoi (words [i]);

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Example: Printing an error message ‘Bad File Number

/* Result- fgetc: Bad file number */

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Void rewind (FILE *stream) /* set file position indicator to zero*/

Int fseek (FILE *stream, long offset, int ptrname);

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Name: Satrajit Mukherjee

Roll Number: 520920574

Learning Centre: Computer Point, Ballygunge Phari (LC Code: 1597)

Subject: Computer Programming “C” Language (MC0061) Assignment No.: 2

Date of Submission at the Learning Centre: 31/10/2009

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1. With the help of programming examples, explain the following constants:

a) Integer Constants: An integer constant refers to a sequence of digits. There are

Printf (“Integer values”);

Printf (“%d%d%d”, 32767, 32767 +1, 32767 + 10);

Printf (“Real Constants”);

Printf (“%f%f%f”, 34.45, 10e-3, 5e6);

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c) Character Constants: A single character constant contains a single character enclosed

Printf (“%d”, ‘a’); /* Prints ASCII value of ‘a’ that is 97.

Printf (“%c”, ’97); /* Prints letter a.

d) String Constants: A string constant is a sequence of characters enclosed within

Printf (“%s”, “Hello”); /* Prints Hello.

Printf (“%s”, “1947”); /* Prints 1947.

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e) Backslash Character Constants: ‘C’programming supports some special backlash

Void rewind (FILE stream) / set file position indicator to zero*/

Void pop (in stack [], int top, int value)