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HIGH K METAL

SOLUTION
PRAVEESH.A
S7 AE&I
ROLL NO
Why is this important?
• These steps are necessary if transistors are to
continue shrinking and delivering better
performance, while containing power consumption

• These steps will enable the continuation of Moore’s


Law, ultimately leading to vast, lower cost computing
power and enabling applications that cannot even be
imagined
MOSFET OVERVIEW

NMOS PMOS
( Arsenic , Phosphorous) (Boron)

Fundamental component of all logic chips


N MOS - working
What is High k?
• “k”, - dielectric constant of a material – the
ability to concentrate electric fields.
• SiO2 replacement
• This material should be thicker (to reduce
leakage) but should have a high “k” value

the material had to be physically thick but


electrically thin
Objective in transistor design

• Make them smaller,


• faster,
• cheaper and
• Less power--hungry
MOORE’S LAW
(Intel co-founder Gordon Moore)

THE NUMBER OF TRANSISTORS ON A


CHIP DOUBLE EVERY 2 YEARS

4004 (1971) – over 2000 transistors


Intel Quad Core – 800 million transistors
SCALING
• Reduction in size (increase in density)

•W=width of the channel


•L=channel length
•µ=channel carrier mobility
•Cox=capacitance density associated with gate dielectric
when the underlying channel is in the inverted state
•Vg=gate voltage
•Vd=drain voltage
•Vt=threshold voltage
Why Scaling
1977 1979 1982 1985 1988 1991
Minimum Feature
3 2 1.5 1 0.7 0.5
Size (µm)
Gate length(µm) 3 2 1.5 1.1 0.9 0.6
Channel Length (µm) 2 1.5 1.2 0.9 0.7 0.4

Gate Oxide(Å) 500 400 250 250 200 135


Junction Depth (µm) 0.6 0.4 0.3 0.25 0.2 0.15
Vcc (V) 5 5 5 5 5 5
NMOS Idsat @Vg=5
0.1 0.14 0.23 0.27 0.36 0.64
V(mA/µm)
PMOSmIdsat @Vg=5
0.06 0.11 0.14 0.19 0.31
V(mA/µm)

Gate Delay@FO =1ps 800 350 250 200 160 90


SCALING LIMITS AND NEED FOR
ALTERNATE GATE DIELECTRICS

Increased leakage current

Ultra thin SiO2 films

Penetration of Boron

Reliability issues
ROLE OF HIGH-k

• the capacitance at the MOS junction


ADVANTAGES OF HIGH-k
• Allows greater physical thickness of oxide
layer.
• Improves gate capacitance
• Reduces leakage, along with present drive
current level
• Overcomes the problems of reliability, boron
diffusion etc
MATERIAL CONSIDERATIONS

Some of the key guidelines are briefed here.


They include
• Permittivity and barrier height
• Thermodynamic Stability
• Interface Quality
• Film Morphology
• Process compatibility
• Reliability
HIGH-K DIELECTRIC CANDIDATES
DIELECTRIC
MATERIAL
CONSTANT(K)
SiO2 3.9
Si3N4 7
Al2O3 9
Y2O3 15
La2O3 30
Ta2O5 26
HfO2 25
TiO2 80
ZrO2 25
NEW CHALLENGES ASSOCIATED WITH
HIGH K SOLUTION

• Method of deposition
• Availability of precursors
• Phonon Scattering & low charge-carrier
mobility
NEW CHALLENGES ASSOCIATED WITH
HIGH K SOLUTION
(a)Method of deposition

Chemical Vapour Phase deposition


Or
Atomic Layer Deposition
NEW CHALLENGES ASSOCIATED WITH
HIGH K SOLUTION
(b) Availability of precursors
Precursor must be
• Volatile
• High Vapour pressure
• Thermal Stability
• High Absorption
• Highly reactive
NEW CHALLENGES ASSOCIATED WITH
HIGH K SOLUTION
(C) Phonon Scattering & low charge-carrier mobility

• the interaction between the polysilicon gate


electrode and the new high-k dielectrics.
Solution :- Use Metal gate instead of Polysilicon
NEW CHALLENGES ASSOCIATED WITH
HIGH K METAL SOLUTION
• Finding a metal that could be used for the gate
electrode that would combine well with the
new high-k dielectric
work function similar to polysilicon‘s

• Adopting new fabrication method


new fabrication method
• The normal fabrication method is known as
“gate first.”
- Dopants for the source and drain are
implanted into the silicon on either side of the
gate.
- the silicon is annealed to repair the damage
from the implantation process
• transistor process sequence, dubbed “gate
last” was adopted finally
PROBLEM SOLVED
Result
• 20 percent improvement in transistor
switching speed, and
• Reduction in transistor gate leakage by over
10 fold.
• Intel processors based on High K Metal
solution are about to hit the market.
High K Metal in Microprocessor
THANK YOU