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Abhijit R.

Asati
Email id: abhijit_asati@bits-pilani.ac.in

Operational Amplifiers
History:
Initial Application: Analog Computation and sophisticated
instrumentation
Why OPAMP? (Used to perform many mathematical operations)
Early OPAMP was discrete ( vacuum tubes, transistors &
resistors)
Cost: Prohibitively high ( tens of dollars)
1960: First IC OPAMP by Fairchild ( A 709), designed by
Robert J. Widler
Within span of few years high quality OPAMP available at
extremely low price due to versatility of application.

A = 140 dB = 10
V sat = 12 V
V in ( sat )

12 V
=
= 1 .2 V
7
10

Ad
CMRR =
AC

V id
V 1 = V cm +
2
V id
V 2 = V cm
2
V id = V 1 V 2
& V cm

V1 + V 2
=
2

Vo
AC =
V cm

when V id = 0

Vo
Ad =
V id

when V cm = 0

&

V o = AC V cm + Ad V id

for ideal OPAMP AC = 0


V o = Ad V id

Differential Input: Differential Input:

Representing the input signals to a differential amplifier in terms of


their differential and common-mode components.

Characteristic of the Ideal OPAMP: (Practical Values)


Infinite input impedance (1-10M)
Zero output impedance (25-150)
Infinite open loop gain A (100-140dB)
Zero Common- mode gain or infinite common mode
rejection (100dB)
Zero input offset voltage (20-200 mv at output)
Zero input bias Current (nA to A)
Infinite bandwidth (unity gain) (10 MHz)
Infinite Slew rate dVo/dt | max (0.5 V/sec to 50 V/sec )
PSRR=Vo/V=0 (20v/v)

An important characteristic of OPAMP is that


they are direct-coupled or dc amplifier. This
property allows it to use in many application.

The inverting closed-loop configuration:

The inverting closed-loop configuration:

Finding Input and Output Resistance of inverting


Amplifier:

R2
R1

Let us find Rin, Rout and closed loop gain without


going in to the intricacies of the feedback.

Finding Input Resistance :

Rid = differential input resistance


Applying Miller Theorem :
R2
R2(input ) =
(very low)
1+ A
Rin = R1 + ( Rid || R2(input ) ) R1
Feedback reduces the input impedance

Finding Output Resistance :

Applying Miller Theorem :


AR 2
Rout = Ro ||
1+ A
Rout = Ro || R2 Ro
Feedback reduces the output impedance
More accurately :
R1
Ve =
V o = Vo
R1 + R2
AV e = A Vo
Vo
Vo + A Vo
I0 =
+
R1 + R2
Ro

Vo
=
I0

1
1 + A
+
R1 + R2
Ro

Ro
=
|| R1 + R2
1 + A

Effect of finite open-loop gain in inverting Amplifier:

i1 =

vo
v
)
vI + o
A
A
=
R1
R1

vI (

vo
vo =
i1 R 2
A
vo

vI +
vo
A
vo =

A
R1

1
R2
R2
) =
+
v o (1 +
A
AR 1
R1

v
R2
R2
R2 = o
vI
vo
A
R1
AR 1

vI

R2

(1 +
)

R2
R1
=
vo 1 +
vI

A
R1

R2

(1 +

R1

vo 1 +

)
= R2 v
I

R1

R2

vo
R1
=
G =
R2
vI
(1 +
)
R1
1+
A
R2
As
A , G
R1
Feedback reduces the gain

Closed-Loop gain calculation using infinite open-loop gain:

Concept of Virtual Ground:

vo
= 0 ( As
v2 v1 =
A
v2 = v1
Q v2 = 0
v1 = 0

A )

Gain Expression: Analysis given in diagram

vo
R2
=
vi
R1
For high input resistance R1 should be large.
For high gain R2/R1 should be large.
Therefore R2 becomes impracticable.
For R1=1M
Gain=100
R2=100 M (impracticable)
Remedy: Example 1

EXAMPLE 1
Assuming the OPAMP to be ideal, derive an expression for the
closed loop gain Vo/ VI of the circuit shown below. Use this Circuit
to design an inverting amplifier with a gain of 100 and an input
resistance of 1M. Assume that for practical reasons it is required
not to use resistors greater than 1M. Compare your design with
that based on the inverting configuration

Solution

The circled numbers indicate the sequence of the steps in the analysis.

vo
vo
=
= 0 (1 )
v1 =

A
vI 0
vI
=
(2)
i1 =
R1
R1
vI
(3)
i 2 = i1 =
R1
R2
vI
vI (4)
R2 =
v x = v1 i 2 R 2 = 0
R1
R1
0 vx
R2vI
=
(5 )
i3 =
R3
R1 R 3
vI
R2vI
+
(6 )
i 4 = i 2 + i3 =
R1
R1 R 3
vI
R2
(1 +
) act as current
i 4 = i 2 + i3 =
R1
R3

amplifier

v o = v x i4 R 4
vI
R2
R2vI
vo =
v I
+
R1
R1 R 3
R1
vo
R2
R4
R2 R4
=

vI
R1
R1
R1 R 3

R 4

vo
R2
R4
R4
1 +
( 7 )
=
+
vI
R1
R2
R3
Let , R 1 = 1 M , R 2 = 1 M , R 4 = 1 M ,
& R 3 = 10 . 2 K
vo
1M

= 1 + 1 +
= 100 . 03 V / V
vI
10 . 2 K

electrical output Range: Industrial Standard Output for


instruments ( 4mA-20mA transmitters)
Pressure Reading
3psi
15psi
4mA
20mA
Logic 0 Logic 1
0V
5V

A Summing Amplifier:

v o = iR

vo

v3
vn
v1
v2
= (
+
+
+ .....
)R
R1
R2
R3
Rn

vo

RF
RF
RF
RF
= (
v1 +
v2 +
v 3 + .....
vn )
R1
R2
R3
Rn

= R1 = R 2 = R 3 K = R n

v o = ( v 1 + v 2 + v 3 + ..... v n )

A Weighted Summer:

Applications:
9Digital to Analog Converter
9Implementing summing coefficients of both signs.

Digital to Analog Converter:


Rf
vo = ( v1 + v2 + v3 +..... vn)
R1
R2
R3
Rn
Rf

Rf

Rf

v o = v ref D

B1
B2
(MSB)

B3

B4
(LSB)

Vo

-0.5Vref

-.0625Vref

-.0.9375Vref

Resolution=1/16=0.0625

where :
Bn
B1 B 2
D = 1 + 2 .... + n ( B1 = MSB & B n = LSB )
2
2
2
Let
v1 = v 2 = v 3 ... = v n = v ref
&
Rf
R1

= 0 .5,

Rf
R2

= 0 . 25 ,

Rf
R3

= 0 . 125 .......

Constraint: All the summing coefficient are of the same sign

Implementing summing coefficients of both signs:

vo

Ra R
= v1 (
R1 R

c
b

R
) + v2(
R

a
2

R
R

c
b

) v3

R
R

c
3

R
R

c
4

Implementing summing coefficients of both signs:


2k

2k

5k

2k

4k
8k
2.5k

vo = 0.4v1 + 0.25v2 0.5v3 0.8v4

The Non-inverting configuration:

Rin Rid

vo
R2
= 1+
vI
R1

Rout

Vo
=
Io

Vs = 0

Rout = Ro || R2 Ro

vo
= 0 ( for
v Id =
A
vI
R 2
v o = v I +
R1
vo
R2

= 1+
vI
R1

A = )

Usi ng potential division ,


R1
v I = vo
R1 + R2
vo
R2

= 1+
vI
R1

Effect of finite open-loop gain:

Effect of finite open-loop gain:

vo
v Id =
A

( for

1
R2
R2
(1 + +
) v o = (1 +
)v I
R1
A R1 A

A )

vo

vI

vo
A
vo = ( v I ) +
A R1

v o v o R2
vI
= vI +
vo + +
R1
A R1 A

R2

R2

vo

=
vI
(1 +
As

R2
R1
1 + R2

1+

R1

vo
R2

A , 1 +
vI
R1

The Voltage Follower:

(a) The unity-gain buffer or follower amplifier. (b) Its equivalent circuit model.

Effect of finite open-loop gain and Bandwidth on circuit


Performance:
f t = Ao f b ( open loop )
( unity gain bandwidth )

Open-loop gain of a typical general-purpose internally compensated op


amp.

Frequency Response of Closed Loop Amplifiers:

For inverting amplifier :


RF

Vo ( s )

Vi ( s ) 1 +
3 dB =

RI
s

3 dB
t

1 + RF

RI

A0 = 10 5 & f b = 10 H Z
R
f t = 1MH z & F

RI

= 999 ,99 ,1

gain = 999 , 99 , 1
& f 3 dB = 1kHz ,10 kHz , 0 . 5 MHz

Frequency Response of Closed Loop Amplifiers:

For non inverting


1+
Vo
=
Vi
1+

RF

RI
s

1+
1+

3 dB

where , 3 dB =

amplifier
RI
s

3 dB

t
1+

RF

for , f t = 1 MHz & R F


gain

RF

RI
RI

= 999 , 99 , 1 , 0

= + 1000 , + 100 , + 2 , + 1

& f 3 dB = 1 KHz ,10 KHz , 0 . 5 MHz ,1 MHz

9The non-inverting amplifier has a higher gain


bandwidth product than inverting amplifier.
9As close loop gain decreases by factor of 100 as
compared to Ao then closed loop 3db frequency
increases by factor of 100 as compared to ft.

A single OPAMP Difference Amplifier:

A difference amplifier. (Combining Inverting and Non-Inverting


Amplifier

A single OPAMP Difference Amplifier: (contd)


Difference amplifier should not give output for common mode
signal
Gain of non-inverting path + gain of inverting path=0

R4
R4 + R3

R2
1 +
R1

R4

R4 + R3
R4

R4 + R3

R2
=
*
R1

R 2 + R1
R2
=

R1
R1

R2
=
R 2 + R1

R 4 R 2 + R 4 R1 = R 2 R 4 + R 2 R 3
R 4 R1 = R 2 R 3
R4
R2

=
**
R3
R1

R4
R2
=
R3
R1
R 4 = R 2 = R F & R 3 = R1 = R I

Vo

RF
=
(V 1 V 2 )
RI

i1

V id

i1

Vid
Rid =
ii
Applying KVL :
Vid = RI ii + 0 + RI ii
Rid = 2 RI

Analysis of the difference amplifier to determine its


common-mode gain:

1
R4
[ v Icm
i1 =
v Icm ]
R1
R4 + R3
R3
1
i1 =
v Icm ( 1 )
R1 R 4 + R 3
vo

R4
=
v Icm i 2 R
R4 + R3

vo

R3
R4
R2
=
v Icm
v Icm
R4 + R3
R1 R 4 + R 3

vo

R4
R2 R3
(1
) v Icm
=
R4 + R3
R1 R 4

A cm =

selecting

vo
v Icm

R 3 = R1 & R

A cm = 0

CMRR

R4
R2 R3
(1
)
=
R4 + R3
R1 R 4

= R

Differential Input Differential Output Amplifier:

v o1

RF
= 1 +
R1

V 1

vo2

RF
= 1 +
R1

V 2

v o1 v o 2
vo

RF
= 1 +
R1

RF

= 1 +
R1

V in

( V 1 V 2 )

The Instrumentation amplifier: (Chapter 3)

Instrumentation amplifier is closed loop gain amplifier


that has differential input and single ended output.

Simple Instrumentation amplifier:


i1

V id
i1

Vo

RF
=
(V 1 V 2 )
R1

Finding the input resistance of the difference amplifier:

R2
Vo = VId
R1

v Id = R1i I + 0 + R1i I
R id

v Id
=
= 2 R1 ( low )
iI

In this configuration we use two additional OPAMPS to


achieve High input resistance.

But achieving high input impedance is not only the goal


otherwise we would have connected two OPAMPS in
Voltage follower configuration.
In addition we want to achieve high gain, therefore
OPAMPS are connected in the non-inverting configuration
as shown in figure.
Achieving high gain in the first stage lowers the burden
on second stage.
Second stage does the job of differencing function and
rejecting the common mode signal.

A superior Circuit: The Instrumentation Amplifier:

(a) Initial approach to the circuit

output voltage of first stage :


R2
R2
vo1 = (1 + )(v I 2 v I 1 ) = (1 + )v Id
R1
R1
vo1
R2

= (1 + )
v Id
R1
R4
gain of sec ond stage =
R3
vo R4
R2
=
Overall gain ( Ad ) =
(1 + )
v Id R3
R1
Ac = 0
( due to differenci ng action of second stage )

The Disadvantage Instrumentation amplifier shown in fig


a:
Since VICM is amplified by the first stage, the difference
amplifier of second stage has to deal with large common mode
signal. Therefore CMRR may reduce.
A1 & A2 must be perfectly matched otherwise spurious
signal may appear at their outputs, which may be amplified by
difference amplifier.
To vary differential gain Ad, two resistor say R1 should be
varied simultaneously and these two resistors should be
perfectly matched. (A difficult task!)

All these problems can be solved with a very simple


wiring change.
9Lumped R1 and R2 together into a single resistor 2R1
A superior Circuit: The Instrumentation Amplifier:

The two resistors R1 and R1 lumped together, this simple


wiring change dramatically improves performance;
Since first stage simply propagates VICM , the difference
amplifier of second stage has to deal smaller common mode
signal. Therefore CMRR improves.

vId R2
vo1 = vI 1
2 R1
vId R2
vo 2 = vI 2 +
2 R1

Gain of first stage :


vId R2 vId R2
vo 2 vo1 = (
+
) + (v I 2 v I 1 )
R4
2 R1
2 R1
gain of sec ond stage =
R3
2 R2
vId + vId )
=(
2 R1
R2
vo = (1 + )vId
R1
vo
R2

= (1 + )
vId
R1

vo
R2 R4
Overall gain ( Ad ) =
= (1 + )
v Id
R1 R3

Overall gain ( Ad ) when R2 do not match :


R4
R2 + R
(1 +
)
Overall gain ( Ad ) =
R3
R1
'
2

Ac = 0
( due to differenci ng action of second stage )

In place of 2R1 if we take variable resistance as R1 then


gain will be:

vo
2 R2 R4
Overall gain ( Ad ) =
= (1 +
)
v Id
R1 R3
Let ,
R4 = R3 = R2 = R,
and
R1 = aR
then
2
vo = (1 + ) (V2 V1 )
a
vo
2
Overall gain ( Ad ) =
= (1 + )
v Id
a

Bridge Amplifier:

The change in resistance of the transducer is converted


into proportional voltage change.

v o1
vo2

R R
=
v REF
R
R R v REF
= (1 +
)
R
2

vo = vo1 + vo 2
R R
R R vREF
)
vo =
vREF + (1 +
2
R
R
2 R R vREF
R R
vo =
vREF +
2
R
R
R
R vREF m R
=
vo =
vREF +
vREF
2
2R
R
R

9The op-amp A741 A has output short circuit current of


10mA to 40 mA.
9The built in short circuit protection guaranteed to withstand
25 mA of current in protecting the op amp.
9In a Solar cell sunlight
varies from darkness to
maximum brightness.
9A current 0 to 0.25 A is to
be converted to 0-5V.

(Design based on CCVS)

9Design a circuit to monitor


this current on 100 A,
800 full scale deflection
current meter.

5V

R=

5
I SC

5
=
= 20
0.25 A

0.25 A

5V = 100 A( RS + RM )
5V = 100 A( RS + 0.8 K )
RS = 49 .2 k

Design a dc electronic voltmeter (EVM) with an input


impedance of 1 M and capable of measuring dc voltages
of 1 V, 10 V and 100 V with a basic 10 V full-scale
deflection dc voltmeter.

1M-(R1-R2)
R2
R1

(Design based on VCVS)


100V
1V =
R1
1M

10V
( R1 + R2 ) ( R1 + R2 ) = 100 K
1M
R2 = 90 K

R1 = 10 K 1V =

Problem on voltmeter design:


Current-meter

Vi
Io =
R
Vi = 100mv & R = 100
(Design based on VCCS)

Vi
I o = = 1mA
R

Current meter of 0-1mA can read voltages of 0-100 mV.

Problem: Design a sensitive dc voltmeter with full-scale


voltage ranges from 1 mV to 1 V being indicated in a 100 A
full-scale deflection dc current meter in figure.

Problem on voltmeter design:


Design a dc milli-voltmeter which must be able to read 0-100
mV with a current meter of 0-1 mA.
The milli-voltmeter should have an input impedance of 100K.

(Design based on CCCS)

R s = R in = 100 k
Vi
Ii =
Rs
0 ( R1 I i )
Io = Ii +
R2
Io
R1

= 1+
Ii
R2

for V in = 100 mV
I i (max)
I o (max)
I i (max)

R1
(1 +
) = 1000
R2
R 1 = 100 k , R 2 = 100 . 1

100 mV
=
= 1 A
100 K
1 mA
=
= 1000
1 A

SUMMARY OF VOLT-METER DESIGN


Vin

V to I Conversion

Rin

CCVS based

VCVS based

SUMMARY OF VOLT-METER DESIGN (Contd)


1M

VCCS based

For multi-range replace R2 with this N/W.

CCCS based

Voltage-to-current converter for grounded load

Vo V 2
V
= IL + 2
R4
R3

&

Vo
V
V
V
V
= I L + 2 + 2 Vo = R4 ( I L + 2 + 2 ) (1)
R4
R3 R 4
R3 R 4
Vref V2
R1

V 2 V0
=
R2

V0 = V 2

R2 (Vref V2 )
R1

( 2)

eliminating Vo :
R2 (Vref V2 )
V2 V2
+
) = V2
R4 ( I L +
R3 R 4
R1
R2 (Vref V2 )
V2
+ V2 = V2
R4 I L + R4
R3
R1
R4 I L =

R2 (Vref V2 )
R1

V2
R4
R3

IL =

R2 (Vref V2 )
R1 R4

R2Vref R2V2 V2
V2

=
+

R3
R1 R4
R1 R4 R3

choos ing : R1 R4 = R2 R3
Vref

V2 V2
+

IL =
R3 R 3 R 3
IL =

Vref
R3

Differential voltage-to-current converter

V 2 V L V L Vo
=
R
R
Vo = 2V L V2 (1)
V L V0
V1 V L
= IL +
R
R
V1 V L
V L ( 2V L V2 )

= IL +
R
R
V L + V2
V1 V L

= IL +
R
R
V1 V2
IL =
R

I L V1 V2

Constant high current source


5V
10V
10V

9.3V

10V

IE IL =

VZ
= IE IL
Rs
op amp current =

IL

VZ
5V
=
= 0 .1 A
R s 50

op amp current =

IL

0 .1 A
= 1mA
100

Digitally controlled 420 mA current source


2V

13V

13V
13V

12.3V

2
15 = 2V
15
Vin = 1 Q1 & Q2 : ON

Vin = 0 Q1 & Q2 : OFF

V(100 ) = 2V

IL =

V( 2 K ) =

2
IL =
= 20mA
100

V(500 ) = 2V
2
= 4mA
500

Reference Voltage Sources:

RF
V o = (1 +
)V Z
RI

RF
Vo =
VZ
RI

DC Imperfections:

Circuit model for an op amp with input offset voltage VOS.

Effect of DC Offset Voltage on inverting and non-inverting


amplifiers:

The op-amp input bias and Offset currents:

I B1 + I B 2
IB =
2
I OS = I B 1 I B 2
In BJT,
IB~100nA & IOS=10nA
In FET, IB ~ few pA

9The op-amp A741 A has input bias current of 30nA to 80


nA, while input offset current of 3nA to 30 nA.

Effect of op-amp input bias currents on inverting and


non-inverting amplifiers:

Reducing the effect of op-amp input bias currents on


inverting and non-inverting amplifiers:
I B 2 R3
R3 = R1 || R2
I B1
R1
then
I B 2 R3
R1

Vo = ( I B1 I B 2 ) R2

Vo = I B 2 R3 + ( I B1 I B 2

R3
) R2
R1

Vo = I B 2 R3 + I B1 R2 I B 2

R3
R2
R1

Let ,
R3 = R1 || R2 =

R1 R2
R1 + R2

Vo = I B 2

R1 R2
R1 R2
R2
+ I B1 R2 I B 2

R1 + R2
R1 + R2 R1

Vo = I B 2

R1 R2
R2
+ I B1 R2 I B 2
R2
R1 + R2
R1 + R2

R1
R2
Vo = R2 I B 2
+ I B1 I B 2

R1 + R2
R1 + R2

R1 + R2
Vo = R2 I B1 I B 2

R1 + R2

Vo = R2 [I B1 I B 2 ]

Combining both the effects of input offset voltage and


input bias current :

R2
Vo = (1 + ) VOS + ( I B1 I B 2 ) R2
R1
R2
Vo = (1 + ) VOS + I OS R2
R1

DC Offset balancing techniques in IC741:

IC 741
2

DC Offset balancing techniques by connecting an external


source:

Rb << R2

Effect of DC Offset Voltage on Capacitively coupled inverting


amplifier:

Capacitor is open for dc input,


therefore it acts as voltage
follower for dc input offset
voltage.

Reducing the effect of op-amp input bias currents on capacitively


coupled inverting amplifiers:

I OS = I B 1 I B 2
IB1
IB2

Capacitor is open for dc input, therefore IB1 flows through R2

Vo1= IB1 R2

Due to IB2

VNIT= VO2 = -IB2 R2


Vo= Vo1+ Vo2= IB1 R2 - IB2 R2
Vo= (IB1 -IB2) R2

(voltage follower)

Reducing the effect of op-amp input bias currents on ac coupled


non-inverting amplifiers:

Capacitor is open for dc


input, therefore IB1 flows
through R2
Vo1= IB1 R2
Due to IB2
Vo2= -IB2 R2
(voltage follower).
Vo= Vo1+ Vo2
= IB1 R2-IB2 R2

I OS = I B 1 I B 2

Vo= (IB1 -IB2) R2

Illustrating the need for a continuous dc path for each of the op-amp input
terminals. Specifically, note that the amplifier will not work without resistor R3.
Drawback: R3 lowers the input impedance of amplifier.

Slew-rate:
Maximum rate of change possible at the output of real
OPAMP is known as Slew- Rate.
Slew rate is distinct from finite op-amp bandwidth that
limits the frequency response of the closed loop amplifier.
The limited bandwidth is a linear phenomenon and does
not result in a change in the shape of an input sinusoid. i.e. it
does not lead to non-linear distortion.
But, slew rate limitation can cause non-linear distortion.

slew-rate: (contd)
dv o
SR =
dt

max

Vo
1
=
s
Vi
1+

v o ( t ) = V (1 e

(a) Unity-gain follower.


tt

The initial slope of this exponentially rising function is


tV.

slew-rate: (contd)

Input step waveform.

slew-rate: (contd)

When V is large:

t V > SR

Linearly rising output waveform obtained when the


amplifier is slew-rate limited.

slew-rate: (contd)

When V is Small:

t V < SR

Exponentially rising output waveform obtained when V is


sufficiently small.

max

Slew rate
=
Vop

f max

Slew rate
=
2 Vop

where :
Vop = maximum undistorted o / p voltage

Full Power Bandwidth:

max

Slew rate
=
Vop (max)

f max

Slew rate
=
2 Vop (max)

Vop(max) = Maximum rated amplitude of sinusoid

Isolation Amplifier:
There are many situations where low-level signals must be
detected and amplified in the presence of potentially
dangerous voltages.
Examples: In remote sensing, motor control, data
acquisition and medical monitoring
Manufacturers of bioelectric amplifiers, especially EEG
and ECG equipment, use isolation amplifiers that provide as
much as 1012 of isolation between the patient and the ac
power line mains cord.

VCM
VISO

Vo = VSIG
Gain
CMRR IMRR

Isolation-mode rejection ratio: The IMRR is a measure of


how well the isolation device rejects isolation-mode voltage.
Common-mode rejection ratio: The CMMR measures
how well the device rejects common-mode signals.
Isolation device technology:
A number of barrier arrangements and signal modulation
schemes are available.
The three techniques in common use are:
9 optical isolation,
9inductive or transformer isolation,
9 and capacitive isolation.

Optical isolation.

Analog Coupling:
The input signal modulates the LED
The photo-detector converts the light back into current
Disadvantage: Non-linearity (harmonics present)

Digital Coupling: The signal can be:


9 digitized
9 passed across the barrier
9converted back to an analog signal with a D/A converter

Transformer isolation.
Inductive isolation
Non-linearity is reduced compared to optical isolators

(dc)
(dc)

Capacitor isolation:
Transformers are generally impossible to produce in an IC,
so a capacitor circuit was developed to couple the modulated
signal across the barrier.
Capacitive devices have lower transient immunity
performance since some fast (high slew rate) transient
common-mode pulses pass across the coupling capacitor and
can be accepted as the signal for a single-capacitive barrier
device.
So dual-capacitor differential circuits have been developed
to minimize errors.

Differential
Amplifier

PROGRAMMABLE GAIN AMPLIFIER (PGA)

Charge Amplifier:

C p = Capacit ance of piezoelect ric crystal


R p = equivalent resist ance of piezoelect ric crystal
C c = effective Capacit ance of connecting cable
Rc = eqvivalent Resista nce of connecting cable
R1 = High value resist ance to provide dc path

Cancels the effect of parasitics.

V
(Vs V ) j C p = (V Vo ) j C f +
+ j C CV
Rx
where : R x = R p || Rc
As V = 0
j C pVS = Vo j C f
Cp
Vo

=
Cf
VS
i.e. Vo C f = VS C p