Voltage Source Inverter Thesis Very Good

ANALYSIS OF THREE-PHASE RECTIFIERS WITH
AC-SIDE SWITCHES AND INTERLEAVED

THREE-PHASE VOLTAGE-SOURCE CONVERTERS
By
Stephanie Katherine Teixeira Miller
A Thesis Submitted to the Graduate
Faculty of Rensselaer Polytechnic Institute
in Partial Fulfillment of the
Requirements for the Degree of
DOCTOR OF PHILOSOPHY
Major Subject: Electrical Engineering
Approved by the
Examining Committee:
Jian Sun, Thesis Adviser
Kenneth A. Connor, Member
Leila Parsa, Member
Sheppard J. Salon, Member
James Kokernak, Member
Rensselaer Polytechnic Institute

Troy, New York
November 2008
(For Graduation December 2008)
UMI Number: 3357231

Copyright 2008 by
Miller, Stephanie Katherine Teixeira
All rights reserved
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ANALYSIS OF THREE-PHASE RECTIFIERS WITH

AC-SIDE SWITCHES AND INTERLEAVED
THREE-PHASE VOLTAGE-SOURCE CONVERTERS
By
An Abstract of a Thesis Submitted to the Graduate
Faculty of Rensselaer Polytechnic Institute
in Partial Fulfillment of the
Requirements for the Degree of
DOCTOR OF PHILOSOPHY
Major Subject: Electrical Engineering
The original of the complete thesis is on file
in the Rensselaer Polytechnic Institute Library
Examining Committee:
Jian Sun, Thesis Adviser
Kenneth A. Connor, Member
Leila Parsa, Member
Sheppard J. Salon, Member
James Kokernak, Member
Rensselaer Polytechnic Institute

Troy, New York
November 2008
(For Graduation December 2008)
c Copyright 2008

by

All Rights Reserved
ii
CONTENTS
LIST OF TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
vi
LIST OF FIGURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii

ACKNOWLEDGMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvi
ABSTRACT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvii
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Wind Energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Dissertation Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Power Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Wind Turbine Topologies . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 Induction Generator . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Grid Interconnection Requirements . . . . . . . . . . . . . . . . . . .
1.6.1
Voltage Fault Ride-Through . . . . . . . . . . . . . . . . . . . 10
1.6.2
Power Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.6.3
Power Quality . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.7 Survey of Power Electronics Interface Topologies for Induction Generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

1.7.1
Diode Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.7.2
Six Switch Voltage-Source Converter . . . . . . . . . . . . . . 17

1.7.2.1 Back-to-Back Voltage-Source Converters . . . . . . . 18
1.7.2.2 Interleaved Voltage-Source Converters . . . . . . . . 19
1.7.3
Multilevel Converters . . . . . . . . . . . . . . . . . . . . . . . 20
1.7.4
Matrix Converter . . . . . . . . . . . . . . . . . . . . . . . . . 24
1.8 Dissertation Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2. Three-Phase Voltage-Source Converter . . . . . . . . . . . . . . . . . . . . 28
2.1 Topology and Basic Operation . . . . . . . . . . . . . . . . . . . . . . 28
2.2 Modulation Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.2.1
Naturally Sampled Carrier-Based Modulation . . .

2.2.1.1 Sinusoidal Pulse-Width Modulation . . . .
2.2.1.2 Sinusoidal Pulse-Width Modulation with
monic Injection . . . . . . . . . . . . . . .
2.2.2
Space-Vector Modulation . . . . . . . . . . . . . . . . . . . . . 35
iii
. .
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3rd
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. . . . 30
Har. . . . 32
2.2.2.1
2.2.2.2
2.2.2.3
2.2.2.4
The Plane . . . . . . .
Voltage Space Vectors . .
Sector Definitions . . . . .
Space-Vector Modulation
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36
37
41
41
2.3 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3. Three-Phase PWM Rectifiers with Ac-Side Bidirectional Switches . . . . . 47
3.1 Literature Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.2 Converter Operation and Space Vector Description . . . . . . . . . . 51

3.3 Pulse-Width Modulation . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.4 Open-Loop Operation . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3.5 Rectifier T supplied by a Squirrel-Cage Induction Generator . . . . 64
3.5.1
Induction Generator Power Requirements under Variable Wind

Speed Conditions . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.5.2
Rectifier Power Handling Capability . . . . . . . . . . . . . . . 70
3.5.3
Induction Generator/Rectifier System . . . . . . . . . . . . . . 71

3.5.3.1 Variable Terminal Voltage and Frequency . . . . . . 72
3.5.3.2 Constant Terminal Voltage and Frequency . . . . . . 73
3.5.4
Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . 75
3.6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4. Comparison of Rectifier Topologies T , TY , and TS . . . . . . . . . . . . . 80
. . . . . . . . . . . . . . . . . . . . . . . . . . . 81
4.2 Rectifier T Switch Loss Analysis . . . . . . . . . . . . . . . . . . . . 82

4.2.1
Conduction Losses . . . . . . . . . . . . . . . . . . . . . . . . 84
4.2.2
Switching Losses . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.3 Diode Loss Analysis
. . . . . . . . . . . . . . . . . . . . . . . . . . . 96
4.3.1
Rectifiers T and TY . . . . . . . . . . . . . . . . . . . . . . . 96
4.3.2
Rectifier TS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.4 Loss Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

4.4.1
Switch Loss Comparison . . . . . . . . . . . . . . . . . . . . . 99
4.4.2
Diode Loss Comparison
4.4.3
Validity of the Lumped Stress Equations . . . . . . . . . . . . 103
. . . . . . . . . . . . . . . . . . . . . 102
4.5 Common-Mode Voltage Comparison . . . . . . . . . . . . . . . . . . . 104

4.6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
iv
5. Harmonic Cancellation Effects in Interleaved Three-Phase Voltage-Source

Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
. . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.2 General Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . 111

5.3 Common-Mode Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 113
5.4 AC Phase Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.5 Inter-Module Circulating Current . . . . . . . . . . . . . . . . . . . . 122
5.6 Inductor Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.7 DC-Link Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
5.8 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
6. Low Frequency Circulating Current Characteristics of Current Control
Techniques for Parallel Voltage-Source Converter Modules . . . . . . . . . 138
. . . . . . . . . . . . . . . . . . . . . . . . . . . 138
6.2 Circulating Current Decomposition and Definitions . . . . . . . . . . 142

6.3 Linear Current Control Methods . . . . . . . . . . . . . . . . . . . . . 143
6.3.1
Abc Current Control . . . . . . . . . . . . . . . . . . . . . . . 143
6.3.2
Dq Current Control . . . . . . . . . . . . . . . . . . . . . . . . 147
6.4 Nonlinear Average Current Control . . . . . . . . . . . . . . . . . . . 148

6.4.1
Control Strategy Description for a Single VSC Module . . . . 149
6.4.2
Interleaved Voltage-Source Converters using the Nonlinear Average Current Control Technique . . . . . . . . . . . . . . . .
6.4.2.1 Independent Control Implementation . . . . . . . . .
6.4.2.2 Master/Slave Control Implementation . . . . . . . .
6.4.2.3 Experimental Results . . . . . . . . . . . . . . . . .
6.4.2.4 Modular Approach with Two Current Sensors per
Module . . . . . . . . . . . . . . . . . . . . . . . . .
152
156
161
173
178
6.5 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187

7. Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
APPENDICES
A. Wind Energy State-of-the-Art . . . . . . . . . . . . . . . . . . . . . . . . . 203
A.1 General Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
A.1.1 Parts of a Wind Turbine . . . . . . . . . . . . . . . . . . . . . 203
A.1.2 Upwind vs. Downwind . . . . . . . . . . . . . . . . . . . . . . 205
v
A.2 Wind Turbine Control . . . . . . . . . . . . . . . . . . . . . . . . . . 205

A.2.1 Passive Stall Control . . . . . . . . . . . . . . . . . . . . . . . 205
A.2.2 Pitch Control and Active Stall Control . . . . . . . . . . . . . 206
A.2.3 Blade Tip Control . . . . . . . . . . . . . . . . . . . . . . . . 208
A.2.4 Yaw Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
A.3 Wind Turbine Technologies . . . . . . . . . . . . . . . . . . . . . . . 209
A.3.1 Tip-Speed Ratio
. . . . . . . . . . . . . . . . . . . . . . . . . 211
A.3.2 Fixed-Speed Turbines . . . . . . . . . . . . . . . . . . . . . . . 213

A.3.3 Variable-Speed Turbines . . . . . . . . . . . . . . . . . . . . . 214
A.4 Transmission
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
A.4.1 Gearbox Transmission . . . . . . . . . . . . . . . . . . . . . . 215

A.4.2 Direct Drive Transmission . . . . . . . . . . . . . . . . . . . . 216
A.5 Generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
A.5.1 Synchronous Generator . . . . . . . . . . . . . . . . . . . . . . 218
A.5.2 Doubly-Fed Induction Generator . . . . . . . . . . . . . . . . 219
B. Open-Loop Simulations of Rectifiers T and TY . . . . . . . . . . . . . . . 221
C. Closed-Loop Operation of Rectifier T . . . . . . . . . . . . . . . . . . . . 226
D. Derivation of the Conduction and Switching Losses of Rectifiers TY and TS 237
D.1 Rectifier TY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
D.1.1 Conduction Losses . . . . . . . . . . . . . . . . . . . . . . . . 237
D.1.2 Switching Losses . . . . . . . . . . . . . . . . . . . . . . . . . 239
D.2 Rectifier TS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
D.2.1 Conduction Losses . . . . . . . . . . . . . . . . . . . . . . . . 240
D.2.2 Switching Losses . . . . . . . . . . . . . . . . . . . . . . . . . 243
E. Mathematica Program for determining the Harmonic Components of the
Dc-Link Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
vi
LIST OF TABLES
1.1
Net generation of electricity by energy source in thousand megawatthours

[1]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2
Wind turbine topologies. . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3
Maximum harmonic current distortion in percent of current (I)a [2]. . . 12
1.4
Maximum ratings of power semiconductor devices [3]. . . . . . . . . . . 20
2.1
Voltage space vectors and resulting converter voltages. . . . . . . . . . . 39
2.2
Voltage space vector lengths and angular positions.
2.3
Time allocated to the voltage space vectors per switching period. . . . . 44
3.1
Generation of the voltage space vectors. . . . . . . . . . . . . . . . . . . 54
3.2
Switch currents of T operating in Sector I.
3.3
Wind speed operating range of the generator/rectifier system for different slip values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.1
Zero crossing angles. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.2
Voltage space vector intervals in the time domain. . . . . . . . . . . . . 88
4.3
Comparison between theoretical and simulation results for the rms currents of the bidirectional switches of T . . . . . . . . . . . . . . . . . . 93
4.4
Comparison between theoretical and simulation results for the average

currents of one unidirectional switch of T . . . . . . . . . . . . . . . . . 94
4.5
Analytical and simulated switch and diode current of T . . . . . . . . . 104
5.1
Common-mode voltage harmonic amplitudes. . . . . . . . . . . . . . . . 117
5.2
Ac phase current harmonic amplitudes. . . . . . . . . . . . . . . . . . . 120
5.3
Ac phase current harmonic amplitudes. . . . . . . . . . . . . . . . . . . 121
5.4
Inter-module circulating current harmonic amplitudes. . . . . . . . . . . 127
5.5
Dc-link current harmonic amplitudes. . . . . . . . . . . . . . . . . . . . 136
6.1
Definitions of vp , vn , and vm per sector [4]. . . . . . . . . . . . . . . . . 149
6.2
Definitions of Sp , Dp, Sn , Dn , Sm , and associated duty cycles [4]. . . . . 150
6.3
Measured and desired dc-link current for Sector I. . . . . . . . . . . . . 155

vii
. . . . . . . . . . . 40
. . . . . . . . . . . . . . . 55
6.4
Time interval, vector combination, and the sensed dc-link current and
phase being modulated of Module 1 in Sector I. . . . . . . . . . . . . . 158
6.5
phase being modulated of Module 2 in Sector I. . . . . . . . . . . . . . 159
6.6
phase being modulated of Modules 1 and 2 in Sector II. . . . . . . . . . 161
6.7
Free-wheeling and controllable circulating currents per sector. . . . . . . 162
6.8
Currents of the positive and negative dc-link rails of Module 1 for the
vector combinations of Sector I. . . . . . . . . . . . . . . . . . . . . . . 181
6.9
Currents of the positive and negative dc-link rails of Module 1 for the
vector combinations of Sector II. . . . . . . . . . . . . . . . . . . . . . . 182
6.10 Proposed current feedback signal for Module 1. . . . . . . . . . . . . . . 182

C.1
Duty cycles per sector of switches S1 , S2 , and S3 of TS . . . . . . . . . . 233
D.1
Comparison between theoretical and simulation results for the rms and
average currents of the switches of TS . . . . . . . . . . . . . . . . . . . . 243
viii
LIST OF FIGURES
1.1
Global wind power growth from 1994 to 2007 [5]. . . . . . . . . . . . . .
1.2
Top 10 countries in installed wind generation capacity [6]. . . . . . . . .
1.3
Evolution of wind turbine size [7]. . . . . . . . . . . . . . . . . . . . . .
1.4
Wind energy system with a power electronics interface. . . . . . . . . .
1.5
Wind turbine block diagram. . . . . . . . . . . . . . . . . . . . . . . . .
1.6
Low voltage ride-through standard [8]. . . . . . . . . . . . . . . . . . . . 11
1.7
Wound rotor induction generator with a variable rotor resistance. . . . . 14
1.8
Three-phase diode rectifier with (a) an LC output filter, (b) an input

inductive filter and capacitive output filter and (c) a capacitive output
filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.9
Three-phase diode rectifier with a capacitor bank. . . . . . . . . . . . . 15
1.10 High voltage dc wind farm architecture. . . . . . . . . . . . . . . . . . . 16

1.11 Six switch voltage-source converter. . . . . . . . . . . . . . . . . . . . . 17
1.12 Two-level output of the voltage-source converter. . . . . . . . . . . . . . 18
1.13 Back-to-back voltage source converters. . . . . . . . . . . . . . . . . . . 18
1.14 Interleaved voltage-source converters. . . . . . . . . . . . . . . . . . . . 19
1.15 Output voltage of (a) a three-level and (b) a five-level multilevel converter. 21
1.16 Single leg of a five-level (a) diode-clamped multilevel converter, (b)
flying-capacitor multilevel converter, and (c) cascaded H-bridge multilevel converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
1.17 Matrix converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.1
Three-phase voltage-source converter and realization of the bidirectional

switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.2
Naturally sampled carrier-based modulation. . . . . . . . . . . . . . . . 31
2.3
Overmodulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.4
Reference voltage and its fundamental and third harmonic components.
2.5
Reference voltage and its fundamental and third harmonic components

for optimum third harmonic injection. . . . . . . . . . . . . . . . . . . . 35
ix
33
2.6
Reference voltage vector rotating in the plane. . . . . . . . . . . . . 37
2.7
Space-vector modulation: Eight possible switching states. . . . . . . . . 38
2.8
Voltage space vectors in the plane. . . . . . . . . . . . . . . . . . . . 40
2.9
Sector definitions in the a) time domain and b) space vector domain. . . 41
2.10 Decomposition of the reference vector for deriving the time allocated to
the active vectors (Sector I). . . . . . . . . . . . . . . . . . . . . . . . . 42
2.11 Switching sequence for switches S1 , S2 , and S3 in Sector I. . . . . . . . . 45
3.1
Three-phase PWM rectifiers a) T , b) TY , and c) TB . . . . . . . . . . . 48
3.2
Three-phase uncontrolled rectifier and the input current of phase a when

employing only a capacitive filter and when employing capacitive and
inductive filters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.3
Operation boundaries of rectifier topologies T , TY , and TB . . . . . . . 50
3.4
a) Three-phase rectifier of [9] and b) the Vienna rectifier. . . . . . . . . 51
3.5
Voltage space vector v1 applied to a) the six-switch PWM VSC and b)

T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.6
Voltage space vector v4 applied to a) the six-switch PWM VSC and b)

T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.7
Operation boundaries of rectifier topologies T , TY , and TB . . . . . . . 55
3.8
Contribution of the zero vector intervals to the conduction losses of T

resulting from the use of different zero vectors in Sector I. . . . . . . . . 56
3.9
Switching loss instants for topology T when using zero vector a) {1 1

1} and b) {1 1 0}. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.10 Switching loss instants for topology T when using zero vector a) {1 0
1} and b) {0 1 1}. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
3.11 a) Sector I drive signals for TS and T and b) the combinatorial logic
for generating the drive signals for Sab from the drive signals of TS when
using zero vector {1 1 1}. . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.12 SABER simulation schematic of the power stage and PWM of T . . . . 62
3.13 Simulation results of the phase a current and source voltage of TY . . . . 63
3.14 Currents through switches a) Sab (using zero vector {1 1 1}), b) Sab
(using a different zero vector per sector), and c) S1 of TY . . . . . . . . . 63
3.15 Per-phase model of the induction generator. . . . . . . . . . . . . . . . . 65
x
3.16 Wind turbine and induction generator model. . . . . . . . . . . . . . . . 66

3.17 Active and reactive power trajectory of the example induction generator
for wind speeds varying from 1 m/s to 15 m/s. . . . . . . . . . . . . . . 69
3.18 Voltage-to-frequency ratio for wind speeds varying from 1 m/s to 15 m/s. 70
3.19 Active and reactive power limits of T for a -1% slip and wind speeds
equal to 5, 10, and 15 m/s. . . . . . . . . . . . . . . . . . . . . . . . . . 71
3.20 Variation of the phase of stator current as a function of the wind speed
and for a constant -1% slip. . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.21 Induction generator/rectifier operation between the cut-in speed (1 m/s)
and rated speed (15 m/s). . . . . . . . . . . . . . . . . . . . . . . . . . 73
3.22 P-Q curve of the induction generator and the operation boundaries of
rectifier T for different values of slip. . . . . . . . . . . . . . . . . . . . 74
3.23 SABER simulation schematic of the generator/rectifier system. . . . . . 76
3.24 Stator phase a current during start-up and for a step transition in the
slip from -2% to -5%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
3.25 Detail of the stator current during the start-up transient. . . . . . . . . 78
4.1
a) Equivalent circuit for phase a and b) the corresponding phasor diagram. 83
4.2
Equivalent circuit when zero vector {1 1 1} is applied. . . . . . . . . . . 85
4.3
Current envelopes for switch current iSab (1 t) over a line cycle. . . . . . 86
4.4
Current iSab (t) over a line cycle and over a switching cycle in Sector I
and the voltage across the switch over a switching cycle in Sector I for
the two given modulation strategies. . . . . . . . . . . . . . . . . . . . . 87
4.5
Variation of i2Sab ,rms over a line cycle for operation at rated power and a
30o phase lag. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.6
0o phase lag. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4.7
24o phase lead. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4.8
Current through Sab and current envelopes for l = 1 and a) a 30o phase
lag, b) unity power factor operation, and c) a 24o phase lead. . . . . . . 92
4.9
Current through Sab and current envelopes for l = 0 and a) a 30o phase
lag, b) unity power factor operation, and c) a 24o phase lead. . . . . . . 93
4.10 SABER simulation schematic for the discrete implementation of the

bidirectional switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
xi
4.11 Simplified switching instants. . . . . . . . . . . . . . . . . . . . . . . . . 95

4.12 Variation of the combined switching losses for rated power and a 24o
current phase lead. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
4.13 Current envelopes of iD1 (t). . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.14 Variation of the square of the switch rms current: a) Operation under
rated output power and b) Operation under 50% rated output power
and stator terminal voltage magnitude. A 24o leading phase angle is
assumed for the current. . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.15 Practical implementation of a bidirectional switch using a) IGBTs with
series diodes, b) a series connection of IGBTs (common-emitter configuration), and c) an anti-parallel connection of reverse-blocking IGBTs. . 101
4.16 Comparison of common-mode voltage generated by rectifier T (upper
diagram) and the six-switch VSC (lower diagram). . . . . . . . . . . . . 105
4.17 a) One leg of the diode bridge during the zero vector interval and b) magnified view of the reverse bias characteristic of two mismatched diodes
of a leg of the diode bridge. . . . . . . . . . . . . . . . . . . . . . . . . . 106
4.18 Laboratory test set-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
5.1
Phase-shifted carrier signals for N interleaved modules. . . . . . . . . . 109
5.2
A three-phase voltage-source converter using N parallel modules. . . . . 111
5.3
SABER simulation schematic for two interleaved VSC modules. . . . . . 116
5.4
Spectra of the common-mode voltage of N interleaved VSCs. . . . . . . 117
5.5
a) Equivalent circuit of phase a for N interleaved modules and b) the

simplified equivalent circuit. . . . . . . . . . . . . . . . . . . . . . . . . 118
5.6
Spectra of the ac phase current of N interleaved VSCs. . . . . . . . . . 120
5.7
Definition of the inter-module circulating and module output currents

for a) two, b) three, and c) N interleaved VSC modules. . . . . . . . . . 122
5.8
a) Voltage difference between the converter voltages of phase a, b) intermodule circulating current, c) inductor currents ia1 and ia2 and phase a
current for a quarter of the line cycle and N = 2. . . . . . . . . . . . . . 128
5.9
Spectra of the a) inductor current, b) inter-module circulating current,

and c) phase a current for the case of N = 2. . . . . . . . . . . . . . . . 130
5.10 Spectra of the dc-link current of N interleaved VSCs. . . . . . . . . . . 136

6.1
Isolated parallel voltage-source converter configurations: a) with low

frequency transformers and b) separate dc power supplies. . . . . . . . . 139
xii
6.2
Simplified schematic of the abc current control. . . . . . . . . . . . . . . 143
6.3
a) Average model of the parallel VSC modules and b) block diagram of

the current loop for phase a. . . . . . . . . . . . . . . . . . . . . . . . . 145
6.4
Phase a inductor current of Module 1 and reference current. . . . . . . . 147
6.5
Inductor current space vector trajectory in the 0 space. . . . . . . . . 148
6.6
a) Sector definitions and b) equivalent circuit of a single voltage-source

converter module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
6.7
Dc-link current of a stand-alone voltage-source converter. . . . . . . . . 151
6.8
Implementation of the nonlinear average control strategy. . . . . . . . . 152
6.9
Phase a current of a voltage-source converter operating with the nonlinear average current control. . . . . . . . . . . . . . . . . . . . . . . . 153
6.10 Two voltage-source converter modules connected in parallel.
. . . . . . 154
6.11 a) Sector definitions and b) equivalent circuit for Sector I. . . . . . . . . 155

6.12 Modular implementation of the single module control to two interleaved
VSC modules. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
6.13 Simulation results of the inductor currents of phase a. . . . . . . . . . . 158
6.14 Vector combination in Sector I. . . . . . . . . . . . . . . . . . . . . . . . 159
6.15 Circulating currents ib and ic , control signals and integration output
of Modules 1 and 2 in Sector II. Module 1 does not commutate. . . . . 161
6.16 Circulating currents ib and ic , control signals and integration output
of Modules 1 and 2 in Sector II. Module 1 resumes normal operation. . 162
6.17 Master/slave implementation of two interleaved voltage-source converters.163
6.18 Inductor currents of phase a when operating in the master/slave configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
6.19 Difference between the inductor currents of Fig. 6.18. . . . . . . . . . . 164
6.20 Spectrum of the difference between the inductor currents of phase a. . . 165
6.21 Spectra of the a) phase a module output current, b) circulating current,
and c) master converter current. . . . . . . . . . . . . . . . . . . . . . . 166
6.22 Source voltages vsa and vsc and the complimentary duty cycles of the
master and slave modules. . . . . . . . . . . . . . . . . . . . . . . . . . 167
6.23 a) Equivalent circuit of the master/slave configuration and b) equivalent
circuit for the circulating current analysis. . . . . . . . . . . . . . . . . . 168
xiii
6.24 Average model of the circulating current loop. . . . . . . . . . . . . . . 168

6.25 a) Dc-link, b) ia , ib , and ib current waveforms in Sector I. . . . . . . 170
6.26 Derivative of the inherent circulating current of phase a in Sector I for
different values of t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
6.27 Current flowing through the ac source of phase a. . . . . . . . . . . . . 172
6.28 Experimental set-up of two interleaved voltage-source converters. . . . . 174
6.29 Phase a source voltage and current of the single module operating with
the nonlinear average current control. . . . . . . . . . . . . . . . . . . . 174
6.30 Phase a inductor currents of the master and slave converters. . . . . . . 175
6.31 Phase b inductor currents of the master and slave converters. . . . . . . 175
6.32 Phase c inductor currents of the master and slave converters. . . . . . . 176
6.33 Currents flowing through the ac sources. . . . . . . . . . . . . . . . . . 176
6.34 Difference between the inductor currents of phase a. . . . . . . . . . . . 177
6.35 Difference between the inductor currents of phase b. . . . . . . . . . . . 177
6.36 Difference between the inductor currents of phase c. . . . . . . . . . . . 178
6.37 Spectrum of the inductor current of the master converter (phase a). . . 179
6.38 Spectrum of the circulating current of phase a. . . . . . . . . . . . . . . 179
6.39 Spectrum of the current flowing through the ac source of phase a. . . . 180
6.40 Definition of the dc-link rail currents of two parallel VSC modules. . . . 181
6.41 Implementation of the nonlinear current control using two current sensors per module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
6.42 Inductor current waveforms of phase a when using two current sensors
per module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
6.43 Current flowing through the ac source of phase a when using two current
sensors per module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
6.44 Detail of the transition from Sector I to Sector II. . . . . . . . . . . . . 185
6.45 High frequency circulating current of phase a when using two current
sensors per module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
6.46 Detail of the high frequency current ripple transitioning to free-wheeling
current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
A.1
Parts of a wind turbine. . . . . . . . . . . . . . . . . . . . . . . . . . . . 203

xiv
A.2
a) Definition of angle of attack and rotation axis, b) Pitch control, and

c) Active stall control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
A.3
Blade tip control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
A.4
Power output comparison between a variable-speed pitch-controlled turbine and a fixed-speed stall-regulated turbine [10]. . . . . . . . . . . . . 210
A.5
Section of power surface domain (vertical view) [11]. . . . . . . . . . . . 212
A.6
Direct drive arrangement. . . . . . . . . . . . . . . . . . . . . . . . . . . 217
A.7
Doubly-fed induction generator system. . . . . . . . . . . . . . . . . . . 220
B.1
a) Equivalent circuit for phase a and b) the corresponding phasor diagram.221
B.2
Combinatorial logic for T when using zero vectors {1 1 0} for Sectors

I and IV, {1 0 1} for Sectors II and V, and {0 1 1} for Sectors III and VI.224
B.3
SABER simulation schematic of the power stage and PWM of TY . . . . 225
C.1
Schematic of the power stage of T . . . . . . . . . . . . . . . . . . . . . 227
C.2
Schematic of the 0 and dq0 transformations. . . . . . . . . . . . . . . 228
C.3
Block diagram of the plant. . . . . . . . . . . . . . . . . . . . . . . . . . 230
C.4
Schematic of the current compensator. . . . . . . . . . . . . . . . . . . . 231
C.5
a) Drive signals of switches S1 , S2 , and S3 of the six-switch VSC for

Sector I and b) derivation of the time associated with the application
of each voltage space vector in Sector I. . . . . . . . . . . . . . . . . . . 232
C.6
Schematics of the inverse transformation and duty cycle dS1 in Sectors

I and IV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
C.7
Schematics of the duty cycle selection for switch S1 and PWM. . . . . . 235
C.8
Simulation result of the phase a source voltage and phase a input current
of T for PFC operation and closed-loop current control. . . . . . . . . 236
D.1
Current envelopes of iS1 (t). . . . . . . . . . . . . . . . . . . . . . . . . . 237
D.2
Switch current iS1 (t) for a switching cycle of each subsector. . . . . . . . 238
D.3
Switch currents and voltages across the switches for Subsector Ia. . . . . 239
D.4
Currents through switch S1 and diode D1 over a line cycle and over a
switching cycle for different sectors. . . . . . . . . . . . . . . . . . . . . 241
D.5
Variation of i2S1 ,rms for rated power operation and a 24o phase lead. . . . 242
D.6
Switching loss instants for topology TS during Subsector Ia. . . . . . . . 244

xv
ACKNOWLEDGMENT
I would like to thank my husband, Eduardo. He was my rock during these
past four years, supporting me in my decisions and understanding the long hours
and dedication required to complete my research. Thank you for your love.
I would also like to thank my parents and my brother who encouraged me to
pursue a Ph.D. and always provided me with the strength to persevere.
A special thanks to Prof. Sun for his time and dedication. His hard questions
and critiques have pushed me to constantly look for ways to improve my work.
I would like to thank my committee members, Prof. Connor, Prof. Parsa, Prof.
Salon, and Dr. Kokernak, for their time, questions, and suggestions.
I would like to thank Jerry Dziuba for always providing us with everything we
needed to successfully complete our experimentation, both in the classroom (for my
TA assignments) and in the lab.
I would like to thank John Szczesniak for his time and willingness to manufacture the inductor brackets for our prototype. His technical expertise, both in the
design of the brackets and in the use of the machines in his laboratory, and his good
humor made the task a breeze.
A special thanks to Ann Bruno whose friendship has meant the world to me...
Her friendly ear and words of encouragement were always there whenever I needed
them the most.
A special thanks to Priscilla Magilligan who was always there for me, as a
friend and as my go-to person for all my questions on RPI procedures.
I would also like to thank Zhonghui Bing, Troy Beechner, and Min Chen for
our time working together and for your friendship.
xvi
ABSTRACT
Of all the alternative and renewable energy sources, wind power is the fastest
growing alternative energy source with a total worldwide capacity of over 93 GW
as of the end of 2007. However, making wind energy a sustainable and reliable
source of electricity doesnt come without its set of challenges. As the wind turbines increase in size and turbine technology moves towards off-shore wind farms
and direct drive transmission, the need for a reliable and efficient power electronics
interface to convert the variable-frequency variable-magnitude output of the wind
turbines generator into the fixed-frequency fixed-magnitude voltage of the utility
grid is critical.
This dissertation investigates a power electronics interface envisioned to operate with an induction generator-based variable-speed wind turbine. The research
conclusions and the interface itself are applicable to a variety of applications, including uninterruptible power supplies, industrial drives, and power quality applications,
among others. The three-phase PWM rectifiers with ac-side bidirectional switches
are proposed as the rectification stage of the power electronics interface. Modulation
strategies are proposed for the rectifiers and the operation of the rectifiers in conjunction with an induction generator is demonstrated. The viability of using these
rectifiers in place of the standard three-phase voltage-source converter is analyzed
by comparing losses and common-mode voltage generation of the two topologies.
Parallel three-phase voltage-source converter modules operated in an interleaved fashion are proposed for the inversion stage of the power electronics interface. The interleaved three-phase voltage-source converters are analyzed by deriving
analytical models for the common-mode voltage, ac phase current, and dc-link current to reveal their spectra and the harmonic cancellation effects of interleaving.
The practical problem of low frequency circulating current in parallel voltage-source
converters is also analyzed. The low frequency circulating current characteristics
of abc, dq, and nonlinear average current control are determined and experimental
results for the nonlinear average current control are presented.
xvii
CHAPTER 1
Introduction
A crisis is an opportunity riding the dangerous wind. (Chinese proverb)
It is difficult to deny the current energy crisis that has overwhelmed the U.S.
in recent years. During most of the twentieth century, the price of oil in the U.S.
was heavily regulated by production or price controls [12]. However, the price of the
barrel of oil has sky-rocketed from $15.71 per barrel in 1999 (adjusted for inflation
of 2007) [13], to $145.00 per barrel as of July 3, 2008 [14], due to the aftermath
of September 11, OPEC cuts, Hurricane Katrina, the Iraq War, the growth of the
Asian market, and the weaker U.S. dollar [12].
The pressure on the oil markets is expected to continue and increase as the
air of uncertainty enveloping the global oil supply and demand in China, the Middle East, and Latin America increase. The world consumption of liquid fuels and
petroleum by-products is expected to grow by approximately 900,000 barrels per
day in 2008 and by an additional 1.4 million barrels per day in 2009 [14].
With the governments ban on exploring new oil sites, the U.S. has had to
rely more and more on foreign oil to meet its ever increasing demand. In 1973, the
year of the oil embargo, the U.S. was importing only 24% of its oil requirements.
At the start of the Gulf War in 1990, the importation of oil had grown to 42%.
Currently, the U.S. imports approximately 70% of its need [15]. To put this in a
global perspective, the U.S. consumes almost 25% of the worlds oil for only 4% of
the worlds population [15].
At current oil prices, it is expected that the U.S. will send $700 billion to
foreign countries by the end of the year. Over a ten year period and considering a
fixed barrel price, the total cost of importing foreign oil will be $10 trillion dollars.
This will represent the largest transfer of wealth in the history of mankind [16].
The U.S. dependency on foreign oil has raised grave concerns over the economy,
the environment, and, especially, national security. Although the U.S. has begun
the process of weaning itself off foreign oil by possibly approving measures to drill in
the Gulf of Mexico and ANWR (Arctic National Wildlife Refuge in Alaska), increasing the fleet of electric and ethanol-based vehicles, and researching and developing
1
alternative sources of energy, it is still at the infant stage. Although it is projected

that U.S. oil consumption will decline by approximately 400,000 barrels per day in
2008, the cost of residential energy is expected to rise by an annual average of 5.2%
in 2008 and 9.8% in 2009 [14]. It is also projected that electric energy consumption
will increase substantially when plug-in hybrid electric and electric vehicles start to
replace gasoline-based vehicles. Table 1.1 presents the net generation of electricity
in the U.S. by energy source according to the Energy Information Association [14].
Table 1.1: Net generation of electricity by energy source in thousand
megawatthours [1].
Natural
Period
Coal
Petroleum
Nuclear Hydroelectric Renewables
Gas
1994 1,690,694
105,901
460,219 640,440
260,126
76,535
1995 1,709,426
74,554
496,058 673,402
310,833
73,965
1996 1,795,196
81,411
455,056 674,729
347,162
75,796
1997 1,845,016
92,555
479,399 628,644
356,453
77,183
1998 1,873,516
128,800
531,257 673,702
323,336
77,088
1999 1,881,087
118,061
556,396 728,254
319,536
79,423
2000 1,966,265
111,221
601,038 753,893
275,573
80,906
2001 1,903,956
124,880
639,129 768,826
216,961
70,769
2002 1,933,130
94,568
691,006 780,064
264,329
79,109
2003 1,973,737
119,406
649,908 763,733
275,806
79,487
2004 1,978,620
120,771
708,854 788,528
268,417
82,604
2005 2,013,179
122,522
757,974 781,986
270,321
87,213
2006 1,990,926
64,364
813,044 787,219
289,246
96,423
2007 2,020,572
65,708
893,211 806,487
248,312
102,988
The statistics are grim; however, alternative energy sources may be the source
of relief in the long run. What was once considered the brainchild of environmentalists is becoming a reality, fueled in part by the popularity of the global warming
theory and the public outcry over the ever increasing prices at the pump. There is a
particular interest in renewable energy sources, such as solar, wind, hydro, geothermal, and tidal, which are naturally replenished by nature and are domestic. The
Energy Policy Act of 2005 authorized subsidies for wind and other alternative energy
producers and established that the U.S. should obtain 7.5% of its electrical energy
from renewable energy sources by 2013 [17].
1.1
Wind Energy
Of all the alternative and renewable energy sources, wind power is the fastest
growing alternative energy source with a total worldwide capacity of over 93 GW as

of the end of 2007 [5]. The worldwide installed capacity, however, is only a scratch
on the surface of the total potential energy that can be captured from the wind. In a
recent study at Stanford University, it was concluded that the global locations with
sustainable Class 3 winds can produce 72 TW of energy [18]. Even if only 20% of
the 72 TW were successfully converted into electrical energy, it could satisfy many
times over the global consumption of 1.6 to 1.8 TW [18].
As can be observed in Fig. 1.1, the worldwide installed capacity has grown
continuously each year by an average of approximately 29%. The wind power industry is continuously increasing the size, capacity, and efficiency of the wind turbines
due to investments in research and development. The Global Wind Energy Council predicts that by 2012 the installed capacity will have increased by 155% of its
2006
59.084 GW
2005
2004
39.431 GW
2003
2002
2001
17.357 GW
10.153 GW
1998
2000
7.636 GW
1997
1999
6.104 GW
1996
10
4.821 GW
20
1995
30
3.531 GW
40
13.594 GW
50
24.390 GW
60
31.228 GW
70
47.317 GW
80
1994
Cumulative GW Installed
90
74.223 GW
current size to 240 GW [6].
Figure 1.1: Global wind power growth from 1994 to 2007 [5].
Over 70 countries contribute to the total worldwide production of wind energy,
with Europe accounting for 65% of the total, although the largest growths over the
past years have been observed outside Europe [6]. The top ten countries in installed
3
wind generation capacity are presented in Fig. 1.2.
Country
MW
22,247
23.7
USA
Spain
16,818
17.9
15,145
16.1
India
7,845
8.4
China
5,906
6.3
Denmark
Italy
3,125
3.3
2,726
2.9
France
2,454
2.6
UK
Portugal
2,389
2.5
2,150
2.3
Rest of the world 13,060
13.9
Germany
Portugal
UK
France
Italy
Denmark
Rest of
the
world
Germany
China
India
USA
Spain
Figure 1.2: Top 10 countries in installed wind generation capacity [6].

The growth of installed wind power capacity can be attributed to many factors including interest in green power, increase in the price of fossil fuels, maturing
technology, involvement of more businesses in the wind industry, and government incentives to produce a greater percentage of national energy from renewable sources.
Significant investments have been made in the research and development of the technologies that compose the wind turbine. The results of these efforts are evident in
the increased energy capture achieved by modern turbines. This growth could not
have been possible without improvements in foundation structures, materials, blade
aerodynamics, gearbox technology, and energy conversion systems. The evolution
of the size of wind turbine diameters and energy capture capability are presented
in Fig. 1.3. The size of the turbines have increased over 1000% in the past twenty
years and have become the largest rotating machines on Earth [7].
Making wind energy a sustainable and reliable source of electricity doesnt
come without its set of challenges. First and foremost, it is still more expensive
than conventional energy sources. According to data from the Department of Energy
(DOE), wind energy currently costs $0.06 to $0.09 per kWh at good wind sites versus
$0.02 to $0.04 per kWh for energy generated by coal plants [19]. A second challenge
is the intermittent nature of wind, which requires that the system have some form
126 m
12 m
1985
0.05
1987
1989
1991 1993
0.3
0.5
1995
1.3
1997
1.6
2001 2003 2004 Year
1999
2
4.5
MW
Figure 1.3: Evolution of wind turbine size [7].

of energy storage to be viable. However, with increasing government subsidies and
continuing research into new and more efficient energy storage components, wind
energy is projected to be competitive with conventional fossil fuel sources by 2012.
1.2
Dissertation Scope
This dissertation considers a variable-speed pitch-regulated wind turbine em-
ploying an induction generator for the electromechanical conversion of the energy

obtained from the wind. The focus of the dissertation is the power electronics interface between the induction generator and the three-phase electrical grid. Although
the chosen application is wind energy conversion, the interface and research conclusions are applicable to a variety of applications, including uninterruptible power
supplies, industrial drives, and power quality applications, among others.
The energy conversion is considered to occur in two stages, from the wild
ac energy at the output of the induction generator to a constant dc voltage (ac/dc
conversion) and from the constant dc voltage to the fixed-frequency fixed-amplitude
three-phase ac voltage of the grid (dc/ac conversion). Each wind turbine presents its
own ac/dc converter and the farm shares a common inversion stage. The intermediate dc voltage is the common connection point for the wind turbines of the wind
farm, as illustrated in Fig. 1.4, forming a high voltage dc grid (HVDC). The energy
of the HVDC grid is then converted to a form compatible with the grid by parallel
dc/ac converters.
Dc-Link
AC/DC
DC/AC
AC/DC
DC/AC
DC/AC
Transformer
Grid
Figure 1.4: Wind energy system with a power electronics interface.
The remainder of this chapter will describe the current state-of-the-art in
variable-speed pitch-reguated wind turbines and the power electronics technology
used to convert the energy of the wind into electrical energy. Further discussions on
wind energy concepts, definitions, turbine control, and fixed-speed versus variablespeed technologies for large wind turbines can be found in Appendix A.
1.3
Power Capability
The rotor, gearbox, and generator of a wind turbine can be represented as
blocks with a given efficiency, as presented in Fig. 1.5. This block diagram will be
used in Chapter 3 for the analysis of the conversion of the energy in the wind to
electrical energy.
The power of the wind (Pw ) is extracted by the rotor with a given performance coefficient (Cp ) and transformed into mechanical power in the low-speed
shaft. This mechanical energy is transformed from low-speed/high-torque energy to
high-speed/low-torque energy by the gearbox. Given the efficiency of the gearbox
(t ) and the gearbox transformation ratio, the mechanical power of the high-speed
shaft (Ps ) is transferred to the generator which converts the mechanical power into
6
electrical power.
Pw
v
Rotor
(Cp)
Pt
wt
Gearbox
(ht)
Pm
wm
Generator
(hg)
Pe
we
Figure 1.5: Wind turbine block diagram.

The power available in the wind is determined by
1
Pw = Av 3
2
(1.1)
where is the air density given in kg/m3 , A is the area swept by the rotor blades
given in m2 , and v is the undisturbed wind speed given in m/s. The power capture
of the turbine is directly proportional to the area swept by the rotor, which explains
the effort to increase the rotor diameter of modern turbines (Fig. 1.3).
The combined average efficiency of a typical upwind stall-regulated three bladed
turbine is slightly above 20% [20]. However, the efficiency of a turbine varies significantly with the wind speed. The wind turbine should be designed to achieve
maximum efficiency at the wind speed with the highest probability at the site. At
low wind speeds, the efficiency is not as critical. At high wind speeds, the turbine
will shed power deliberately when the power available in the wind is higher than the
rating of the generator.
As the wind passes through the rotor blades, the low-speed shaft of the turbine
will rotate with an angular velocity given by
t =
v
r
where r is the radius of the rotor blades in meters and is the tip-speed ratio,
which will be explained in Section A.3.1. The transformation ratio of the gearbox,
x, multiplies rotational speed t and converts the low-speed/high-torque energy of
the low-speed shaft into high-speed/low-torque energy at the rotor of the generator
(high-speed shaft)
m = xt
These are the basic equations for any wind turbine.
1.4
Wind Turbine Topologies

A wind turbine is composed of the input (rotor), transmission (mechanical
energy transmission), generator (mechanical to electrical energy conversion), and

additional circuitry for connection to the utility grid. Given the variety of options
available for each component of the turbine as well as turbine control options, there
are a multitude of wind turbine topologies that can be implemented. Table 1.2
presents the current state-of-the-art in wind turbine topologies [21]. Different combinations of generators, gearbox/direct drive, and power electronics result in different
variable-speed wind turbine topologies. The different options for transmission and
generators are explored Appendix A. The induction generator, its power electronics
interface, and the connection of the system to the grid will be the subjects of the
follwing sections.
Table 1.2: Wind turbine topologies.
Input
Machine Type
Transmission
Rotor
Induction Generator
Fixed speed
Gearbox
Squirrel
Cage
Wound
Synchronous Generator
Variable Speed
Gearbox
Permanent
Magnet
Wound
Induction Generator
Variable Speed
Gearbox
Squirrel
Cage
Wound
Doubly-Fed IG
Variable Speed
Gearbox
Wound
Wound
Variable Speed
Direct
Permanent
Magnet
Wound
Novel machines
Variable Speed
Direct
Wound
Power Electronics
Grid
Soft-starter
and
Capacitor bank
3f Ac
grid
Large Stator-Side
Power Electronics
Converter
3f Ac
or
Dc grid
Large Stator-Side
Power Electronics
Converter
3f Ac
or
Dc grid
Small Rotor-Side
Power Electronics
Converter
3f Ac
or
Dc grid
Large Stator-Side
Power Electronics
Converter
3f Ac
or
Dc grid
Large Stator-Side
Power Electronics
Converter
3f Ac
or
Dc grid
Stator
Wound
1.5
Induction Generator
The induction generator is currently the most widely used generator in com-
mercial wind turbines [22], due to its low cost and robustness. The first induction
generator-based wind turbines were built in the late 1980s and were rated for less
than 100 kW [23]. This generator has been used in both fixed-speed and variablespeed wind turbines (refer to Table 1.2). In both cases, the cheaper and more robust
squirrel cage induction generator has been preferred over the wound rotor induction
generator. The squirrel cage is mechanically simple and is resistant to the effects of
possible dirt ingress and vibration. This limits the maintenance of the squirrel cage
induction generator to occasional bearing lubrications [22], making it a cost effective
choice for both initial system cost and long-term maintenance costs.
The main drawback of the induction generator is its reactive power consumption. As the active power at its output increases, it requires more reactive power
to operate. In fixed-speed wind turbines, the need for reactive power was addressed
by connecting a capacitor bank between the stator windings and the grid. In the
case of variable-speed wind turbines, the power electronics interface is required to
provide the reactive power consumed by the generator.
The induction generator is well suited for responding to rapid wind variations
since it can increase or decrease its speed slightly if the torque varies [22] [24]. This
characteristic of the machine reduces the wear and tear on the gearbox.
1.6
Grid Interconnection Requirements

Wind turbines connected to the grid could not accommodate the voltage and
frequency transients that often occur on the electric grid [25]. It was common
practice for wind turbines to be disconnected from the grid whenever a disturbance
was detected. However, with the ever increasing penetration of wind turbines in
the grid, these turbines must now contribute to the stability of the grid and have
the capability of riding-through faults in the same fashion as conventional power
generation equipment [25].
Each country has adopted a set of standards for the interconnection of large
wind turbines and wind farms to their respective electrical grids. Some of the most
complete and developed standards have been proposed by Germany, Denmark, and
Spain due to the large penetration of wind energy in their respective electric grids
9
[26]. The United States currently uses the IEEE 1547 standard and the Federal
Energy Regulatory Commissions Order No. 661.
IEEE standard 1547 offers power quality limits regarding the harmonic content
of the currents injected into the grid by any distributed resource (wind turbines,
photovoltaic systems, fuel cell systems, etc.) with an output below 10 MW. This
standard is relevant for large wind turbines individually connected to the grid.
The Federal Energy Regulatory Commissions Order No. 661, instated in June
of 2005, determines the interconnection standards of large wind farms (over 20 MW)
regarding the power factor (reactive power capability) and low voltage ride-through
requirements.
1.6.1
Voltage Fault Ride-Through

One of the main driving factors for the use of power electronics interfaces for
wind turbines connected to the grid is the requirement that the turbine ride-through
low voltage conditions at the point of interconnection [27]. The low voltage ridethrough requirements are outlined in the Federal Energy Regulatory Commissions
Order No. 661. It states that the wind turbine system must comply with the low
voltage ride-through standard if the Transmission Providers Impact Study deems it
necessary for the safety or reliability of the overall system [8]. The voltage levels of
a disturbance and undervoltage duration that the wind turbine must accommodate
are highlighted in Fig. 1.6 [8]. Outside of the highlighted area, the turbine is not
required to remain online.
1.6.2
Power Factor
When the penetration of wind turbines was limited to small units, there was
no need for the wind turbines to provide reactive power to the grid. However, as the
size of the wind turbines increase and the penetration levels reach 10 to 15% [25],
the Transmission Provider now requires that wind turbines operate within a power
factor range to help balance the reactive power of the transmission system [8].
The Federal Energy Regulatory Commissions Order No. 661 states that the
wind turbine system must maintain a power factor within the limits of 0.95 leading
and 0.95 lagging at the high voltage side of the wind plant substation transformer
if the Transmission Providers Impact Study deems it necessary for the safety or
10
P.u. Voltage at the Point of Interconnection
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Lower value of
the voltage band
625
3,000
t [ms]
Fault occured
Figure 1.6: Low voltage ride-through standard [8].
reliability of the overall system [8]. This power factor requirement should take into
consideration the voltage level at the point of interconnection and the active power
output of the wind turbine system.
The wind turbine system should also be capable of dynamic voltage regulation
in place of the power system stabilizer and automatic voltage regulation if the Impact
Study deems it necessary [8].
1.6.3
Power Quality
The IEEE 1547 standard determines the limits of harmonic current generated
by the distributed resource, in this case, the wind turbine system that can be injected
into the grid at the point of interconnection. The dc current shall not exceed 0.5%
of the rated output current at the point of interconnection [2]. The harmonics
generated by the distributed resource shall not exceed the limits established in Table
1.3 [2]. The current harmonic limits exclude those harmonics generated due to
existing voltage distortion in the local grid before the connection of the distributed
resource.
11
Table 1.3: Maximum harmonic current distortion in percent of current

(I)a [2].
Odd
Harmonic h < 11 11 h < 17 17 h < 23 23 h < 35 35 h TDD c
Order b
Percent
4.0
2.0
1.5
0.6
0.3
5.0
a
I = the greater of the local electric power system maximum load current integrated
demand (15 or 30 minutes) without the distributed resource unit, or the distributed
unit rated current capacity (transformed to the point of common connection when
a transformer exists between the distributed unit and the point of common connection).
b
Even harmonics are limited to 25% of the odd harmonics limits above.
c
Total Demand Distortion
1.7
Survey of Power Electronics Interface Topologies for Induction Generators

The wind power industry is currently moving towards direct drive transmission
and full power electronics architectures for the interface between the wind turbine
and the utility grid. The difficulties in implementing these architectures increase
substantially as the power level of the wind turbine increases. This is due to several
factors ranging from semiconductor technology, the chosen architecture, modulation
and control strategies, overall control of the system, control partitioning, efficiency,
and cost.
Wind energy systems can be divided into three main categories with regards
to the power electronics interface: systems without a power electronics interface,
systems with a partially rated power electronics interface, and systems with a fully
rated power electronics interface [28] (Table 1.2).
Wind turbines without a power electronics interface are generally stall-regulated
fixed-speed wind turbines employing an induction generator directly connected to
the grid. The reactive power consumed by the machine is dependent on the active power that is being generated and, therefore, varies with the wind speed. The
reactive power is compensated by a capacitor bank which is composed of sets of
smaller capacitors that can be switched in an out with mechanical contactors [29].
The difference between the instantaneous voltage of the grid and the voltage across
the capacitors results in transients every time capacitors are switched in. These
transients compromise the lifetime of both the capacitors and contactors [30]. In
12
[29], a variable capacitor bank using thyristors to control the switch-in instant was
proposed to reduce these transients. The thyristors turn on, connecting the capacitor bank to the system, when the instantaneous voltage of the grid matches the
capacitor voltage. The variable capacitor bank can be emulated by a voltage source
converter, which provides continuous and smooth reactive power compensation [31].
This solution is similar to the use of power electronics converters for correcting power
quality problems of the grid (e.g., UPFC, DVR, STATCOM).
The problem with fixed-speed wind turbines is their limited power regulation
and controllability which does not allow them to contribute to grid stability [30].
Variable-speed wind turbines with a power electronics interface between the turbine
and the grid can be properly controlled to comply with the grid interconnection
requirements.
Wind turbines with a partially rated power electronics interface are based
on the doubly-fed induction machine or wound rotor induction generator with a
controllable rotor resistance [28]. The latter, as illustrated in Fig. 1.7, is composed
of a reactive power compensator, a soft starter, and an additional resistance added
to the rotor windings. This resistance is variable and controlled by a partially rated
power electronics converter (high current/low voltage) which allows the speed to
vary between 2 and 4% [28]. The doubly-fed induction generator, as discussed in
Section A.5.2, uses a partially rated power electronics converter connected to the
wound rotor of the induction generator through slip rings. The speed variation of
this system is directly related to the power rating of the converter.
The fully rated power electronics interface is connected between the machine
and the grid. It is the most versatile of the three interface types since the turbine
speed varies to extract maximum power at any given wind speed, machine selection
is no longer restricted to a certain technology, the gearbox can be eliminated (direct
drive transmission), and the converter that interfaces with the grid can be controlled
to comply with interconnection standards. However, it is also the interface that
sustains the highest losses since it processes all of the power extracted from the
wind. A survey of fully rated power electronics interfaces proposed in the literature
for the squirrel cage induction generators of wind turbines will be presented in the
following subsections.
13
Wound Rotor
Induction Generator
Soft-Starter
Resistance
Control
Grid
Reactive
Power
Compensator
Figure 1.7: Wound rotor induction generator with a variable rotor resistance.
1.7.1
Diode Rectifier
The three-phase diode rectifier, presented in Fig. 1.8, is the simplest ac-dc
converter. The commutation of the diodes occurs naturally depending on the voltage
biasing and current flow and is, thus, said to be uncontrolled. The commutation
frequency is equal to the frequency of the stator voltage. The advantage of this
rectifier over high frequency pulse-width modulation topologies is the robustness
and reliability of the high power diodes.
a)
b)
c)
Figure 1.8: Three-phase diode rectifier with (a) an LC output filter, (b)
an input inductive filter and capacitive output filter and (c)
a capacitive output filter.
The three-phase diode rectifier, however, is an unidirectional converter, meaning that power can only flow in one direction: into the converter. Therefore, the
diode rectifier on its own cannot provide the reactive power required by the induc-
14
tion machine. It must operate in conjunction with a source of reactive power. A

capacitor bank for excitation, as presented in Fig. 1.9, was proposed by [34] for a
small-scale stand-alone dc system. Induction machines with self-excitation capacitors have a well-known voltage regulation problem [35], which is not necessarily a
problem in the case of wind turbines with a power electronics interface. The capacitor bank is designed to provide the reactive power necessary to maintain the rated
stator voltage at the rated wind speed, therefore, stator voltage and frequency will
vary significantly with changes in wind speed. However, increasing the load of the
system or low wind speeds could cause the stator voltage to collapse to zero [36].
This can be avoided by increasing the excitation capacitors; however, the efficiency
of the machine will decrease and the stator currents will increase. Therefore, the
magnetizing current of the machine should be limited and properly controlled so
that the stator currents do not exceed the ratings of the machine [36].
IG
Figure 1.9: Three-phase diode rectifier with a capacitor bank.

The current of the diode bridge is not sinusoidal and can be excessively distorted if the filter inductor on the dc side is not used. The harmonic content of
the diode rectifier currents can cause serious problems to the machine, such as increase in copper and iron losses, pulsating torques due to the positive and negative
sequence harmonics, increase in audible noise, overheating, and possibly damage.
The three-phase diode rectifier is usually followed by a dc-dc conversion stage.
The dc voltage at the output of the diode rectifier changes as the wind speed varies,
therefore, in order to regulate the dc-link voltage for the inversion stage, a dc-dc
converter is placed between the output of the rectifier and inversion stage [32].
The three-phase diode rectifier has been proposed as the rectification stage of a
power electronics interface connected to the grid [32], as well as the rectification stage
for a high voltage dc system (HVDC) [33] [34]. In the first case, the diode rectifier is
15
followed by an inversion stage composed of a voltage source converter or multi-level

converter. In the case of an HVDC, the rectifier can be one of many turbine/rectifier
systems supplying energy to a common dc grid [28], as illustrated in Fig. 1.10. The
HVDC system is becoming the standard for off-shore wind farms. The long distances
between the farm sites and the conversion station on land make ac transmission
impractical due to the distributed capacitance among cables, which is higher in
undersea cables than in overhead power lines and limits the power transmission
capability [32]. Dc grids have the advantages of decoupling the frequencies of the
turbine and the utility grid, isolating the wind farm disturbances on the grid and
vice-versa, reducing the power losses in the cables compared to HVAC, and increasing
the transmission capability per cable [32]. Once on-shore, the energy is converted
into a form compatible with the local utility grid by a power electronics inverter.
It should be noted that different rectifier topologies can be used in place of the
three-phase diode rectifier for HVDC systems.
IG
AC
IG
AC
DC
DC
HVDC Transmission
DC
AC
.
.
.
IG
AC
DC
Figure 1.10: High voltage dc wind farm architecture.
16
Grid
1.7.2
Six Switch Voltage-Source Converter

The three-phase six switch voltage-source converter, presented in Fig. 1.11,
is the leading solution for medium to high power applications. This converter is
extremely flexible in its operation, capable of generating any current waveform and
operating as a rectifier or inverter (bidirectional active power flow) while providing/absorbing reactive power (bidirectional reactive power flow). Due to its versatility, it has been the subject of countless publications regarding every aspect of
the its operation and use in such diverse applications as motor drives, distributed
generation, reactive power compensation, power factor correction, active filters, and
uninterruptible power supplies.
+
Vdc
_
Figure 1.11: Six switch voltage-source converter.
This topology has been proposed for both the rectification and inversion stages
of the power electronics interface of induction generator-based wind turbines [22] [32]
[38] [39] [40] [41] [42] [43], due to its bidirectional power flow.
The six switch voltage-source converter presents a two-level output, i.e., the
voltage at the mid-points of the switch legs can only present two values, as presented
in Fig. 1.12. Thus, the filtering requirements are greater in the case of the voltagesource converter than for multi-level converters, which present N voltage levels for
N converter levels [44], and the matrix converter, which presents three voltage levels
[45].
The voltage-source converter is the subject of Chapter 2; its basic operation
and the modulation strategies that will be used in subsequent chapters will be discussed.
17
Vdc/2
t
-Vdc/2
Figure 1.12: Two-level output of the voltage-source converter.
1.7.2.1
Back-to-Back Voltage-Source Converters
The back-to-back voltage-source converter topology, as illustrated in Fig. 1.13,

is the most widely used topology for wind energy conversion [45]. It is composed of
two voltage-source converters, one connected at the terminals of the induction generator and operating as a rectifier and the other connected to the grid and operating
as an inverter. The two converters share a common dc-link which decouples of the
controls of the converters [45]. Besides its use with induction generators, the backto-back voltage-source converter is the standard topology for doubly-fed induction
generators [32] [40].
IG
Figure 1.13: Back-to-back voltage source converters.

The advantage of this topology is its simplicity and the fact that it can easily
meet the requirements of both the induction machine and the grid. In the case of the
grid interconnection requirements, the inverters active and reactive power flow can
be controlled quickly and independently from the generator-side converter [28] [38].
Besides meeting the grid requirements, the grid-side converter should be controlled
to maintain the dc-link voltage constant and larger than the peak line voltage of the
grid throughout the variations in wind speed [45] [39].
A disadvantage of this topology is the low efficiency of the rectifier at low wind
speeds. The inverter always operates with high efficiency, since the dc-link voltage
18
is maintained constant at a value slightly larger than the peak line voltage of the
grid [46]. The voltage amplitude generated at the stator terminals of the induction
generator is a function of the wind speed, low wind speeds result in low voltage
amplitudes. The difference in the amplitudes of the stator voltages and dc-link
voltage will force the switches of the rectifier to remain on for longer periods of time
in order to build up energy in the inductors and successfully boost the generator
voltages; this ultimately increases the losses of the rectifier [46]. As the wind speed
increases, the efficiency of the rectifier increases and becomes comparable with the
efficiency of the inverter at the rated wind speed.
1.7.2.2
Interleaved Voltage-Source Converters
The interleaved voltage-source converter topology is essentially N voltagesource converters connected in parallel with phase-shifted drive signals (refer to
Chapter 5). The topology is presented in Fig. 1.14 for N interleaved voltage-source
converters. As in the case of a single voltage-source converter, this topology can be
used as a rectifier or an inverter.
+
...
...
...
Vdc
_
Figure 1.14: Interleaved voltage-source converters.

Each paralleled converter module processes only a fraction of the total power
extracted from the wind. This is advantageous for multi-megawatt wind turbines and
for the inversion stage of a wind farm (Fig. 1.10), where the use of a single voltagesource converter is limited by the semiconductor technology used to implement the
switches. Table 1.4 presents the power semiconductor switches most widely used for
power electronics converters and their maximum ratings [3].
19
Table 1.4: Maximum ratings of power semiconductor devices [3].

BPT
IGBT
Voltage (V)
1,200
6,500
Current (A)
800
MOSFET
GTO
IGCT
1,200
6,000
6,000
3,600
700
6,000
6,000
480
4,000
70
24,000
24,000
Turn-off time (ms)
15-25
1-4
0.3-0.5
10-25
10-15
Frequency range (kHz)
0.5-5
2-20
5-100
0.2-1
>2
Drive requirement
Medium
Low
Low
High
High
Symbol
Output (kVA)
a
b
a
b
Ideal capacity per switch.

Includes delay times and partial current phase.
For cost reasons, the dc-link of the power electronics interface of high power
wind turbines (> 100 kW) is generally designed to be lower than 1 kV [3]. In the
case of multi-megawatt wind turbines and wind farms, the current capability of the
switches would need to be in the kA range, which is beyond the current state-ofthe-art of power semiconductors. In order to bypass this problem, the literature
has proposed to connect converters in parallel [42] [43], or switches in parallel. The
latter can be problematic since no two switches are identical and switching times
may differ sufficiently to cause damage to the converter [43].
Paralleling voltage-source converter modules reduces the stress on the switches,
reduces losses, increases the redundancy of the system, and, consequently, the reliability. By interleaving the drive signals of the modules, harmonic cancellation occurs
which ultimately reduces the filtering requirements on the ac-side of the converter.
1.7.3
Multilevel Converters
Multilevel converters are a family of power electronics converters initially
conceived to reduce the harmonic content of the synthesized voltage waveform

[47]. These converters synthesize sinusoidal voltages at their outputs by generating
stepped voltage waveforms [44]. The difference between the multilevel converters
and the two-level voltage-source converter is the number of voltage levels; while
20
the voltage-source converter produces only two voltage levels (refer to Fig. 1.12),
the multilevel converters can theoretically produce an unlimited number of voltage
levels, depending only on the number of converter levels. The minimum number
of voltage levels a multilevel converter can generate is three. Figure 1.15 presents
the voltage output of a three-level (PWM) and a five-level (non-PWM) multilevel
converter.
a)
b)
Figure 1.15: Output voltage of (a) a three-level and (b) a five-level multilevel converter.
By increasing the number of voltage levels in the output voltage waveform,
it is possible to achieve an output voltage which more closely resembles a sinewave
and, thus, reduces the harmonic content of the voltage. The lower total harmonic
distortion reduces the size of the output filters [47], which has a significant impact
on the size and weight of the converter. The increase in the number of voltage levels
also reduces the switching dv/dt which decreases the potential for electromagnetic
interference problems [47].
The three main multilevel converter topologies are the diode-clamped multilevel converter, the flying-capacitor multilevel converter, and the cascaded H-bridge
multilevel converter. A single leg schematic of a five-level version of each converter
is presented in Fig. 1.16. The cascaded H-bridge multilevel converter is composed of
single-phase full-bridge converters. Each H-bridge converter requires a separate and
floating dc voltage source. Due to this characteristic, this converter is not widely
used in wind energy conversion due to its high cost and poor performance; however,
it is a good candidate for photovoltaic energy conversion [46].
The diode-clamped and flying-capacitor multilevel converters have been proposed to implement the power electronics interface (rectifier and/or inverter) of a
21
+
Vdc1
_
Vdc
Vdc
+
Vdc2
_
_
a)
b)
c)
Figure 1.16: Single leg of a five-level (a) diode-clamped multilevel converter, (b) flying-capacitor multilevel converter, and (c) cascaded H-bridge multilevel converter.
wind energy system [22] [46] [48] [49]. These topologies present the same output
voltage waveform and are similar in structure. However, the component count is
larger in the case of the diode-clamped topology: one flying capacitor per phase
substitutes two diodes [22].
The common element in the multilevel converter topologies is the presence of a
large voltage achieved by small discrete dc voltages [47]. These discrete dc voltages
compose the voltage steps of the output voltage, as seen in Fig. 1.15. The dc voltages
are achieved by capacitor voltage sources. Maintaining the voltage across these
capacitors balanced is one of the difficulties and disadvantages of multilevel converter
topologies. Generally, additional components or control strategies are required to
22
maintain the voltage balance [32]. This voltage balance problem is easier to handle
in the flying-capacitor topology than in the diode-clamped topology; however, this
is only a substantial problem in the diode-clamped topology when there are more
than three levels [22].
The voltage stress on the switches is proportional to the number of dc sources.
Therefore, a high dc-link voltage level is divided among the dc sources, which limits
the voltage stress of the switches to only a fraction of the dc-link voltage and allows
the use of power devices with lower voltage ratings [47]. This is an advantage over
the voltage-source converter whose switches are subjected to the entirety of the
dc-link voltage.
However, the conduction losses in the case of the multilevel converters are
higher than in the voltage-source converter. This is due to the fact that multiple
switches are in the path of the current, whereas, only one switch of the voltage-source
converter is in the current path.
One of the difficulties regarding the multilevel converters is the redundancy
that exists in the switching states, i.e., multiple switching states achieve the same
output. Achieving an optimum switching sequence is difficult and becomes ever
more complicated as the number of converter levels increases. In general, the main
concerns in developing a modulation strategy for multilevel converters are: minimization of load current harmonics, minimization of the switching frequency, maintaining a uniform switching frequency among the switches, voltage balance among
the capacitors [47].
These topologies are especially suited for wind farms using HVDC transmission
since the high dc-link voltage can be easily distributed among the N-levels of the
converters. For practical and economical reasons, multilevel converters with four or
more levels are only recommended for power levels that exceed 300 MW. At lower
power levels, the advantages of the multilevel converters are not as pronounced and
the two-level voltage-source converter becomes more economically attractive [48].
The voltage-source converters low efficiency at low wind speeds is not a problem with the multilevel topologies. The high dc-link voltage is divided among the
capacitors, thus, clamping the voltage across each switch to one capacitor voltage.
Since the voltage across each switch is only a fraction of the dc-link voltage, the
rectifier losses at low wind speeds are significantly reduced compared to the voltage23
source converter [46].

1.7.4
Matrix Converter
The matrix converter, as presented in Fig. 1.17, is a semiconductor-based topol-
ogy with no passive components and incorporates the functions of rectifier and inverter into one compact topology. It is a three-level topology; therefore, the total
harmonic distortion of the output voltage is smaller than in the case of the back-toback voltage-source converter. It has been proposed for wind energy conversion in
[22], [46], [50], [51], and [52].
Output leg
IG
Figure 1.17: Matrix converter.

The desired output current, voltage, and frequency can be achieved by properly
connecting the output terminals to the input terminals. This is accomplished by
never connecting two (or three) switches of an output leg to an input phase at any
time and by always having the three output phases connected to the input [22].
The switches of the matrix converter are bidirectional in current and voltage,
which poses a problem since pure bidirectional switches are not yet available. However, bidirectional switches can be realized by combining semiconductor devices,
which increases the component count of the topology. Depending on the realization
of the bidirectional switches, half of the commutations are soft-switching [22], which
reduces the switching losses.
One disadvantage of the matrix converter is the limited output voltage it can
achieve. The maximum output voltage is only 86% of the input voltage. In order
24
to achieve the same output power as a back-to-back voltage-source converter, the

output current would have to be 1.15 times higher. This leads to greater conduction
losses in the matrix converter than in the back-to-back voltage-source converter [45]
[22].
The absence of a dc-link capacitor is both a blessing and a curse for the matrix
converter. Without a dc-link capacitor the efficiency and lifetime of the converter
is increased compared to the back-to-back voltage-source converter. However, with
no dc-link capacitor, there is no decoupling between the input and the output.
Therefore, disturbances at the input/output will propagate through the converter
and affect the output/input [22] [45].
1.8
Dissertation Outline
The rectification stage of the proposed power electronics interface is the subject
of Chapters 2, 3, and 4. The proposed rectifier is the three-phase PWM rectifier

with ac-side bidirectional switches. It will be compared to the standard three-phase
voltage-source converter.
Chapter 2 presents a brief overview of the three-phase voltage-source converter covering its basic operation and modulation schemes. The two most common
naturally-sampled carrier-based modulation strategies will be reviewed: sinusoidal
pulse-width modulation and sinusoidal pulse-width modulation with third harmonic
injection. Space-vector modulation will also be reviewed and the relationship between space-vector modulation and naturally-sampled carrier-based modulation will
be explained. This converter is used throughout the research and it is necessary to
first define the framework for the use of the converter in subsequent chapters.
A comprehensive analysis of the three-phase PWM rectifiers with ac-side bidirectional switches is presented in Chapter 3. First, a literature overview of these
rectifiers is carried out focusing on the origins of the rectifiers and their applications,
modulation strategies, and performance. Modulation strategies are proposed for the
rectifiers based on understanding of space-vector modulation applied to the threephase voltage-source converter. The rectifiers operating with an induction generator
is presented to verify the chosen modulation strategy and to demonstrate the capability of the rectifiers to operate as the rectification stage of a wind energy system.
Appendix C presents the closed-loop operation of one of the three-phase PWM
25
rectifiers using the dq current control designed for the three-phase voltage-source
converter. The equivalency of the switching states of the voltage-source converter
and three-phase PWM rectifiers makes this possible, as will be presented.
Chapter 4 presents a comparison of the three-phase PWM rectifiers with acside bidirectional switches and the three-phase voltage-source converter for wind
energy conversion. The losses of the bidirectional switches and rectifier diodes are
derived (Appendix D) and compared to the losses of the unidirectional switches
and diodes of the three-phase voltage-source converter. The common-mode voltage
generated by the three-phase PWM rectifiers is determined and compared to that
of the three-phase voltage-source converter.
The inversion stage of the proposed power electronics interface is composed of
interleaved voltage-source converter modules and is the subject of Chapters 5 and
6.
Chapter 5 presents the interleaved voltage-source converter as the inversion
stage of the power electronics interface. The harmonic cancellation effects in interleaved three-phase voltage-source converterts are analyzed. A literature overview
is presented and reveals that harmonic cancellation effects have only been numerically or experimentally verified for the ac phase current. The basis for the analysis
is the double Fourier series representation of the converter voltages generated by
naturally-sampled triangular carrier-based modulation. The general case of N interleaved voltage-source converters is assumed. Analytical models will be derived
for the common-mode voltage, ac phase current, inter-module circulating current,
inductor current, and dc-link current to reveal their spectra and the effects of interleaving. The analytical results will be compared to simulation results to verify the
analysis. Appendix E presents a program developed in Mathematica to calculate
the magnitudes of the dominant harmonics of the dc-link current spectra.
Chapter 6 addresses the practical problem of low frequency circulating currents
in the interleaved voltage-source converter topology. The low frequency circulating
currents are a consequence of the imbalances among the interleaved voltage-source
converter modules and are a source of losses, as will be presented in the literature
overview. The circulating current characteristics of abc and dq current control techniques will be evaluated. The nonlinear current control of [53] will be studied and
adapted for controlling parallel converter modules. The implementation and ex26
perimental results of two interleaved voltage-source converters operating under the

nonlinear control strategy will also be presented.
The conclusions of the research will be presented in Chapter 7, highlighting
the main contributions of the work and proposing topics for future research in this
area.
27
CHAPTER 2
Three-Phase Voltage-Source Converter
The three-phase voltage-source converter is currently the leading solution for
medium to high power three-phase applications. Its popularity is greatly due to its
wide operation range. It is capable of generating active power while absorbing or
generating reactive power and of absorbing active power while absorbing or generating reactive power, i.e., it operates in all four quadrants of the P Q plane [54]. This
versatility has lead to its use in very diverse three-phase power applications: motor
drives, active power generation (distributed generation), reactive power compensation, power factor correction, active power filtering, uninterruptible power supplies,
to name a few. A brief overview of the three-phase voltage-source converter will
now be presented to familiarize the reader with its basic operation as well as the
modulation strategies that will be used in subsequent chapters.
2.1
Topology and Basic Operation

The three-phase voltage-source converter (VSC) is composed of six switches
that are bidirectional in current. Each phase leg of the converter is composed of two
switches that operate in complimentary fashion, i.e., when the high-side switch is
on (e.g., S1 for phase a), the low-side switch is off (e.g., S4 for phase a). Simultaneous conduction of both switches would short circuit the dc-link, which would have
disastrous consequences. The filter inductors are placed between the three-phase ac
voltage sources (vsa , vsb , vsc ) and the mid-points of the phase legs to absorb the instantaneous voltage difference between the dc-link voltage and the source voltages.
The three-phase voltage-source converter and the realization of the bidirectional
switch are presented in Fig. 2.1.
The three-phase VSC, as presented in Fig. 2.1, assumes balanced three-phase
ac sources connected in wye with a floating neutral point. This floating neutral
point implies that
ia (t) + ib (t) + ic (t) = 0.
28
ia
vsa
ib
vsb
S1
S2
S3
vca
Vdc
2
vcb
ic
vca
vcc
vsc
S4
S1
S5
S6
Vdc
2
S4
S1
D1
vca
S4
D4
Figure 2.1: Three-phase voltage-source converter and realization of the

bidirectional switch.
The instantaneous relationship of the ac phase currents can be be expressed as
Vca (s) Vsa (s) VN (s) Vcb(s) Vsb (s) VN (s) Vcc (s) Vsc (s) VN (s)
+
+
=0
Z(s)
Z(s)
Z(s)
where VN (s) is the voltage of the floating neutral point referenced to the mid-point
of the dc-link in the s-domain, Z(s) is the impedance of the filter inductors, and
Vca (s), Vcb (s), and Vcc (s) are the converter voltages referenced to the middle of the
dc-link. The above expression simplifies to
vN (t) =
vca (t) + vcb (t) + vcc (t)

3
which establishes the phase dependency of the converter.
2.2
Modulation Techniques
As mentioned previously, the three-phase voltage-source converter is the most
widely used three-phase topology for medium to high power applications. Consequently, the three-phase VSC has been the subject of intense investigation and a
variety of modulation techniques have been proposed for specific applications and
to improve the overall performance of the converter [55], [56] [57] [58]. This dissertation concentrates on two specific modulation techniques: naturally sampled
carrier-based modulation and space-vector modulation. A brief overview of these
modulation techniques will be presented.
29
2.2.1
Naturally Sampled Carrier-Based Modulation

Naturally sampled carrier-based modulation is the classic modulation tech-
nique for the three-phase voltage-source converter. This modulation strategy compares a low frequency modulation signal, usually a sinusoid, to a high frequency
carrier signal. The results of the comparison are the drive signals for the converters
switches. The most common carrier signals are the sawtooth and triangular waveforms. When using a sawtooth carrier signal, only the trailing-edge of the drive
signal is modulated. A triangular carrier signal modulates both the leading- and
trailing-edges of the drive signals, which improves the harmonic performance compared to the sawtooth carrier [59].
When the modulation signal is larger in amplitude than the carrier signal, the
high-side switch of the phase leg is turned on, thus connecting the mid-point of the
phase leg to the positive rail of the dc-link. When the modulation signal is smaller
in amplitude than the carrier signal, the low-side switch is turned on, connecting
the mid-point of the phase leg to the negative rail of the dc-link. As a result of the
comparison between the carrier and modulating signals, a high frequency modulated
voltage is generated between the mid-point of the phase leg and the mid-point of the
dc-link. This voltage is referred to as the converter voltage (vca , vcb , and vcc in Fig.
2.1). The concept of naturally sampled carrier-based modulation using a triangular
carrier signal is illustrated in Fig. 2.2.
2.2.1.1
Sinusoidal Pulse-Width Modulation
The objective of pulse-width modulation is to control the low frequency component of the converter voltage through high frequency switching. In order to achieve
this, a high frequency carrier signal and a low frequency reference voltage (i.e.,
modulation signal) are compared to generate the drive signals of the switches. The
resulting low frequency component of the converter voltage is
vca (t) =
Vdc
vref,a (t).
2
for phase a. This relationship between the reference and converter voltages models
the three-phase voltage-source converter as an amplifier.
When then reference voltage is a sine wave, as illustrated in Fig. 2.2, this mod-
30
Carrier signal
Modulation signal of phase a
S1
vca(t)
Vdc/2
t
-Vdc/2
Figure 2.2: Naturally sampled carrier-based modulation.

ulation technique is referred to as sinusoidal pulse-width modulation. The reference
voltages, in this case, are defined as
vref,a (t) = M sin (1 t + 1 )

2
vref,b (t) = M sin 1 t + 1
3

2
vref,c (t) = M sin 1 t + 1 +
3
for phases a, b, and c and the modulation index or modulation depth is 0 M 1
for a carrier signal of amplitude equal to 1.
For operation in the linear mode, the amplitude of the reference voltages must
be smaller than or equal to the amplitude of the carrier signal. The maximum line
to-line converter voltage for M = 1 is 3Vdc /2, i.e., 86.6% of Vdc /2. If M > 1, then
the converter operates in overmodulation (nonlinear mode). In overmodulation, the
converter voltages saturate, as can be observed in Fig. 2.3, and the voltage-source
converter presents a nonlinear gain. Overmodulation, in general, is undesirable
because it generates subcarrier harmonic currents which can deteriorate the performance of current controller [60].
31
Modulation signal of phase a
Carrier signal
S1
Figure 2.3: Overmodulation.

2.2.1.2
Sinusoidal Pulse-Width Modulation with 3rd Harmonic Injection
The maximum line-to-line converter voltage that can be obtained by employing

sinusoidal carrier-based PWM is only 0.866Vdc /2. This limitation affects variablespeed motor drive applications, where it is desirable to use a standard rated voltage
motor operating at rated volts per hertz to sustain rated load torque without overheating. By operating the three-phase inverter with sinusoidal PWM and M = 1,
the motor connected to the inverters output will only be capable of operating at approximately 83% of its rated power when the losses associated with the rectification
stage of the drive are taken into consideration [59].
The voltage stress of the semiconductor devices is also a concern when the
inverter is required to generate high output voltages. In order to achieve this with
sinusoidal carrier-based PWM, a high dc-link voltage must be used. The higher the
dc-link voltage, the more voltage stress on the switches. As a result, devices with
higher voltage ratings are required, increasing the cost of the system.
The line-to-line converter voltages can be increased by adding a third harmonic
voltage to the reference voltages
vref,a (t) = M sin (1 t + 1 ) + v3 (t)

2
+ v3 (t)
3

2
vref,c (t) = M sin 1 t + 1 +
+ v3 (t)
3
32
Third harmonic voltage v3 (t) can be any waveform (e.g., sine wave, triangular wave,
etc.) with a fundamental frequency of 3.1 . Different third harmonic voltages lead
to different carrier-based pulse-width modulators.
The peak of the fundamental component of the reference voltage of phase a,
vref,a (t), occurs at /2 for 1 = 0. By adding a sinusoidal third harmonic voltage to
the reference voltage, the peak of the combined reference voltage will be reduced, as
shown in Fig. 2.4, which allows the amplitude of the fundamental component of the
reference voltage to be increased, i.e., increase the modulation index beyond 1.
Reference voltage
Fundamental component
3rd harmonic component
p
2
3p
2
2p
w1t
-1
Figure 2.4: Reference voltage and its fundamental and third harmonic
components.
There is, however, a limit for both M and the amplitude of the injected third
harmonic voltage. For linear operation, the reference voltage cannot exceed the
amplitude of the carrier signal, considered to be equal to 1. Assuming that the
maximum value of the reference voltage of phase a occurs as the injected third
harmonic voltage crosses zero at
1 t =
when = 0o , the fundamental component of the reference voltage will have a
33
maximum amplitude of
M sin(1 t) + V3 sin(31 t) = 1
3
M
=1
2
2
M=
3
Therefore, by injecting a suitable third harmonic component, the modulation index
can be increased to 2/ 3 and the converter will still operate in the linear region.
This represents a 15 % increase in the modulation index and the maximum line-toline converter voltage will now be equal to the dc-link voltage [59].
The magnitude of the injected third harmonic component can be determined
by Fermats theorem, where the derivative of the reference voltage is

d
2
sin(1 t) + V3 sin(31 t) = 0
d1 t
3
The global maximum of the reference voltage should occur at 1 t = /3. The
derivative results in
2
cos(1 t) + V3 cos(31 t) = 0
3
and equals zero at
1 t =
#
"p
#)
" p
2 3 + 27V3
2 3 + 27V3
, arccos
, arccos
2
6 V3
6 V3
The first result, 1 t = /2, is a local minimum. The arccosine functions are
complimentary global maxima that should occur at 60o , 120o, 240o , and 300o . For
1 t = /3
1 t = = arccos
3
"p
2 3 + 27V3
6 V3
and results in
2 1
V3 =
36
M
V3 =
6
34
Therefore, the reference voltages with optimum third harmonic injection are
vref,a (t) = M sin(1 t + 1 ) +


vref,c (t) = M sin 1 t + 1 +
M
sin(31 t + 1 )
6
M
2
+
sin(31 t + 1 )
3
6

M
2
+
sin(31 t + 1 )
3
6
Figure 2.5 presents the reference voltage of phase a when employing carrier-based
PWM with third harmonic injection.
Reference voltage
Fundamental component
3rd harmonic component
p
2
3p
2
2p
w1t
-1
Figure 2.5: Reference voltage and its fundamental and third harmonic
components for optimum third harmonic injection.
The third harmonic components are zero sequence signals that become part of
the neutral voltage, (2.1),
vN (t) =
Vdc v3 (t)
2 3
which now presents a low frequency component. Although the third harmonic components appear in the converter voltage, they do not appear in the line-to-line load
voltages.
2.2.2
Space-vector modulation is analogous to carrier-based modulation. The fun-
damental principle of both modulation strategies is the same: control the average
35
value of the voltage on a cycle by cycle basis. Any space-vector modulation strategy can be achieved by appropriately selecting the carrier and modulation signals.
Conversely, any carrier-based modulation strategy can be implemented in the spacevector domain by determining the appropriate voltage space vector sequence.
In space-vector modulation the time domain voltages and currents of the converter are represented as rotating vectors in an alternative reference frame: the
stationary plane. The abc to 0 transformation, also known as the Park transform, is used to convert the time domain quantities to the new reference plane. The
three-phase voltages or currents are transformed into a single space vector that rotates around the plane at the line frequency. Time is implicit in the angular
position of the space vector in the plane.
The following analytical development of space-vector modulation uses [58],
[59], [61], and [62] as source references.
2.2.2.1
The Plane
The abc 0 transformation (Park transform) is defined as

1
q
2
q = . 0
3
1
q0
2
1
2
3
2
1
2
1
qa
2

3
. q
2 b
1
qc
2
(2.1)
where q , q , and q0 are the , and 0 components of the transformed abc quantities.
The zero axis is perpendicular to the plane. The zero component is the result
of imbalance among the phases of the converter and is generally ignored when a
balanced three-phase system is assumed.
In the same manner carrier-based PWM used a low frequency modulation
signal, space-vector modulation requires a reference vector that rotates at the line
frequency from which to realize the desired average converter voltages. If the reference voltages are given by
vref,a (t) = M sin (1 t + 1 )

2
3

2
vref,c (t) = M sin 1 t + 1 +
,
3
36
the projections of the rotating reference vector vref onto the and axes are
v
1
ref, = 2 .
3 0
vref,
1
2
3
2
vref,a
1
. vref,b
3
2
vref,c
M sin (1 t + 1 )
=
M cos (1 t + 1 )
The magnitude of the rotating reference vector is

|vref | = M.
Figure 2.6 illustrates the reference voltage vector rotating in the plane at an
angular frequency of 1 .
jb
vref
vref,b
w1t
vref,a
Figure 2.6: Reference voltage vector rotating in the plane.
2.2.2.2
Voltage Space Vectors
The switching states generated by carrier-based modulation can be represented

in the space-vector domain by two zero vector states and six active vector states.
The eight possible switching states of the voltage-source converter are presented in
Fig. 2.7.
The on and off states of the high-side switch of a phase leg can be represented
by 1 and 0, respectively. In other words, the switching state where the highside switch is on and the low-side switch is off can be represented by 1 and the
switching state where the high-side switch is off and the low-side switch is on can
be represented by 0. This representation can be extended to the other two phase
legs and the combination of the three simultaneous switching states of S1 , S2 , and S3
define the voltage space vectors. The voltage space vectors, therefore, correspond to
the eight switching states of Fig. 2.7 and are presented in the form vi {S1 S2 S3 } for
37
v1 {1 0 0}
v2 {1 1 0}
v3 {0 1 0}
+ Vdc
+ Vdc
+ Vdc
S1
S2
S3
S1
S2
S3
S1
S2
S3
S4
S5
S6
S4
S5
S6
S4
S5
S6
- Vdc
- Vdc
- Vdc
v5 {0 0 1}
v4 {0 1 1}
v6 {1 0 1}
+ Vdc
+ Vdc
+ Vdc
S1
S2
S3
S1
S2
S3
S1
S2
S3
S4
S5
S6
S4
S5
S6
S4
S5
S6
- Vdc
- Vdc
v0 {0 0 0}
- Vdc
v7 {1 1 1}
+ Vdc
+ Vdc
S1
S2
S3
S1
S2
S3
S4
S5
S6
S4
S5
S6
- Vdc
- Vdc
Figure 2.7: Space-vector modulation: Eight possible switching states.

i = 0, 1, . . . , 7 from here forth. The voltage space vectors are summarized in Table
2.1 along with the resulting converter voltages.
The voltage space vectors can be represented as stationary vectors in the
38
Table 2.1: Voltage space vectors and resulting converter voltages.

Switches
Converter Voltages
Voltage Space Vector
On
Off
vca
vcb
vcc
v0 {0 0 0}
S4 , S5 , S6 S1 , S2 , S3 Vdc /2 Vdc /2 Vdc /2
v1 {1 0 0}
S1 , S5 , S6 S4 , S2 , S3 +Vdc /2 Vdc /2 Vdc /2
v2 {1 1 0}
S1 , S2 , S6 S4 , S5 , S3 +Vdc /2 +Vdc /2 Vdc /2
v3 {0 1 0}
S4 , S2 , S6 S1 , S5 , S3 Vdc /2 +Vdc /2 Vdc /2
v4 {0 1 1}
S4 , S2 , S3 S1 , S5 , S6 Vdc /2 +Vdc /2 +Vdc /2
v5 {0 0 1}
S4 , S5 , S3 S1 , S2 , S6 Vdc /2 Vdc /2 +Vdc /2
v6 {1 0 1}
S1 , S5 , S3 S4 , S2 , S6 +Vdc /2 Vdc /2 +Vdc /2
v7 {1 1 1}
S1 , S2 , S3 S4 , S5 , S6 +Vdc /2 +Vdc /2 +Vdc /2
plane, as presented in Fig. 2.8. The lengths of the vectors are normalized by the
dc-link voltage and are determined, along with their angular position in the plane,
by the abc transformation of (2.1). To represent vector v2 {1 1 0}, which
generates the converter voltages presented in Table 2.1, in the plane, the transformation of (2.1) is applied to obtain the and components of v2
vv2 ,
1
= 1 2.
Vdc 3 0
vv2 ,
1
2
3
2

vca
1
2
. vcb

3
2
vcc
which results in

1 2 Vdc Vdc Vdc
vv2 , =
+
=
Vdc 3 2
4
4
"
#
3Vdc
3Vdc
1 2
vv2 , =
+
=
Vdc 3
4
4
1
3
3
3
The length and angular position of v2 are

v
u 2
!2
u 1
3
2
=
|v2 | = t
+
3
3
3
!
3/3
v2 = arctan
= 60o
1/3
The same procedure can be carried out for the other seven vectors and the
results are summarized in Table 2.2.
39
Table 2.2: Voltage space vector lengths and angular positions.

Voltage Space Vector Length Angular Position
v0 {0 0 0}
0
v1 {1 0 0}
2/3
0o
v2 {1 1 0}
2/3
60o
v3 {0 1 0}
2/3
120o
v4 {0 1 1}
2/3
180o
v5 {0 0 1}
2/3
240o
v6 {1 0 1}
2/3
300o
v7 {1 1 1}
0
Vectors v0 and v7 have zero length and are located at the origin of the
plane. These vectors are denominated zero vectors. The active vectors, voltage
space vectors v1 - v6 , are 2/3 in length and their extremities form a regular hexagon
which defines the limits between the linear and overmodulation regions. To maintain
balanced and sinusoidal line-to-line converter voltages, the reference voltage vector
should follow a circular trajectory. If the reference voltage vector follows the tra
jectory of the circle inscribed in the hexagon (radius equal to 3/3), the maximum
line-to-line converter voltage will be Vdc . This is equivalent to carrier-based modulation with optimum third harmonic injection [58]. Operation outside of the hexagon
results in overmodulation.
v3
3 /3
v2
v0
v7
vref
v4
v1
2/3
v6
v5
Figure 2.8: Voltage space vectors in the plane.
40
2.2.2.3
Sector Definitions
The reference voltages in the abc domain are presented in Fig. 2.9a). At angle
1 t = , the phase a reference voltage is positive and the phase b and c reference
voltages are negative. In the plane, angle is transformed into the position
of reference voltage vector, vref , in the region between active vectors v1 and v2 .
As angle increases towards 360o , the reference voltage vector follows a circular
trajectory moving into and out of regions delimited by two active vectors. To provide
a correspondence between the abc domain and the position of the reference voltage
vector, it is convenient to divide the time domain waveforms and, consequently, the
plane into six 60o sectors, as presented in Fig. 2.9. The limits of the sectors
can be whatever is most convenient for the modulation strategy being used, but it is
common to define the sector limits at either the zero crossing points or the maximum
points of the reference voltages. From this point on, the sector boundaries will be
defined by the maximum points of the reference voltages as illustrated in Fig. 2.9,
unless otherwise stated.
vref,a(w1t)
vref,b(w1t)
vref,c(w1t)
v3
v2
II
III
w1t
v4
IV
VI
o
30
II
I
90
150
III
210
270
IV
o
V
o
330 360
v0
v7
I
vref
v1
VI
V
o
a)
v6
v5
b)
Figure 2.9: Sector definitions in the a) time domain and b) space vector
domain.
2.2.2.4
Space-vector modulation determines the sequence the voltage space vectors

are applied to the converter and the time alocated to these vectors. The selection
of the active vectors is usually determined by the position of the reference voltage
41
vector within the plane. Any active vector could be applied to the converter;
however, the use of the active vectors adjacent to the reference voltage vector results
in mimumum distortion.
The reference vector is the desired output of the converter. The objective
of space-vector modulation is to try to obtain this vector by switching among the
active and zero vectors. The average of the converter voltage vector over a switching
period should be equal to the reference vector. This is represented by
vc,avg =
v1 t1 + v2 t2 + v7 t7 + v0 t0
Ts
where, t1 , t2 , t7 , and t0 are the length of time voltage space vectors v1 , v2 , v7 , and
v0 are applied, respectively, while the converter operates in Sector I. The length of
vectors v0 and v7 are equal to zero, therefore, the expression simplifies to
vc,avg = v1
t1
t2
+ v2
Ts
Ts
The times associated with each vector can be derived by projecting the reference vector onto the active vectors, as shown in Fig. 2.10.
jb
v2
t2
Ts
vref
30
v1
w1t
t1
Ts
Figure 2.10: Decomposition of the reference vector for deriving the time
allocated to the active vectors (Sector I).
The projection of the reference vector onto the axes is
vref = M cos (1 t) + jM sin (1 t)
42
(2.2)
which is the same as projecting the reference vector onto the active vectors
vref =
2 t1
2
t2
+
cos + j sin
3 Ts 3
3
3 Ts
(2.3)
Equaling the real and immaginary parts of (2.2) and (2.3) yields
t1 =
t2 =

3MTs cos 1 t +
6
3MTs sin (1 t)
The length of time the active vectors are applied to the converter cannot exceed
the switching period. For operation in Sector I
t1 + t2 Ts
The difference between the active vector times and the switching period is
allocated to the zero vectors, which do not affect the average converter voltage, such
that
t = Ts (t1 + t2 )
Zero vector time t can be divided between the two zero vectors, v0 and v7 , or can
be used entirely by only one of the zero vectors, v0 or v7 . The manner in which t
is partitioned among the zero vectors results in different modulation strategies. The
apportioning factor
=
t7
t0 + t7
(2.4)
defines the partitioning of the zero vector time between the zero vectors. An apportioning factor of 0.5, i.e., t0 = t7 , is assumed in Chapter 3.
Table 2.3 summarizes the time allocated to each voltage space vector in the
six sectors of the plane. The time allocated to each zero vector and the sequence
in which the converter switches among the voltage space vectors determine the
modulation strategy.
The switching sequence
v0 v1 v2 v7 v2 v1 v0 ,
43
Table 2.3: Time allocated to the voltage space vectors per switching period.
Sector I
t1 =
t2 =
3MTs cos 1 t +
3MTs cos 1 t +
Sector II
3
2
t0 + t7 = Ts (t1 + t2 )
t2 =
t3 =
3MTs cos 1 t +
t3 =
3MTs cos 1 t +
t4 =
3MTs cos 1 t +
t0 + t7 = Ts (t2 + t3 )
5
6
t4 =
t5 =
t6 =
3MTs cos 1 t +
3MTs cos 1 t +
7
6
3MTs cos 1 t +
3MTs cos 1 t +
t0 + t7 = Ts (t4 + t5 )
Sector V
t5 =
Sector IV

3
t0 + t7 = Ts (t3 + t4 )
7
6
3MTs cos 1 t +
Sector III
11
6
Sector VI

5
t6 =
t0 + t7 = Ts (t5 + t6 )
t1 =
3MTs cos 1 t +
3MTs cos 1 t +
11
6
t0 + t7 = Ts (t1 + t6 )
as presented in Fig. 2.11, minimizes the switching losses of the converter in Sector
I since only one switch is turned on or off at a time. The same idea can be applied
to the other five sectors, such that
Sector II: v0 v3 v2 v7 v2 v3 v0
Sector III: v0 v3 v4 v7 v4 v3 v0
Sector IV: v0 v5 v4 v7 v4 v5 v0
Sector V: v0 v5 v6 v7 v6 v5 v0
Sector VI: v0 v1 v6 v7 v6 v1 v0 .
This is the switching sequence assumed in Chapter 3.
The carrier-based modulation signals and the reference voltage space vector
are related through their modulation index, M, and the length of the reference space
vector, M, respectively. The carrier-based and space-vector modulation techniques
44
v0
v1
v2
v7
v2
v1
v0
S1
S2
S3
Ts
t0
2
t2
2
t1
2
t7
t2
2
t1
2
t0
2
Figure 2.11: Switching sequence for switches S1 , S2 , and S3 in Sector I.

are equivalent and can achieve a maximum line-to-line converter voltage equal to
the dc-link voltage when
2
M=
3
and
M=
3
.
3
These two parameters are related by a factor of 1/2. The time allocated to
each voltage space vector can now be written in terms of the modulation index of
the corresponding carrier-based strategy. Therefore, for Sector I, the active vector
times of Table 2.3 would be

3

MTs cos 1 t +
6
2

3
3
t2 =
MTs cos 1 t +
2
2
t1 =
and the voltage space vector times of the other five sectors can be obtained in the
same manner.
2.3
Summary
A summary of the three-phase voltage-source converter operation and mod-
ulation were presented to provide the concepts that will be used throughout the
remainder of this dissertation. In Chapter 3 the three-phase VSC will be used as
45
the reference for comparing the modulation strategies and losses of the three-phase
PWM rectifiers with ac-side bidirectional switches. Space-vector modulation is assumed for the three-phase VSC and the loss equations for the switches and diodes
will be presented.
In Chapter 5, the harmonic cancellation effects of interleaving N three-phase
voltage-source converter modules will be evaluated. In the analysis, it is assumed
that the converters employ naturally-sampled triangular carrier-based modulation.
Chapter 6 will again use the interleaved three-phase VSC to evaluate current
control techniques to effectively reduce the low frequency circulating current generated by imbalances among the interleaved modules. The first two current control
methods use naturally sampled carrier-based modulation and space-vector modulation. A third nonlinear current control technique that does not use a separate
pulse-width modulator will also be evaluated.
46
CHAPTER 3
Three-Phase PWM Rectifiers with Ac-Side Bidirectional
Switches
The three-phase PWM rectifiers with ac-side bidirectional switches are proposed as the rectification stage of the power electronics interface of an induction
generator-based wind turbine. Although these rectifiers were initially conceived for
power factor correction and have been generally used only in unity power factor applications, they have the capability of operating with a leading power factor which
enables them to supply reactive power to the induction generator. The three-phase
PWM rectifiers with ac-side bidirectional switches, presented in Fig. 3.1, are a family of converters composed of a three-phase diode rectifier and a set of bidirectional
switches connected to the ac-side of the diode bridge. There are three possible configurations for the switches: delta, wye, and bridge. These three configurations are
equivalent, thus, generating the same voltage profile. To distinguish the converters, they will be referred to as T , TY , and TB according to the connection of the
bidirectional switches in delta, wye, and bridge configurations, respectively.
The objective of this chapter is to develop a modulation strategy for the threephase PWM rectifiers with ac-side bidirectional switches and demonstrate their operation in conjuction with an induction generator. The foundation built here will
be the basis for the comparison of these rectifiers with the standard three-phase
voltage-source converter to be presented in Chapter 4.
3.1
Literature Overview
Three-phase ac-dc conversion of energy has been traditionally achieved by
uncontrolled rectifiers, shown in Fig. 3.2. A capacitive filter is used at the output of
the three-phase diode bridge to achieve a smooth dc voltage. When only a capacitive
filter is used, the input current is rich in low-order harmonic content and the power
factor of the topology is unacceptable, in accordance with standards IEC-1000-3-4
for three-phase equipment with per phase currents of 16 to 75 A [63]. A solution to
improve the total harmonic distortion (THD) of the input current is to add inductive
47
D1
ia
D2
D3
vca
vsa
Sab
ib
vcb
vsb
Sca
C0
+
Vdc
_
C0
+
Vdc
_
Sbc
ic
vcc
vsc
D4
D5
D6
a)
D1
ia
D2
D3
vca
vsa
ib
S2
vcb
vsb
S1
ic
S3
vcc
vsc
D4
D5
D6
b)
D1
ia
vsa
vsb
ib
D2
D3
S1
S2
S3
vca
vcb
ic
C0
vcc
vsc
S4
D4
D5
S5
+
Vdc
_
S6
D6
c)
Figure 3.1: Three-phase PWM rectifiers a) T , b) TY , and c) TB .

filtering at the input terminals of the diode bridge. This successfully alters the
current waveform to resemble more closely a sine wave; however, the resulting input
current is still rich in low-order harmonic content due to the 30o intervals where no
48
current flows.
Capacitive
Filter
Phase a input current
Inductive
Filter
With capacitive filter
vsa
With capacitive and

inductive filters
vsb
C0
o
30
wt
vsc
Figure 3.2: Three-phase uncontrolled rectifier and the input current of

phase a when employing only a capacitive filter and when
employing capacitive and inductive filters.
The three-phase PWM rectifiers with ac-side bidirectional switches were conceived to improve the THD of the input current and the power factor. Ac-side
bidirectional switches were placed between the inductive filters and the terminals
of the diode bridge. This solution was first proposed in 1993 by [64], where the
bidirectional switches were connected in a delta configuration. The rectifier was
envisioned to operate as a power factor corrector with the capability of operating
with leading or lagging power factor. The paper realized through simulation and
experimentation that a maximum leading/lagging current phase angle existed but
was unable to determine it. The first mention of a 30o phase angle limit appeared
in a brief sentence of [65] but no analysis was provided to substantiate the claim.
An analysis method combining space vector and phasor analysis was used
in [54] to determine the electrical operation boundaries of T , TY , and TB when
connected to the utility grid. In [54], the filter inductors are considered to be part of
the rectifier. Therefore, the results include the reactive power absorbed by both the
rectifer and the inductors. In [66], the operation boundaries of the same converters
were analyzed, this time not factoring in the power absorbed by the filter inductors.
The resulting P-Q curve of the analysis of [66] is presented in Fig. 3.3. The result
presented in Fig. 3.3 makes no assumptions regarding the source and analyzes only
49
the power processed by the rectifier.
Q
0.5
0.4
0.3
0
=3
0.2
Electrical Limit
0.1
0
0.2
0.4
0.6
0.8
- 0.1
j=
-30 o
Thermal Limit
Figure 3.3: Operation boundaries of rectifier topologies T , TY , and TB .
The topology with the switches in a delta configuration was proposed a year
after [64] by [67] for power factor correction. The paper described the operating
modes of the converter and showed for the first time that zero vectors can be realized
by four different combinations of the bidirectional switches of T . However, it did
not address the impact of the different zero vectors on the circuit operation.
The use of the three-phase PWM rectifiers with ac-side bidirectional switches
for high power applications (> 100 kW) was investigated in 1994 by [9]. For these
applications the switching frequency is limited due to the existing semiconductor
technology. To bypass this problem, the paper approached the control of the bidirectional switches from a line frequency perspective instead of high frequency PWM,
as used in [64], [65], and [67]. A variation of TY was proposed in which the wye
point of the bidirectional switches was connected to the neutral of the ac supply as
presented in Fig. 3.4a). The control philosophy was to fill in the the blanks of the
input current by turning the switches on during the zero current intervals. In this
manner, current would build up in the inductors during the zero current intervals,
despite no power being transferred to the load, and the input current would resemble
a sine wave. The THD of the input current was substantially improved by this technique; however, a significant amount of third harmonic current was generated due
50
to the neutral connection. This problem was addressed two years later in [68] where
the configuration of the bidirectional switches was modified to a delta connection.
The same control philosophy was used and no third harmonic was present. In 2001,
[69] compared the performance of the low frequency rectifiers of [9] and [68] with
the Vienna rectifier. The Vienna rectifier is a three-level PWM rectifier similar in
structure to TY where the wye point of the bidirectional switches is connected to
the mid-point of the dc-link [70], as presented in Fig. 3.4b).
a)
b)
Figure 3.4: a) Three-phase rectifier of [9] and b) the Vienna rectifier.

From the literature overview, it was concluded that there are still contributions to be made in the analysis of modulation strategies for the three-phase PWM
rectifiers with ac-side bidirectional switches. First, the possible switch combinations
and voltage generated by each combination will be explored. From this analysis,
inefficient pulse-width modulation strategies will be discarded and a general modulation strategy for T , TY , and TB will be proposed. This modulation strategy will
be demonstrated for T operating with an induction generator.
3.2
Converter Operation and Space Vector Description

The standard space vector notation used for the six-switch PWM VSC in
Chapter 2 is used here, where the notation for T corresponds to {Sab Sbc Sca }, for
TY {S1 S2 S3 }, and for TB {S1 S2 S3 }. It is important to note that the use of 1 or 0
in the six-switch PWM VSC indicated that the high-side switch (S1 , S2 , and S3 ) is
on or off and that its complimentary low-side switch (S4 , S5 , and S6 , respectively)
is off or on. For topologies T and TY the use of 1 or 0 refers to only one switch.
51
Topology TB follows the same notation as the six-switch PWM VSC due to the
bridge configuration of its bidirectional switches.
As stated previously, the six-switch PWM VSC is the standard solution for the
rectification stage of a wind turbine interface. The final objective of this study is to
establish the three-phase PWM rectifiers with bidirectional switches as reasonable
and well-founded alternatives to the VSC. This will be proven in Chapter 4 by
determining and comparing the losses and common-mode voltage generation of the
topologies. In order to do so, it is convenient to first establish a parallel between the
modulation strategies of the VSC and the alternative topologies. For this analysis
the VSC will be considered to operate under space-vector modulation.
To establish the parallel between the six-switch PWM VSC and the threephase PWM rectifiers with ac-side bidirectional switches it is necessary to determine
a quantity that can be achieved in all of the topologies by selecting appropriate
voltage space vectors. This quantity is the line-to-line converter voltage defined as
the voltage difference between the converter voltages of each phase (vca , vcb , and vcc )
vcab (t) = vca (t) vcb (t)
vcbc (t) = vcb (t) vcc (t)
vcca (t) = vcc (t) vca (t)
The converter voltages are defined as the voltage between the mid-point of the dclink and the mid-point of the switch branches of the six-switch VSC or the diode
branches of T , TY , and TB . The line-to-line converter voltages were chosen because
they are the direct consequence of switching, i.e., they are the pulse-width modulated
voltages that drive the currents of the circuit.
Figure 3.5a) presents the six-switch PWM VSC when voltage space vector v1
{1 0 0} is applied. The resulting converter voltages are vca = Vdc /2 and vcb =
vcc = Vdc /2. Thus, the line-to-line converter voltages are vcab = Vdc , vcbc = 0, and
vcab = Vdc . In order to achieve vcbc = 0 in T , switch Sbc should be turned on, as
shown in Fig. 3.5b).
Converter voltage vca in T depends on the direction of current ia . For ia > 0,

diode D1 will conduct and converter voltage vca will be equal to Vdc /2. The direction
of the current, therefore, puts a constraint on the usage of voltage space vector v1 .
52
ia
vca
ib
S1
S2
S3
ia
Vdc
2
ib
vcb
ic
vcc
S4
vca
S5
D1
D3
Sca
Sbc
vcc
S6
D4
Vdc
2
Sab
vcb
ic
Vdc
2
D2
D5
a)
Vdc
2
D6
b)
Figure 3.5: Voltage space vector v1 applied to a) the six-switch PWM

VSC and b) T .
Violating this constraint leads to the case presented in Fig. 3.6. Voltage space
vector v4 {0 1 1} is applied to the six-switch PWM VSC in Fig. 3.6a). In this case,
vca = Vdc /2 and vcb = vcc = Vdc /2. Thus, the line-to-line converter voltages are
vcab = Vdc , vcbc = 0, and vcab = Vdc . Once again vcbc = 0, therefore, switch Sbc
of T is turned on. Since the current constraint of v1 was violated, i.e., current
ia < 0, diode D4 conducts, which results in vca = Vdc /2. Switching state {0 1
0} in topology T corresponds to voltage space vectors v1 and v4 . The difference
between the two voltage space vectors lies in the direction of current ia : ia > 0 for
v1 and ia < 0 for v4 . The same analysis can be repeated for the other active vectors
as well as for topologies TY and TB .
ia
ib
vca
S1
S2
S3
ia
Vdc
2
ib
vcb
ic
vcc
S4
S5
vca
D1
S6
Vdc
2
Sab
Sca
Sbc
vcc
D4
a)
D3
vcb
ic
Vdc
2
D2
D5
Vdc
2
D6
b)
Figure 3.6: Voltage space vector v4 applied to a) the six-switch PWM

VSC and b) T .
The same analysis is carried out for the zero vector intervals. Applying zero
vectors in the six-switch PWM VSC, which will be referred to as TS , simultaneously
53
turns on all three high-side switches (S1 , S2 , and S3 ) or low-side switches (S4 , S5 ,
and S6 ), resulting in vcab = vcbc = vcca = 0. The same line-to-line converter voltages
can be achieved in T , TY , and TB by shorting all three phases together at the ac
terminals of the converter. In the case of TY there is only one option: {1 1 1}.
However, for T and TB there are several options: {1 0 1}, {1 1 0}, { 0 1 1}, and {1
1 1} for T and {1 1 1} and {0 0 0} for TB . The different switch combinations to
realize a zero vector result in different modulation strategies, which will be analyzed
in Section 3.3. A summary of the equivalency of the voltage space vectors of all the
topologies can be found in Table 3.1 [54].
v0
v1
v2
v3
v4
v5
v6
v7
3.3
Table 3.1: Generation of the voltage space vectors.

TS
T
TY
TB
Constraint
{S1 S2 S3 }
{Sab Sbc Sca }
{S1 S2 S3 }
{S1 S2 S3 }
{1 0 1}, {1 1 0},
{0 0 0}
{1 1 1}
{1 1 1}, {0 0 0}
{0 1 1}, {1 1 1}
{1 0 0}
{0 1 0}
{0 1 1}
{0 1 1}, {1 0 0}
ia > 0
{1 1 0}
{1 0 0}
{1 1 0}
{1 1 0}, {0 0 1}
ic < 0
{0 1 0}
{0 0 1}
{1 0 1}
{1 0 1}, {0 1 0}
ib > 0
{0 1 1}
{0 1 0}
{0 1 1}
{0 1 1}, {1 0 0}
ia < 0
{0 0 1}
{1 0 0}
{1 1 0}
{1 1 0}, {0 0 1}
ic > 0
{1 0 1}
{0 0 1}
{1 0 1}
{1 0 1}, {0 1 0}
ib < 0
{1 0 1}, {1 1 0},
{1 1 1}
{1 1 1}
{1 1 1}, {0 0 0}
{0 1 1}, {1 1 1}
Pulse-Width Modulation
Topologies T and TB have different possibilities for producing a zero vector
at the ac terminals of the circuit, as presented in Table 3.1. This degree of freedom
results in different modulation strategies. Topology TY , in contrast, is limited to
one zero vector which is produced by simultaneously closing the three bidirectional
switches.
With so many different zero vectors, the question becomes how to distinguish
between useful and useless modulation strategies. By eliminating superfluous and
inefficient modulation strategies based on conceptual analysis, it is easier to select
a strategy that minimizes the overall losses of the semiconductor devices of the
alternative rectifier topologies. With this in mind, the modulation strategies of
alternative topology T are analyzed.
54
Figure 3.7 shows the rectifier input currents and converter voltages in Sector I
(assuming a leading phase of the currents). Different zero vectors result in different
currents flowing through the bidirectional switches. Table 3.2 compares the current
circulating through switches Sab , Sbc , and Sca when each of the four possible zero
vectors is applied.
vca
Sector I
vca
ia
ib
vcb
ic
vcb
vcc
ia
ib
ic
Sab
Sca
Sbc
vcc
Figure 3.7: Operation boundaries of rectifier topologies T , TY , and TB .
Table 3.2: Switch currents of T operating in Sector I.

Zero Vectors
{1 1 0} {0 1 1} {1 0 1}
{1 1 1}
Current through Sab
ia
0
ib
(ia ib )/3
Current through Sbc
ic
ib
0
(ib ic )/3
Current through Sca
0
ia
ic
(ic ia )/3
In Sector I, active voltage space vectors v1 {0 1 0} and v2 {1 0 0} are used to
realize the desired converter voltage. Switches Sab and Sbc will be turned on during
the active vector intervals so it would naturally make sense to try to minimize the
switching losses by applying only zero vector {1 1 0} in Sector I. However, regarding
the conduction losses this might not be the best solution since by using this zero
vector, the largest currents in magnitude will always be flowing through the switches,
i.e., ia through Sab and ic through Sbc .
The use of zero vectors {0 1 1} and {1 0 1} results in similar current distribu-
tions but the phase angle of the currents will be the determining factor as to which
zero vector will result in less conduction losses. For unity power factor operation,
using either of the two zero vectors will result in the same current stress. However,
in the case of a leading phase current, zero vector {0 1 1} should be used since the
magnitudes of ib and ia are smaller in Sector I than that of ic . The contrary is true
55
for a current phase lag, which makes ib and ic smaller in magnitude throughout
Sector I, therefore, zero vector {1 0 1} would be more appropriate.
The use of zero vector {1 1 1} results in all three of the bidirectional switches
conducting simultaneously. The magnitude of the currents flowing through the

switches is only approximately 57% of the actual phase current magnitude, which
would make this zero vector the best choice. However, since more switching occurs when this zero vector is used, the switching losses also need to be taken into
consideration before any conclusion can be drawn.
Based on the discussion above, Fig. 3.8 presents the contribution of each of the
zero vectors to the conduction losses of T . As the conceptual analysis concluded,
vector {1 1 1} presents the lowest conduction losses independent of the phase angle
of the current. The three other zero vectors all depend upon the phase angle of
current. Zero vector {1 1 0}, which would be the natural choice for Sector I to
minimize the switching losses, in general results in the highest conduction losses.
j = -10
j=0
{1 1 0}
2.5
2.5
{0 1 1}
{1 0 1}
1.5
j = 10
{1 1 0}
{1 1 1}
{1 0 1}
1.5
1.5
{1 1 0}
2.5
{0 1 1}
{1 1 1}
{0 1 1}
{1 0 1}
{1 1 1}
Figure 3.8: Contribution of the zero vector intervals to the conduction

losses of T resulting from the use of different zero vectors
in Sector I.
As mentioned previously, it is difficult to make a conclusive decision on the
modulation strategies without some insight into the switching losses. In general, the
switching losses of a power device consist of several elements: gate drive loss, output
capacitor discharging loss, and transition loss caused by simultaneous existence of
current and voltage in the device during the switching. For high power minority-
56
carrier devices, the first two elements are negligible so only the transition loss needs
to be considered, which, as a first-order approximation, can be modeled by
Psw = ion vof f
(ton + tof f )fs

6
(3.1)
where ion is the current the switch conducts when it is on, vof f is the off-state
voltage of the switch, and ton and tof f are the switch turn-on and turn-off transition
times, respectively. Since the off-state voltages of the switches are equal to the dclink voltage, the total switching loss is proportional to the current that is flowing
through the switch at the switching instant. Figures 3.9 and 3.10 show the current
through and the voltage across each of the three ac-side bidirectional switches over
one switching cycle in Sector I for the four different modulation strategies. The
switching transitions where losses occur due to the simultaneous existence of current
and voltage are highlighted.
Using (3.1) and Fig. 3.9a), the total combined switching losses of the three
switches when using zero vector {1 1 1} are
Psw{111} = Vdc
ib ic
ia ib
ib +
2
3
3
ic ia
3

(ton + tof f )fs

6
and results in
Psw{111} = Vdc (ia ib ic )
(ton + tof f )fs

.
6
(3.2)
The same calculation is carried out for the case where zero vector {1 1 0} is
used, shown in Fig. 3.9b). This is theoretically the modulation strategy that would
minimize the switching losses since the same two switches used to realize the active
vectors are used to realize the zero vector. The switching losses in this case are
shown to be equal to the previous case, (3.2),
Psw{110} = Vdc (ia ib ic )
(ton + tof f )fs

.
6
Following the same procedure for the modulation strategies of Fig. 3.10, the
total combined switching losses are
Psw{101} = 2Vdc (ib ic )
57
(ton + tof f )fs

6
(3.3)
Sab
v0 v1 v2 v0 v2 v1 v0
Sab
Sbc
Sbc
Sca
Sca
iSab(t)
(ia-ib)
3
(-ib)
vSab(t)
(Vdc)
vSbc(t)
(ib-ic)
3
(Vdc)
(ia)
iSab(t)
(-ib)
vSab(t)
iSbc(t)
v0 v1 v2 v0 v2 v1 v0
(Vdc)
iSbc(t)
(-ic)
(Vdc)
vSbc(t)
iSca(t)
(ic-ia)
3
vSca(t)
iSca(t)
vSca(t)
(-Vdc)
(-Vdc)
a)
b)
Figure 3.9: Switching loss instants for topology T when using zero vector a) {1 1 1} and b) {1 1 0}.
and
Psw{011} = 2Vdc ia
(ton + tof f )fs

.
6
(3.4)
At a first glance, it might appear that the switching losses are different in these
cases, but it is important to remember that we are assuming a balanced three-phase
system without a neutral connection which implies that
ia + ib + ic = 0,
58
Sab
v0 v1 v2 v0 v2 v1 v0
Sab
Sbc
Sbc
Sca
Sca
iSab(t)
iSab(t)
vSab(t)
(-ib)
(Vdc)
vSab(t)
iSbc(t)
vSbc(t)
v0 v1 v2 v0 v2 v1 v0
(-ib)
(Vdc)
iSbc(t)
(Vdc)
iSca(t)
vSbc(t)
(ib)
(Vdc)
(-ia)
iSca(t)
(ic)
vSca(t)
vSca(t)
(-Vdc)
(-Vdc)
a)
b)
Figure 3.10: Switching loss instants for topology T when using zero vector a) {1 0 1} and b) {0 1 1}.
and can be rewritten as
ia = ib ic .
(3.5)
Substituting (3.5) in (3.3) and (3.4) results in the same switching losses as (3.2).
Therefore, the total combined switching losses of the three bidirectional switches per
switching period are independent of the modulation strategy and are proportional
to the combination of the three phase currents. Although the bidirectional switches
of T switch more often per cycle when using zero vector {1 1 1} than for the other
three modulation strategies, several of these switching transitions occur under zero
voltage conditions. This results in the switching losses being the same as in the
59
other three modulation strategies.

Since the combined switching losses of the four modulation strategies are identical, the modulation strategy to be implemented can be chosen based solely on
the conduction losses. Therefore, the modulation strategy which uses zero vector
{1 1 1} is the best choice with regards to efficiency.
3.4
Open-Loop Operation
The modulation strategies analyzed in the previous section will now be used
to operate the three-phase PWM rectifiers with ac-side bidirectional switches in

periodic steady-state. For this initial verification of the chosen modulation strategy,
the rectifiers operate in open-loop, meaning that the switches are driven by pulsewidth modulated drive signals which are periodic over a line cycle. No feedback is
used to correct deviations in the phase currents or dc-link voltage.
For the open-loop operation of the rectifiers, SABER simulator was used in
conjunction with a space vector modulation (SVM) MAST block develped in [71].
The space vector modulation MAST block was created for the open-loop operation
of the six-switch PWM VSC. However, the outputs of the block can be logically
combined to generate the drive signals for the bidirectional switches of T , TY , and
TB .
If the switching sequence of TS in Sector I is
v0 v1 v2 v7 v2 v1 v0 ,
the same sequence is used for T , TY , and TB , using the equivalency among the
voltage space vectors established in Table 3.1. Figure 3.11a) presents the drive
signals in Sector I for TS and T . Figure 3.11b) presents the combinatorial logic
for generating the drive signals for T from the outputs of the SVM block, i.e. the
drive signals for the switches of TS .
Combining the drive signals of TS is not limited to simulation or the use of
the SVM block. The same idea can be used to implement modulation strategies
developed for the six-switch VSC in topologies T , TY , and TB . This makes the
control of these topologies simpler to implement due to the vast knowledge and
hardware available for the six-switch VSC. Appendix C presents the closed-loop
60
TS
v0
v1 v2 v7 v2
v1 v0
S1
Deriving drive signal Sab:

Inv(S1)
S2
S2
S3
Sab
Inv(S1) XOR S2 = Sab
TD
v0
v1 v2 v0 v2
Sab
v1 v0
Implementation with logic gates:

XOR
Inv
S1
Sbc
Sab
S2
Sca
a)
b)
Figure 3.11: a) Sector I drive signals for TS and T and b) the combinatorial logic for generating the drive signals for Sab from the
drive signals of TS when using zero vector {1 1 1}.
operation of T using dq current control developed for the six-switch VSC.
Figure 3.12 presents the SABER simulation schematic for the power stage and
pulse-width modulation of topology T for a 24o phase lead and using zero vector
{1 1 1}. The following design parameters are used for the simulation: P0 = 10 kW,
Vspk = 155 V, Vdc = 400 V, f1 = 60 Hz, fs = 10 kHz, L = 1 mH, RL = 20 m.

Terminals S1, S2, and S3 in the schematic correspond to the drive signals of switches
S1 , S2 , and S3 of the six-switch VSC. For a detailed description of the simulation
set-up as well as the schematics and descriptions of a second simulation of T using
a different modulation strategy and the simulation of TY , refer to Appendix B
Figure 3.13 presents the phase a current and source voltage of T . As expected
the current leads the source voltage by 24o . The simulation results of the phase
currents for rectifier TY and for the second modulation strategy implemented for
T (Appendix B) are identical to the results of Fig. 3.13, as expected.
The differences amongst the three simulations lie in the currents flowing through
61
Power Stage
La
l:1m
Sab
r:20m
Va
amplitude:155
o
Drv_Sab
phase:0
Lb
200
l:1m
r:20m
Vb
Sca
Sbc
amplitude:155
o
phase:-120
Drv_Sbc Drv_Sca
Lc
200
l:1m
r:20m
Vc
amplitude:155
o
phase:120
Reference Voltages
amplitude:0.811
o
phase:-4.8
amplitude:0.811
o
phase:-124.8
SVM Block
Va
Vb
Vc
ABC ab
Va
Vb
b
app
ab
Pulses
clk
out1
S1
out2
out3
S2
S3
CLK
0.5
amplitude:0.811
o
phase:-244.8
Combinatorial Logic
S1
S2
S2
buf
Drv_Sab
S3
S1
Drv_Sbc
buf
S3
buf
Drv_Sca
Figure 3.12: SABER simulation schematic of the power stage and PWM
of T .
the bidirectional switches, as illustrated in Fig. 3.14. Figure 3.14a) is the current
through switch Sab of T when zero vector {1 1 1} is used throughout the entire
line cycle. It is important to note that the magnitude of the current is smaller than
in the other two simulations, as predicted in Table 3.2. Figure 3.14b) is the current
flowing through switch Sab of T when a different zero vector is used for each sector.
62
200
ia(t)
150
vsa(t)
100
50
0
50
100
150
200
0.284
0.286
0.288
0.29
0.292
t(s)
0.294
0.296
0.298
Figure 3.13: Simulation results of the phase a current and source voltage
of TY .
Note that, as expected, during Sectors III and VI, the current through the switch is
equal to zero. Fig. 3.14c) is the current through switch S1 of TY .
a)
50
0
50
b)
50
0
50
c)
50
0
50
0.27
0.275
0.28
0.285
t(s)
0.29
0.295
0.3
Figure 3.14: Currents through switches a) Sab (using zero vector {1 1 1}),
b) Sab (using a different zero vector per sector), and c) S1 of
TY .
The steady-state simulation results validate the conceptual analysis of Section
3.3 and demonstrate that a modulation strategy developed for the six-switch VSC
63
can be extended to the alternative topologies through simple combinatorial logic.
3.5
Rectifier T supplied by a Squirrel-Cage Induction Generator

Alternative rectifier topology T will be analyzed as the rectification stage
of an induction generator-based wind turbine system. The power requirements of

an example wind turbine and induction generator will be determined as functions
of the wind speed. The power requirements of the system must be met by the
rectification stage of the power electronics interface. In other words, it must be
capable of extracting the active power at the output of the induction generator
while supplying the machine with the necessary reactive power for its operation.
The operation of the induction generator/rectifier system will be analyzed under
variable and constant wind speed conditions and the analysis will be verified through
numerical simulation.
The example wind turbine for the subsequent analysis presents the following
characteristics:
Air pressure: 101.3 kPa
Air temperature: 273 K
Air density (): 3.485 Air pressure/Air temperature
Blade length (r): 17 m
Area swept by the blades (A): 908 m2
Performance coefficient (Cp ): 0.42
Tip-speed ratio (): 7
Gearbox efficiency (t ): 100%
Gearbox transformation ratio (x): 100
Cut-in wind speed (vc ): 1 m/s
Rated wind speed (vr ): 15 m/s
64
An example squirrel-cage induction machine, modeled by the per-phase equivalent circuit of Fig. 3.15, is used:
Number of poles: p = 6
Rotor moment of inertia: J = 0.01 kg.m2
Magnetizing reactance: Xm = 0.5544
Stator resistance: Rs = 0.0070
Stator reactance: Xs = 0.008736
Rotor resistance: Rr = 0.00204
Rotor reactance: Xr = 0.008634
All the reactance values are given at 60 Hz.
Rr
Rr (1 - s)
s
Xr
ir
is R
s
Xs
im
Xm
vg
vt
Figure 3.15: Per-phase model of the induction generator.
3.5.1
Induction Generator Power Requirements under Variable Wind

Speed Conditions
Based on the equivalent circuit of Fig. 3.15, the active and reactive power of
the machine as functions of the machine parameters are derived

3 Rr 2
2
PIG =
I + Rs Is
2 s r

3
2
QIG =
Xr Ir2 + Xm Im
+ Xs Is2
2
(3.6)
(3.7)
where Ir , Is , and Im are the peak values of the rotor, stator, and magnetizing
currents, respectively, and s is the slip of the machine. This is the classic description
for the power of an induction generator. However, the variation of active and reactive
65
power due to variations in the wind speed is not evident in these equations. A
different approach will be presented to link the wind speed to the active power
output of the induction generator and the necessary reactive power the machine
requires to operate.
Consider the turbine system of Fig. 3.16, where the stator resistance is considered negligible.
wt
x
ht
wm
we
Pm
Pe
Qe
v
Pw
Pt
Rr
jweLr
jweLs
+
Rr (1 - s)
s
jweLm
vt
_
Figure 3.16: Wind turbine and induction generator model.

The mechanical power of the low-speed shaft (Pt ) is the power in the wind
multiplied by the performance coefficient of the rotor
1
Pt = Cp Pw = Cp Av 3
2
and the rotational speed of the shaft is
t =
v
r
The gearbox transfers the power to the high-speed shaft, i.e., the rotor of the induction generator, with some loss in power due to the finite efficiency of the gearbox
(t )
1
Pm = t Pt = Cp t Av 3
2
66
(3.8)
and the rotational speed is increased to

m = xt = x
v
r
(3.9)
The rotational speed of the high-speed shaft is related to the synchronous

speed (s ) of the induction machine by the slip
m = s (1 s)
and to the electrical frequency by the number of poles of the machine
2
m = e (1 s)
p
(3.10)
Substituting (3.10) into (3.9) results in the variation of the electrical frequency at
the machine terminals as a function of the wind speed
e =
p x
v
2 (1 s) r
(3.11)
The reactances of the machine will, therefore, be functions of the wind speed.
The stator current is defined as the ratio between the stator terminal voltage
(angular reference) and the equivalent impedance of the machine (Zeq )
Is =
Is =
Vt
(
Rr
+je Lr je Lm
s
Rr
+j
e (Lr +Lm )
s
+ je Ls
| Vt |
Zeq
| Zeq |
(3.12)
The active power at the output of the induction generator is

3
| Vt || Is | cos (Vt Is )
2
3
Pe = | Vt || Is | cos (Zeq )
2
Pe =
(3.13)
The power available in the high-speed shaft was defined by (3.8). However, due to
the losses in the rotor resistance, the active power at the output of the generator is
Pe = (1 s)Pm
67
(3.14)
Substituting (3.8) and (3.14) into (3.13) and solving for the magnitude of the stator
terminal voltage, yields
| Vt |=
1
| Zeq |
(1 s)Cp t A
v3
3
cos (Zeq )
(3.15)
The reactive power required by the machine is obtained from

Qe =
3
| Vt || Is | sin (Zeq )
2
and yields
1
Qe = (1 s)Cp t Av 3 tan (Zeq )
2
(3.16)
Equations (3.14) and (3.16) describe the power characteristics of the induction
generator as a function of the wind speed, turbine and gearbox characteristics, and
machine parameters. Figure 3.17 presents the power trajectory of the machine as
the wind increases in speed for different values of slip. From the graph, it can be
concluded that it is best to use a lower slip value since, for a given wind speed, more
active power can be extracted with less reactive power consumption. Furthermore,
the lower slip values correspond to the range between zero and peak torque of the
speed vs. torque curve of the machine. This is the intended region of operation
for the generator since a small variation in the slip results in a large change in
torque. Beyond the peak torque, the slip values are higher but the torque does not
significantly change with the increase in speed.
In variable-speed motor applications, the induction machine is controlled to
maintain a constant voltage-to-frequency ratio (Cvf ) for rotor speeds below the rated
speed in order to avoid core saturation [72]. Maintaining the ratio between the
stator terminal voltage and electrical frequency constant implies that the stator flux
or machine air-gap flux is constant. For generator applications, one of the common
strategies is to maintain the terminal voltage constant and allow the stator flux to
vary with the wind speed [72] [73]. By maintaining the amplitude of the terminal
voltage constant, the problem of low efficiency at low wind speeds is reduced since a
better utilization of the dc-link is achieved. This problem was discussed in Section
1.7.2.1 for the rectification stage of the back-to-back VSC.
In order for the terminal voltage to remain constant, the product of the stator
68
Qe [kVAr]
s = -0.05
s = -0.04
1200
s = -0.03
1000
800
s = -0.02
600
s = -0.01
400
200
200
400
600
800
Pe [kW]
Figure 3.17: Active and reactive power trajectory of the example induction generator for wind speeds varying from 1 m/s to 15
m/s.
flux (s ) and the rotor speed (m ) must be constant [73],
V t m s
The maximum speed is limited by the mechanical rating of the induction generator
and the minimum speed is limited by the saturation of the core (i.e., maximum speed
corresponds to minimum flux and minimum speed corresponds to maximum flux)
[73]. It is important to note that there is a trade-off between a better utilization
of the dc-link (higher rectifier efficiency) and a wider wind speed operating range
(larger flux variations). A larger terminal voltage will cause the core to saturate at a
lower wind speed than a lower terminal voltage amplitude would. A careful analysis
of the site wind statistics and a good design of the generator/rectifier system are
crucial for obtaining a reasonable compromise between these two opposing factors.
The analysis presented in this section assumes that both the terminal voltage
and frequency vary freely with the changes in wind speed. Figure 3.18 presents the
voltage-to-frequency ratio (ratio between (3.15) and (3.11)) as a function of the wind
speed. The quasi-linear nature of Cvf corresponds to the variation in the stator flux.
The development of a control scheme for the machine is beyond the scope of this
dissertation since existing control strategies developed for the six-switch VSC can
69
be used for the three-phase rectifiers with ac-side bidirectional switches. Further
information on this subject can be found in [74], [72], and [73].
Cvf
0.04
0.03
0.02
0.01
10
12
14
v [m/s]
Figure 3.18: Voltage-to-frequency ratio for wind speeds varying from 1

m/s to 15 m/s.
3.5.2
Rectifier Power Handling Capability

As presented in the literature survey of this chapter, rectifiers T , TY , and TB
are limited in the amount of reactive power they can absorb/provide. The power
handling capability of the rectifier determines the operation region of the generator/rectifier system, therefore, it is necessary to determine the operation boundaries
of the rectifier.
Equation
Vca Ia |max =
1 + sin
.
2 cos2
(3.17)
defines the maximum normalized value of the product of the converter voltage (stator terminal voltage) and phase current (stator current) and was derived in [66].
Equation (3.17) represents the active and reactive power capabilities of the rectifier.
The possible operation region of rectifier T within the P-Q plane is
3
1 + sin
| Vt || Is |
2
2 cos
3
1 + sin
Q = | Vt || Is |
sin
2
2 cos2
P =
(3.18)
(3.19)
Figure 3.19 presents the operation boundaries of rectifier T for different wind
speeds and a constant slip of -1%. There are two constant power factor limits,
70
defined by the maximum angle of the stator current (30o ), which are independent
of the wind speed. The curved boundaries are determined by (3.18) and (3.19) and
depend on angle . The change of from 30o to 30o defines the trajectory of the
curved boundary on the P-Q plane. Since the terminal voltage and stator current
depend on the wind speed, the curved boundary also depends on the wind speed and
is pushed to higher powers as the wind speed increases. The machine must operate
within the operation boundaries of the rectifier in order to prevent distortion in the
stator current.
QD [kVAr]
500
400
v = 5 m/s
v = 10 m/s
v = 15 m/s
300
200
100
30
j=
200
-100
-200
j=
400
600
800
PD [kW]
-30 o
Figure 3.19: Active and reactive power limits of T for a -1% slip and
wind speeds equal to 5, 10, and 15 m/s.
3.5.3
Induction Generator/Rectifier System

The power handling capability of the rectifier and the power trajectory of the
induction generator as the wind speed changes were determined. The system as a
whole can now be analyzed to determine whether or not the rectifier can supply
the necessary reactive power to the machine under normal operating conditions.
Two analyses will be presented: the first considers that the terminal voltage and
frequency vary according to the wind speed and the second, for simulation purposes,
considers a constant terminal voltage and frequency and variable slip.
71
3.5.3.1
Variable Terminal Voltage and Frequency
As the wind speed varies, the frequency and voltage at the stator terminals
vary according to (3.11) and (3.15), respectively. Independent of the variations in
frequency and voltage, the stator current can never lead the stator voltage by more
than 30o . If the phase of the current were to exceed this limit of the rectifier, the
current would become distorted. From (3.12), it is possible to visualize the variation
in the phase of the stator current as the wind speed changes, Fig. 3.20.
j
o
35
20
v = 2.4515 m/s
25
v = 18.1783 m/s
30
15
2.5
7.5
12.5
10
15
17.5
20
v [m/s]
Figure 3.20: Variation of the phase of stator current as a function of the

wind speed and for a constant -1% slip.
It can be concluded from Fig. 3.20, that maximum and minimum wind speeds
define the operating range of the system. These speed limits depend on the slip and
are summarized in Table 3.3 for the slip values presented in Fig. 3.17. In the case
of higher slip values (-3 to -5%), the minimum speed is below the established cut-in
speed of 1 m/s. When the slip is equal to -1%, the maximum speed is higher than
the rated speed (15 m/s) and the turbine will be shedding excess power.
Table 3.3: Wind speed operating range of the generator/rectifier system
for different slip values.
slip Minimum wind speed [m/s] Maximum wind speed [m/s]
-1%
2.2415
18.1783
-2%
1.1318
9.1792
-3%
0.7620
6.1794
-4%
0.5770
4.6796
-5%
0.4661
3.7797
72
Based on the operating range for each slip value, a control strategy could be
developed to extract the maximum power for any wind speed between the cut-in
and rated speeds. For example, if the wind speed falls below 3.6483 m/s, the slip
could be allowed to increase to -2 or -3% to extract the power from the lower wind
speeds while supplying less reactive power to the machine than if the slip remained
at -1%, as presented in Fig. 3.21. It is important to remember that the numbers
obtained here are for a particular machine and turbine; however, the same analysis
could be carried out for different machines and turbines with similar results.
Q [kVAr]
400
300
s = -0.01
s = -0.03
v = 15 m/s
200
...
...
100
10
8
6
0
=3
4
2
v = 1 m/s
5
10
v = 3.6483 m/s
15
...
20
400
600
800
P [kW]
Figure 3.21: Induction generator/rectifier operation between the cut-in

speed (1 m/s) and rated speed (15 m/s).
3.5.3.2
Constant Terminal Voltage and Frequency
In order to verify the analysis of the induction generator/rectifier system, a

simulation of the system in SABER will be presented. The simulator has a model
for the squirrel-cage induction machine in its library. However, in order to use this
model, an electrical frequency must be determined as part of the machine parameters. This limitation of the model restricts the verification of the analysis to constant
wind speed conditions or variations around a given wind speed, in which case the slip
will change instead of the electrical frequency of the machine. A slightly modified
analysis of the induction generator/rectifier system will be presented for the case of
constant wind speed (constant terminal voltage of 180 Vpk and frequency of 60 Hz)
73
and variable slip. A discussion on the start-up of the system under these conditions
will also be presented.
Equations (3.18) and (3.19) define the curved operation boundary of the rectifier, as presented in Fig. 3.22. This boundary depends on as well as the slip,
which is indirectly represented by the internal emf of the machine. Increasing the
slip drives the curved boundary to higher power levels. The angular limits of = 30o
and = 30o define constant power factor lines OA and OB, respectively. The P-Q
curve of the induction machine must lie within the operating region of the rectifier
in order for the system to operate without distortion in the stator currents.
a of Fig. 3.22 is the change of the reactive power (3.7) versus the active
Curve
power (3.6) of the induction machine as a function of the slip. In generator mode,
the machine will operate in the first quadrant of the P-Q plane (given the phase
angle definitions of Fig. B.1). The P-Q curve of the machine intersects with line
OA that defines a constant power factor of cos 30o . Typical induction machines for
high power applications present a power factor greater than cos 30o under normal
operation. Therefore, the machine will operate below this line.
Q [MVAr]
3
a
A
0.5
1.5
2
1%
s=-
-1
2.5
s=
-5%
s=
-8%
3.5
P [MW]
10%
s=-
B
Figure 3.22: P-Q curve of the induction generator and the operation
boundaries of rectifier T for different values of slip.
The two intersection points of the P-Q curve of the machine and boundary
OA of the rectifier determine the upper and lower slip limits that define the normal
74
operating region of the system. From Fig. 3.22, the slip range for normal operation
of T is -1% to -5%. Although this seems to be small slip range, it represents a
450% variation in the generator output power, from 0.24 MW to 1.08 MW.
At stand-still the power capability of the rectifier indicates that P = Q = 0,
i.e., the P-Q curve of the rectifier is located at the origin, indicated by point O in
Fig. 3.22. However, for the given terminal voltage, the machine requires 0.086 MVAr
in order to magnetize the rotor and start-up. These two different initial operating
points imply that the rectifier cannot support the machine requirements at start-up.
This indicates that a source is needed to bring the P-Q curve of the machine within
the operating region of the rectifier.
The amount of reactive power required for the start-up of the machine decreases as the magnitude of the terminal voltage decreases. This causes the P-Q
curve of the machine to approach the origin but never actually reach it. Therefore,
a start-up strategy for the rectifier-generator system would be to provide a small
voltage to start the system and lead the P-Q curve of the machine into the operating
region of the rectifier. This small voltage is provided by the residual magnetism of
the rotor (all electrical machines contain some residual magnetism even if there is
no magnetizing force [75]). Thus, this residual magnetism creates a small internal
emf, such that the terminal voltage can then be increased by the rectifier to bring
the system to the desired operating point.
3.5.4
Simulation Results
The generator/rectifier system was simulated in SABER to confirm the anal-
ysis. The simulation schematic is presented in Fig. 3.23 with the given machine
parameters. The switching frequency of the rectifier was 1.8 kHz and the slip of the
generator was -2%. For the start-up of the system, the residual magnetism of the
machine was represented by a small voltage source placed in-between the terminals
of the machine and the rectifier. It is important to note that the magnitudes of
these sources need to be subtracted from the reference voltages of the converter.
Figure 3.24 shows the stator phase a current during the start-up of the system.
The reference voltages were linearly increased which resulted in a linear build-up of
the stator current until reaching steady-state at 7 s.
To characterize a wind speed increase variation, a step change in the rotor
75
Power Stage
1Meg
angw_pwl
wrm
Pwl:[0,128.18,
7.2,128.18,
7.201,131.95,
8,131.95]
Vres_a
amplitude:10
phase:0
ind_3pwr
Sab
Vres_b
amplitude:10
phase:240
j:0.01
xm:0.5544
xs:0.008736
xr:0.008364
rs:0.0070
rr:0.00204
p:6
fb:60
200
Drv_Sab
Sca
Sbc
Drv_Sbc
Drv_Sca
200
Vres_c
amplitude:10
phase:120
Reference Voltages
Vb
Va
Vc
Linear
vmult
vmult
v_pwl
pwl:[0,0,7,1,8,1]
vmult
Linear
Linear
Linear
V_refa
amplitude:0.85
phase:6
V_refb
amplitude:0.85
phase:246
V_refc
amplitude:0.85
phase:126
SVM Block
Va
Vb
Vc
Va
Vb
Vc
ABC ab
Va
Vb
b
app
ab
Pulses
clk
out1
S1
out2
out3
S2
S3
CLK
0.5
Combinatorial Logic
S1
S2
S1
S2
buf
Drv_Sab
S3
Drv_Sbc
buf
S3
buf
Drv_Sca
Figure 3.23: SABER simulation schematic of the generator/rectifier system.

speed was introduced at 7.2 s. The slip consequently increased from -2% to -5%.
76
Note that for both values of slip, the machine operates within the boundaries of the
P-Q curve of the rectifier (Fig. 3.22) and the stator current presents no distortion.
5000
5000
0
4
t(s)
Figure 3.24: Stator phase a current during start-up and for a step transition in the slip from -2% to -5%.
A detail of the startup transient of the stator current is presented in Fig.
3.25. By slowly increasing the reference voltages of the rectifier, the machine is
given enough time to magnetize which keeps the stator current sinusoidal without
distortion. If the reference voltages were increased too quickly the current would
either become highly distorted or the system would not be able to start-up.
3.6
Conclusions
A parallel between the six-switch VSC and rectifiers T , TY , and TB was
established based on the line-to-line converter voltages. This made it possible to

use the open- and closed-loop SVM control strategies developed for the six-switch
VSC to control T , TY , and TB by implementing a simple combinatorial logic. This
makes the control of the rectifier topologies simpler to implement due to the vast
knowledge and hardware available for the six-switch VSC.
It was shown that topologies T and TB have different possibilities for producing a zero vector at the ac terminals of the circuit. This degree of freedom resulted in
different modulation strategies which were conceptually analyzed to eliminate super77
1500
1000
500
0
500
1000
1500
3.995
4.005
4.01
4.015
4.02
t(s)
4.025
4.03
4.035
4.04
4.045
Figure 3.25: Detail of the stator current during the start-up transient.
fluous and inefficient strategies. The chosen modulation strategy for T achieves a
zero vector by simulataneously closing the three bidirectional switches; this strategy
minimizes the overall losses of the semiconductor devices of the alternative rectifier
topology and is the foundation for the loss analysis and comparison of Chapter 4.
The analysis of the generator/rectifier system concluded that, for normal operation, the system operates within the region determined by the intersection of the
P-Q curves of the rectifier and the induction machine for both variable and constant
terminal conditions. For the case of constant terminal voltage and frequency, variations in the wind speed can be accomodated by variations in the slip (-1% to -5%).
A simulation of this case was presented to verify the analysis and demonstrate that
the system is capable of starting-up without external help. The residual magnetism
of the machines rotor provided the initial voltage required to start up the system.
Steady-state was reached by slowly increasing the terminal voltages of the machine
by controlling the rectifiers reference voltages.
The alternative rectifier topologies can operate under variable voltage and
frequency conditions at the stator terminals of the induction generator; however, the
control scheme for the system will be more complex than if a three-phase voltagesource converter were used. This is due to the constant power factor limits defined
by = 30o , which restricts the operation of the system within the operational
78
boundary of the rectifier. Outside of these limits, the stator currents will become
distorted.
An advantage of staying within the = 30o limit is that the slip value will
be small and will, consequently, result in reduced reactive power consumption on
the part of the machine. This improves the efficiency of the converter. The variable
voltage at the stator output, however, is a disadvantage at low wind speeds since
the stator voltages will be relatively small compared to the dc-link voltage, which is
required to be high for the subsequent inversion stage. The efficiency of the converter
will suffer under these conditions, since the bidirectional switches will conduct for
longer periods of time in order to successfully boost the voltage.
79
CHAPTER 4
Comparison of Rectifier Topologies T , TY , and TS
In Chapter 3 the three-phase rectifiers with ac-side bidirectional switches were
proposed the rectification stage of the power electronics interface of a wind energy
system. The practical viability of this circuit depends on its performance compared
to the standard six-switch voltage-source converter. The comparison of the topologies can take many factors into consideration: control strategy performance, losses
and efficiency, noise generation, cost, reliability, volume, weight, among others. However, since the two topologies are equivalent (Chapter 3), the control strategy performance of the topologies will be virtually identical. This leaves the loss/efficiency
and noise generation as the determining factors of the comparison.
The losses of the semiconductor devices (active switches and diodes) determine
the efficiency of the rectification stage and are directly related to cost, volume, and
weight. The conduction and switching losses of the unidirectional switches of TS
and bidirectional switches of T and TY will be analytically derived and compared.
It will be shown that the connection of the bidirectional switches in delta or wye,
the practical implementation of a bidirectional switch, and the modulation strategy
chosen for rectifier T significantly alter the loss profile of the alternative topologies.
The losses of the rectifier diodes of the three topologies will also be derived and
compared.
The noise generation of the rectifier topologies is an important comparison
criterion since the rectifiers operate in conjunction with a machine. It is well documented that the high voltage transitions in power electronics converters generate
common-mode noise currents that circulate through the parasitic capacitances of
the converter and machine and deteriorate the insulation of the machine bearings.
Over time this can lead to the failure of the machine. An analysis of the commonmode voltage generation of the rectifier topologies will be presented. It will be
shown that the use of the alternative rectifier topologies can significantly reduce the
common-mode voltage.
80
4.1
Literature Overview
Determining the current and voltage stresses of a semiconductor device is an
essential part of the design of a power converter. From these estimations, a proper
thermal design can be carried out in order to efficiently remove the heat generated
inside the device and guarantee good performance. However, the voltage and current of semiconductor devices in three-phase power electronics converters are highly
complex waveforms due to their variations from one switching period to the next
and over the entire low-frequency line cycle.
Comparing the losses of different power converters multiples the difficulties
since different topologies with different voltage and current profiles need to be analyzed. This problem has been approached in different ways in the literature: the
first, is to build prototypes of the converters and measure the losses; the second, is
to analytically describe the rms and average currents and estimate the losses. The
first approach has limited usefulness since the results are dependent upon design
parameters and the semiconductor technology used to implement the devices. The
second approach can be math-intensive but provides general design equations with
generalized results that are independent of practical designs and implementations.
The first approach was used in 1997 by [76] to compare the current and voltage
stresses of the semiconductor devices of TS , T , TY , TB , and the Vienna rectifier
(refer to Fig. 3.4b)) operating at high frequency. Specific design parameters were
considered and the stresses were determined experimentally based on actual devices.
It was concluded that the three-level Vienna rectifier presents the best performance
of the five topologies.
The second approach was used by [69] for the Kurii converter of [77], T ,
and TS operating at low frequency. The design equations were developed for all
of the components of the three topologies and compared their performance. It was
concluded that T and TS present similar electrical behavior and that the Kurii
converter presents the lowest losses. However, the results do not apply to high
frequency PWM operation.
No further efforts to characterize the losses of the three-phase rectifiers with
ac-side bidirectional switches were encountered in the literature. Similarly, no investigation into the common-mode voltage generation of these converters was found,
although many papers discuss and propose solutions for the common-mode noise
81
generated by the six-switch VSC, to cite a few [78], [79], and [80].
4.2
Rectifier T Switch Loss Analysis

Section 3.3 discussed the modulation strategies for T and conceptually elimi-
nated three of the four modulation strategies based on the switch conduction losses.
For the sake of comparison, two modulation strategies will be analyzed in terms of
the losses they incur. The chosen modulation strategies are 1) to use zero vector
{1 1 1} throughout the six sectors and 2) to use zero vector {1 1 0} for Sectors I and
IV, {1 0 1} for Sectors II and V, and {0 1 1} for Sectors III and VI. The switch loss
analysis will include both conduction and switching losses for a true bidirectional
switch and for a discrete implementation of a bidirectional switch. The implementation of the bidirectional switch is important for comparing the switch losses with
those of the six-switch VSC since currently there is no true bidirectional switch
available on the market.
The losses of the switches and diodes depend on the current stresses (average
and rms currents) of the semiconductor devices over a line cycle. The rms current
is calculated by first taking the rms current over a switching cycle. The resulting
equation is then used to calculate the rms current over a line cycle. A similar
procedure is carried out for the average current: first, the average of the current is
taken over a switching cycle and is then averaged again over a line cycle.
The subsequent analysis will be in per-unit quantities. The output power (P0 )
will be the base power and the dc-link voltage (Vdc ) will be the base voltage. The
base current and the base impedance will be
P0
Vdc
Vdc2
=
P0
IB =
ZB
Before initiating the analysis, it is necessary to determine the nonlinear dependency of the modulation index M and angle on the system parameters. Referring
to Fig. 4.1b) (repeated here from Appendix B for convenience), consider the converter voltage as the angular reference and the inductor (stator inductance) ideal,
i.e., the equivalent series resistance (stator resistance) is zero, so that the converter
82
voltage of phase a in per-unit quantities is given by

Vcapk,pu 0o = Vspk,pu Ipk,puXLpu ( + + 90o ),
(4.1)
where XLpu is the per-unit reactance of the inductor.
ia(t)
vsa(t)
Vsa
Ia
L
vca(t)
-j2pf1LIa
q
g
j
Vca
b)
a)
Figure 4.1: a) Equivalent circuit for phase a and b) the corresponding

phasor diagram.
The modulation index was defined in (B.2) for the absolute value of the converter voltage and dc-link voltage. It can be redefined in per-unit as
M = 2Vcapk,pu .
(4.2)
Substituting (4.2) into (4.1) yields

2
M=
kV
2
2
+ Iapk,pu kV XLpu + 2
3
2
Ia
kV XLpu sin ,
3 pk,pu
where kV is the voltage transfer ratio defined by

kV = q
1
3
V
2 spk,pu
Angle is also determined from (4.1), resulting in

v

u
u 1 + 6Iapk,pu kV XLpu sin + 3 Iapk,pu kV XLpu sin 2
2
= arccos t
2 .
1 + 6Iapk,pu kV XLpu sin + 32 Iapk,pu kV XLpu
For simulation purposes, it is helpful to consider the existence of an equivalent

series resistance (ESR) in the inductor to reduce the transient time. Therefore, in
order to verify the rms and average current equations it is necessary to incorporate
83
the per-unit ESR (RLpu ) into the equations for M and , such that
2
M=
kV
r

2
2
2
2
2
2
2
2
+ Iapk,pu kV RLpu + XLpu 2Iapk,pu kV
RLpu + XLpu
3
3
12

XLpu
cos + arctan
RLpu
and
h

1 + 6Iapk,pu kV RLpu cos + XLpu sin +

2
3 2
2
+ Iapk,pu kV RLpu cos XLpu sin
/ 1 + 6Iapk,pu kV RLpu cos +
2
1
3 2

2 2
2
XLpu sin + Iapk,pu kV RLpu + XLpu
2
= arccos
4.2.1
Conduction Losses
Since two modulation strategies are being considered for rectifier T , the con-
duction loss equations derived here should reflect the differences between the chosen
modulation strategies. This is accomplished by the use of logic variable l which
takes on the value of 1 when zero vector {1 1 1} is used and is zero for any other
zero vector.
As presented in Table 3.2, the difference between the two modulation strategies
is in the distribution of the line currents during the zero vector intervals. The switch
currents will either present two or three envelopes. In the case of using a specific
zero vector for each sector (l = 0), the envelopes of the current through switch Sab ,
iSab (t), during Sector I are ia (t) and ib (t). When using zero vector {1 1 1} (l = 1)
the envelopes are ia (t), ib (t), and [ia (t) ib (t)]/3. In order to understand the third
envelope equal to [ia (t) ib (t)]/3 when l = 1, consider that the three bidirectional
switches are identical and present an on state resistance equal to Ron . During the
zero vector interval, the three switches are on and the equivalent circuit is presented
in Fig. 4.2.
Using Kirchhoffs voltage and current laws, the current through switch Sab is
iSab (t) =
ia (t) ib (t)
.
3
84
(4.3)
ia
ib
ic
iSab
+
VSab
_
Ron
iSbc
+
VSbc
_
_
VSca
+
Ron
iSca
Ron
Figure 4.2: Equivalent circuit when zero vector {1 1 1} is applied.

The other two switch currents are obtained through the same procedure and their
results are identical to Table 3.2 for operation in Sector I.
Figure 4.3 presents the current envelopes of iSab (1 t) over a line cycle for l = 1
and l = 0. The envelopes that define part of the switch current are highlighted in the
figure. As the different voltage space vectors are applied, iSab (1 t) switches among
the current envelopes. Note that, in Sector I, inner envelope ib (1 t) does not occur
throughout the entire sector. This current only flows through Sab while it is positive,
ceasing to flow through the switch once it crosses zero. In Sector II, current ia (1 t)
only starts to flow through the switch after it crosses zero and becomes negative.
Therefore, for the analysis of the conduction losses, it is necessary to divide the six
sectors into subsectors defined by the zero crossing angles of the inner envelopes.
The contribution of current envelope ib (1 t) to iSab (1 t) depends on angle
. Therefore, Sector I can be divided into two subsectors: Subsector Ia defined as
the interval [90o , b ] and Subsector Ib defined as [b , 150o ], where b is a function of

. The phase currents cross zero at two different angles over one line cycle. These
angles are functions of and are defined in Table 4.1.
Table 4.1: Zero crossing angles.
Zero Crossing
ia (1 t)
ib (1 t)
ic (1 t)
+
a = +
b =
5
3
c =
a =
b =
2
3
c =
7
6
85
l=1
-ib(w1t)
ia(w1t)
[ia(w1t)-ib(w1t)]
3
wt
xb
l=0
-ib(w1t) ia(w1t)
j
V
wt
xb
VI
II
III
IV
Figure 4.3: Current envelopes for switch current iSab (1 t) over a line cycle.
The same procedure for defining the subsectors is followed for the other five
sectors; however the problem can be simplified due to the symmetry that exists
between Sectors I, II, and III and Sectors IV, V, and VI. Therefore, the analysis will
only take into account Sectors I, II, and III.
In Sector I, applying zero vector {1 1 1} turns on the three bidirectional
switches and the phase currents are distributed among the three switches, generating current envelope (ia (t) ib (t)) /3. Applying zero vector {1 1 0} turns on only
two bidirectional switches which causes the entirety of the phase currents to flow
through the switches. Figure 4.4 illustrates this difference by showing iSab (t) over a
line cycle and over a switching cycle in Sector I. The current flowing through switch
Sab during the active vector intervals is the same for both modulation strategies.
The voltage across switch Sab is also shown for Sector I. Note that the voltage across
the switch is independent of the modulation strategy. The voltage stress will be
addressed during the switching loss analysis.
In [58], the authors studied space vector modulation applied to the six-switch
VSC and calculated the on times of the active and zero vectors. The equations the
authors reached were expressed in the space vector domain and in order for them
to be used in this time-domain analysis, they need to be phase shifted by 90o . This
change of axis is necessary due to the transformation that places, for example,
Sector I at 0o in the space vector domain when it is located at 90o in the time-domain.
86
l=1
l=0
iSab(t)
iSab(t)
v0 v1 v2 v0 v2 v1 v0
v0 v1 v2 v0 v2 v1 v0
Sab
Sab
Sbc
Sbc
Sca
Sca
iSab(t)
vSab(t)
(ia-ib)
3
(-ib)
iSab(t)
(Vdc)
t0 t1 t2
2 2 2
vSab(t)
t0
t2
2
t1 t0
2 2
(ia)
(-ib)
(Vdc)
t0 t1 t2
2 2 2
t0
t2
2
t1 t0
2 2
Figure 4.4: Current iSab (t) over a line cycle and over a switching cycle in
Sector I and the voltage across the switch over a switching
cycle in Sector I for the two given modulation strategies.
The modified vector time equations are presented in Table 4.2.
The rms current of the switch over a switching cycle can now be calculated
for each subsector. It is important to note that the phase currents are considered
constant over a switching cycle since it is assumed that fs f1 . For Subsector Ia,
as shown in Fig. 4.4, the rms current of switch Sab is defined as
iSab ,Iarms
v "
"
#
u

2 #
Z t2
u 1 Z 2t0
i
i
a
b
= t
i2a (l 1) +
l dt +
i2b dt
Ts 0
3
0
("
#

2 # "

i
i
3
a
b
l 1
=
i2a (l 1) +
M sin 1 t
+
3
2
6

) 21
3
3
+ i2b
M sin 1 t +
(4.4)
2
2
The per-unit rms current equations of switch Sab for each subsector of Sectors
87
Table 4.2: Voltage space vector intervals in the time domain.

Sector I
t1 =
t2 =
3
MTs
2
3
MTs
2
Sector II
sin t +
sin t +
3
2
2t0 = Ts t1 t2
Sector III
t3 =
t4 =
3
MTs
2
3
MTs
2
sin t +
3
2
sin t +
5
6
2t0 = Ts t3 t4
Sector V
t5 =
t6 =
3
MTs
2
3
MTs
2
sin t +
5
6
sin t +
2t0 = Ts t5 t6
3
MTs
2
t2 =
t3 =
t4 =
11
6
sin t +
7
6
sin t +
7
6
sin t +
3
MTs
2
2t0 = Ts t2 t3
Sector IV
t5 =
t6 =
sin t +
3
MTs
2
3
MTs
2
2t0 = Ts t4 t5
Sector VI
t1 =
3
MTs
2
3
MTs
2
sin t +
sin t +
2t0 = Ts t6 t1
11
6
I, II, and III are
iSab ,Ibrms =
iSab ,IIarms =
iSab ,IIbrms =
iSab ,IIIarms =
v"
#
u

2 # "

u
i
3
a
b
t i2 (l 1) +
M sin 1 t
l 1
a
3
2
6
v"
#
u
2 # "

u
3
i
a
b
t i2 (l 1) +
M sin 1 t
l 1
b
3
2
2
("
"
#
#

2

i
i
3
a
b
i2b (l 1) +
l 1
M sin 1 t
+
3
2
2

) 12
3
11
+ i2a
M sin 1 t +
2
6
v
"
u

#
u ia ib 2
3
7
iSab ,IIIbrms = t
l 1
M sin 1 t +
3
2
6
(4.5)
(4.6)
(4.7)
(4.8)
The instantaneous conduction losses of bidirectional switch Sab is defined as

pc,Sab (t) = Ron i2Sab (t)
88
assuming the on-state resistance of Sab to be Ron .

Figures 4.5, 4.6, and 4.7 show the variation of the square of the rms current
of switch Sab over a fundamental line cycle for the two modulation strategies and
for different current phase angles. The rms currents derived in (4.4)-(4.8) were
used to generate the graphs. The vertical axis was normalized by the output power
of the rectifier (the base power) such that multiplying the vertical axis value by
the actual on-state resistance (in ) will provide the conduction loss of the switch
as a percentage of the rectifier output power. As expected, the use of {1 1 1}
(l = 1) results in significantly lower conduction losses for all three modes of operation
(lagging, leading, and unity power factor) when compared to case l = 0. This
confirms the conceptual analysis of Section 3.3.
2
iS
0.1
ab,rms
P0
TD (l = 0)
0.08
0.06
0.04
TD (l = 1)
0.02
0
wt
Figure 4.5: Variation of i2Sab ,rms over a line cycle for operation at rated
power and a 30o phase lag.
In conclusion, rectifier T will present minimum conduction losses when zero
vector {1 1 1} is used. Therefore, only this modulation strategy will be considered
in the loss comparison of T with rectifiers TY and TS .
For design purposes it is necessary to determine the total rms and average
currents. The rms and average currents can be approximated by taking the rms and
average of the currents over a line cycle. This model assumes that fs f1 which
allows the rms and average currents calculated over a switching period to be used
to determine the rms and average currents over a line cycle, instead of having to use
the actual currents with high frequency ripple.
The practical implementation of the bidirectional switch must now be consid89
0.1
iS
ab,rms
P0
TD (l = 0)
0.08
0.06
0.04
TD (l = 1)
0.02
0
6 wt
power and a 0o phase lag.
2
iS
ab,rms
TD (l = 0)
0.08
P0
0.06
TD (l = 1)
0.04
0.02
0
wt
power and a 24o phase lead.
ered. First, considering a true bidirectional switch, the total rms current can be
determined by
ISrms
( "Z
Z 150o
b
1
2
i
(1 t) d1 t +
i2Sab ,Ibrms (1 t) d1 t +
=
90o Sab ,Iarms

b
Z a
Z 210o
+
i2Sab ,IIarms (1 t) d1 t +
i2Sab ,IIbrms (1 t) d1 t +
150o
270o
210o
12
i2Sab ,IIIarms (1 t) d1 t
90
and results in
ISrms
Ipk,pu
=
2
8 + 6 3Ml 4l 24M cos + 3 (6 3M 6l + 5Ml) cos 2

6
(4.9)
which is
ISrms(l=1)
Ipk,pu
=
2
2 12M cos + M 3 (3 + cos 2)

3
(4.10)
for l = 1, and
ISrms(l=0)
Ipk,pu
=
2
8 24M cos 3 3 (M 2) cos 2

6
for l = 0. The average current through the bidirectional switch is equal to zero due
to the symmetry of the current in the positive and negative semi-cycles.
Considering now that the bidirectional switch is implemented by two unidirectional switches connected in anti-parallel, the rms current of one unidirectional
switch is calculated over half of a line cycle. Due to the symmetry in the switch
current waveform, the rms current of each of the unidirectional switches will be the
same. Thus, the total rms current of (4.9) is the quadratic sum of the rms currents
of each of the unidirectional switches
ISrms
2
2
+
I
=
2ISurms ,
= ISu
Surms
rms
such that
ISurms
Ipk,pu
=
2 2
8 + 6 3Ml 4l 24M cos + 3 (6 3M 6l + 5Ml) cos 2

6
For this discrete implementation, there will be an average current through each
unidirectional switch. The average current for l = 1 and 30o
ISuavg(l=1) =

Ipk,pu
16 3 M (7 + 6) cos + 6M sin ,
48
(4.11)
for l = 1 and 30o

ISuavg(l=1) =

Ipk,pu
16 3 M (7 6) cos 6M sin ,
48
91
(4.12)
and for l = 0 over the entire range 30o 30o

ISuavg(l=0) =
Ipk,pu n
3M cos + 3 [(8 M) cos + 2M sin ] .
16
(4.13)
Alternative topology T was simulated in SABER to prove the analysis and

the rms and average current equations. The simulation schematics of Figures 3.12
and B.2 were used. Figure 4.8 shows the current through switch Sab and the current
envelopes for l = 1 and for three operating conditions: 30o phase lag, unity power
factor, and 24o phase lead. Note that inner envelopes ib (1 t) and ia (1 t) of Fig.
4.3 extend outside of outer envelope [ia (1 t) ib (1 t)]/3 when the current lags and
leads the source voltage, respectively, resulting in a larger total rms current.
a)
50
0
50
b)
50
0
50
c)
50
0
50
0.284
0.286
0.288
0.29
0.292
t(s)
0.294
0.296
0.298
0.3
Figure 4.8: Current through Sab and current envelopes for l = 1 and a) a
30o phase lag, b) unity power factor operation, and c) a 24o
phase lead.
Figure 4.9 shows the current through Sab and the current envelopes for l = 0
and the same operating conditions of Fig. 4.8.
Table 4.3 summarizes the rms current values obtained from the SABER simulations and from (4.9) (using the mathematical software Mathematica). As can be
observed in the table, the analytical results are in good agreement with the simulation results. As expected, the total rms current when using l = 0 is almost twice
as high as when implementing zero vector {1 1 1} (l = 1). This confirms the ini92
a)
50
0
50
b)
50
0
50
c)
50
0
50
0.284
0.286
0.288
0.29
0.292
t(s)
0.294
0.296
0.298
0.3
Figure 4.9: Current through Sab and current envelopes for l = 0 and a) a
30o phase lag, b) unity power factor operation, and c) a 24o
phase lead.
tial analysis that concluded that the modulation strategy using zero vector {1 1 1}
results in minimal switch losses.
Table 4.3: Comparison between theoretical and simulation results for the
rms currents of the bidirectional switches of T .
Analytical Result Simulation Result

l=1
o
30
13.83 A
13.84 A
o
0
10.75 A
10.76 A
o
24
12.75 A
12.75 A
l=0
30o
21.10 A
21.00 A
o
0
17.70 A
17.67 A
24o
18.28 A
18.35 A
Figure 4.10 presents the SABER simulation schematic for the power stage of
T using a discrete implementation for the bidirectional switches. Table 4.4 summarizes the average current values for the discrete implementation of the bidirectional
switches obtained from the SABER simulations and from (4.11), (4.12), and (4.13).
As can be seen, the analytical results are in good agreement with the simulation
results.
93
La
l:1m
r:20m
Va
amplitude:155
o
phase:0
Drv_Sab
Lb
200
Sab
l:1m
r:20m
Vb
amplitude:155
o
phase:-120
Drv_Sbc
Drv_Sca
200
Lc
Sbc
Sca
l:1m
r:20m
Vc
amplitude:155
o
phase:120
Figure 4.10: SABER simulation schematic for the discrete implementation of the bidirectional switches.
Table 4.4: Comparison between theoretical and simulation results for the
average currents of one unidirectional switch of T .

l=1
o
30
4.04 A
4.05 A
o
0
3.36 A
3.35 A
24o
3.75 A
3.76 A
l=0
o
30
5.29 A
5.23 A
0o
4.88 A
4.83 A
o
24
4.59 A
4.59 A
4.2.2
Switching Losses
The switching loss over a switching cycle can be approximated by the integra-
tion over a switching cycle of the intervals (ton and tof f ) where both voltage across
and current through the switch are present. The simplified switching intervals are
presented in Fig. 4.11. The parasitic elements and their contibutions towards the
switching phenomenon of the practical switch are ignored in this analysis since the
extra losses they create would only scale the total switching losses up by the same
94
factor in all of the topologies under analysis.
v(t)
i(t)
ton
...
...
toff
Figure 4.11: Simplified switching instants.

The integration of the switching intervals over a switching period yields (3.1).
The total combined switching losses of the three bidirectional switches of T over a
switching cycle is given by
psw (t) = [2vSab ,v0 (t)iSab ,v0 (t) + vSab ,v1 (t)iSab ,v1 (t) + vSab ,v2 (t)iSab ,v2 (t)+
+2vSbc ,v0 (t)iSbc,v0 (t) + vSbc ,v1 (t)iSbc,v1 (t) + vSbc ,v2 (t)iSbc,v2 (t)+
+2vSca ,v0 (t)iSca ,v0 (t) + vSca ,v1 (t)iSca ,v1 (t) + vSca ,v2 (t)iSca ,v2 (t)] .
(ton + tof f ) fs
6
where VSab ,v0 (t) is the average voltage across switch Sab for zero vector v0 and
iSab ,v0 (t) is the average current through switch Sab for zero vector v0 , as indicated
by v(t) and i(t) in Fig. 4.11.
In Section 3.3 the switching losses of the four possible modulation strategies
of T were shown to be equal. Therefore, the total combined switching losses can
be calculated using zero vector {1 1 1} without loss of generality. The currents and
voltages of the bidirectional switches for this modulation strategy in Sector I were
presented in Fig. 3.9a). The resulting combined switching losses for each subsector
of Sectors I, II, and III are
(ton + tof f ) fs
6
(ton + tof f ) fs
psw,Ib(t) = psw,IIa (t) = Vdc (ia (t) + ib (t) ic (t))
6
(ton + tof f ) fs
psw,IIb(t) = psw,IIIa (t) = Vdc (ia (t) + ib (t) ic (t))
6
(ton + tof f ) fs
psw,IIIb (t) = Vdc (ia (t) + ib (t) + ic (t))
.
6
psw,Ia(t) = Vdc (ia (t) ib (t) ic (t))
95
Figure 4.12 shows the variation of the combined switching losses over half of
a line cycle for a 24o current phase lead. The switching losses are normalized by
the rated output power of the rectifier. The on and off intervals and the switching
frequency are not given and depend upon the practical device and the application,
therefore, the vertical axis is in reality a much smaller percentage of the output
power than is being shown.
pswD
1
(ton + toff) fs P0
0.64
0.62
0.6
0.58
0.56
0.54
0.52
1.5
2.5
3.5
4.5 wt
Figure 4.12: Variation of the combined switching losses for rated power
and a 24o current phase lead.
The procedure for obtaining the conduction and switching losses of topologies
TY and TS is similar to that of T . The details of the derivations are presented in
Appendix D.
4.3
4.3.1
Diode Loss Analysis

Rectifiers T and TY
The currents through the diodes of T and TY (and also TB ) are not affected
by the modulation strategy. The zero vector plays no part in the current stress
calculations of the diodes since, no matter which zero vector is used, all phases are
shorted by the bidirectional switches and the diode currents will always be zero.
Therefore, the losses of the diodes of T , TY , and TB are identical.
The diode currents of T , TY , and TB present three envelopes. In the case
of diode D1 of Fig. 3.1, the current has one outer envelope (ia (t)) and two inner
envelopes (ib (t) and ic (t)), which are illustrated in Fig. 4.13. Envelope ib (t)
only occurs during Sector VI and envelope ic (t) only occurs in Sector I. These
96
envelopes are a result of the active vectors used in the sector and the direction of
the phase currents.
iD1(t) -ib(wt) ia(wt)
-ic(wt)
xc
xb
xa
VI
II
wt
III
IV
Figure 4.13: Current envelopes of iD1 (t).

Each diode only conducts during the active vector intervals over half of the
line cycle. The same procedure for the switches was used for the diodes and the rms
currents for diode D1 over a switching period are
s

3 2

iD1 ,Vbrms = iD1 ,VIarms =
Mia sin 1 t +
2
6
s

3
11

2
2
iD1 ,VIbrms =
M ia sin 1 t +
+ (ib ) sin 1 t +
2
6
2
s

3

3
2
2
+ (ic ) sin 1 t +
iD1 ,Iarms =
M ia sin 1 t +
2
6
2
s

3 2

Mia sin 1 t
iD1 ,Ibrms = iD1 ,IIarms =
2
6
(4.14)
(4.15)
(4.16)
(4.17)
The total rms current through the diode over a line cycle can be calculated by
integrating (4.14)-(4.17)
iD1rms
Z c
Z 90o
1
2
=
iD1 ,Vbrms (1 t) d1 t +
i2D1 ,VIbrms (1 t) d1 t+
2
c
!) 12
Z b
Z a
+
i2D1 ,Iarms (1 t) d1 t +
i2D1 ,Ibrms (1 t) d1 t

90o
The per-unit lumped rms and average current equations for the diodes of T ,
97
TY , and TB are, respectively,

i
Ipk,pu
3M h
3 + 2 3 cos + 2 cos (2)
2
6
Ipk,pu
=
M cos .
4
IDrms =
IDavg
4.3.2
(4.18)
(4.19)
Rectifier TS
When operating as a rectifier, the switches of rectifier TS are responsible for
the continuity of the current and the diodes transfer the energy from the source to
the dc-link. It is expected, therefore, that the conduction losses of the diodes be
larger than those of the switches.
The current through diode D1 of TS was shown in Fig. D.4. The rms currents
over a switching cycle are
v "
#
u

u
3
3
5
M ( 1) sin 1 t +
M sin 1 t +
iD1 ,Vbrms = ti2a 1 +
+
2
6
2
6
v "
#
u

u
3
M sin 1 t +
iD1 ,VIrms = ti2a 1 +
2
6
v "
#
u

u
3
M sin 1 t
iD1 ,Irms = ti2a 1 +
2
6
v "
u

#
u
3
3
7
11
M ( 1) sin 1 t +
M sin 1 t +
iD1 ,IIarms = ti2a 1 +
+
2
6
2
6
where is the apportioning factor of (2.4).
The per-unit lumped rms and average current equations for the diodes of the
six-switch VSC are, respectively,
Ipk,pu 6 (1 ) + 12M cos 3 [6 9 + cos (2)]

ITS ,Drms =
(4.20)
2
6
i
Ipk,pu h
ITS ,Davg =
16 (1 ) + M (2 + 1) cos + 2 3 (2 1) (cos + sin ) .
16
(4.21)
s
98
4.4
4.4.1
Loss Comparison
Switch Loss Comparison
First, we will summarize the switching loss analysis of alternative topologies
T and TY and of the six-switch VSC (TS ). In the case of TS , only three of the six
switches conduct current every switching period. Therefore, the combined switching
loss per switching period is proportional to the sum of the magnitudes of the three
phase currents, (D.7). In the case of T using zero vector {1 1 1}, the bidirectional
switches switch more often per switching cycle than the switches of TS . However,
it was shown that several of these switching transitions occur under zero voltage
conditions, i.e., they are soft-switching transitions that do not result in additional
losses. The same was shown to be true for the bidirectional switches of TY . It
was concluded that the total combined switching losses of the three bidirectional
switches of T , those of TY , and the six unidirectional switches of TS are identical.
This conclusion implies that the differences in performance and efficiency of these
topologies will depend solely on the conduction losses.
Figure 4.14 presents the variation of the square of the rms current of one switch
of topologies T , TY , and TS over a fundamental cycle. The vertical axis was normalized by the output power of the rectifier. Multiplying the vertical axis value by
the actual on-state resistance (in ) of each switch results in the instantaneous conduction loss of the switch as a percentage of the rectifier output power. Two cases
are shown: a) Operation under rated power and stator terminal voltage; b) Operation under 50% rated power and stator terminal voltage magnitude. As expected,
the use of {1 1 1} as the zero vector (l = 1) of rectifier T results in significantly
lower rms current for the bidirectional switch than in the case of rectifier TY .
In comparing the two cases shown in Fig. 4.14, the conduction losses increase
as the source voltage magnitude and power decrease. This is due to the fact that
the zero vectors will be applied for longer intervals as the source voltage decreases,
leading to longer conduction times of the switches (in both T and TY ).
The rms current of each bidirectional switch of T (for l = 1) is higher than
that of a single unidirectional switch of TS . However, to compare the total conduction losses of the two topologies, one has to take into consideration the different
number of switches used (six in TS and three in T ) as well as the realization of the
bidirectional switches of T . Figure 4.15 illustrates two possible practical implemen99
i S,rms
0.15
TY
P0
0.125
0.1
0.075
0.05
TD (l = 1)
TS
0.025
0
6 wt
a)
2
i S,rms
P0
TY
0.5
0.4
0.3
0.2
TS
TD (l = 1)
0.1
6 wt
b)
Figure 4.14: Variation of the square of the switch rms current: a) Operation under rated output power and b) Operation under 50%
rated output power and stator terminal voltage magnitude.
A 24o leading phase angle is assumed for the current.
tations for the bidirectional switch: a) IGBTs with series diodes, b) series connection
of IGBTs (common-emitter configuration), and c) anti-parallel reverse-blocking IGBTs. Implementations a) and b) will result in the same conduction losses since in
both cases a diode and IGBT must simultaneously conduct to provide a path for
the current.
100
a)
b)
c)
Figure 4.15: Practical implementation of a bidirectional switch using a)

IGBTs with series diodes, b) a series connection of IGBTs
(common-emitter configuration), and c) an anti-parallel connection of reverse-blocking IGBTs.
Considering the series connection of Fig. 4.15a), the conduction losses of one
bidirectional switch is defined as
h
i
2
PS,T = 2 (VCE + Von )ISuavg(l=1) + (Ron + ron )ISu
rms
where VCE is the voltage drop across the collector emitter terminals of the IGBT
in the on-state, Von is the voltage drop across the diode in the on-state, Ron is the
conduction resistance of the IGBT, and ron is the conduction resistance of the diode.
Assuming that
Von VCE
ron Ron
The total combined conduction losses of rectifiers T and TS are

2
PcS,T = 6 2VCE ISuavg(l=1) + 2Ron ISu
rms

PcS,TS = 6 VCE ITS ,Savg + Ron IT2 S ,Srms
101
(4.22)
The total average and rms currents of the unidirectional switch of T over a line
cycle were calculated to be 13.5% higher and 25% lower, respectively, than those of
the six-switch VSC. Due to the higher average current and the factor of 2 in (4.22),
the total conduction losses of the switches of T are more than double those of
TS . It can be concluded that this implementation of the bidirectional switch is not
favorable.
Considering the anti-parallel connection of Fig. 4.15b), the conduction losses
of one bidirectional switch of T is
PS,T

2
= 2 VCE ISuavg(l=1) + Ron ISurms
As in the previous implementation, the total average and rms currents of the unidirectional switch of T over a line cycle were calculated to be 13.5% higher and 25%
lower, respectively, than those of the six-switch VSC. Based on this, the conduction
losses of the bidirectional switches of T can be rewritten in terms of the conduction
losses of TS

PcS,T = 6 VCE 1.122ITS ,Savg + Ron 1.135IT2 S ,Srms 1.13PcS,TS
concluding that the total conduction losses of the three bidirectional switches (implemented by anti-parallel reverse-blocking IGBTs) are approximately 13% higher
than the conduction losses of the six switches of TS . The practical implementation
of Fig. 4.15b) is a more favorable implementation.
The comparison would be in favor of T if true bidirectional switches would
become available in the future. The rms current of a bidirectional switch of T is
only 6% higher than that of an unidirectional switch of TS . When the number of
switches in each topology is taken into account (three bidirectional switches versus six unidirectional switches) and assuming that the conduction losses of a true
bidirectional switch can be approximated by Ron IS2rms , the losses of the bidirectional
switches are 44% lower than those of TS .
4.4.2
Diode Loss Comparison

Since the diodes in T dont conduct any current during the zero vector inter-
vals, the selection of the modulation method has no influence on the diode losses.
102
The diodes of the conventional six-switch VSC, however, conduct current during the
zero vector intervals. This leads to higher rms and average diode currents in the
six-switch VSC than in T .
The conduction losses of the bridge diodes for all the rectifier topologies are
defined as
PcD = 6 Von IDavg + ron ID2 rms
(4.23)
Using (4.18) and (4.19) for the diodes of rectifier T and (4.20) and (4.21) for the
diodes of TS , the total rms and average currents of the diodes of T over a line cycle
were calculated to be 85% and 75% of those in the six-switch VSC, respectively.
Considering (4.23) as the conduction losses of the diodes of TS , the conduction
losses of the diodes of T can be written in terms of the conduction losses of TS

PcD,T = 6 Von 0.75ITS ,Davg + ron (0.85ITS ,Drms )2 0.75PcD,TS
concluding that the total conduction losses of the diodes of T are approximately
75% of the conduction losses of the diodes of TS .
With the results of the switch losses and diode losses, it can be concluded
that the additional losses of the switches of T are compensated by the lower losses
in the diodes, making T and the six-switch VSC practically identical. When true
bidirectional switches become available, rectifier T will be the more efficient choice.
4.4.3
Validity of the Lumped Stress Equations

Analytical expressions (4.10), (4.18), and (4.19) were obtained under the as-
sumption that the switching frequency is sufficiently high compared to the fundamental frequency such that each subsector contains the same exact number of
switching periods. To determine the accuracy of the analytical expressions when
this assumption is violated, that is, when the switching frequency is relatively low
compared to the fundamental frequency, a simulation of T was performed at two
different switching frequencies (10 kHz and 1 kHz). The analytical results were computed and compared to the simulation results in Table 4.5. The analytical results
are within 1-3% of the simulated values in both cases, hence the expressions are
perfectly acceptable for practical use.
103
Table 4.5: Analytical and simulated switch and diode current of T .

Currents
Analytical Simulation (fs = 10 kHz) Simulation (fs = 1 kHz)
Switch (rms)
12.75 A
12.75 A
12.61 A
Diode (rms)
17.02 A
17.08 A
17.39 A
Diode (avg)
8.28 A
8.27 A
8.37 A
4.5
Common-Mode Voltage Comparison

Common-mode voltage is the primary excitation for common-mode currents
(electromagnetic interference) and bearing currents in electric machines fed by PWM

converters [81] [79] [82]. The dv/dt of the common-mode voltage causes the circulation of currents through the parasitic capacitances of the PWM converter and
bearings of the machine, deteriorating the insulation of the bearings and leading to
machine failure. This section presents a brief analysis of the common-mode voltage
generation mechanism in T and compares it with that of the six-switch VSC.
Using the middle of the dc-link as the reference point, the common-mode
voltage appearing at the ac terminals of a three-phase PWM converter is defined as
vcm (t) =
vca (t) + vcb (t) + vcc (t)

3
(4.24)
In the six-switch VSC, the converter voltages can assume either +Vdc /2 or
Vdc /2 depending on whether the high- or low-side switch of the corresponding leg
of the converter is conducting. When any of the six active vectors is applied, two of
these three voltages will have the same sign, while the other will have the opposite
sign. Therefore, the resulting common-mode voltage for the active vector intervals
is either +Vdc /6 or Vdc /6. The same occurs in T whenever an active vector is
applied.
However, the common-mode voltages of the two topologies during the zerovector intervals are entirely different from each other. In the case of the six-switch
VSC, a zero vector is formed by simultaneously closing either the three high-side
switches or the three low-side switches, thus connecting the three outputs of the
converter to the same potential. The resulting common-mode voltage is, therefore,
either +Vdc /2 or Vdc /2. In the case of T , a zero vector is formed by simultane-
ously closing any two or all three of the ac-side switches, which consequently ceases
current flow through the diode bridge. The instantaneous values of the converter
104
voltages during the zero vector interval will depend entirely on the reverse blocking
characteristics of the six diodes D1 -D6 of Fig. 3.1a). If all six diodes are identical,
each diode will block half of the dc-link voltage such that vca (t), vcb (t), and vcc (t)
relative to the middle of the dc-link will be equal to zero. As a result, T will produce no common-mode voltage whenever a zero vector is applied. This reduces the
maximum common-mode voltage from Vdc /2 in TS to Vdc /6 in T . The commonmode voltages of the two topologies are compared in Fig. 4.16 for a portion of a
fundamental cycle.
TD
Vdc/6
t
-Vdc/6
TS
Vdc/2
Vdc/6
-Vdc/6
-Vdc/2
Figure 4.16: Comparison of common-mode voltage generated by rectifier T (upper diagram) and the six-switch VSC (lower diagram).
Considering that differences exist among real devices due to the fabrication
process, the reverse blocking characteristics of the diodes may not be identical, as
illustrated and magnified in Fig. 4.17. In this case, the mid-point of each diode
phase leg in T may not be exactly at the same potential as the middle of the
dc-link during the zero vector interval. The differences, however, will be small. By
applying a zero vector to T , the mid-points of the three diode phase legs are shorted
together by the ac switches. The resulting parallel connection of the diodes reduces
the effects of any mismatch among the individual reverse blocking characteristics.
A laboratory set-up was used to verify the converter voltages during the zero
vector intervals. The dc outputs of the Toshiba 50Q6P43 three-phase diode bridge
105
_
VD1
+
_
irv
VD1
VD4
irv
VD4
+
a)
b)
Figure 4.17: a) One leg of the diode bridge during the zero vector interval
and b) magnified view of the reverse bias characteristic of
two mismatched diodes of a leg of the diode bridge.
were connected to a 42 V dc source with a mid-point. The measurement probes
present a lower internal resistance than the off resistance of the diodes. Directly
measuring the voltage across the diode would not allow accurate results since the
resistance of the probe would prevail over that of the diode. Therefore, a Wheatstone bridge configuration, as presented in Fig. 4.18, was used. In this set-up, the
measurement probe would only measure voltage in the case of any mismatch between the diodes of a leg. In the case of no mismatch the voltage between the two
mid-points would be zero, indicating equal voltage distribution across the diodes.
The 10 k resistor was arbitrarily chosen to prevail over the internal resistance of
the probe. The voltage measured at the middle of the leg, Vm , is given by
10k
Vm =
2
1
1
Ru Rl
(4.25)
where Ru and Rl are the off resistances of the upper and lower diodes, respectively.
The laboratory tests, as expected, revealed no difference in the voltages across the
reverse biased diodes, therefore, justifying the assumption of zero common-mode
voltage during the zero vector intervals of T .
4.6
Conclusions
Among the three rectifier topologies studied, rectifier T was found to be
the most favorable in terms of switching and conduction loses. It was shown that
closing all three bidirectional switches in T when a zero vector is required results in
minimum conduction losses. The switching losses are identical for TS , TY , and T ,
106
Vo
2
Vm
10 kW
Vo
2
Figure 4.18: Laboratory test set-up.

independent of the modulation strategy implemented in T . The total combined
losses of the three bidirectional switches of T is about 13% higher than that of
the six switches in the conventional VSC when anti-parallel reverse-blocking IGBTs
are used to implement the bidirectional switches. Additionally, the losses of the
diodes of T were found to be only 75-80% of those in the conventional VSC. It
can be concluded that the additional losses of the switches of T are compensated
by the lower losses in the diodes, making T (with unidirectional switches forming
the bidirectional switches) and the six-switch VSC practically identical. When true
bidirectional switches become available in the future, rectifier T will be the more
efficient choice for the rectification stage of the power electronics interface.
Common-mode voltages generated by rectifiers T , TY , and TB were also
analyzed and were shown to be only one third in magnitude of those generated by
the six-switch VSC. This is a major advantage of these rectifier topologies when it
comes to electromagnetic interference and the generation of bearing currents. The
use of these rectifier topologies with ac-side bidirectional switches can significantly
improve the reliability of the generator of a wind energy system.
107
CHAPTER 5
Harmonic Cancellation Effects in Interleaved Three-Phase
Voltage-Source Converters
The inversion stage of the proposed power electronics interface is envisioned
to be shared by multiple wind turbines of a wind farm. Due to the limitations
of existing semiconductor technologies, the energy extracted from the wind will be
too high to be processed by a single voltage-source converter. Therefore, multiple
voltage-source converters connected in parallel and operated in an interleaved fashion
are proposed as the inversion stage. Each paralleled converter module processes only
a fraction of the total power extracted from the wind, which reduces the stress on
the switches, reduces losses, and increases the reliability of the system. Through
interleaving, harmonic cancellation occurs, which reduces the filtering requirements
on the ac-side of the converter.
A systematic study of the effects of interleaving on three-phase voltage-source
converters (VSC) will be presented. Analytical results will be developed for the
spectra of the converters phase currents, common-mode voltages, and dc-link current for the general case of interleaving N parallel modules with a common dc-link.
It will be shown, both analytically and numerically, that ripple cancellation effects
similar to what have been widely observed in buck dc-dc converters can also be
achieved by proper interleaved operation of N three-phase VSC modules. This will
be shown to be true not only for the ac phase currents, as previously known, but
also for the common-mode voltage as well as the dc-link current. Analytical results
will also be presented for the high frequency inter-module circulating current that
results from voltage imbalances among the interleaved modules.
5.1
Literature Overview
Interleaving is a technique to operate parallel connected converter modules
with phase-shifted gate control signals. A successful application of the technique is

in voltage regulator modules (VRM) for powering microprocessors. A VRM consisting of N parallel buck converters is also called a N- phase or N-channel buck
108
converter. The optimal interleaving strategy for a N-channel buck converter is to

shift the carrier signal for the ith phase (i = 2, 3, ...N) from that of the first phase
by (i 1)Ts /N, where Ts is a switching period. Figure 5.1 presents the optimal in-
terleaving strategy for carrier signals ci (t) where i = 1, 2, . . . , N. This strategy leads
to maximum cancellation of the switching ripple. The ripple cancellation effects
resulting from interleaving allows a smaller output filter inductor and capacitor to
be used, enabling the realization of wide bandwidth control of the output voltage,
which is essential for VRM.
t
c1(t)
Ts/N
c2(t)
2Ts/N
c3(t)
(i-1)Ts/N
ci (t)
Figure 5.1: Phase-shifted carrier signals for N interleaved modules.

Interleaving has also been employed in ac-dc and dc-ac converters. For example, it has been applied to reduce input current ripple of boost single-phase and
three-phase PFC converters. The ripple cancellation effects in these applications
were demonstrated by experimental or numerical simulation results, mostly limited
to two parallel modules [83] [84]. It has been generally assumed that the optimal
interleaving strategy that works for dc-dc converters is also optimal for ac-dc or dcac converters. However, this is not an obvious parallel, especially, considering the
constantly varying duty ratio in these converters. In three-phase converters without a neutral connection, each phase current also depends on the other two phase
voltages due to neutral coupling, which further complicates the ripple cancellation
effects among parallel modules.
In [85] a theoretical basis for the analysis of harmonic cancellation effects in
three-phase voltage-source converters (VSCs) was established. The analysis, based
on a method called pulse train decomposition, confirmed that phase-shifting the gate
109
signal of the ith module (i = 2, 3, ...N) from that of the first module by (i 1)Ts /N
will result in maximum cancellation of ac phase currents among N parallel VSC

modules.
Extensive analytical work has been done for a single voltage-source converter
(VSC) module employing different modulation strategies [59]. The parallel connection of VSC modules without interleaving has also been the subject of extensive
analysis [83] [86] [87] [88], especially regarding the reduction of low frequency intermodule circulating currents. The inter-module circulating current can be decomposed into two components: a high frequency ripple and a low frequency component. The high frequency inter-module circulating current, often referred to as zero
sequence current [87] [88], is a result of voltage differences among the paralleled
modules and has been attributed to the zero vector intervals.
The low frequency inter-module circulating current is a result of imbalances
among the modules due to construction, impedance mismatches, delays in the control and drive circuitries, among others. This current is the source of losses and can
present high magnitudes which could potentially damage the converter. Mitigation
methods have been proposed in the literature [87], [88], and [89]; however, the analyses were for parallel modules without considering interleaving. The low frequency
circulating current will be the topic of Chapter 6.
The chapter will provide a systematic study of the effects of interleaving in
three-phase VSCs. The general case of interleaving N identical VSC modules, as
depicted in Fig. 5.2, will be considered and the interleaving method mentioned previously will be applied. Analytical results will be presented for phase currents ia ,
ib , and ic , the inter-module circulating current, the common-mode voltage, and dclink current idc in the frequency domain to reveal their spectra and the effects of
interleaving. Using these analytical results, we will demonstrate that interleaving N
VSC modules will result in the cancellation of harmonics at the following multiples
of the switching frequency (fs ) as well as their sidebands: (kN +i)fs , k = 0, 1, ... and
i = 1, 2, ..., N 1, such that only multiples of Nfs and their sideband components
remain. We will show that such harmonic cancellation effects not only occur in the
ac phase currents, as shown in the literature, but also in the common-mode voltage
as well as the dc-link current, which were previously unknown.
The analysis developed in this chapter was later generalized to the cases of
110
idc
...
Vdc
2
vca1
vca2
...
vcaN
vcb1
vcb2
...
vcbN
vcc1
vcc2
vccN
Vdc
2
ia1
ia2
iaN
ib1
ib2
ibN
ic1
ic2
icN
ib
vsb
ia
vsa
ic
vsc
vN
Figure 5.2: A three-phase voltage-source converter using N parallel modules.

regular and irregular asymmetric interleaving in [90] using the double Fourier series
method. It was concluded in [90] that the results of this disseration hold not only
under symmetric interleaving (presented here) but also harmonic injected PWM.
5.2
General Considerations
With reference to Fig. 5.2, the interleaved VSC is assumed to be connected
to balanced three-phase ac sources (vsa , vsb , and vsc ) through an inductor in each
phase leg. The ac sources are considered to be the angular references. Each threephase module is assumed to be controlled by naturally sampled carrier-based PWM
without harmonic injection. This is the case where the harmonic content of each
phase voltage can be described by an analytical expression. The analysis presented
assumes double-edge modulation. The neutral of the ac circuit is assumed to be
floating relative to the mid-point of the dc-link and the voltage between them is
designated vN .
111
The starting point for the analysis is the converter voltage spectrum derived
in [59] by using the double Fourier series method. For phase a of the k th module
(k = 1, 2, ...N), this voltage can be written as
X
X
Vdc
vcak (t) =
M cos (1 t + 1 ) +
Cmn cos [m (c t + ck ) + n (1 t + 1 )]
2
m=1 n=
(5.1)
where
Cmn
h
2Vdc
i
=
Jn m M sin (m + n)
m
2
2
and 1 is the initial phase angle of the reference voltage for the carrier-based modulator, M is the modulation index defined as the ratio of the amplitude of the reference
voltage to that of the carrier, N is the number of parallel VSC modules, c is the
switching (or carrier) frequency, 1 is the fundamental frequency, m is the multiplier of the switching frequency, n is the multiplier of the fundamental frequency,
and Jn (x) is the Bessel function of the first kind [59]. The converter output voltages in phases b and c can be obtained by adding 2/3 and 2/3 to 1 in (5.1),
respectively.
Phase angle ck in (5.1) defines the initial phase of the carrier signal for the k th
module and is measured at the carrier frequency. In general, the three phases of a
VSC module use the same carrier, such that this angle is the same for each module.
Interleaving is implemented by varying this angle from module to module, effectively
phase-shifting the carriers of different modules. For the optimal interleaving strategy
discussed before, the carrier signals for two adjacent modules are shifted from each
other by 1/N of a carrier cycle, such that
c(k+1) = ck +
2
N
Without loss of generality, we assume that the initial carrier phase angle for the first
module is zero, such that
ck =
2
(k 1)
N
112
5.3
Common-Mode Voltage
The common-mode voltage is the basis for the derivation of the current equa-
tions. The common-mode voltage determines the coupling among the interleaved
modules and is the driving force for the harmonic cancellation effect among the currents of the interleaved modules. The total common-mode voltage of the interleaved
system is the sum of the converter voltages, (5.1),
vcm (t) =
N
1 X vcak (t) + vcbk (t) + vcck (t)
N k=1
3
(5.2)
The sum of the fundamental frequency components is equal to to zero since

they are phase-shifted by 120o

2
2
Vdc
M cos (1 t + 1 ) + cos 1 t + 1
+ cos 1 t + 1 +
= 0.
6
3
3
This leaves only the sum of the multiples of the carrier frequency and their
sideband components. Using the trigonometric function
cos (A B) = cos A cos B sin A sin B
(5.3)
to expand the cos [m (c t + ck ) + n (1 t + 1 )] terms of the converter voltages and

collecting the common terms, yields

N

2
X
1 X X X Cmn
2i
vcm (t) =
cos [m (c t + ck )]
cos n 1 t + 1 +
N k=1 m=1 n=1 3

3
i=0

2
X
2i
sin [m (c t + ck )]
sin n 1 t + 1 +
3
i=0
The sums of the phase-shifted carrier signals
N
X

2
cos [m (c t + ck )] = cos (mc t) + cos m c t +
+ ...
N
k=1

2
. . . + cos m c t +
(N 1)
N
113
and
N
X

2
sin [m (c t + ck )] = sin (mc t) + sin m c t +
+ ...
N
k=1

2
. . . + sin m c t +
(N 1)
N
will only be non-zero for N multiples of m (i.e. m = N, 2N, 3N, . . .) and yield
N
X
cos [m (c t + ck )] = N cos (mc t)
(5.4)
sin [m (c t + ck )] = N sin (mc t) .
(5.5)
k=1
and
N
X
k=1
The sums of the 120o phase-shifted multiples of the fundamental frequency

will only be non-zero for triple multiples of n and yield
2
X

2i
cos n 1 t + 1 +
= 3 cos [n (1 t + 1 )]
3
2
X

2i
sin n 1 t + 1 +
= 3 sin [n (1 t + 1 )]
3
i=0
and
i=0
The common-mode voltage is
m=N,2N,... n=0,3,6,...
Cmn {cos (mc t) cos [n (1 t + 1 )] sin (mc t) sin [n (1 t + 1 )]}
and can be simplified by using (5.3), resulting in

vcm (t) =
Cmn cos [mc t + n (1 t + 1 )] .
(5.6)
m=N,2N,... n=0,3,6,...
The expression above shows that the harmonic components in the spectrum of
the common-mode voltage for a VSC consisting of N interleaved modules appear in
bands, each centered at N multiples of the carrier frequency. The harmonic sideband
components around these center frequencies are located at triple multiples of the
114
fundamental frequency. When compared to the un-interleaved case (corresponding

to N = 1), it can be concluded that interleaving effectively eliminates the harmonics
centered at (kN + i) fs , k = 0, 1, ... and i = 1, 2, ..., N 1 and their sidebands
components.
To verify the analytical model of (5.6), the VSC circuit shown in Fig. 5.2 is
simulated to determine the spectrum of the common-mode voltage using different
numbers of interleaved modules. The SABER schematic for the case of two interleaved VSC modules is presented in Fig. 5.3. The parameters of each VSC module
are as follows: f1 = 60 Hz, fs = 5 kHz. The dc-link voltage is 400 V and is represented by a constant dc voltage source. The amplitude of the ac source voltage is 160
V. The modulation index is 0.8 and is maintained the same for different numbers of
interleaved modules. The phase angle of the reference voltage for the carrier-based
modulator of phase a (1 ) is 2.702o .The phase output inductance is selected to be
N 1 mH, where N is the number of interleaved modules, with an equivalent series
resistance equal to 20 m. The change in the inductance value with the number
of interleaved modules is intended to maintain a constant total fundamental output

current for the given modulation index. Ideal switches are used in the simulation.
Numerical simulation results for the common-mode voltage are presented in
Fig. 5.4 for N = 1, 2, and 3 modules to provide a visual understanding of the
harmonic cancellation effects. For N = 1, the harmonics are centered at 5 kHz and
its integral multiples (10 kHz, 15 kHz, etc.). Of these sidebands, those centered
at odd multiples of the carrier frequency are eliminated when two modules are
interleaved, leaving only the sidebands centered at Nfs (10 kHz, 20 kHz, etc.).
In the case of three interleaved modules, the remaining sidebands are centered at
the triple multiples of the carrier frequency (15 kHz, 30 kHz, etc.). The remaining
harmonics in both cases are identical to those of the un-interleaved case (N = 1).
These observations are consistent with the predictions of (5.6).
Table 5.1 presents the comparison of the analytical results of (5.6) and the
simulation results for two and three interleaved modules. The analytical model
accurately predicts the magnitude of the remaining harmonic components and, thus,
confirms the analysis.
115
Power Stage
vh
S11
S12
va
vca1
S13
ampl:160
freq:60
phs:0
2mH
200
vca1
200
S14
vcc1
vcb1
S15
vb
vcb1
vN
2mH
S16
ampl:160
freq:60
phs:-120
2mH vc
vcc1
vl
ampl:160
freq:60
phs:120
vh
S21
S22
S23
vcb2
vca2
S24
S25
va
vca2
vcc2
2mH
vb
vcb2
2mH
S26
vc
vcc2
2mH
vl
Pulse-Width Modulators
va_ref
vb_ref
ampl:0.80047
freq:60
phs:-2.702
Comp
SET
vc_ref
vtri1
Comp
SET
Modulation signals
vb_ref
vtri1
Comp
SET
S11 S15 S12 S16 S13
va_ref
vtri1
Comp
SET
S14
vc_ref
vtri2
Comp
vb_ref
vtri2
Comp
SET
S21 S25 S22 S26 S23
va_ref
vtri2
SET
S24
Carrier Signals
vtri1
vc_ref
ampl:0.80047
freq:60
phs:-122.702
ampl:0.80047
freq:60
phs:-242.702
vtri2
ampl:1
period:0.2m
delay:0
ampl:1
period:0.2m
delay:0.1m
Figure 5.3: SABER simulation schematic for two interleaved VSC modules.
5.4
AC Phase Current
Each phase current (ia , ib , ic ) of the interleaved VSC output is the combination
of the N inductor currents of the same phase. Figure 5.5a) presents the equivalent
116
N=1
[dBV]
60
40
20
0
20
40
N=2
[dBV]
60
40
20
0
20
40
N=3
[dBV]
60
40
20
0
20
40
10
15
20
25
30
f [kHz]
35
40
45
50
Figure 5.4: Spectra of the common-mode voltage of N interleaved VSCs.
m
N
2N
3N
Table 5.1: Common-mode voltage harmonic amplitudes.

N =2
N =3
n
f [Hz] Analytical Simulation f [Hz] Analytical Simulation
0 10,000
0
0
15,000
34.12 V
34.16 V
3 10,180
27.89 V
28.04 V
15,180
0
0.029 V
6 10,360
0
0
15,360
3.13 V
3.19 V
0 20,000
0
0
30,000
0
0.018 V
3 20,180
22.93 V
22.76 V
30,180
11.16 V
11.26 V
6 20,360
0
0
30,360
0
0.023 V
0 30,000
0
0
45,000
3.11 V
2.96 V
3 30,180
11.16 V
11.27 V
45,180
0
0.01 V
6 30,360
0
0
45,360
6.61 V
6.67 V
circuit for phase a. The inductors of the N modules are identical and the converter
voltages of the parallel modules can be represented as a single voltage source, as
presented in the simplified equivalent circuit of Fig. 5.5b).
With the source neutral floating, the common-mode voltage defined by (5.6)
appears as neutral voltage vN (relative to the middle of the dc-link), vN = vcm . The
phase a current, ia , is derived from the voltage across the inductor of the simplified
equivalent circuit of Fig. 5.5b),
L d
vca1 (t) + vca2 (t) + . . . + vcaN (t)
ia (t) =
vcm (t) vsa (t).
N dt
N
117
...
vcaN
(vca1+vca2+...+vcaN)/N
vca2
vca1
ia1
ia2
L ...
iaN
L/N
vN
ia
vsa
vN
ia
vsa
a)
b)
Figure 5.5: a) Equivalent circuit of phase a for N interleaved modules

and b) the simplified equivalent circuit.
The fundamental component of the current is determined by vsa (t) = Vpk cos (1 t)
and the sum of the fundamental components of the converter voltages, but is of no
interest for the harmonic analysis here.
The harmonic components of the phase current are determined by the difference between the common-mode voltage and the sum of the converters voltages.
The sum of the converter voltages
N
vca1 (t) + . . . + vcaN (t)

1 XX X
=
Cmn cos [m (c t + ck ) + n (1 t + 1 )]
N
N k=1 m=1 n=
(5.7)
presents the same structures as (5.4) and (5.5), thus, eliminating all multiples of the
carrier frequency that are not multiples of N.
Subtracting the common-mode voltage of (5.6) from (5.7)
m=N,2N,...
n=
Cmn cos [mc t + n (1 t + 1 )]
Cmn cos [mc t + n (1 t + 1 )]
n=0,3,...
cancels the triples multiples of the fundamental frequency of (5.7), thus leaving only
118
the 3n 1 multiples of the fundamental frequency,
X
X
L d
ia,h (t) =
Cmn cos [mc t + n (1 t + 1 )]
N dt
m=N,2N,... n=
(5.8)
(3n1)
The cancellation of the triple multiples of the fundamental frequency is expected

due to the lack of a neutral connection in the circuit.
Integrating the voltage across the inductor of Fig. 5.5b) given by (5.8) yields
the harmonics contained in the phase a current of the converter
ia,h (t) =
m=N,2N,... n=
(3n1)
Cmn
N
sin [mc t + n (1 t + 1 )]
(mc + n1 ) L
(5.9)
The harmonics currents of phases b and c can be obtained by replacing 1 in (5.9)

by 1 2/3 and 1 + 2/3, respectively.
The sideband components that remain in the phase current spectrum are cen-
tered around N multiples of the carrier frequency, which is similar to the spectral
structure of the common-mode voltage. The triple multiples of the fundamental frequency are absent in the phase current, which is expected since the source neutral is
floating. Figure 5.6 compares the ac phase current spectra for the cases of N = 1, 2,
and 3 interleaved modules obtained through numerical simulation (Fig. 5.3). The
effects of interleaving on the phase current are the same as on the common-mode
voltage: For N interleaved modules, the harmonics in each phase current are centered at N multiples of the carrier frequency, which remain the same in magnitude
as those in the un-interleaved case (N = 1).
simulation results of Fig. 5.6. It can seen that the analytical model accurately
predicts the magnitudes of the remaining harmonic components.
Increasing the carrier frequency of a single-module VSC by N times eliminates
the same sideband harmonics as interleaving N parallel modules. However, the
remaining harmonics in the two cases are different. The phase a current harmonics
119
[dBA]
N=1
0
50
100
[dBA]
N=2
0
50
100
[dBA]
N=3
0
50
100
10
15
20
25
30
f [kHz]
35
40
45
50
Figure 5.6: Spectra of the ac phase current of N interleaved VSCs.
m
N
2N
3N
n
1
2
5
1
2
5
1
2
5
Table 5.2: Ac phase current

N =2
f [Hz] Analytical Simulation
10,060
0.995 A
0.992 A
10,120
0
0
10,300 0.0393 A
0.0396 A
20,060
0.167 A
0.168 A
20,120
0
0
20,300
0.132 A
0.133 A
30,060
0.033 A
0.034 A
30,120
0
0
30,300
0.062 A
0.061 A
harmonic amplitudes.
N =3
f [Hz] Analytical Simulation
15,060
0
0
15,120
0.371 A
0.369 A
15,300
0
0
30,060
0.033 A
0.034 A
30,120
0
0
30,300
0.062 A
0.061 A
45,060
0
0
45,120 0.0072 A
0.0066 A
45,300
0
0
for a single-module VSC is

ia,h (t) =
m=1 n=
(3n1)
Cmn
1
sin [mc t + n (1 t + 1 )]
(mc + n1 ) L
and is similar to the phase a current for N parallel modules of (5.9), with the
exception of the values of m and a factor of N multiplying expression (5.9). For
a single-module VSC, the phase current presents harmonic sidebands centered at
every multiple of the switching frequency, while for N parallel modules, the harmonic
sidebands are centered at N multiples of the switching frequency. Table 5.3 presents
120
the results for the phase current of a single-module VSC and for the same singlemodule VSC operating at twice the switching frequency (this case uses the same
inductance value to maintain a constant total fundamental output current for the
given modulation index). It can be seen that doubling the switching frequency
eliminates the same sidebands as in the case of two interleaved modules of Table 5.2
(N = 2). However, the harmonics that remain in the case of a single-module VSC
operating at twice the switching frequency are different from the interleaved case.
The harmonics that remain in the case of a single-module VSC are the even sideband
components centered around the odd multiples of the carrier frequency and the odd
sidebands components centered around the even multiples of the carrier frequency
[85] independent of the carrier frequency. These remaining harmonic components
do not always coincide with those of the interleaved case. Furthermore, for the
frequencies that appear in both the single-module VSC (fs = 10 kHz) and the
interleaved VSC (N = 2, fs = 5 kHz), the amplitudes are different. This is due to
the modulation coefficient (Cmn ) which is different for the two cases because of the
values of m. As an example, consider the harmonic component at 20,060 Hz which
remains in both the single-module VSC (fs = 10 kHz) and the interleaved VSC
(N = 2, fs = 5 kHz) current spectra. For the single-module VSC, this component is
generated by m = 2 and n = 1 while for the interleaved VSC it is generated by m =
2N = 4 and n = 1. The difference in the values of m results in different modulation
coefficients and, consequently, different harmonic component magnitudes.
Table 5.3: Ac phase current
Single-module VSC
m n
(fs = 5 kHz)
f [Hz]
ia
-2 4,880
1.440 A
1 2 5,120
1.371 A
4 5,240
0.047 A
-1 9,940
1.003 A
2 1 10,060
0.992 A
5 10,300
0.041 A
-2 14,880
0.375 A
3 2 15,120
0.369 A
4 15,240
0.219 A
121
harmonic amplitudes.
Single-module VSC
(fs = 10 kHz)
f [Hz]
ia
9,880
0.713 A
10,120
0.695 A
10,240
0.024 A
19,940
0.499 A
20,060
0.497 A
20,300
0.021 A
29,880
0.186 A
30,120
0.184 A
30,240
0.111 A
5.5
Inter-Module Circulating Current

An important issue in paralleling VSCs is the current imbalance among the
modules which was addressed in [87], [88], and [89]. The high frequency current
imbalance is generated by voltage differences among the non-isolated parallel VSC
modules and leads to circulating current among the parallel modules.
The current flowing through the inductors of the interleaved VSC can be decomposed into an inter-module circulating current and a current that flows out of
the module to compose the phase current. The inter-module circulating current,
denoted as iik for the current circulating between the ith and k th modules, is the
current that flows between the dc-link and the phase inductors and does not contribute to the transfer of power to the load. As mentioned previously, this current
is a result of the non-isolated paralleling of the VSC modules and is excited by the
voltage differences among the modules.
The module output current, denoted as i , is the current from each module that
flows from the source to the load and composes the phase current. Figure 5.7 presents
the equivalent circuit of phase a for two, three, and N interleaved modules. The
inductor currents and phase current are decomposed into inter-module circulating
and module output currents in the figure. For the case of N interleaved modules, the
inter-module circulating currents are represented as summations for neatness sake.
Note that in this representation iik = iki .
vca2
ia
ia
iD12
2ia
vca2
vca2 i
a
iD13 3i
a
ia
ia
vca3
iD12+iD13+...+iD1N
iD12
iD23
ia
Nia
iD21+iD23+...+iD2N
...
vca1
vca1 i
a
...
vca1
vcaN i
a
iDN1+iDN2+...+iDN(N-1)
a)
b)
c)
Figure 5.7: Definition of the inter-module circulating and module output currents for a) two, b) three, and c) N interleaved VSC
modules.
122
The phase a inductor current of the k th module can be represented as

iak (t) = i (t) +
N
X
iik (t),
(5.10)
i=1
i6=k
where the summation includes all of the N 1 circulating currents flowing through
the inductor. The module output current is defined as
X
X
1
ia (t)
i (t) =
=
Cmn
sin [mc t + n (1 t + 1 )] (5.11)
N
(mc + n1 ) L
m=N,2N,... n=
(3n1)
The module output current for phases b and c can be obtained by adding 2/3
and 2/3 to 1 , respectively.
In the case of two interleaved modules, Fig. 5.7a), the inductor currents are
ia1 (t) = i (t) + i12 (t)
ia2 (t) = i (t) i12 (t)
and the single inter-module circulating current, i12 , can be easily calculated by
subtracting the two inductor currents, resulting in
i12 (t) =
ia1 (t) ia2 (t)

.
2
(5.12)
For any more than two interleaved modules, defining the inter-module circulating currents becomes more difficult since there will be N 1 inter-module circulating
currents flowing among the modules. The case of three interleaved modules, as pre-
sented in Fig. 5.7b), will be used to explain how the inter-module circulating currents
are defined for these cases and the results will be extended to N interleaved modules.
The inductor currents for the case of three interleaved modules are
ia1 (t) = i (t) + i12 (t) + i13 (t)
(5.13)
ia2 (t) = i (t) i12 (t) + i23 (t)
(5.14)
ia3 (t) = i (t) i13 (t) i23 (t)
(5.15)
where i12 is excited by the voltage difference between vca1 and vca2 , i13 is excited
123
by the voltage difference between vca1 and vca3 , and i23 is excited by the voltage
difference between vca2 and vca3 . The converter voltages (vca1 , vca2 , vca3 ) can assume
only one of two values: Vdc /2 or Vdc /2, which means that at any given instant at
least two of these voltages will be the same.
The three voltage loops in the circuit are computed

d
[ia1 (t) ia2 (t)]
dt
d
vca1 (t) vca3 (t) = VL1 (t) VL3 (t) = L [ia1 (t) ia3 (t)]
dt
d
vca2 (t) vca3 (t) = VL2 (t) VL3 (t) = L [ia2 (t) ia3 (t)]
dt
vca1 (t) vca2 (t) = VL1 (t) VL2 (t) = L
and substituting the inductor currents of (5.13), (5.14), and (5.15), results in
d
vca1 (t) vca2 (t)
= 2 i12 (t) +
L
dt
vca1 (t) vca3 (t)
d
= 2 i13 (t) +
L
dt
vca2 (t) vca3 (t)
d
= 2 i23 (t)
L
dt
d
i13 (t)
dt
d
i12 (t) +
dt
d
i12 (t) +
dt
d
i23 (t)
dt
d
i23 (t)
dt
d
i13 (t)
dt
(5.16)
(5.17)
(5.18)
There are two possible cases for the converter voltages:

1) vca1 (t) = vca2 (t) = vca3 (t): In this case, equations (5.16), (5.17), and (5.18)
result in zero and the sum of the derivatives of all of the circulating currents
are equal to zero. In other words, the circulating currents are dc currents
whose values are determined by their initial conditions.
2) Two voltages are equal and different from the third: Since the converter voltages of two modules are the same, the derivative of the circulating current
between these modules is equal to zero. This results in the slopes of the circulating currents between the two modules and the third module being the same
since they present the same excitation (e.g., for vca1 (t) 6= vca2 (t) = vca3 (t),
the excitations for circulating currents i12 and i13 are vca1 (t) vca2 (t) =
vca1 (t) vca3 (t)). However, their instantaneous values are different due to
their respective initial conditions.
The derivatives will be either zero or equal to the difference between the con-
124
verter voltages
d
vca1 (t) vca2 (t)
i12 (t) =
dt
3L
vca1 (t) vca3 (t)
d
i13 (t) =
dt
3L
vca2 (t) vca3 (t)
d
i23 (t) =
dt
3L
(5.19)
(5.20)
(5.21)
for any value of vca1 (t), vca2 (t), and vca3 (t) (Vdc /2 or Vdc /2). This expression can
be further simplified by using the voltage across the inductor (refer to Fig. 5.5a)).
Expressing it in terms of the converter voltages
vca1 (t)
vsa (t) vcm (t)
d
= ia1 (t) +
+
L
dt
L
L
vca2 (t)
d
vsa (t) vcm (t)
= ia2 (t) +
+
L
dt
L
L
vca3 (t)
d
vsa (t) vcm (t)
= ia3 (t) +
+
L
dt
L
L
(5.22)
(5.23)
(5.24)
Substituting (5.22), (5.23), and (5.24) into (5.19), (5.20), and (5.21) and solving the differential equations yields
ia1 (t) ia2 (t)
3
ia1 (t) ia3 (t)
i13 (t) =
3
ia2 (t) ia3 (t)
i23 (t) =
3
i12 (t) =
(5.25)
(5.26)
(5.27)
Note that the definitions of the inter-module circulating currents resemble the
definition of the inter-module circulating current for the case of two interleaved
modules (5.12). The only difference is that the divisor changed from 2 to 3, which
reflects the increase in the number of interleaved modules.
Extending the results of (5.25), (5.26), and (5.27) to the case of N interleaved
modules, the current circulating between any two modules of the VSC is defined as
iik (t) =
iai (t) iak (t)

N
(5.28)
where iai (t) and iak (t) are the phase a inductor currents of the ith and k th modules.
125
The inductor current harmonics of the k th module is

iak (t) =
[vcak (t) vsa (t) vcm (t)] dt

X
X
2
Cmn
iak (t) =
sin m c t +
(k 1) + n (1 t + 1 )
(mc + n1 ) L
N
m=1 n=
(5.29)
Using the general definition for the inter-module circulating current of (5.28),
it is now possible to derive the expression for the harmonic components of the intermodule circulating current. Substituting the inductor current equation of (5.29) into
(5.28) for modules k and i of an N module interleaved converter yields

X
X
Cmn
1
2
iik (t) =
sin m c t +
(i 1) + n (1 t + 1 )
N (mc + n1 ) L
N
m=1 n=

2
sin m c t + (k 1) + n (1 t + 1 )
N
Applying the appropriate trigonometric identities and rearranging the resulting
sine terms, yields the inter-module circulating current
iik (t) =
h
X
1
i
2Cmn
sin m (i k)
N (mc + n1 ) L
N
m=1 n=
h

i
cos m c t + (i + k 2)
+ n (1 t + 1 )
N
(5.30)
simulation results for two and three interleaved modules. In both cases the analytical
model accurately predicts the magnitudes of the remaining harmonic components.
Figure 5.8 presents the ripple cancellation effect of the ac phase current and the
generation of the inter-module circulating current for two interleaved VSC modules
over a quarter of a line cycle. As mentioned previously, the inter-module circulating
current is excited by the difference between the converter voltages. In the case of
two interleaved modules, the difference corresponds to vca1 (t) vca2 (t), as presented
in Fig. 5.8a). In the vicinity of the zero crossing of the phase current, the voltage
difference is maximum, i.e. the intervals during which vca1 (t) = vca2 (t) are minimum. Consequently, the generated inter-module circulating current is maximum
126
Table 5.4: Inter-module circulating current harmonic amplitudes.

N =2
N =3
m n
0 10,000
2.604 A
2.597 A
15,000
1.002 A
1.000 A
N 2 10,120
0.683 A
0.686 A
15,120
0.263 A
0.264 A
4 10,240
0.023 A
0.024 A
15,240
0.009 A
0.009 A
0 20,000
0
0
30,000
0
0
2N 1 20,060
0
0
30,060
0.191 A
0.191 A
3 20,180
0
0
30,180
0.084 A
0.084 A
0 30,000
0.181 A
0.181 A
45,000
0
0
3N 2 30,120
0.186 A
0.185 A
45,120
0
0
4 30,240
0.109 A
0.110 A
45,240
0
0
(Fig. 5.8b)). At zero crossing the duty cycle of the two modules is 0.5. Since the
carrier signals of the two modules are phase-shifted by 180o , the inductor currents
are 180o out of phase. All of the ripple current of the inductor currents is due to
the inter-module circulating current and the ac phase current presents virtually no
ripple.
In the vicinity of the peak of the phase current, the voltage difference is minimum, i.e. the intervals during which vca1 (t) = vca2 (t) are maximum. The generated
inter-module circulating current is minimum. Most of the current ripple of the inductor currents is due to the module output current, thus, the current ripple in the
ac phase current is substantial.
5.6
Inductor Current
The manner in which the inductor current harmonics were decomposed in the
previous section leads one to conclude that the harmonics that are cancelled in the
combined output, i.e., the phase current, correspond to the inter-module circulating
current. To confirm this qualitative conclusion, the inductor current harmonics will
be analyzed analytically and the spectrum will be confirmed through simulation.
The inductor current harmonics were decomposed in (5.10) into the sum of two
terms: the sum of the N 1 inter-module circulating currents and the module output
current. The latter was given in (5.11). The former is the sum of the inter-module
circulating currents flowing between the ith module and all of the other modules for
127
a)
[V]
500
0
500
b)
[A]
5
0
[A]
c)
30
20
10
0
ia
0.492
0.4925
0.493
0.4935
0.494
t (s)
ia1
0.4945
ia2
0.495
0.4955
Figure 5.8: a) Voltage difference between the converter voltages of phase

a, b) inter-module circulating current, c) inductor currents
ia1 and ia2 and phase a current for a quarter of the line cycle
and N = 2.
a given phase
N
X
iik (t) =
k=1
k6=i
N X
X
h
2Cmn
i
sin m (i k)
N (mc + n1 ) L
N
k=1 m=1 n=
k6=i
h
i

cos m c t + (i + k 2)
+ n (1 t + 1 ) .
N
Using the trigonometric identity of (5.3) to expand the cosine term, yields
N
X
k=1
k6=i
sin [m (i k)]
h
i
cos [n (1 t + 1 )]
cos m c t + (i + k 2)
N

h
i
sin m c t + (i + k 2)
sin [n (1 t + 1 )] .
N
The multiplication of the sine and cosine terms that contain multiplier m can be
simplified by trigonometric identities
cos (A + B) + cos (A B)
2
sin (A + B) + sin (A B)
sin A cos B =
2
cos A cos B =
128
(5.31)
(5.32)
resulting in

1
2 (i 1)
2 (k 1)
cos [n (1 t + 1 )] sin m c t +
sin m c t +
2
N
N

2 (k 1)
2 (i 1)
sin [n (1 t + 1 )] cos m c t +
cos m c t +
N
N
The effects of the summation in k will now be evaluated: The summation in
k causes the terms in (i 1) to appear N 1 times in the expression. The terms in
(k 1) have a similar structure as (5.4) and (5.5), such that
N 1
, for m 6= N, 2N, 3N, . . .
2 (k 1)
=
cos
h
i
N
cos 2m(i1)
, for m = N, 2N, 3N, . . .
k=1
N
N
X
k6=i
and
N 1
, for m 6= N, 2N, 3N, . . .
2 (k 1)
=
sin
h
i
N
sin 2m(i1)
, for m = N, 2N, 3N, . . .
k=1
N
N
X
k6=i
The summation in k is eliminated and the expression simplifies to

N 1
2 (i 1)
sin m c t +
+ n (1 t + 1 ) +
2
N
1N sin [mc t + n (1 t + 1 )] , for m = N, 2N, . . .

2
+
h

i
1 sin m c t + 2(i1) + n (1 t + 1 ) , for m 6= N, 2N, . . .

2
N
The above expression is equal to zero if m = N, 2N, . . .. Therefore, the sum of the
inter-module circulating currents is
N
X
k=1
k6=i
iik (t) =
m=1
m6=N,2N,...

Cmn
2 (i 1)
sin m c t +
+ n (1 t + 1 )
(mc + n1 ) L
N
n=
129
The resulting inductor current harmonics of the ith module are

iai (t) =
m=N,2N,... n=
(3n1)
X
X
m=1
m6=N,2N,...
Cmn
1
sin [mc t + n (1 t + 1 )] +
(mc + n1 ) L

2 (i 1)
Cmn
+ n (1 t + 1 )
sin m c t +
(mc + n1 ) L
N
n=
(5.33)
which is equivalent to (5.29).

Figure 5.9 presents the spectra of the current through a phase a inductor, the
inter-module current, and the ac phase current for two interleaved modules. The
inductor current of (5.33) presents sidebands at all of the multiples of the carrier
frequency, as can be verified in Fig. 5.9a). Interleaving multiple modules cancels
the inter-module circulating currents in the ac phase current, resulting in a spectrum
with sidebands at N multiples of the carrier frequency, i.e., the ac phase current is
the result of the module output current components of the N inductor currents. The
inter-module circulating currents correspond to the harmonics that are cancelled in
the combined ac phase current.
[dBA]
a)
0
50
100
[dBA]
b)
0
50
100
[dBA]
c)
0
50
100
0
10
15
20
25
f [kHz]
30
35
40
45
50
Figure 5.9: Spectra of the a) inductor current, b) inter-module circulating current, and c) phase a current for the case of N = 2.
130
5.7
DC-Link Current
The dc-link current is the sum of all of the inductor currents of each module
multiplied by their respective switching functions

idc (t) =
N
X
vcak (t)
Vdc
k=1
1
+
2
iak (t) +
vcbk (t) 1
+
Vdc
2
ibk (t) +
vcck (t) 1
+
Vdc
2
ick (t).
The term containing the sum of the ac phase current

N
X
1
k=1
[iak (t) + ibk (t) + ick (t)]
is equal to zero since they are phase-shifted from each other by 120o. Therefore, the
dc-link current can be simplified to
idc (t) =
N
X
vcak (t)
k=1
Vdc
iak (t) +
vcbk (t)
vcck (t)
ibk (t) +
ick (t).
Vdc
Vdc
The dc-link current can be decomposed into four terms:

1) The dc component resulted from the product of the fundamental components
of the inductor currents and the converter voltages
Idc =

N
X
Ipk M
k=1
2N

2
2
+ cos 1 t
cos (1 t + ) cos (1 t) + cos 1 t
+
3
3

2
2
+ cos 1 t +
+ cos 1 t +
3
3
and is simplified to
3
Idc = Ipk M cos
4
(5.34)
where Ipk is the amplitude of the fundamental component of the ac phase

current and is the phase angle of the fundamental component of the current
relative to the source voltage.
2) A second term represented by idc2 (t) and defined as the product of the fundamental component of the inductor currents and the harmonics of the converter
131
voltages:

N X
N
X
X
Cmn I1
idc2 (t) =
cos (1 t + ) cos [m (c t + ck ) + n (1 t + 1 )] +
NV
dc
k=1 m=1 n=

2
2
+ cos m (c t + ck ) + n 1 t + 1
+
+ cos 1 t
3
3

2
2
+ cos 1 t +
+ cos m (c t + ck ) + n 1 t + 1 +
3
3
Terms cos [m (c t + ck ) + n (1 t + 1 )] can be expanded by using the trigonometric identity of (5.3).

N X
N
X
X
Cmn I1
cos [m (c t + ck )] cos (1 t + ) cos [n (1 t + 1 )] +
NVdc
k=1 m=1 n=

2
2
+ cos 1 t
+ cos n 1 t + 1
+
3
3

2
2
+ cos n 1 t + 1 +
+ cos 1 t +
3
3

sin [m (c t + ck )] cos (1 t + ) sin [n (1 t + 1 )] +

2
2
+ cos 1 t
+ sin n 1 t + 1
+
3
3

2
2
+ cos 1 t +
+ sin n 1 t + 1 +
.
3
3
The results of (5.4) and (5.5) are applied and the summation in k is eliminated.
The cos (1 t + ) cos [n (1 t + 1 )] and cos (1 t + ) sin [n (1 t + 1 )] terms in
the braces can be simplified by using the trigonometric identities of (5.31) and
(5.32), resulting in

1
2 (n + 1)
cos (mc t) cos [(n + 1) 1 t + n1 + ] 1 + 2 cos
+
2
3

2 (n 1)
+ cos [(n 1) 1 t + n1 ] 1 + 2 cos
3

2 (n + 1)
sin (mc t) sin [(n + 1) 1 t + n1 + ] 1 + 2 cos
+
3

2 (n 1)
+ sin [(n 1) 1 t + n1 ] 1 + 2 cos
.
3
Terms cos (2 (n + 1) /3) and cos (2 (n 1) /3) will only be non-zero for 3n1
132
multiples of the fundamental frequency.

Using the trigonometric identity of (5.3) to simplify the expression, the second
term of the dc-link current is
X
Cmn I1
idc2 (t) =
2Vdc
m=N,2N,... n=
(3n1)

2 (n + 1)
1 + 2 cos
cos (mc t + (n + 1) 1 t + n1 + ) +
3

2 (n 1)
cos (mc t + (n 1) 1 t + n1 )
+ 1 + 2 cos
3
(5.35)
3) A third term represented by idc3 (t) and defined as the product of the fundamental component of the converter voltages and the harmonics of the inductor
currents:
idc3 (t) =
N X
N
X
X
k=1
Cmn M
2 (mc + n1 ) L
m=1 n=

cos (1 t + 1 ) sin [m (c t + ck ) + n (1 t + 1 )] +

2
2
+
+ cos 1 t + 1
sin m (c t + ck ) + n 1 t + 1
3
3

2
2
+ cos 1 t + 1 +
sin m (c t + ck ) + n 1 t + 1 +
3
3
The derivation of the third term is almost identical to that of the second term,
resulting in
idc3 (t) =
NCmn M
4 (mc + n1 ) L
m=N,2N,... n=

(3n1)

2 (n + 1)
1 + 2 cos
sin [mc t + (n + 1) (1 t + 1 )] +
3

2 (n 1)
+ 1 + 2 cos
sin [mc t + (n 1) (1 t + 1 )] (5.36)
3
4) A fourth term represented by idc4 (t) and defined as the product of the harmonics of the inductor currents and the harmonics of the converter voltages.
133
Due to the fact that each set of harmonics is a summation, the product of the
harmonic components would follow the distributive property
(x1 + x2 + . . . ) (y1 + y2 + . . .) = x1 y1 + x1 y2 + . . . + x2 y1 + x2 y2 + . . .
making it virtually impossible to solve without the aid of numerical solvers.
However, it is possible to derive a general form for the fourth term considering
that mv and nv are the multipliers of the converter voltage expression and mi
and ni are the multipliers of the inductor current, such that
idc4 (t) =
N X
N
N
X
X
X
k=1 mv =1 mi =1 nv
X
Cmv nv
Cmi ni
Vdc (mi c + ni 1 ) L
= n =
i
cos [mv (c t + ck ) + nv (1 t + 1 )] sin [mi (c t + ck ) + ni (1 t + 1 )]
(5.37)
is the contribution of phase a to the fourth term of the dc-link current. The
contributions of phases b and c present the same form as (5.37) with 2/3
and 2/3 added to 1 , respectively. The phase b and c terms are added to
(5.37) to compose the complete fourth term of the dc-link current.

Using trigonometric identity
cos A sin B =
1
[sin (A + B) sin (A B)]
2
the contribution of each phase to idc4 can be simplied to

1
2
sin [(mv + mi ) (c t + ck ) + (nv + ni ) (1 t + )]

sin [(mv mi ) (c t + ck ) + (nv ni ) (1 t + )]
The terms in (nv + ni ) and (nv ni ) will only be non-zero for (nv + ni ) =
134
0, 3, 6 . . . and (nv ni ) = 0, 3, 6 . . .. This simplifies the expression to
sin [(mv + mi ) (c t + ck )] cos [(nv + ni ) 1 t] +
+ cos [(mv + mi ) (c t + ck )] sin [(nv + ni ) 1 t] , for (nv + ni ) = 0, 3 . . .
3
2
sin [(mv mi ) (c t + ck )] cos [(nv ni ) 1 t]
cos [(mv mi ) (c t + ck )] sin [(nv + ni ) 1 t] , for (nv ni ) = 0, 3 . . .
The summation in k eliminates the multiples of the carrier frequency that are
not (mv + mi ) = N, 2N . . . and (mv mi ) = N, 2N . . . as in (5.4) and (5.5).
The fourth term of the dc-link current is
idc4 (t) =
m ,m =1... n
Cmv nv 3NCmi ni
2LVdc (mi c + ni 1 )
,n =
v i
v i
sin [(mv + mi ) c t + (nv + ni ) (1 t + 1 )]
sin [(mv mi ) c t + (nv ni ) (1 t + 1 )]
mv + mi = N, 2N, . . . ,
nv + ni = 0, 3, 6, . . .
mv mi = N, 2N, . . . ,
nv ni = 0, 3, 6, . . .
otherwise
(5.38)
Equations (5.34), (5.35), (5.36), and (5.38) show that the harmonic spectral
structure of the dc-link current is similar to that of the common-mode voltage: The
harmonic components of the dc-link current are also centered at N multiples of the
carrier frequency, and within each of these sidebands, only harmonics at frequencies
that are not triple multiples of the fundamental frequency are present. The effects
of interleaving are also reflected in the elimination of all sidebands that are not
centered at N multiples of the carrier frequency.
To verify (5.34), (5.35), (5.36), and (5.38), Fig. 5.10 shows the spectra of idc
for the simulated VSC considering different numbers of interleaved modules. The
harmonic cancellation effects discussed above can be clearly observed. Table 5.5
tabulates the amplitudes of the dominant harmonics in the dc-link current obtained
135
from the analytical model and the simulation. The analytical results are difficult
to obtain without the use of numerical software since theoretically infinite combinations of m and n compose each harmonic component. A program was developed in
Mathematica to calculate the magnitudes of the dominant harmonics of the dc-link
[dBA]
40
20
0
20
40
60
[dBA]
40
20
0
20
40
60
[dBA]
current spectra and can be found in Appendix E.
40
20
0
20
40
60
N=1
N=2
N=3
10
15
20
25
30
f [kHz]
35
40
45
50
Figure 5.10: Spectra of the dc-link current of N interleaved VSCs.
Table 5.5: Dc-link current harmonic amplitudes.

N =2
N =3
9,640
0.244 A
0.218 A
14,820
2.086 A
2.087 A
10,000
9.602 A
9.618 A
15,000
0A
0A
10,360
0.259 A
0.243 A
15,180
2.416 A
2.404 A
19,640
1.180 A
1.100 A
29,640
0.802 A
0.842 A
20,000
3.201 A
3.203 A
30,000
1.084 A
1.091 A
20,360
1.257 A
1.264 A
30,360
0.955 A
0.990 A
29,640
0.776 A
0.772 A
44,460
0.526 A
0.549 A
30,000
1.048 A
1.062 A
45,180
0.219 A
0.211 A
30,360
0.932 A
0.924 A
45,540
0.596 A
0.619 A
5.8
Conclusions
Previous work in the literature had analyzed the harmonic cancellation effects
of 2 or 3 interleaved voltage-source converter modules through numerical simulation

136
and experimentation. Their focus was limited to the ac phase currents.

A comprehensive study of ripple cancellation effects resulting from the interleaved operation of N parallel three-phase VSC modules was presented. Analytical
expressions were developed for the common-mode voltage, the ac phase currents,
the dc-link current, as well as the current imbalance among the modules, i.e., the
inter-module circulating currents. The analytical results not only confirmed the
ripple cancellation effects in the phase currents, as previously shown in the literature through simulation and experimentation, but also showed that the same effects
occur in the common-mode voltage as well as the dc-link current. The analytical
results also provide a simple method to determine the remaining harmonics in the
spectra of these variables. Numerical simulation results were presented to validate
the analytical expressions.
Although naturally sampled double-edge modulation was assumed, the results
can be generalized to any carrier-based modulation method. Most modulation methods applied to voltage-source converters do not present a closed-form analytical expression for the converter voltages due to the mathematical complexity when the
modulation signal contains harmonics. However, this problem was avoided in [90]
by rearranging the terms of the double Fourier integral. The paper generalized the
conclusions obtained here for symmetric interleaving to harmonic injected PWM.
137
CHAPTER 6
Low Frequency Circulating Current Characteristics of
Current Control Techniques for Parallel Voltage-Source
Converter Modules
The low frequency inter-module circulating current is a practical problem resulting from the nonisolated connection of voltage-source converter modules in parallel. The low frequency circulating current is not possible to predict since it is
generated by differences in physical components of the circuit. Despite this impass,
the current control technique being implemented can be evaluated as to its response
to circulating current and whether or not modifications need to be incorporated into
the current control to suppress it.
The focus of this chapter is on characterizing the low frequency circulating
current of different current control techniques. The two most popular linear current
control methods will be briefly analyzed as to their capability of rejecting circulating current. Circulating currents under the nonlinear average current control
method of [53] will be analyzed. Different implementations of the control method
will be analyzed as to their low frequency circulating current characteristics. The
master/slave implementation will be used for the experimental testing of the two
interleaved VSCs.
6.1
Literature Overview
In theory, two identical voltage-source converter modules in parallel should
operate in a decoupled manner with the possibility of harmonic cancellation and

the presence of high frequency inter-module circulating current depending on the
phase-shift among the carrier signals; however, due to the differences that exist
among practical modules (differences in impedances, switching frequencies, control
and drive circuitries, etc.), a low frequency current that is confined among the modules is generated. This low frequency circulating current finds a path through the
ac- and dc-side connections of the modules and is virtually impossible to accurately
predict. Its magnitude is limited by the impedances of the converters and the control
138
strategy being used. If the latter is ineffective in sensing and controlling the circulating current, the current can reach high magnitudes due to the low impedances
in its path (semiconductor devices and filter inductors). The result of uncontrolled
circulating current is increased losses and potential damage to the semiconductor
devices.
The reduction and/or elimination of the low frequency circulating current can
be addressed by either modifying the topology or assuring that the current control
strategy can handle the circulating current. Modifications to the topology concentrate on eliminating the path of the circulating current. This can be achieved by
removing the ac-side connection by adding line frequency isolation transformers (Fig.
6.1a)) [92] or by removing the dc-side connection by isolating the dc sources (Fig.
6.1b)) [91]. Both solutions decouple the modules, thus, eliminating the imbalance
problems. However, providing isolation to the converter modules is expensive and
bulky.
vsa vsb vsc
vsa vsb vsc
Vdc1
Vdc2
.
.
.
.
.
.
VdcN
a)
b)
Figure 6.1: Isolated parallel voltage-source converter configurations: a)

with low frequency transformers and b) separate dc power
supplies.
In most cases, power density is a major concern in the design of a system; this
favors the non-isolated topologies and implies that the current control strategy must
139
be capable of reducing or suppressing any low frequency circulating current that may
exist. In some cases, the control of a stand-alone voltage-source converter can be
applied to the parallel converters without any added circuitry or modifications to
the control. This is the case of hysteresis control used in [92] to control two parallel
voltage-source converter modules. This technique confines the phase currents within
a predetermined band. The results of the parallel operation of the converters presents
no circulating current.
However, if low frequency circulating current exists in the non-isolated system,
measures have to taken to handle the problem. The literature has approached this
problem from three different viewpoints: 1) the control principle remains the same
but the implementation is slightly modified to handle the circulating current; 2)
the parallel voltage-source converters are treated as a single unit, either in a master/slave configuration or as a multilevel converter; 3) a completely new current
control scheme is developed. In all cases, the low frequency circulating current is
successfully reduced or completely eliminated.
The first approach was used in [87], [89], and [95] to suppress the low frequency
circulating current when pure dq control is used. Dq current control assumes a balanced system; the circulating current appears on the zero axis which is perpendicular
to the plane. Therefore, pure dq control cannot reject the circulating current.
In [89] independent dq0 current controllers were designed for each voltage-source
converter module to eliminate the circulating current. In [87] and [95] SVM with
60o clamping and dq control were used. Interleaving two VSC modules resulted in a
low frequency circulating current that was excited at every sector transition where,
for example, one converter operated in Sector II with zero vector v0 {0 0 0} while
the other converter still operated in Sector I with zero vector v7 {1 1 1}. A solution
was developed which consisted of eliminating the zero vectors from the modulation
strategy. The zero vector intervals were distributed among the active vectors and
their complimentary active vectors (e.g., the complimentary vector of voltage vector
v1 {1 0 0} is v4 {0 1 1}).
The second approach of the literature treats the parallel voltage-source con-
verter modules as a single unit by either implementing a master/slave control scheme

or treating the modules as a multilevel converter. In [88] a variation of SVM with
60o clamping was proposed using a master/slave configuration for the control. The
140
modulation strategy was designed to synchronize the zero vectors of the converters
in order to eliminate pure zero sequence current (i.e., circulating current generated
by opposite zero vectors v0 and v7 ). The master converter would determine the
zero vector that would be used in the sector and would force the slave to use the
same zero vector. In order to minimize the switching losses, the switching pattern
of the slave converter would be different from that of the master. For example, if
the reference voltage vector were in Sector I, the master converter would use the
sequence v1 v2 v7 v2 v1 and would impose the use of zero vector v7 on
the slave converter. To minimize switching losses, the slave converter would use the
sequence v5 v6 v7 v6 v5 .
The multilevel converter approach was proposed in [94] for two interleaved
voltage-source converter modules. The method was developed in the space-vector

domain where the average value of the zero sequence current was controlled to be less
than a predetermined limit. This was achieved by selecting the appropriate voltage
vector based on the measurement of the phase currents and their derivatives.
The third approach is to develop a new control strategy specifically designed
to handle the low frequency circulating current. This is the case of [96] in which
an algorithm to bring the current error within a desired range was proposed. The
inductor currents were measured and transformed into dq0 components. The error of
these components were determined by comparing them with their reference values.
If the errors were outside of the boundary layer, the control would act to bring the
error within the boundary layer. Once the errors were corrected, normal operation
ensued with constant switching frequency.
The remainder of this chapter focuses on characterizing low frequency circulating current of different current control strategies. Three control methods will be
analyzed: abc control, dq control, and the nonlinear average current control of [53].
As will be shown, the nonlinear average current control method cannot be directly
applied to parallel voltage-source converters. Two of the approaches observed in
the literature will be implemented to handle the low frequency circulating current
problem: master/slave control configuration and the incoporation of modifications
to the control.
141
6.2
Circulating Current Decomposition and Definitions

In general terms, circulating current is defined as a current that flows between
two interconnected modules causing additional losses and no power transfer to the
load. This definition is broad and encompasses currents of diverse and distinct
origins. In the case of parallel voltage-source converters, the circulating current can
be visualized by subtracting the inductor currents of the same phase (refer to Section
5.5). This circulating current can be decomposed into three terms according to their
origin:
High frequency inter-module circulating current - The subject of Section 5.5,
this current is composed of switching ripple resulting from instantaneous volt-
age differences between the parallel modules. Its presence can increase the
current ripple of the filter inductors, when compared to the case of a single
module; however, the additional losses are generally inconsequential to the
overall losses of the system, since the current only partially affects the switching losses of the semiconductors, the core loses of the inductors, and the rms
losses of the dc-link capacitor.
Inherent low frequency circulating current - This circulating current is inherent
to the chosen control strategy and presents a bounded magnitude, usually only
a small fraction of the desired module output current. It adds to the overall
losses of the system but is generally not a concern.
Low frequency imbalance circulating current - or simply, imbalance current. As

its name suggests, this current is generated by physical imbalances among the
parallel modules (impedances, control and drive circuitry, etc.). It is virtually
impossible to fully predict before experimentation since modeling every component of the prototype in detail can be exhaustive and difficult; furthermore,
the added complexity of the models can be counterproductive in obtaining a
reasonable simulation result. The amplitude of this current can reach potentially destructive magnitudes and requires action on the part of the control
to reduce and/or eliminate it. It is the main concern of paralleling converter
modules since it generates the largest losses of the three circulating currents
described here.
142
6.3
Linear Current Control Methods

The two most popular linear current control methods for stand-alone voltage-
source converters are abc current control and dq current control. These methods will
be briefly analyzed as to their low frequency circulating current characteristics when
two VSC modules operate in parallel.
6.3.1
Abc Current Control

Abc current control is the traditional time domain current control technique
for stand-alone voltage-source converter modules. The method consists of sensing

the inductor currents and comparing them to reference currents. The error signal
is compensated by the current controller (Hc (s)) and the output of the controller is
compared to the carrier signal to generate the drive signals of the switches. Figure
6.2 presents a simplified schematic of the control strategy for module k. The main
disadvantage of abc current control is the inherent tracking error, i.e., the controller
is unable to perfectly track the sinusoidal references in both amplitude and phase.
iak
ibk
ick
iaref
_
Sa Sb Sc
Hc(s)
+
_
Hc(s)
+
_
Hc(s)
+
_
ibref
_
icref
_
Carrier Signal
Figure 6.2: Simplified schematic of the abc current control.
The proportional-integral (PI) compensator is the most commonly used com143
pensator for abc current control. The pole at zero minimizes low frequency error and
the proportional gain and zero placement have direct consequences on the current
ripple [56]. The slope of the output of the controller cannot exceed that of the carrier signal, otherwise multiple crossings of the modulation and carrier signals may
occur. This is achieved by limiting the bandwidth of the controller to a fraction of
the switching frequency.
Consider two voltage-source converters connected in parallel each employing
independent abc current controllers. The average model of the parallel converters
and the block diagram for phase a are presented in Fig. 6.3, where Kik is the current
sensing gain of the k th module. The converter voltages are represented by their low
frequency components and the phase dependency is represented by neutral voltage
vN . The current loops of the converters share the same reference signals.
Consider that the three phases of a module are identical and that differences
exist between the two modules such that
L1 6= L2
Hc1 (s) = Hca1 (s) = Hcb1 (s) = Hcc1(s) 6= Hc2 (s) = Hca2 (s) = Hcb2 (s) = Hcc2(s)
Ki1 = Kia1 = Kib1 = Kic1 6= Ki2 = Kia2 = Kib2 = Kic2
From Fig. 6.3a), the differential equation is
vca1 (t) L1
d
ia1 (t) vsa (t) vN (t) = 0.
dt
Applying the Laplace transformation yields

Vca1 (s) sL1 Ia1 (s) Vsa (s) VN (s) = 0.
(6.1)
The converter voltage of (6.1) can be substituted by

Vca1 (s) = [Iaref (s) Ki1 Ia1 (s)] Hc1 (s)P W M
obtained from Fig. 6.3b), which results in
[sL1 + Ki1 Hc1 (s)P W M] Ia1 (s) = Hc1 (s)P W MIaref (s) Vsa (s) VN (s).
144
(6.2)
vca1
vsa
vcb1
vsb
vN
vcc1
vsc
vca2
vcb2
vcc2
a)
Ki1
PWM
_
+
Hc1(s)
Vdc
2
1
15
Vca1(s)
+
1
sL1
Ia1(s)
+
Iaref(s)
Vsa(s)
PWM
+
_
Hc2(s)
1
15
Vdc
2
Vca2(s)
Ia(s)
1
sL2
Ia2(s)
Ki2
b)
Figure 6.3: a) Average model of the parallel VSC modules and b) block
diagram of the current loop for phase a.
The neutral voltage for two parallel VSC modules is defined as
VN (s) =
2
X
Vcak (s) + Vcbk (s) + Vcck (s)
k=1
145
which, upon substituting (6.2) for each phase, yields

PWM
Hc1 (s) {Iaref (s) + Ibref (s) + Icref (s) Ki1 [Ia1 (s) + Ib1 (s) + Ic1 (s)]} +
6

+Hc2 (s) {Iaref (s) + Ibref (s) + Icref (s) Ki2 [Ia2 (s) + Ib2 (s) + Ic2 (s)]}
The sum of the reference currents is equal to zero. Since the three phases of a module
are identical and identically different from the phases of the other module, the sum
of the inductor currents also equals zero. Therefore,
VN (s) = 0.
In Chapter 5, the neutral voltage was defined as vN (t) = vcm (t). The commonmode voltage is composed solely of harmonic components centered at the switching
frequency and its multiples. The validity of the average model presented here is
limited to low frequencies. The neutral voltage is, therefore, zero in this frequency
range of interest.
The inductor current of phase a for each module is
Hc1 (s)P W M
1
Iaref (s)
Vsa (s)
sL1 + Ki1 Hc1(s)P W M
sL1 + Ki1 Hc1 (s)P W M
Hc2 (s)P W M
1
Ia2 (s) =
Iaref (s)
Vsa (s)
sL2 + Ki2 Hc2(s)P W M
Ia1 (s) =
(6.3)
(6.4)
which are similar to results obtained in [98] for a single VSC module. Applying
the inverse Laplace transform and plotting the inductor current of the first module
against the reference current, the tracking error is evident, Fig. 6.4. The phase a
inductor current of the second module will present a similar tracking error.
The difference between (6.3) and (6.4) is the low frequency circulating current

1
Hc1 (s)P W M
Hc2 (s)P W M
I (s) =
Iaref (s)
2 sL1 + Ki1 Hc1 (s)P W M

1
1
1
Vsa (s)
2 sL1 + Ki1 Hc1 (s)P W M
If the modules are identical the tracking errors are identical. The circulating current
is in fact the difference between the tracking errors of the two modules. Therefore,
146
10
iaref(t)
ia1(t)
-5
- 10
0
0.01
0.02
0.03
0.04
Figure 6.4: Phase a inductor current of Module 1 and reference current.

the circulating current is inherent to this current control technique but it is predictable and bounded.
6.3.2
Dq Current Control
Dq current control is the traditional current control technique in the space-
vector domain for stand-alone voltage-source converter modules. This control technique was explained in detail in Appendix C for the closed-loop operation of alternative topology T .
Dq current control assumes a balanced three-phase system, thus, making it
possible to ignore the zero axis component. This is a valid assumption for a standalone voltage-source converter module; however, when modules are connected in
parallel the system is no longer balanced due to the presence of circulating currents.
The low frequency circulating currents are projected onto the zero axis of the 0
space. Figure 6.5 illustrates this problem. A circulating current of magnitude equal
to 10% of the inductor current is considered to exist only in phase a of a two module
system. The dq current control will only affect the projection onto the plane
of this 3D current trajectory. Any effort by the traditional dq current controller to
control the low frequency circulating current is in vain since it is not reflected onto
the plane. A separate zero axis controller is necessary to eliminate circulating
147
currents. This control strategy does not suffer from tracking error problems as the
abc current control, therefore, the circulating currents can be successfully eliminated
through proper compensator design [89].
0
0.1
0.05
0
-0.05
-0.1
0.5
0.5
-0.5
-0.5
-1
b
-1
a
Figure 6.5: Inductor current space vector trajectory in the 0 space.
6.4
Nonlinear Average Current Control

The nonlinear average current control technique of [99], [100], and [101] was
proposed for single-phase power factor correction. This control technique uses the
switch current as a feedback signal for controlling the average value of the inductor
current since the inductor and switch currents are equal during the conduction time
of the switch. There is no compensator, which makes this control strategy less
sensitive to switching noise and does not limit the bandwidth and, consequently, the
current control performance [100].
This control technique was extended to the three-phase voltage-source converter in Patent Disclosure [53]. In the case of the voltage-source converter, the
dc-link current is measured instead of the switch current, since it minimizes the
number of sensors while still obtaining the necessary information for controlling the
three inductor currents. This is a significant advantage over traditional current control methods that generally require that the three inductor currents be sensed using
148
expensive Hall-effect current sensors. A brief description of the control method of

Patent Disclosure [53] will be presented in the following section. The method will
then be extended to the case of two interleaved voltage-source converter modules.
6.4.1
Control Strategy Description for a Single VSC Module

For the nonlinear average current control strategy, it is convenient to define the
sector transitions at the zero crossing instants of the source voltages, as presented in
Fig. 6.6a) [4]. Observing the voltages of each sector, a clear pattern can be detected:
one voltage is always maximum (vm ), one voltage always decreases to zero (vp ), and
one voltage always increases from zero (vn ). For example, in Sector I, source voltage
vsb has the largest absolute magnitude and is, therefore, defined as vm ; voltage vsa
increases from zero to 86 % of its amplitude and is defined as vn ; voltage vsc decreases
from 86 % of its amplitude to zero and is defined as vp . The voltage definitions of
each sector are summarized in Table 6.1.
vsa(w1t)
vsb(w1t)
vsc(w1t)
vp ip
vp vn
Sp
vm
vn in
w1t
idc
Sn
Dp
Vdc
Dn
vm
I
II
60
III
120
IV
180
240
VI
V
o
300
360
a)
b)
Figure 6.6: a) Sector definitions and b) equivalent circuit of a single

voltage-source converter module.
Table 6.1: Definitions of vp , vn , and vm per sector [4].

Sector
Voltage
I
II
III IV
V
VI
vm
vsb vsa vsc vsb vsa vsc
vp
vsc vsb vsa vsc vsb vsa
vn
vsa vsc vsb vsa vsc vsb
149
The nonlinear average current control method takes advantage of the dependency of the phase currents (ia + ib + ic = 0) to define the conduction of the switches.
At any instant in time, a phase current can be expressed as the sum of the two other
phase currents
ia = ib ic
ib = ia ic
ic = ia ib
Therefore, only two currents need to be actively controlled. This is achieved by
turning on one of the two switches associated with voltage vm and keeping it on
throughout the entire sector (i.e., the upper switch of the leg conducts if vm is
positive or the lower switch of the leg conducts if vm is negative). The switch that
conducts during the entire sector is denominated Sm .
Maintaining Sm on leaves only the four switches of the other two legs to be
controlled. These switches are associated with voltages vp and vn . The voltagesource converter, under these conditions operates as two single-phase PFC boost
converters [4], as presented in the equivalent circuit of Fig. 6.6b), where Sp and Dp
compose the switch leg associated with vp and Sn and Dn compose the switch leg
associated with vn . The switch definitions for each sector and the associated duty
cycles are summarized in Table 6.2, where dl is the long duty cycle and ds is the
short duty cycle and dl and ds are their compliments, respectively. As in the case of
the single-phase PFC boost converter, the duty cycles are related to the conduction
time of the boost switches (Sp and Sn ) and their compliments are related to the
conduction time of the boost diodes (Dp and Dn).
Table 6.2: Definitions of Sp , Dp , Sn , Dn , Sm , and associated duty cycles
[4].
Sector
Duty Cycle Switch
I
II III IV V VI
1
Sm
S5 S1 S6 S2 S4 S3
dl
Sp
S6 S2 S4 S3 S5 S1
dl
Dp
S3 S5 S1 S6 S2 S4
ds
Sn
S4 S3 S5 S1 S6 S2
ds
Dn
S1 S6 S2 S4 S3 S5
150
Depending on the combination of the four controlled switches (Sp , Dp , Sn , and

Dn ), the dc-link current will be composed of different combinations of phase currents
ip and in (Fig. 6.6b)). In any given sector the dc-link current will present the shape
shown in Fig. 6.7. When both boost diodes Dp and Dn conduct during ds Ts , the
dc-link current is the sum of ip and in . When current in is commutated to boost
switch Sn , the dc-link current is composed of only ip until the end of dl Ts . When
both boost switches Sp and Sn conduct, the dc-link current is zero.
Sn
Dp
Dn
Dp
Sn
Sp
idc
ip
in
Ts
ds Ts
ds Ts
dl Ts
dl Ts
Figure 6.7: Dc-link current of a stand-alone voltage-source converter.

Figure 6.8 illustrates the implementation of the nonlinear average current control technique applied to the three-phase voltage-source converter. In essence, the
control uses the dc-link current to control the conduction time of the boost diodes,
ds Ts and dl Ts . This is achieved by sensing the dc-link current by means of a sensing
resistor. The measured voltage (vidc ) is compared to reference voltage vr (defined
in Patent Disclosure [53]) and the error is integrated. The integrator is reset every
switching cycle when boost diode Dp is turned off, i.e., when dl Ts is complete.
The integrated error is then compared to the long control signal (vcl ) and to
the short control signal (vcs ), defined in Patent Disclosure [53]. The results of these
comparisons yield the long and short duty cycles and their compliments, which are
used to drive the switches of the converter.
Figure 6.9 presents the simulation result of the phase a current of a standalone voltage-source converter module operating under the nonlinear average current
151
ia
S1
S2
S3
vsa
ib
vsb
Vdc
ic
vsc
S4
S5
dl
vidc
S6
idc
Rsense
vidc +
_
+
vcl
vr
vr
+
_
vcl
vcs
I II III IV V VI
Flip-Flop
dl
dl
Clock
I II III IV V VI
vcs
+
_
Flip-Flop
ds
ds
Figure 6.8: Implementation of the nonlinear average control strategy.

control method.
6.4.2
Interleaved Voltage-Source Converters using the Nonlinear Average Current Control Technique
The nonlinear average current control was extended to the case of two inter-
leaved voltage-source converters (Fig. 6.10). The definitions of Tables 6.1 and 6.2
are still valid; however, as will be shown in the following sections, the dc-link current
will be affected by the imbalance circulating current and inherent circulating current
which will require alterations to the single module implementation of Fig. 6.8.
For the case of a single VSC module, each switch conducts for an entire sector.
For two interleaved VSC modules, two switches will conduct, one from each mod152
10
5
0
5
10
0.084
0.086
0.088
0.09
0.092
t(s)
0.094
0.096
0.098
0.1
Figure 6.9: Phase a current of a voltage-source converter operating with

the nonlinear average current control.
ule. For the sectors defined in Fig. 6.6a), Fig. 6.11a) highlights voltage vm and the
corresponding Sm switch of each module. For example, in Sector I, voltage vm is vsb .
Therefore, switches S15 and S25 conduct throughout the entire sector. By always
maintaining two switches on during each sector, the parallel converters operate as
four single-phase PFC boost converters, as presented in Fig. 6.11b) for Sector I. This
equivalent circuit is similar to that of Fig. 6.6b); however, note that when S15 and
S25 conduct, the filter inductors of phase b are in parallel, thus, L/2.
Consider that each inductor current can be decomposed into a module output
current component and a circulating current component (which encompasses the
three definitions of Section 6.2)
ia1 (t) = ia (t) + ia (t)
ia2 (t) = ia (t) ia (t)
ib1 (t) = ib (t) + ib (t)
ib2 (t) = ib (t) ib (t)
ic1 (t) = ic (t) + ic (t)
ic2 (t) = ic (t) ic (t),
If circulating current exists, its path will depend on the switch combinations of the
two modules. In other words, it will not always find a path through the sensing
resistors located at the negative rail of the dc-link. Therefore, the control will only
be able to control the circulating current for certain vector combinations. The dc-link
153
ia1
S11
S12
S13
vsa
ib1
vsb
Vdc
ic1
vsc
ia2
S14
S15
S16
S21
S22
S23
S24
S25
S26
Rsense1
idc1
Rsense2
idc2
ib2
ic2
Figure 6.10: Two voltage-source converter modules connected in parallel.

current that will be measured by the sensing resistor of each module and the desired
dc-link current are summarized in Table 6.3 for all the possible vector combinations
of Sector I. The difference between the desired dc-link current (composed of only the
module output current terms) and the measured dc-link current is the circulating
current, which can also be referred to as the error that the control must correct.
Note that ia , ib , and ic are not always sensed. As will be shown, this fact leads
to the alterations incorporated into the original control implementation.
It is also important to note that since the two lower switches of the phase b legs
conduct throughout the entire sector, circulating current ib (t) free-wheels between
the two modules. Therefore, for two sectors in a line cycle, the nonlinear average
current control cannot affect the circulating current of the phase associated with
vm . As will be shown, this free-wheeling current will always exist, even if there is no
154
vsa(w1t)
vsb(w1t)
vsc(w1t)
S11
S12
S13
S21
S22
S23
S15
S16
S14
S25
S26
S24
II
o
60
120
IV
VI
S21
vsb
w1t
III
180 240
L
vsa
300 360
S14
S24
S16
S26
S11
Vdc
L/2
S13
S23
vsc
o
a)
b)
Figure 6.11: a) Sector definitions and b) equivalent circuit for Sector I.

Table 6.3: Measured and desired dc-link current for Sector I.
Dc-Link Currents
Module 1 Module 2
Fig. 6.10
Measured
Desired
idc1 (t)
ia (t) ib (t) ic (t)
0
v0
v0
idc2 (t)
ia (t) + ib (t) + ic (t)
0
idc1 (t)
0
v0
v5
idc2 (t)
ia (t) + ib (t) + ic (t)
ic (t)
idc1 (t)
0
v0
v6
idc2 (t)
ib (t) + ia (t) + ic (t)
ia (t) + ic (t)
idc1 (t)
ia (t) ib (t) + ic (t)
ic (t)
v5
v0
idc2 (t)
ia (t) + ib (t) + ic (t)
0
idc1 (t)
ic (t)
v5
v5
idc2 (t)
ia (t) + ib (t) + ic (t)
ic (t)
idc1 (t)
ic (t)
v5
v6
idc2 (t)
ib (t) + ia (t) + ic (t)
ia (t) + ic (t)
idc1 (t)
ib (t) + ia (t) + ic (t) ia (t) + ic (t)
v6
v0
idc2 (t)
ia (t) + ib (t) + ic (t)
0
idc1 (t)
v6
v5
idc2 (t)
ia (t) + ib (t) + ic (t)
ic (t)
idc1 (t)
v6
v6
idc2 (t)
ib (t) + ia (t) + ic (t)
ia (t) + ic (t)
inherent circulating current and the imbalance current is eliminated.
The following sections present three possible implementations of the nonlinear average current control to the case of two interleaved voltage-source converter
modules.
155
6.4.2.1
Independent Control Implementation
The modular approach to implementing the nonlinear average current control

of the single voltage-source converter module to two interleaved VSC modules is to
interconnect two indentical modules with separate current control loops as illustrated
in Fig. 6.12. Each module senses its own negative rail dc-link current (idc1 and idc2 )
and uses it as the feedback signal for its current control loop. The clock signals of
the two control loops are synchronized so that the second module is shifted by Ts /2
to achieve interleaving.
A simulation of the modular approach of Fig. 6.12 was carried out using the
following design parameters: P0 = 4 kW, Vspk = 156 V, Vdc = 350 V, f1 = 60 Hz,
fs = 20 kHz, L = 1 mH, and RL = 100m. The fundamental component of the
inductor currents should present an amplitude of 8.45 A. Figure 6.13 presents the
simulation results of the inductor currents of phase a. The currents are completely
dominated by a circulating current component which reaches over 200 A.
In order to explain the origin of this circulating current, consider that the
system initiates operation in Sector I and that the phase b filter inductors have a
non-zero intial current. The lower switches of the phase b legs will be on throughout
the entire sector. For Module 1, the boost diodes of phases a and c (the upper
switches of the legs) are turned on at the beginning of the switching period. When
the complimentary short duty cycle is complete, the phase a current commutates to
the boost switch (the lower switch of the leg). When the complimentary long duty
cycle is complete, the phase c current commutates to the boost switch (the lower
switch of the leg). In other words, the switching sequence of each module will be
v6 {101} v5 {100} v0 {000}
All of the possible vector combinations for Sector I were listed in Table 6.3; however,
not all of those vector combinations actually occur. Figure 6.14 presents a vector
combination in Sector I when using the modular approach of Fig. 6.12, considering that both converter modules initiate operation with vector v6 applied to both
modules.
Since the circulating currents add to the dc-link current of one module and
subtract from the other, the rise times of the integrations will be different, as il-
156
ia1
S11
S12
S13
vsa
ib1
vsb
Vdc
ic1
vsc
S14
S15
S16
idc1
Rsense1
dl1
vr1
_
+
_
vcl 1
FlipFlop
dl 1
dl
1
_
vcs
Module 1
FlipFlop
ds1
ds
1
Clock
dl2
Module 2
vr 2
Ts/2
Delay
_
+
_
vcl 2
FlipFlop
dl 2
dl
2
_
vcs
FlipFlop
ds2
ds
2
ia2
S21
S22
S23
S24
S25
S26
ib2
ic2
Rsense2
idc2
Figure 6.12: Modular implementation of the single module control to two

interleaved VSC modules.
lustrated in Fig. 6.14. Therefore, the complimentary duty cycles will be different.
For the given instant in time, the vector combination sequence is {v6 , v6 } {v6 ,
157
200
ia1(t)
150
i (t)
a2
100
50
0
50
100
150
200
0.065
0.07
0.075
0.08
t(s)
0.085
0.09
0.095
0.1
Figure 6.13: Simulation results of the inductor currents of phase a.

v5 } {v6 , v0 } {v5 , v0 } {v5 , v6 } {v0 , v6 }. Table 6.4 summarizes the
time interval, dc-link current of Module 1, and phase being modulated for the given
vector sequence.
Table 6.4: Time interval, vector combination, and the sensed dc-link current and phase being modulated of Module 1 in Sector I.
Vector
Phase being
Time Interval
idc1
Module 1 Module 2
Modulated
v6
v6
ia + ic ib
a, c
0 t ds1 Ts
v6
v5
ia + ic ib
a, c
v6
v0
ia + ic ib
a, c
v5
v0
ic ia ib
c
ds1 Ts t dl1 Ts
v5
v6
ic ia ib
c
dl1 Ts t Ts
v0
v6
ia ib ic
During the complimentary short duty cycle of Module 1 (0 t ds1 Ts ), the
dc-link current is composed of ia , ic , and ib . Since both S15 and S25 conduct
throughout the entirety of Sector I, ib free-wheels between the two modules by way
of the negative dc-link rails of the modules. It is sensed by the control and can be
considered a constant source of error.
The real problem during this time interval is that neither ia nor ic is sensed.
This leaves the control of these two circulating currents up to Module 2. Table 6.5
presents the sensed dc-link current of Module 2.
158
vcl1
vcs
ds1 Ts
dl1 Ts
vcl 2
vcs 2
Ts
2
Ts
Ts
2
Module 1
S11
S12
S13
Module 2
S21
S22
S23
v6
v6
v6
v5
v6
v0
v5
v0
v5
v6
v0
v6
Figure 6.14: Vector combination in Sector I.

Table 6.5: Time interval, vector combination, and the sensed dc-link current and phase being modulated of Module 2 in Sector I.
Vector
Phase being
Time Interval
idc2
Module 1 Module 2
Modulated
v6
v6
ia + ic + ib
a, c
0 t ds1 Ts
v6
v5
ic + ia + ib
c
v6
v0
ia + ib + ic
v5
v0
ia + ib + ic
ds1 Ts t dl1 Ts
v5
v6
ia + ic + ib
a, c
dl1 Ts t Ts
v0
v6
ia + ic + ib
a, c
159
During 0 t ds1 Ts , Module 2 goes through three switching transitions. After
each transition, an additional circulating current is sensed until, when v0 is applied,
only the circulating currents compose idc2 . The problem is that the circulating
currents are not sensed when their respective phase is being modulated. For example,
when v6 is applied to Module 2, both phases a and c are being modulated and the
detection of ia and ic would affect ds2 and dl2 ; however, neither ia nor ic is
sensed. Circulating current ia is sensed when vector v5 is applied, but phase a has
already been modulated by the transition to vector v5 and the addition of ia to
idc2 only increases the measurement error.
This makes ia and ic uncontrollable is Sector I. Consequently, these currents
are allowed to increase without any restriction or action on the part of the control.
The same analysis can be carried out for Sector II and Table 6.6 summarizes the
results. From the analysis, it can be seen that now the control theoretically has the
capability of controlling circulating currents ib and ic (ia free-wheels in Sector II),
since both currents are sensed when their respective phases are being modulated.
However, since ia and ic were uncontrollable in Sector I, the magnitude of ic
became so high that it impedes the boost diodes of Module 1 from turning on. As
can be seen in the simulation results of Fig. 6.15, the integration of vr idc1 never
reaches vcs1 or vcl1 , which, consequently, applies vector v1 {1 0 0} to Module 1 for the
entire switching period. This is due to the fact that the circulating current subtracts
from one dc-link current and adds to the other, thus, making the integration of one
of the dc-link currents out of the range of the control signals.
Module 2, on the other hand, is able to bring the circulating currents down,
although it does not eliminate them. Once this happens, Module 1 resumes normal
operation, as can be seen in Fig. 6.16.
This implementation has an imbalance and inherent circulating current problem since the circulating currents are not sensed for portions of the line cycle. Table
6.7 presents the free-wheeling and controllable circulating currents per sector. Each
circulating current is controllable in theory for only two sectors per line cycle. Each
circulating free-wheels for two sectors and for the remaining two sectors, each current is uncontrollable. This means that the circulating currents can increase without
bound during an entire sector before the current control detects a problem.
The independent control implementation of the nonlinear average current con160
Table 6.6: Time interval, vector combination, and the sensed dc-link current and phase being modulated of Modules 1 and 2 in Sector
II.
Phases being
Time Interval
Module Vector
Dc-Link Current
Modulated
1
v1
idc1 = ib + ic ib ic
b, c
2
v6
idc2 = ib + ib
b
0 t ds1 Ts
1
v1
idc1 = ib + ic ib ic
b, c
2
v7
idc2 = 0
1
v6
idc1 = ib + ib
b
2
v7
idc2 = 0
ds1 Ts t dl1 Ts
1
v6
idc1 = ib ib
b
2
v1
idc2 = ib + ic + ib + ic
b, c
1
v7
idc1 = 0
2
v1
idc2 = ib + ic + ib + ic
b, c
dl1 Ts t Ts
1
v7
idc1 = 0
2
v6
idc2 = ib + ib
b
a)
[A]
200
ib
100
ic
[V]
0
b)
10
0
10
20
vcl1
vcs1
IntOutput1
c)
[V]
10
vcl2
vcs2
5
0
IntOutput2
0.0696
0.0697
0.0697
t(s)
0.0698
0.0698
Figure 6.15: Circulating currents ib and ic , control signals and integration output of Modules 1 and 2 in Sector II. Module 1 does
not commutate.
trol is not suitable for implementation due to its circulating current problem.
6.4.2.2
Master/Slave Control Implementation
One simple way to avoid the problem of the independent control implementation is to operate the two parallel modules in a master/slave configuration. In other
161
a)
[A]
20
ib
ic
20
b)
[V]
10
vcl1
vcs1
IntOutput1
0
c)
[V]
10
vcl2
5
0
vcs2
IntOutput2
0.0712
0.0713
0.0713
t(s)
0.0713
0.0714
Figure 6.16: Circulating currents ib and ic , control signals and integration output of Modules 1 and 2 in Sector II. Module 1
resumes normal operation.
Table 6.7: Free-wheeling and controllable circulating currents per sector.
Sector
Type
I
II
III
IV
V
VI
Free-wheeling Circulating Current ib
ia
ic
ib
ia
ic
Controllable Circulating Current
ib , ic
ia , ic
ia , ib
words, only one module, the master module, has a current control loop; the drive
signals of the slave module are identical to those of the master module except that
they are phase-shifted by Ts /2 to achieve interleaving. The implementation of the
master/slave configuration is illustrated in Fig. 6.17.
The main disadvantage of this approach is that there is no direct control over
the currents of the slave converter since the slave converter does not have a current
sensor. If a switch of the slave converter fails, there is no way to detect it. The
only way of determining a problem would be by monitoring the ac phase currents
of the system or by adding a sensor and protection circuitry to the slave converter.
Another disadvantage is that this is not a modular approach.
Figure 6.18 presents the simulation results of the inductor currents of phase a
of the master and slave modules. The current waveforms are sinusoidal but there is a
significant difference between them. Plotting the difference beween the two inductor
162
Master Module
S11
S12
dlm
S13
ia1
vsa
ib1
vsb
dl m
dl
FlipFlop
dsm
ds
FlipFlop
vclm
vrm
+
Vdc
ic1
vsc
vcs
S14
S15
S16
S21
S22
S23
Clock
idcm
Rsense
ia2
ib2
dl s
dl
ic2
dss
ds
Ts/2
Delay
S24
S25
S26
Slave Module
Figure 6.17: Master/slave implementation of two interleaved voltagesource converters.

current waveforms yields the simulation result of Fig. 6.19.
Note that there are portions of the current waveform of Fig. 6.19 that are almost constant and present no high frequency ripple. These portions of the waveform
correspond to Sectors II and V, where switch pairs {S11 S21 } and {S14 S24 } remain
on throughout the entire sector, respectively. The free-wheeling current would the-
oretically remain constant during this period of time but in the simulation it slowly
decreases due to the equivalent series resistance of the filter inductors.
Note that the current ripple at the peak of the inductor currents is smaller than
in the single converter case of Fig. 6.9. This is due to the path of the high frequency
circulating currents and the currents that compose the peak. Consider the positive
peak of phase a, i.e., Sector II; switches S11 and S21 conduct throughout the entire
sector. The high frequency circulating current of phase a is constant (no ripple) and
free-wheels between the modules. Since the high frequency circulating currents of
163
20
ia1(t)
15
i (t)
a2
10
5
0
5
10
15
20
0.084
0.086
0.088
0.09
0.092
t(s)
0.094
0.096
0.098
0.1
Figure 6.18: Inductor currents of phase a when operating in the master/slave configuration.
3
2
1
0
1
2
3
0.084
0.086
0.088
0.09
0.092
t(s)
0.094
0.096
0.098
0.1
Figure 6.19: Difference between the inductor currents of Fig. 6.18.

phases b and c are confined to their respective phases, the inductor current of phase
a is composed of only the module output current terms of phases b and c and the
constant free-wheeling current
ia1 (t) = ib (t) + ic (t) + ia
ia2 (t) = ib (t) + ic (t) ia
164
The module output current terms compose the ac phase currents, e.g.,
ia (t) = ia1 (t) + ia2 (t)
= 2ib (t) + 2ic (t)
and present low current ripple due to the harmonic cancellation effect of interleaving.
Thus, the peaks of the inductor current waveforms also present low current ripple.
The current difference of Fig. 6.19 can be decomposed into two components: a
high frequency circulating current and a bounded low-frequency circulating current,
as can be seen in the Fourier analysis of the time-domain waveform (Fig. 6.20). The
low-frequency circulating current is due to the control strategy and implementation
and is, therefore, inherent to the master/slave converters. Its existence should not be
a problem for the normal operation of the system but an analysis will be presented in
the following to verify the origin of this current and the dependency of its magnitude
on the control parameters.
2
1.5
0.5
0
0
10
f[kHz]
15
20
25
Figure 6.20: Spectrum of the difference between the inductor currents of

phase a.
The effects of interleaving the master and slave converters can be observed in
Fig. 6.21. By interleaving the two modules, the module output current of Fig. 6.21a)
is composed of only the harmonics centered at Nfs and its integer multiples, i.e.,
since N = 2 and fs = 20 kHz, the harmonics remaining in the current spectrum
165
are centered at 40 kHz, 80 kHz, etc. It is interesting to note that the harmonic
components that are eliminated in the module output current compose the high
[dBA]
frequency inter-module circulating current, Fig. 6.21b).

a)
0
50
[dBA]
100
b)
0
50
[dBA]
100
c)
0
50
100
10
15
20
25
30
35
40
f[kHz]
45
50
55
60
65
Figure 6.21: Spectra of the a) phase a module output current, b) circulating current, and c) master converter current.
The master/slave implementation presents the same circulating current sensing problem described in Section 6.4.2.1 and summarized in Table 6.7. However, the
difference between the two implementations is in the generation of the complimentary short and long duty cycles of the two modules. While in Section 6.4.2.1 both
converters were independent and generated ds1 , dl1 , ds2 , and dl2 according to their
measurements of idc1 and idc2 and the position of the reference voltage vector within
the sector, the master converter replicates dsm and dlm for the slave converter but
delayed in time. This shift creates a small lag between the position of the reference
voltage vector and the current vector of the slave converter. This happens because
dss and dls are generated with information that is Ts /2 seconds old. Figure 6.22
presents source voltages vsa and vsc (used, along with vsb , to generate the reference
voltage vector) and the complimentary short and long duty cycles of the master and
slave converters. The slopes of vsa and vsc are exaggerated to highlight the error in
the pulsewidths of the slave converters duty cycles which arises from using the master converters duty cycles. It is expected, however, that the higher the switching
frequency the smaller the error in the slave converters pulsewidths, since they will
166
be closer to operating in synchronism (i.e., no delay).
vsc
Dv
vsa
Dv
Dv
Dv
dlm
dls
dsm
dss
Ts
2
Ts
3Ts
2
2Ts
5Ts
2
3Ts
Figure 6.22: Source voltages vsa and vsc and the complimentary duty cycles of the master and slave modules.
The effect of the error in the slave duty cycle pulsewidths can be quantified
and it will be shown that the result is the inherent circulating current observed in
the simulation. It will also be shown that the magnitude of the inherent circulating
current is a function of the phase-shift and the switching frequency.
Consider the equivalent circuit of the parallel voltage-source converters of Fig.
6.23a). Since the objective of the analysis is to describe the circulating current, only
the loop composed of the filter inductors and boost switches Snm and Sns need be
used, Fig. 6.23b). For the analysis, it is assumed that the conduction losses of the
inductors and switches can be ignored, the effects of the sample-and-hold process
of the analog-to-digital conversion used in the control can also be ignored, and the
free-wheeling current is constant throughout the sector.
The voltage across the boost switches of Fig. 6.23a) can be averaged over a
167
L
vn
Dn m
vm
Sn s
Sn m
Vdc
Dn s
Sn m
L/2
iDn
vn
L
Sp s
Sp m
vp
_ Rail (V )
dc
L
Dp s
Sn s
Dp m
L
a)
b)
Figure 6.23: a) Equivalent circuit of the master/slave configuration and

b) equivalent circuit for the circulating current analysis.
switching period to be
V Sn,m
1
=
Ts
"Z
dsm T s
Vdc .dt +
Ts
0.dt
dsm Ts
V Sn,m = Vdc dsm
V Sn,s
1
=
Ts
"Z
(6.5)
dss T s
Vdc .dt +
Ts
0.dt
dss Ts
V Sn,s = Vdc dss
(6.6)
The boost switches of the equivalent circuit of Fig. 6.23b) can be substituted by the
average voltages of (6.5) and (6.6) and results in the average model of Fig. 6.24.
iDn
L
+
_
Vdc dsm
_
+
Vdc dss
Figure 6.24: Average model of the circulating current loop.
168
If dsm (t) = dss (t), there is no voltage driving a current between the inductors.
However, the master/slave configuration implies that
dss (t) = dsm (t t )
(6.7)
where t is the time shift. For the special case of interleaving two VSC modules
t = Ts /2. The average complimentary short duty cycle of the master converter can
be derived from the control law [53]
1
Ts
dsm Ts
[vr (t) idcm (t)] dt =
dsf f (t)
h
i
vr (t) ipref (t) inref (t)
(6.8)
where dsf f is the complimentary short duty cycle feedforward signal, ipref is the
reference for current ip , and inref is the reference for current in . The feedforward
signal [53] is defined as
dsf f (t) =
vn (t) vm (t) L
d
i (t)
dt pref
d
2 dt
inref (t)
Vdc
Time t will be omitted from this point forward for simplicity.

Assuming that fs >> f1 , signals vr , ipref , and inref can be considered constant
over a switching period and the integration of (6.8) simplifies to
vr dsm
Ts
dsm Ts
0
h
i
idcm (t).dt = dsf f vr ipref inref
For the integration of idcm consider that the system operates in Sector I. Figure
6.25a) presents the dc-link current for a switching period within Sector I. The area
highlighted in the figure (Areadc ) corresponds to the result of the integration and is
different from the average value of the master dc-link current. The integration can
be rewritten as
Areadc
1
=
Ts
Ts
dsm Ts
[ia (t) + ic (t) ib (t)] dt
The result of the integration is the sum of the areas highlighted in Fig. 6.25b).
169
iaa + i
ac
- iD
Areadc
iac- i
Da
- iD
Ts
dsm Ts
dlm Ts
- iD a iD - i
b
Dc
a)
iaa
iac
iDb
iaa
Areaa
dsm Ts
iac
Areac
dlm Ts
Ts
Areab
dsm Ts
dlm Ts
Ts
dsm Ts
dlm Ts
Ts
b)
Figure 6.25: a) Dc-link, b) ia , ib , and ib current waveforms in Sector I.

However,
Areaa
6 ia
=
Ts
Areac
6 ic
=
Ts
due to the presence of the current ripple. However, it was shown in [102] that in the
case of a stand-alone VSC using the nonlinear current control, the term corresponding to the first order ripple is less than 10% of the area under the current curve
during the short duty cycle. Since the ripple of ia and ic are significantly smaller
than those of ia and ic of the stand-alone module due to the ripple cancellation
resulting from interleaving, the areas of Fig. 6.25b) can be approximated by
Areaa
ia
Ts
Areac
ic
Ts
170
Thus,

Areadc
ia + ic ib dsm
Ts
and the control law of (6.8) yields
vr dsm
in + ip
im dsm
dsf f
h
i
vr ipref inref
Solving the equation for dsm yields
dsm = dsf f
vr ipref inref
vr ip in im
(6.9)
The result of (6.9) is the moving average of the complimentary short duty cycle of
the master converter.
Substituting (6.7) and (6.9) into Fig. 6.24 and solving for the circulating current yields
d
in (t)
dt
h
i
d
V
(t)
d
(t
t
)
dc
sm
sm
d
in (t) =
dt
2L
VL = 2L
Figure 6.26 presents the derivative of the inherent circulating current of phase
a in Sector I for different values of t . As the time shift decreases, dss becomes more
like dsm and the inherent circulating current tends to zero. This result confirms that
the master/slave implementation of the nonlinear average current control presents
a bounded and predictable inherent low frequency circulating current that does not
present a problem for the normal operation of the system.
The amplitude of the inherent circulating current of the simulation of the
interleaved case (t = Ts /2) was 1.86 A and the analytical result yields 2.5 A. The
simulation result is 25% lower than the analytical result due to the simplications
and assumptions (lossless system, free-wheeling current is constant, zero rise, fall,
and delay times in the switches, etc.) used in the derivation of the model.
Although the inherent low frequency circulating currents are not a problem
for the normal operation of the system, they are sensed by the control and can
be considered an error that the control can only act upon during two of the six
sectors (per phase). This ends up affecting the shape of the module output current
171
d iDa(t)
dt
tD = 40 ms
tD = 25 ms
tD = 20 ms
tD = 10 ms
3.5
3
2.5
2
1.5
1
0.5
0.1
0.2
0.3
0.4
0.5
Figure 6.26: Derivative of the inherent circulating current of phase a in

Sector I for different values of t .
component of the inductor currents. As can be seen in the simulation result of Fig.
6.27, the current flowing through the ac sources is distorted.
30
20
10
0
10
20
30
0.084
0.086
0.088
0.09
0.092
t(s)
0.094
0.096
0.098
0.1
Figure 6.27: Current flowing through the ac source of phase a.
172
6.4.2.3
Experimental Results
The master/slave configuration was chosen for the practical implementation

of two interleaved voltage-source converters due to its simplicity. The specifications
of the system are
Total power = 4 kW
Power per module = 2 kW
Line frequency = 60 Hz
Rms phase voltage = 110 V
Switching frequency = 20 kHz
Dc-link voltage = 350 V
A photograph of the experimental set-up can be seen in Figure 6.28. On the
left are the two voltage-source converter boards, the master module on top and
the slave module on the bottom. The control was implemented using an FPGA
evaulation board (right of the photograph) to generate the reference voltage (vrm ),
the long and short control signals (vclm and vcsm ), and the drive signals of the twelve
IGBTs.
Figure 6.29 presents the experimental result of the phase a current of the master module operating by itself (the slave converter was not yet connected). There
is a good correlation between the experimental waveform and the simulation result
of Fig. 6.9. The waveform presents some visible distortion at the sector transitions
due to the control implementation. It is expected that this distortion will be significantly worse when the slave converter is added to the system (as was shown through
simulation). There is significant ripple at the peak of the waveform, which should
be decreased by interleaving the slave module.
Figures 6.30, 6.31, and 6.32 present the experimental results of the inductor
currents of the master and slave modules operating in an interleaved fashion and
under nonlinear average current control. The distortion has increased, as expected,
and there is a good correlation with the simulation results of Fig. 6.18, except at the
positive peaks. Before the transition from Sector I to II (in the case of phase a) in
the single module, Fig. 6.29, the implementation of the control causes a small dip in
173
Figure 6.28: Experimental set-up of two interleaved voltage-source converters.
[V] [A]
200
100
-100
-4
-200
-8
ia
vsa
-0.008
-0.004
0.004
0.008
Figure 6.29: Phase a source voltage and current of the single module
operating with the nonlinear average current control.
174
the current waveform. This transient is aggravated by the master/slave operation,

resulting in the significantly larger distortion. This is not observed at the transition
from Sector IV to V (Fig. 6.29) and the negative peak of the master and slave
currents are almost identical to the simulation.
10
ia,master
ia,slave
5
-5
- 10
- 0.01
- 0.005
0.005
0.01
Figure 6.30: Phase a inductor currents of the master and slave converters.
10
ib,master
ib,slave
5
-5
- 10
- 0.01
- 0.005
0.005
0.01
Figure 6.31: Phase b inductor currents of the master and slave converters.
175
10
ic,master
ic,slave
5
-5
- 10
- 0.01
- 0.005
0.005
0.01
Figure 6.32: Phase c inductor currents of the master and slave converters.
As expected, by interleaving the two converter modules, the ripple at zero
crossing in Fig. 6.33 was minimized due to the harmonic cancellation effect described
in Chapter 5.
ia
15
ib
ic
10
5
0
-5
-10
-15
0
0.005
0.01
0.015
0.016
Figure 6.33: Currents flowing through the ac sources.

Figures 6.34, 6.35, and 6.36 present the high frequency circulating current and
the inherent low frequency circulating current of phases a, b, and c, respectively. As
shown through simulation and verified through experimentation, the master/slave
176
configuration does not have an imbalance current problem.
iDa = ia,master - ia,slave

2
2
1
0
-1
-2
-3
- 0.01
- 0.005
0.005
0.01
Figure 6.34: Difference between the inductor currents of phase a.
iDb = ib,master - ib,slave

2
2
1
0
-1
-2
-3
- 0.01
- 0.005
0.005
0.01
Figure 6.35: Difference between the inductor currents of phase b.

To verify the effects of interleaving two VSC modules, Figures 6.37, 6.38, and
6.39 present the spectra of the experimental current waveforms. The spectrum of
the phase a inductor current of the master converter is presented in Fig. 6.37. This
current presents harmonics centered at fs and all of its integer multiples (20 kHz,
177
iDc = ic,master - ic,slave

2
2
1
0
-1
-2
-3
- 0.01
- 0.005
0.005
0.01
Figure 6.36: Difference between the inductor currents of phase c.

40 kHz, etc.). The odd multiples of the switching frequency (20 kHz, 60 kHz,
etc.) compose the high frequency inter-module circulating current, as explained
previously through simulation (Fig. 6.21) and shown in Fig. 6.38 for phase a. The
ac phase current is composed of the Nfs terms and integer multiples, i.e., for the
two interleaved modules, the harmonics are centered at 2fs and its integer multiples.
This conclusion is confirmed by Fig. 6.39. It can be observed in Figures 6.38 and 6.39
that there are remnants of 40 kHz and 80 kHz in the circulating current and remnants
of 20 kHz and 60 kHz in the ac source current, respectively. This is the result of
partial harmonic cancellation which was caused by imperfect synchronization of the
master and slave modules. It is important to note that the magnitudes of these
harmonics are very small and the conclusions of Chapter 5 are still valid.
6.4.2.4
Modular Approach with Two Current Sensors per Module
Both of the two previously described implementations of the nonlinear average

current control are unable to obtain information regarding the circulating currents
over the entire line cycle. This was a significant problem in the independent control in Section 6.4.2.1 but was not a cause of much concern in the master/slave
configuration of Section 6.4.2.2. However, the master/slave configuration is not a
modular implementation and the current waveforms are distorted. To improve the
178
20
0
[dBA]
20
40
60
80
100
0
10
20
30
40
50
f[kHz]
60
70
80
90
100
Figure 6.37: Spectrum of the inductor current of the master converter

(phase a).
0
20
[dBA]
40
60
80
100
120
0
10
20
30
40
50
f[kHz]
60
70
80
90
100
Figure 6.38: Spectrum of the circulating current of phase a.

waveforms, more information regarding the circulating currents must be fedback to
the current control. To make the approach modular, the current controls of the two
modules must be separate and independent.
There are always two paths for the circulating current, depending only on the
vector combination: through the positive rail of the dc-link or through the negative
rail of the dc-link. In the case of a single module, the current through the positive
rail is equal to the current through the negative rail. However, for two parallel
179
20
0
[dBA]
20
40
60
80
100
0
10
20
30
40
50
f[kHz]
60
70
80
90
100
Figure 6.39: Spectrum of the current flowing through the ac source of

phase a.
converters, the circulating current path causes them to be different. In total, there
are four different dc-link rail currents, as presented in Fig. 6.40, such that
idc1
+ + idc2
+ = idc
idc1 - + idc2 - = idc
Tables 6.8 and 6.9 summarize the dc-link rail currents of Module 1 for Sectors
I and II. In Sector I, the negative rail current only contains information on the
free-wheeling circulating current, which is of no use to the control since phase b is
not modulated in Sector I. Note, however, that the positive rail current contains
the information regarding the other two circulating currents (ia and ic ). If the
positive rail current were sensed in Sector I instead of the negative rail current, the
information on the module output current terms would remain the same but now
the circulating currents of phases a and c could be controlled.
The same cannot be said for Sector II. Sensing the negative rail current is the
correct procedure since the positive rail current only contains information regarding the free-wheeling current (ia ). The same analysis can be carried out for the
remaining four sectors with similar results.
If the feeback current signal alternated between the positive rail and negative
rail currents, as shown in Table 6.10, the current control would always have the
180
ia1
vsa
vsb
S11
S12
S13
idc1
idc
ib1
Vdc
ic1
vsc
ia2
S14
S15
S16
idc1 _
S21
S22
S23
idc2 +
S24
S25
S26
idc2 _
ib2
ic2
Figure 6.40: Definition of the dc-link rail currents of two parallel VSC
modules.
Table 6.8: Currents of the positive and negative dc-link rails of Module
1 for the vector combinations of Sector I.
Vector
idc1
idc1 +
Module 1 Module 2
v6
v6
ia + ic + ia + ic
ia + ic ib
v6
v5
ia + ic + ia + ic
ia + ic ib
v6
v0
ia + ic + ia + ic
ia + ic ib
v5
v6
ic + ic
ic ia ib
v5
v0
ic + ic
ic ia ib
v0
v6
0
ia ib ic
necessary information to actively suppress the circulating currents in every sector.
Furthermore, the free-wheeling current would never be part of the feeback signal.
Figure 6.41 illustrates the implementation of the nonlinear average current
control using two current sensors per module. This approach is modular since each
module has its own current control loop. The clock signals of the modules are
181
Table 6.9: Currents of the

1 for the vector
Vector
Module 1 Module 2
v1
v6
v1
v7
v6
v7
v6
v1
v7
v1
v7
v6
positive and negative dc-link rails of Module

combinations of Sector II.
idc1
+
idc1 -
ia + ia
ia + ia
ia + ic + ia + ic
ia + ic + ia + ic
ia + ib + ic
ia + ib + ic
ib + ic ib ic
ib + ic ib ic
ib ib
ib ib
0
0
Table 6.10: Proposed current feedback signal for Module 1.

Vector
I
II
III
IV
V
VI
Sensed current idc1
idc1 idc1
idc1 idc1
idc1 +
+
+
synchronized so that the clock signal of Module 2 is delayed by Ts /2 to achieve
interleaving.
The proposed current control implementation was simulated using the same
parameters listed in Section 6.4.2.1. Figure 6.42 presents the results of the inductor
currents of phase a. Note that the currents overlap during Sector I, III, IV, and VI,
unlike the case of the master/slave implementation (refer to Fig. 6.18), and are only
different at the peak. The waveshape is also visibly improved from the master/slave
case.
The module output current term is also significantly improved from the case of
the master/slave configuration, as can be seen in the simulation result of the current
flowing through the phase a ac source (Fig. 6.43).
Note that the current of Fig. 6.43 presents distortion at every sector transition
comparable to the single VSC case of Fig. 6.9. This is due to the transitions from
trailing-edge modulation to leading-edge modulation and vice-versa from one sector
to the next. Figure 6.44 shows the detail of the transition from Sector I to Sector II
of the drive signals of one module and the module output currents. In Sector I, the
trailing-edges of the drive signals of S11 and S13 are modulated (while the leadingedge of the drive signals of S14 and S16 are modulated). As the control detects the
transition from Sector I to Sector II (highlighted in the figure), the complimentary
short and long duty cycles transition from determining the drive signal pulsewidths
182
ia1
S11
S12
idc1
S13
vsa
ib1
vsb
Vdc
ic1
vsc
S14
S15
S16
idc1 _
dl1
dl 1
dl
FlipFlop
ds1
ds
FlipFlop
vcl 1
+
vr1
_
vcs
Clock
Module 1
Module 2
dl2
Ts/2
Delay
FlipFlop
ds2
ds
FlipFlop
dl 2
dl
2
ia2
Sector
vcl 2
Sector
S
+
vr 2
_
+
S21
S22
S23
S24
S25
S26
vcs2
idc2 +
ib2
ic2
idc2 _
Figure 6.41: Implementation of the nonlinear current control using two

current sensors per module.
of S11 and S13 to determining those of S16 and S15 , respectively. The trailing-edges
of the complimentary short and long duty cycles are always modulated, independent
183
10
ia1(t)
i (t)
a2
10
0.084
0.086
0.088
0.09
0.092
t(s)
0.094
0.096
0.098
0.1
Figure 6.42: Inductor current waveforms of phase a when using two current sensors per module.
20
15
10
5
0
5
10
15
20
0.084
0.086
0.088
0.09
0.092
t(s)
0.094
0.096
0.098
0.1
Figure 6.43: Current flowing through the ac source of phase a when using
two current sensors per module.
of the sector. Because of this, the trailing-edge modulation of S13 becomes leadingedge modulation which causes S13 to remain off for a longer period of time than if
trailing-edge modulation were continued. This causes an increase in ic . If trailingedge modulation were maintained for all the upper switches, S12 would turn on as
soon as Sector II initiated. However, since leading-edge modulation occurs, current
184
ib continues to drop. As a result of what occurs with ib and ic , current ia presents

a significant drop. After the initial sector transition, the control acts to correct this
initial error and the currents go through a short transient before reaching steadystate.
Transition from
trailing-edge to
leading-edge
ds1
dl1
S11
S12
S13
S14
S15
S16
ia
18
15
ib
-16
-22
ic
6
Ts
Sector I
2Ts
3Ts
Sector II
4Ts
5Ts
Figure 6.44: Detail of the transition from Sector I to Sector II.

The difference between the two inductor currents of phase a is shown in Fig.
6.45. Note that there is only the high frequency circulating current term; there is no
inherent low frequency circulating current. When a switch conducts throughout an
entire sector, the high frequency circulating current free-wheels. This free-wheeling
current is caused solely by the ripple and the specific free-wheeling current value
will depend on the switching frequency. Figure 6.46 illustrates the transition from
Sector I to Sector II, when the high frequency current ripple becomes a free-wheeling
185
current.
3
2
1
0
1
2
3
0.05
0.055
0.06
0.065
0.07
0.075
t(s)
0.08
0.085
0.09
0.095
0.1
Figure 6.45: High frequency circulating current of phase a when using

two current sensors per module.
3
2
1
0
1
2
3
0.0835
0.084
0.0845
0.085
0.0855
t(s)
0.086
0.0865
0.087
0.0875
Figure 6.46: Detail of the high frequency current ripple transitioning to

free-wheeling current.
It was shown here that the nonlinear average current control developed for
the single voltage-source converter can be extended to multiple modules and be a
modular solution if an additional current sensor is added to the positive rail of each
module and logic is implemented to alternate between the positive and negative rail
186
currents every sector. The simulation results of this approach confirmed that by
providing information to the control regarding the circulating currents that were
previously not measured, there is no circulating current (inherent or imbalance).
6.5
Conclusions
This chapter analyzed the low frequency circulating current characteristics of
existing current control strategies. It was shown that the linear abc current control
presents a bounded and predictable inherent low frequency circulating current due
to the differences in the tracking errors of the two modules. Dq control requires a
zero controller in order to suppress low frequency circulating current.
The nonlinear average current control of [53] developed for the voltage-source
converter was applied to two interleaved VSC modules. Three different implementations were analyzed: independent control, master/slave control, and modular implementation with two current sensors per module. It was shown that the independent
control presents a serious imbalance current and inherent circulating current problem
which negates its usefulness.
The master/slave configuration is simple and presents a bounded and predictable inherent circulating current, which does not present a problem concerning
losses; however, it causes significant distortion in the ac phase currents since the
control cannot sense the circulating current and suppress it for most of the line
cycle.
The modular implementation with two current sensors per module only presents
high frequency circulating current. This approach is modular and generates good
quality ac current waveforms with minimal distortion. It requires one additional current sensor per module located at the positive rail of the dc-link and additional logic
to alternate between sensing the positive and negative rail currents every sector.
Despite the limitations of the master/slave configuration, it was used for the
experimental set-up due to its simplicity. Each board was tested separately and
the single converter presented minimal distortion in its current waveforms. The
master/slave operation distorted the previously sinusoidal current waveforms significantly. If additional sensors were added to the positive rails of the dc-links of the
two modules and each module presented its own control, the distortion in the current waveforms would have been comparable to the case of the single module. The
187
master/slave configuration is simple to implement but does not generate satisfactory

current waveforms to meet the standards in effect.
The existence of the inherent low frequency circulating current of the master/slave configuration was verified through experimentation and, as expected, was
not a cause for concern due to its bounded nature. The effects of interleaving were
also verified through experimentation, confirming the results of Chapter 5.
188
CHAPTER 7
Conclusion
This dissertation investigated a power electronics interface for a variable-speed
pitch-regulated wind turbine using an induction generator for the electromechanical
conversion of energy. The first stage of the interface was composed of a threephase PWM rectifier with ac-side bidirectional switches to convert the variablefrequency variable-amplitude output of the induction generator into a constant dc
voltage. The second stage of the interface was composed of interleaved three-phase
voltage-source converter modules to convert the dc energy into the fixed-frequency
fixed-amplitude three-phase voltage of the grid. The use of interleaved modules
increases the power processing capability of the inversion stage which makes this
power electronics interface suitable for wind farms where each turbine is equipped
with its own rectification stage and the farm shares a common high voltage dc bus
and an inversion stage, as in the case of off-shore wind farms.
The three-phase voltage-source converter is the standard solution for high
power energy conversion due to its versatility. Being such, it was used as both
a basis of comparison for the proposed rectification stage and as the building block
for the inversion stage.
The proposed rectification stage of the wind energy system was the threephase PWM rectifier with ac-side bidirectional switches and the subject of Chapters
3 and 4. Due to the parallel in the switching states of the three-phase VSC and the
proposed rectifier, the three-phase PWM rectifiers can be controlled in the same way
as the VSC with only the addition of a simple combinatorial logic, which essentially
allows these rectifiers to dive into the vast pool of knowledge and hardware available
to the VSC.
Since the three-phase PWM rectifiers with ac-side bidirectional switches were
proposed to operate in conjunction with an induction generator in a wind turbine
system, Chapter 3 concluded with an analysis of the generator/rectifier system. In
steady-state, the system operates within the region determined by the intersection
of the P-Q curves of the rectifier and the induction machine for both variable and
constant terminal conditions. For the case of constant terminal voltage and fre189
quency, variations in the wind speed can be accomodated by variations in the slip
(-1% to -5%). A simulation of this case was presented to verify the analysis and
demonstrate that the system is capable of starting-up without external help. The
residual magnetism of the machines rotor provided the initial voltage required to
start up the system. Steady-state was reached by slowly increasing the terminal
voltages of the machine by controlling the rectifiers reference voltages.
To determine the viability of using the three-phase PWM rectifiers with ac-side
bidirectional switches instead of the standard three-phase voltage-source converter,
Chapter 4 analyzed the losses of the semiconductors of both topologies. It was
concluded that the three rectifier topologies and the three-phase VSC all present
identical switching losses. Therefore, the determining factor in the comparison became the conduction losses. Among the three possible configurations of the ac-side
bidirectional switches, it was concluded that the delta configuration was most favorable in terms of conduction losses since each phase current only flows through one
switch whenever an active vector is applied to the converter. Furthermore, of the
possible realizations of a zero vector, closing the three bidirectional switches simultaneously proved to result in minimum conduction losses due to the equal distribution
of the phase currents among the switches. The total combined losses of the three
bidirectional switches of T is about 13% higher than that of the six switches in the
conventional VSC when anti-parallel reverse-blocking IGBTs are used to implement
the bidirectional switches. Additionally, the losses of the diodes of T were found
to be only 75-80% of those in the conventional VSC. It can be concluded that the
additional losses of the switches of T are compensated by the lower losses in the
diodes, making T (with unidirectional switches forming the bidirectional switches)
and the six-switch VSC practically identical. When true bidirectional switches become available in the future, rectifier T will be the more efficient choice for the
rectification stage of the power electronics interface.
Common-mode voltages generated by rectifiers T , TY , and TB were also
analyzed and were shown to be only one third in magnitude of those generated by
the six-switch VSC. This is a major advantage of these rectifier topologies when it
comes to electromagnetic interference and the generation of bearing currents. The
use of these rectifier topologies with ac-side bidirectional switches can significantly
improve the reliability of the generator of a wind energy system.
190
The inversion stage, composed of multiple three-phase voltage source converter

modules connected in parallel and operated in an interleaved fashion, was the subject of Chapters 5 and 6. The inversion stage of the proposed power electronics
interface was envisioned to be shared by multiple wind turbines of a wind farm.
Each paralleled converter module processes only a fraction of the total power extracted from the wind, which reduces the stress on the switches, reduces losses, and
increases the redundancy and reliability of the system. Through interleaving, harmonic cancellation occurs, which reduces the filtering requirements on the ac-side of
the converter.
Chapter 5 presented a comprehensive study of ripple cancellation effects resulting from the interleaved operation of N parallel three-phase VSC modules. Analytical expressions were developed for the common-mode voltage, the ac phase currents,
the dc-link current, as well as the current imbalance among the modules, i.e., the
inter-module circulating currents. The analytical results not only confirmed the ripple cancellation effects in the phase currents, as previously shown in the literature,
but also showed that the same effects occur in the common-mode voltage as well as
the dc-link current. In other words, the harmonics that remain in the common-mode
voltage, phase current, and dc-link current spectra are centered at N multiples of
the carrier frequency. It was concluded that the current harmonics that are cancelled in the phase current correspond to the inter-module circulating current. The
analytical results provide a simple method to determine the remaining harmonics in
the spectra of these variables.
Chapter 6 focused on the practical problem of low frequency circulating current in parallel voltage-source converters. It was shown that directly applying the
method to two interleaved modules resulted in imbalance and inherent circulating
current problems. This was caused by the inability of the control to sense the circulating current and react to it during four of the six sectors. The master/slave
configuration also presented the same circulating current sensing problem, but since
the slave drive signals are defined by the master converter, there is only a bounded
and predictable inherent low frequency circulating current. This configuration was
used in an experimental set-up to verify the use of the nonlinear average current
control for interleaved VSC modules. It was shown that the previously sinusoidal
current waveforms of the stand-alone VSC became distorted due to the incapability
191
of the control to sense and react to the inherent circulating current. In order to
improve the current waveforms and make the implementation modular, the modular
approach with two current sensors was proposed. By alternately sensing the positive
and negative dc-link rail currents, it is possible to obtain information regarding the
circulating currents in every sector and successfully eliminate them. The resulting
current waveforms are sinusoidal and comparable to those of the stand-alone VSC.
Some suggestions for the continuation of these research topics are:
An analysis of the power electronics interface operating as a whole (dc-link
voltage regulation and current sharing among the rectifier units of the wind
farm).
The inversion stage consisting of parallel voltage-source converter modules
is in essence a multilevel converter. The nonlinear average current control

could possibly be adapted to multilevel converters such as the diode clamped
multilevel converter.
192
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202
APPENDIX A
Wind Energy State-of-the-Art
A.1
General Concepts
A.1.1
Parts of a Wind Turbine
Figure A.1 illustrates a typical upwind turbine and its main components.
Blade
Low-speed shaft
Anemometer
High-speed shaft
Wind vane
Generator
Gearbox
Nacelle
Rotor
Yaw Bearing
Yaw motor
Pitch
Tower
Figure A.1: Parts of a wind turbine.

The functions of the turbines components are:
Anemometer: Instrument for measuring the wind speed. The wind turbine
control system uses the measurements of the anemometer to initiate operation

once a predefined wind speed is reached (cut-in), to adjust the angle of the
203
blades (variable pitch) according to the wind speed, and to stop operation if
the wind speeds up to the maximum speed for safe operation (cut-out).
Blade: Captures the energy in the wind and turns the low-speed shaft. Most
wind turbines have two or three blades.
Gearbox: Converts the low-speed/high-torque energy of the low-speed shaft

into high-speed/low-torque energy for driving the generator.
Generator: Transforms the mechanical energy of the high-speed shaft into

electrical energy.
High-speed shaft: Rotor of the generator.

Low-speed shaft: Connects the rotor of the turbine to the gearbox.
Nacelle: Connects to the rotor and houses the low-speed shaft, gearbox, highspeed shaft, and generator.
Pitch: Rotation of the blades along their longitudinal axis. Variable pitch is
useful for shedding excess winds.
Rotor: The blades of a wind turbine. The rotor is connected to the low-speed
shaft.
Tower: Structure that supports and elevates the nacelle and rotor off the
ground.
Wind vane: Instrument used to indicate the direction of the wind. The wind
turbine control system uses the information obtained from the wind vane to
position the turbine into or out of the wind by means of the yaw mechanism.
Yaw bearing: Fixed to the nacelle, the yaw bearing is used to turn the turbine
into or out of the wind
Yaw motor: Turns the nacelle, by means of the yaw bearing, so that the rotor
is positioned into or out of the wind.
204
A.1.2
Upwind vs. Downwind
An upwind wind turbine faces into the wind flow while a downwind wind
turbine is positioned so that the wind flows from the nacelle to the rotor blades
[103]. A downwind wind turbine does not require a yaw mechanism nor a wind vane
since the turbine naturally rotates with any change in wind direction.
Downwind wind turbines present practical problems for high power installations. The first problem is that the high power cables leading down the tower from
the generator will be become twisted and, without a yaw mechanism, there will be
no way to untwist them [20]. Secondly, wind shading is more significant in the case
of downwind wind turbines due to the position of the nacelle, which dislocates the
wind before it reaches the rotor blades. Therefore, downwind wind turbines present
higher power fluctuations than upwind wind turbines [20].
A.2
Wind Turbine Control

Wind turbines are generally designed to maximize their power output at the
wind speed with the highest probability at the site. It would be inefficient to optimize
the turbines performance for a higher yet less likely wind speed. When the wind
becomes stronger than the rated wind speed, the wind turbine must shed some of
the excess energy in order to regulate the power and avoid damage to both the
turbine and the surrounding area. This is achieved by passive or active control
strategies. The only passive control strategy is stall control which is incorporated
into the aerodynamic design of the blades by varying the width and twist of the
blades from the root to the tip. Active control strategies require movement of either
the blades or the turbine itself; they include pitch control, active stall control, yaw
control, and blade tip control. A wind turbine may incoporate more than one of
the aforementioned control strategies in order to shed excess energy or to brake the
turbine.
A.2.1
Passive Stall Control
Passive stall was popular among many Danish wind turbine manufacturers
during the 1980s and 1990s [45]. The blades are designed with varying width and
taper off from the root to the tip. The blades are also twisted in order to stall the
blade gradually as the wind speed increases. The twist is most prominent at the
205
root since the blade should stall from the root to the tip. The higher the speed of
the wind, the greater the portion of the blade in stall.
Once the blade is properly designed, the stall mechanism will not allow power
excursions to pass through the drivetrain during wind gusts [104]. This is due to the
limited aerodynamic power, which results in slow power regulation that causes only
small power fluctuations [45]. This is an advantage over the active control strategies
whose feedback control loops are not fast enough to shed the gusty winds and can
result in large output power variations [45]. However, the design of the blades is a
highly complex aerodynamic problem.
A turbine using passive stall control may not be able to start-up by itself
at low wind speeds and will either wait for the wind speed to increase or use the
generator as a motor to start the turbine [104]. Braking the turbine for maintenance
or during excessive winds is also a problem since the blades cannot be feathered.
Stall controlled wind turbines also generate more aerodynamic noise.
A.2.2
Pitch Control and Active Stall Control
Active control strategies such as pitch control and active stall control have the
main advantage of offering power controllability to the turbine as well as controlled
start-up and emergency braking [45]. A wind turbine using a variable pitch control
can operate at a good performance coefficient over a wide range of wind speeds [74],
which maximizes the power extracted from the wind for each wind speed. This is a
significant improvement over passive stall-regulated wind turbines.
Pitch control and active stall control are similar in the sense that in both cases
the blades are pitched into or out of the wind by an actuator located in the hub at
the root of the blade. By pitching the blades, both control strategies are able to vary
the lift on the blades. The difference lies in the direction the blades are pitched.
Figure A.2a) presents the cross section of a blade. The blade is rotated/pitched
around the logitudinal axis represented in the figure by the dashed-dotted line. As
the blade is rotated, the airflow direction forms an angle with the chord line of the
cross section, denominated angle of attack. The angle of attack will alter the velocity
of the air which flows around the blade and, consequently, alter the lift on the blade.
Of the two active control strategies, pitch control combined with variablespeed operation is the state-of-the-art of large wind turbines [21]. In the case of
206
Chord
line
Angle of attack
Airflow
a)
Pitch Control
Active Stall Control
b)
c)
Figure A.2: a) Definition of angle of attack and rotation axis, b) Pitch

control, and c) Active stall control.
pitch control, when the wind becomes too strong, the pitch mechanism rotates the
blade slightly out of the wind so that difference between the speeds of airflow on the
upper and lower portions of the blade cross-section becomes smaller, thus reducing
the lift. The blade is pitched clockwise, reducing the angle of attack, as presented in
Fig. A.2b). The main disadvantage of pitch control is the large power fluctuations
during gusty wind conditions due to the limited speed of the pitch mechanism [45].
The output power will fluctuate around the rated power of the turbine.
For low wind speeds, active stall control operates in the same manner as pitch
control to optimize power extraction. However, when the wind exceeds the rated
speed, the blades are pitched counterclockwise. This increases the angle of attack,
causing the lift to decrease and, consequently, the blades to stall, as shown in Fig.
A.2c). Although active stall control is not as popular as pitch control, it provides
good aerodynamic braking and it is able to compensate for variations in air density
and achieve smoother output power without the large power fluctuations of pitch207
controlled turbines [45]. However, the drag loads on the blade are higher in the case
of active stall control, thus requiring stiffer blades.
A.2.3
Blade Tip Control
An actuator is placed within the blade close to the tip. When the wind speed
increases beyond the rated wind speed, the actuator feathers the tip of the blade
to shed the excess power. Therefore, the controllable surface of the blade is only
the tip. The forces distributed along the blade in the cases of pitch control and
active stall control are now concentrated on the tip. The movement of the tip of
the blade in relation to the remainder of the blade is illustrated in Fig. A.3. The
main advantage of blade tip control is that the root of the blade is fixed to the hub
which provides a stronger foundation for the blade. However, since the forces at the
tip of the blade are increased as it is feathered, a stiffer blade is required. Another
disadvantage is the location of the actuator mechanism within the blade and distant
from the hub which makes maintenance an issue [45].
o
0 < z < 90
90
Figure A.3: Blade tip control.
A.2.4
Yaw Control
The yaw motor (refer to Fig. A.1) turns the turbine out of or into the wind.
Yaw control is difficult to design and maintain [104], and is generally used only
208
for small wind turbines (1 kW or less) since the rotor is subjected to periodic and
varying stresses which could cause damage to the turbine [20].
A.3
Wind Turbine Technologies

The majority of wind turbines operating today are fixed-speed turbines using
induction generators [105]. However, the efficiency advantages of variable-speed

operation has lead to the steady increase in the number of variable-speed turbines
in the field. These turbines use power electronics converters or run at two speeds
with pole switching on the induction generator [105].
The difference between fixed-speed and variable-speed wind turbine operation
can be best explained with the help of Fig. A.4. Figure A.4 presents the output
power variation of two wind turbines rated at 1 p.u. as a function of the wind speed
[10]. The first turbine is a variable-speed pitch-controlled wind turbine. Before the
cut-in speed (vc1 ), the wind speed is too low to be useful for energy generation. Once
the cut-in speed is reached, the variable-speed characteristic of the turbine allows
the rotor output power to be a cubic function of the wind speed
1
Pt = Cp Av 3
2
(A.1)
where Cp is the performance coefficient of the rotor. This equation is almost identical
to that of the power in the wind given by (1.1), except for the presence of the
performance coefficient term. The mechanical power of the rotor is, therefore, limited
by the performance coefficient, which has a maximum theorectical value equal to the
Betz limit of 59.3% [20]. Rated power is reached when the wind speed increases to
the rated speed (vR ) and the pitch control initiates operation, shedding the excess
energy in the wind and maintaining the output power of the turbine constant and
equal to the rated power.
The second turbine of Fig. A.4 is a fixed-speed stall-regulated turbine. The
turbine design was optimized to achieve maximum output power at the rated wind
speed (vR ). As mentioned previously in the section on passive stall control, stallregulated wind turbines may not be able to start-up at low wind speeds, requiring
either external help from the generator or that the wind speed increase. For this
reason the cut-in speed of the fixed-speed turbine (vc2 ) is higher than in the case of
209
P.U. Output
Power
1
0.8
0.6
0.4
0.2
vc1
vc2
vR
Wind speed
Turbine 1: Variable-speed pitch-controlled

Turbine 2: Fixed-speed stall-regulated
Figure A.4: Power output comparison between a variable-speed pitchcontrolled turbine and a fixed-speed stall-regulated turbine
[10].
the variable-speed turbine. Above the cut-in speed and below the rated wind speed,
the power extracted from the wind is lower than in the case of the variable-speed
turbine. Above the rated wind speed, the stall control limits the power extracted
by the rotor, which falls below the rated value. The output power of the turbine
above the rated wind speed is lower than in the case of the pitch-controlled turbine. From the graph, it can be concluded that the variable-speed pitch-controlled
turbine is more efficient than the fixed-speed stall-regulated turbine. The efficiency
improvement will depend greatly on the wind speed characteristics of the site. If the
site presents steady wind speeds, the added cost and complexity of a variable-speed
turbine may not justify the small increase in efficiency. However, in the case of site
with a more distributed wind speed characteristic, the efficiency increase will be
significant. An example of this case will be discussed in Section A.3.1.
Fixed-speed turbines and variable-speed turbines will be discussed further in
the following subsections. First, however, tip-speed ratio, which determines if the
turbine operates at fixed- or variable-speed, will be discussed to define the main
210
difference between the two types of turbines and to highlight the increase in rotor
output power when variable-speed is used over fixed-speed.
A.3.1
Tip-Speed Ratio
The tip-speed ratio is the ratio between the blade tip speed and the wind speed
=
rt
v
(A.2)
where r is the radius of the blade in meters, t is the angular velocity of the rotor
in rad/s, and v is the wind speed in m/s. There are two types of turbine operation
concerning the tip-speed ratio: constant rotor speed and constant tip-speed. Fixedspeed wind turbines employ constant rotor speed while variable-speed wind turbines
employ constant tip-speed, which requires that the rotor speed change according to
the wind speed. The benefits of using a constant tip-speed ratio over a constant
rotor speed can be best explained by Fig. A.5 taken from [11]. The graph shows
the wind speed versus the rotor speed for different power levels (given in kilowatts
and represented by different colored areas). The optimum tip-speed ratio for this
example turbine would be = 7 because it achieves the highest power extraction at
the lowest wind speeds. In other words, every intersection of the = 7 line with the
power contours occurs at the point of the contour where the wind speed is lowest.
For a tip-speed ratio smaller or larger than 7 and operation, for example, at 2 to 3
kW, the wind speed that would achieve this power output would be higher than 4.9
m/s, which would be wasting some of the energy available in the wind. For = 13,
the turbine is at the limit of wind turbine operation, beyond this limit ( > 13) the
wind turbine would operate as a giant fan, drawing energy from the grid.
In the case of a fixed-speed turbine, the rotor of the wind turbine rotates at
a constant speed independent of the variation in the wind speed. Consider that
the turbine was designed to operate at 60 rpm. As the wind speed increases, the
maximum power the turbine will be able to extract is 4 to 5 kW as opposed to the
14 to 15 kW of the variable-speed turbine. This represents a considerable waste of
power for the given site. It should be noted that if the site has a high probability
of steady winds at a given speed, a fixed-speed turbine may be more economically
viable than a complex and expensive variable-speed turbine.
211
130
14 to 15
13 to 14
12 to 13
11 to 12
10 to 11
9 to 10
8 to 9
7 to 8
6 to 7
5 to 6
4 to 5
3 to 4
2 to 3
1 to 2
0 to 1
-1 to 0
-2 to -1
-3 to -2
-4 to -3
120
110
100
Rotor Speed [rpm]
90
80
70
60
l = 13
50
40
30
l=7
20
10
0
10
Wind Speed [m/s]

Figure A.5: Section of power surface domain (vertical view) [11].
The number of blades of a wind turbine is indirectly connected to the tipspeed ratio. Wind turbines with a large number of blades (20 or more) are used for
water pumping and present a high starting torque and a low tip-speed ratio. Wind
turbines with two or three blades are used for electric power generation and have
a low starting torque and a high tip-speed ratio. These turbines may require an
auxiliary starting system when the wind speed reaches the operation range of the
turbine. Wind turbines with high tip-speed ratios are able to use smaller and lighter
gearboxes since the speed of the rotor (low-speed shaft) will be closer to the speed
of the high-speed shaft [45].
The performance coefficient, Cp , is a function of the tip-speed ratio. The
theoretical performance coefficient is derived from Betzs law which considers an
infinitely thin rotor with a fluid flowing through it at a given speed. The undisturbed
212
fluid will flow through the rotor and its speed will be reduced. This speed reduction
is due to the conversion of the fluids kinetic energy into mechanical energy in the
rotor. The theoretical performance coefficient is given by
Cp =

1
(1 + ) 1 2
2
(A.3)
which is maximum when = 1/3, resulting in 59.3%. The performance coefficient

of a wind turbine will be lower than the theoretical value due to the mass of the
rotor and the length of the rotor blades. Rotor efficiencies vary greatly from one
turbine to the next and also with the wind speed [20].
A.3.2
Fixed-Speed Turbines
In the early 1990s, the standard wind turbine operated at fixed-speed and was
directly connected to the grid through an induction generator [45]. Fixed-speed
wind turbines operate at a constant rotor speed, independent of the wind speed.
The rotor speed is determined by the frequency of the grid, the gearbox ratio, and
the number of poles of the generator [45] [24]. Since the rotor speed is constant,
maximum efficiency is reached at a single wind speed (the rated wind speed), which
is chosen based on the wind speed probabilities of the installation site [106]. In order
to increase the power production of fixed-speed wind turbines, a second winding set
can be added to the induction generator, where the first set of windings is used for
low wind speeds (using typically 8 poles) and the second set of windings is used for
medium and high wind speeds (using typically 4 to 6 poles) [45] [23].
In addition to the squirrel-cage induction generator, fixed-speed wind turbines
use a power electronics soft-starter and capacitor bank connected between the generator and the grid. When the induction generator is initially connected to the
grid, large in-rush currents flow through the system causing electrical disturbances
in the grid and high torque spikes in the drivetrain [107]. The in-rush currents can
reach 5 to 7 times the rated current of the generator and their peak value can be
as high as 18 times the rated current [107]. In order to reduce the in-rush currents,
a thyristor-based soft-starter is connected between the generator and the grid. The
soft-starter typically limits the in-rush current to half of the rated current of the
generator [107]. The soft-starter is used only for the initial connection of the tur-
213
bine to the grid and should be bypassed once the transients have passed, otherwise,
it will contribute to losses in the system and may become permanently damaged
due to its limited thermal capacity [107]. Therefore, once steady-state operation is
reached, the soft-starter is short-circuited by a contactor.
The fluctuations in the wind speed are transmitted through the drivetrain and
appear as electric power fluctuations at the connection to the grid. The induction
generator draws reactive power from the grid in order to produce active power. As
the active power fluctuates due to the intermittent nature of wind, the reactive
power required by the generator will also fluctuate, which can result in large voltage
fluctuations, in the case of weak grids, and considerable line losses [45]. Therefore,
a capacitor bank is used for reactive power compensation.
Fixed-speed wind turbines have the advantage of being simple, robust and
reliable; however, they present uncontrollable reactive power consumption which
requires that they be connected to a stiff grid.
A.3.3
Variable-Speed Turbines
Variable-speed wind turbines are designed to operate close to maximum efficiency for any wind speed. This is achieved by allowing the rotor speed to vary with
the wind speed, i.e., by maintaining a constant tip-speed ratio. By allowing the
rotor speed to follow the fluctuations in the wind speed, the voltage at the output of
the generator will have variable frequency and amplitude (the voltage will sag when
the wind speed is low and swell when the wind speed is high). If the generator were
connected directly to the grid, this voltage variation would ultimately cause damage
to the grid or the machine itself. For this reason, variable-speed wind turbines use
power electronics converters connected between either the stator and the grid or the
wound rotor of the generator and the grid to transform the wild ac energy into a
form that is compatible with the grid.
Variable-speed wind turbines have the advantage of extracting the maximum
amount of energy from the wind and providing active and reactive power controllability, which is an important aspect for grid interconnection. Due to the presence
of the power electronics converter, the power quality of variable-speed turbines is
better than in the case of fixed-speed turbines. The mechanical stress on the gearbox
is also improved in the case of variable-speed turbines. The main disadvantage of
214
variable-speed turbines is the cost.
A.4
Transmission
The rotational speed of large wind turbines is typically 10 to 60 rpm, depending
on the the diameter of the rotor blades [11]. For high efficiency and high power
density (, i.e., reduced size and weight), typical generators are designed to operate
at 1200 to 1600 rpm [11]. Therefor, the rotational speed of the low-speed shaft needs
to be converted into a high speed to be compatible with the operational speed of
the generator. This is achieved by placing a gearbox between the rotor and the
generator to step-up the rotational speed of the rotor. Another option is to design
a machine to operate at the low speed of the turbines rotor. This eliminates the
need for the gearbox and is denominated direct drive operation.
A.4.1
Gearbox Transmission
Gearbox transmission is used to convert the low-speed/high-torque energy of

the low-speed shaft into high-speed/low-torque energy for driving the generator.
The presence of a gearbox simplifies the machine design, since standard off-theshelf machines can be used to convert the mechanical energy to electrical energy.
Typically, three-stage planetary gearboxes are used in wind turbines [108].
The gearbox is a heavy and expensive component of the wind turbine system.
The gearbox itself represents 10 to 20% of the total cost of the turbine [109] [110].
Additional expenses with a stiffer foundation and tower construction are incurred
due to the weight of the gearbox which can reach 50 to 70 tons in a multi-megawatt
wind turbine [108].
Gearbox failure is the main cause of downtime of wind turbines (lost production) and it is the component that most requires maintenance [111]. The main cause
of gearbox failure is the misalignment of the gearbox and generator, which results
in bearing and gear wear and, ultimately, failure [112]. A stiff bedplate should
be mounted inside the nacelle to provide support and the proper alignment of the
gearbox and generator [24].
The second leading cause of gearbox failure is attributed to poor lubrication
and lack of routine maintenance [111]. Wind turbines are usually installed in harsh
environments, where dust particles, dirt, sand, and moisture can penetrate the lu215
brication system and contaminate the lubricating oil. These contaminants can speed
up the wear on the gearbox and reduce its life. A well-designed lubrication system
is essential to maintaining the gearbox properly lubricated and as contaminant-free
as possible [111].
Gearboxes also suffer from bearing issues and fatigue due to excessive loads at
low wind speeds [108], and electromagnetic torque resulting from fault conditions on
the grid, which are transmitted through the generator [113]. Therefore, the gearbox
requires routine maintenance to avoid failure. However, in the case of failure, most
situations require that the gearbox be removed from the turbine and repaired at a
different location [113], which can be very costly especially considering that wind
farms are generally located in remote areas, such as deserts, mountains, prairies,
and off-shore [112]. In the case of off-shore wind farms, the frequent maintenance
and possible need to remove the gearbox from the turbine favors the use of direct
drive transmission.
A.4.2
Direct Drive Transmission
Direct drive wind turbines couple the rotor of the generator directly to the
low-speed shaft of the rotor, eliminating the need for a gearbox. Figure A.6 presents
the cross-section of a direct drive wind turbine [114]. The turbines rotor and the
generators rotor rotate as one and are supported by a single bearing system on a
fixed shaft, which provides support to the system.
In the case of direct drive transmission, a generator must be specially designed
for the wind turbine. The low rotational speed of the rotor results in a machine
with a large number of poles and, consequently, a very large diameter to accomodate
all of the poles. The traditional choice for the generator has been the permanent
magnet synchronous machine; however, in recent years, novel machines, such as the
transverse flux machine, the reluctance machine, and the windformer, have been
proposed for direct drive turbines [21].
Direct drive transmission is very attractive for off-shore wind farms, where
the maintenance and replacement of the gearbox can be difficult and costly. The
generator chassis can be integrated with the nacelle [24], which minimizes the size
of the nacelle and reduces the requirements on the support structure as well as
installation costs. The absence of the gearbox also reduces the audible noise and
216
Generator:
Stator Rotor
Rotor
Nacelle
Fixed shaft
Tower
Blade
Figure A.6: Direct drive arrangement.

vibrations within the turbine, which in turn reduces the stress on the foundation
[115].
All direct drive wind turbines require a large power electronics converter, rated
for the rated power of the turbine. The converter is connected to the stator windings
and converts the energy output of the generator into a form which is compatible
with the grid. Depending on the power rating of the turbine, the converter can be
expensive; however, with the on-going improvements in high power semiconductor
devices, the cost associated with the converter should continually decrease.
A.5
Generators
The generator converts the mechanical energy of the rotor into electrical en-
ergy. The three most widely used generators for wind turbines are the induction generator, the doubly-fed induction generator, and the permanent magnet synchronous
generator. Novel machines are being proposed for wind energy generation, such
as the transverse flux machine, the reluctance machine, and the windformer [21].
Although most of the novel machines are not new technologies per se (e.g., the
reluctance machine has been used for decades in a variety of applications), they
are new to the wind industry, which has always been an industry that uses well217
established technologies of other high power applications and applies them to wind
energy generation. This mentality is reluctant to change and these new machines
will take some time to establish themselves as equal if not better than currently used
technologies. Therefore, only the three traditional and popular machine technologies previously mentioned will be explained, accompanied by a high-level discussion
regarding the requirements for connecting the different machine technologies to the
grid. Specific power electronics interface topologies, which are the focus of this
dissertation, will be discussed in Section 1.7.
A.5.1
The permanent magnet synchronous generator was proposed for the electromechanical energy conversion of wind turbines due to its self-excitation. In other words,
the rotor of the generator is a permanent magnet pole system and does not require a
connection to the grid. This is an advantage over machines that require external field
excitation through rotor windings, field circuitry, and slip rings, which utlimately
decrease the reliability of the system and require regular maintenance [116].
Since the permanent magnet synchronous generator does not require a connection to the grid, it is the ideal candidate for wind turbine installations in isolated
areas where there is either a weak local grid or no grid at all. The limited maintenance requirements (generally limitted to bearing lubrication) and the resistance
of the rotor to the ingress of dirt, are more of the advantages of the synchronous
machine for islanded operation [22].
The permanent magnet synchronous generator presents a reasonably small size
even when a large number of poles is needed. This size and consequential weight
characteristic of the machine has led to its popularity in direct drive wind turbines.
Despite their advantages, permanent magnet synchronous generators are not
as widely used as induction and doubly-fed induction generators. This is due to
several reasons: the permanent magnet becomes demagnetized over time since it
operates in strong magnetic fields within the generator [22]. The rotor is made from
expensive rare earth materials (e.g., Neodynium). The rotor temperatures must be
maintained below the Curie point of the magnetic material and the thermal limits
of the binding material (powder metallurgy composites) in order not to compromise
the operation of the system [22].
218
The electrical frequency of the generator is directly related to the rotational

speed of the shaft and the voltage varies greatly with both the load and shaft speed
[22]. Since the rotor is a permanent magnet instead of a winding, there is no way to
adjust the magnetic field of the rotor, which in the wound field synchronous generator
is achieved by varying the dc field current [22] [75]. Therefore, the synchronous
generator should be indirectly connected to the grid through a power electronics
interface. The interface is connected between the stator windings and the threephase grid and must be rated for the full power of the wind turbine. Since the
synchronous generator does not consume reactive power like the induction generator,
the rectification stage of the interface can be composed of a simple diode bridge. This
is an advantage since high power diodes are extremely robust and reliable, contrary
to the high frequency high power switches needed for the rectification stage of the
induction generator interface.
A.5.2
Doubly-Fed Induction Generator
The doubly-fed induction generator is essentially a wound rotor induction generator with its stator windings directly connected to the grid and its rotor windings
excited through a bidirectional power electronics converter, as illustrated in Fig. A.7.
The term doubly-fed refers to the fact that both the stator and rotor are connected
to the grid (directly and indirectly, respectively). The presence of the rotor-side
power electronics converter allows for variable-speed operation over a large, but restricted, range of wind speeds [45]. The speed range is directly related to the power
rating of the converter [45]. For example, a converter rated at 25% of the total turbine power will result in the doubly-fed induction generator varying its speed 33%
around the synchronous speed [10].
The power electronics interface controls the entire operation of the doubly-fed
induction generator, both under normal and fault conditions [45]. The converter
is generally composed of two back-to-back voltage source converters which operate
independently. The grid-side converter basically maintains the dc-link voltage constant. The rotor-side converter injects variable frequency current into the rotor to
compensate for the difference between the rotational speed of the high-speed shaft
and the stator-side electrical frequency (grid frequency). Depending on the direction
of power flow into or out of the rotor, the doubly-fed induction generator operates in
219
Wound Rotor
Induction Generator
Grid
AC
DC
DC
AC
Figure A.7: Doubly-fed induction generator system.

subsynchronous or oversynchronous mode, respectively, while continuing to supply
energy to the grid through the stator [45].
An advantage of the doubly-fed induction generator is its flexibility in being
magnetized by either the grid or the rotor-side converter, which achieves this by
controlling the rotor excitation current [45]. The power electronics interface is rated
at a fraction of the total power of the wind turbine, therefore, is less expensive
and more reliable than fully rated power electronics interfaces. However, since the
generator is controlled through the rotor windings, slip rings are inevitable [45], thus,
requiring routine maintenance.
220
APPENDIX B
Open-Loop Simulations of Rectifiers T and TY
The input of each phase of the rectifier can be modeled as a sinusoidal voltage source in series with an inductor, L, as presented in Fig. B.1a). This model
can represent the grid plus a filter inductor or a generator in periodic steady-state
operation. In the case of the generator, the inductor represents the stator leakage
inductance and any external filtering inductor added to reduce the switching ripple
generated by the rectifier.
Since the converter voltages determine the sectors in the space vector domain,
they are the natural choices for the angular references. For phase a, the phasor
diagram is presented in Fig. B.1b), where Vsa is the phasor of the sinusoidal voltage
source (terminal voltage) of phase a and phasors Ia and Vca represent the fundamental components of the phase current and converter voltage of phase a, respectively.
Converter voltage Vca is the angular reference and phase current angle is defined
positive if it leads the converter voltage. The same is true for terminal voltage angle
. The power factor angle, , is positive if the current leads the terminal voltage.
ia(t)
vsa(t)
Vsa
Ia
L
vca(t)
-j2pf1LIa
q
g
j
Vca
b)
a)
Figure B.1: a) Equivalent circuit for phase a and b) the corresponding

phasor diagram.
The inputs of the SVM block are the reference voltages which represent the
desired fundamental frequency components of the converter voltages. In order to
determine the magnitude and phase angle of the reference voltages, it is necessary to
first determine the desired current magnitude and converter voltages. Considering
that the power factor, the output power of the rectifier (P0 ), and magnitude of the
source voltages (Vspk ) are known parameters, the magnitude of the phase current
221
can be calculated
Ipk =
2
P0
.
3 Vspk cos
Thus, the phase currents are defined as

ia (t) = Ipk sin (1 t )

2
ib (t) = Ipk sin 1 t

3

2
ic (t) = Ipk sin 1 t +
3
The converter voltage of phase a is determined based on the phasor diagram
of Fig. B.1b). Considering, for simplicity, that the phase of the source voltage is the
angular reference, the converter voltage is
Vcapk = Vspk 0o (2f1 L90o + RL 0o ) Ipk
(B.1)
where RL is the equivalent series resistance of the filter inductor/stator leakage

inductance.
The reference voltages of the rectifier topologies can now be determined. The
phase angle of the reference voltages with respect to the source voltages are equal
to . The magnitude of the reference voltages are determined by the modulation
index [58], given for phase a by
M=
Vcapk
.
Vdc /2
(B.2)
The SVM block introduces a phase lag due to its internal sample and hold
process. Therefore, an additional phase angle should be added to the reference
voltages in order to compensate for this phase lag. This angle is given in degrees by
f1
180.
fs
(B.3)
The currents cannot lead the source voltages by more than 30o . The maximum
phase lead will depend on the design parameters. This can be explained by a simple
example. Consider the design parameters: P0 = 10 kW, Vspk = 155 V, Vdc = 400
V, and L = 1 mH with RL = 20 m. Considering that the currents lead the source
222
voltages by = 30o , the resulting converter voltage from (B.1) will be approximately
164 6o V. This converter voltage would result in = 36o , which is beyond the
30o limits defined in [66] and would, thus, result in current distortion. For this
example, the currents should lead the source voltages by no more than 24o .
In Chapter 3, the simulation schematic of T using zero vector {1 1 1} was
presented. A second modulation strategy for rectifier topology T was implemented
in SABER for the loss comparison of Section 4.4. This modulation strategy minimizes the number of switches conducting in each sector by using only the switches
of the active vectors to realize the zero vectors. Therefore, in Sectors I and IV zero
vector {1 1 0} is used, in Sectors II and V zero vector {1 0 1} is used, and in Sectors
III and VI zero vector {0 1 1} is used. The combinatorial logic for this modulation
strategy is presented in Fig. B.2. In this case it was necessary to define the sectors by
using clock signal generators. The clock generator outputs 1 whenever the reference
voltages are in that sector. By using clock generators, two inverters and two AND
gates need be added to the logic of Fig. 3.12. It is important to point out that the
sector definitions are based upon the reference voltages with the phase correction of
(B.3).
Rectifier topology TY was also implemented in SABER and the power stage
and combinatorial logic are presented in Fig. B.3. Topology TY uses the same
reference voltages and settings for the SVM block as presented in Fig. 3.12 and the
same sector definitions as Fig. B.2.
223
Sector Definitions
Sector1
CLK
freq:60
duty:1/6
td:4.39m
Sector2
CLK
freq:60
duty:1/6
td:7.17m
Sector3
CLK
freq:60
duty:1/6
td:9.95m
Sector4
Sector5
CLK
freq:60
duty:1/6
td:12.73m
CLK
freq:60
duty:1/6
td:15.50m
Sector6
CLK
freq:60
duty:1/6
td:1.62m
Combinatorial Logic
S1
S2
S2
buf
S3
buf
Drv_Sab
Drv_Sbc
Sector3
Sector2
Sector6
Sector5
S1
S3
buf
Drv_Sca
Sector1
Sector4
Figure B.2: Combinatorial logic for T when using zero vectors {1 1 0}

for Sectors I and IV, {1 0 1} for Sectors II and V, and {0 1 1}
for Sectors III and VI.
224
Power Stage
La
Va
amplitude:155
o
phase:0
Vb
amplitude:155
o
phase:-120
Vc
amplitude:155
o
phase:120
l:1m
r:20m
200
Lb
l:1m
r:20m
200
Lc
l:1m
r:20m
S1y
DrvS1
S2y
DrvS2
S3y
DrvS3
Combinatorial Logic
S1
S2
S2
Sab
buf
S3
S1
Sbc
buf
S3
Sab
Sca
Sab
Sector1
Sector4
buf
Sector2
Sector5
Sca
Sector3
Sector6
Sbc
DrvS1 Sector3
Sector6
DrvS2
Sbc
Sector1
Sector4
Sca
Sector2
Sector5
DrvS3
Figure B.3: SABER simulation schematic of the power stage and PWM
of TY .
225
APPENDIX C
Closed-Loop Operation of Rectifier T
Reference [117] proposed a modulation strategy for TY which defines the space
vectors based on the converter voltages and the magnitudes of the phase currents.
The modulation strategy turns on the switch connected to the phase with the highest
instantaneous current and keeps it on throughout the entire sector. The other two
switches are controlled so that their respective phase currents follow the shape of
the input voltage. This strategy was implemented in space vector modulation by
[118] and extended to rectifier T in [119]. References [119] and [118] were the first
to propose a full SVM control for T and TY . Previous work, [67], had implemented
a combination of hysteresis current control and SVM, by means of a look-up table.
The open-loop operation, presented in Subsection 3.4 of Chapter 3, showed
that T , TY , and TB can be controlled by the same strategy used for the six-switch
VSC with the addition of logic gates to generate the drive signals of the bidirectional
switches. Therefore, it is expected that the closed-loop control of the six-switch VSC
can also be used for T , TY , and TB by adding the same combinatorial logic. From a
practical standpoint, this is a very attractive and simple solution since the six-switch
VSC is well established in both the existing literature and industry.
The closed-loop current control of T was implemented in SABER based on
the traditional space vector modulation of the six-switch VSC, [120]. Due to the
complexity of implementing SVM in a circuits simulator, the individual blocks of
the simulation will be explained separately.
The power stage of rectifier T is presented in Fig. C.1. The phase currents
are measured and scaled down by a factor of 0.175.
The sampled currents are now voltage signals and are the inputs of the current
control loop. The voltage signals are transformed into constant dc signals by two
subsequent transformations: the abc 0 transformation which maps the currents
226
Current Sensors
La
Va
Iam
amplitude:155
o
k:0.175
phase:0
l:1m
r:20m
Sab
200
Drv_Sab
Lb
Vb
Ibm
amplitude:155
o
k:0.175
phase:-120
l:1m
r:20m
Sbc
Drv_Sbc
Sca
Drv_Sca
200
Lc
Vc
Icm
amplitude:155
o
k:0.175
phase:120
l:1m
r:20m
Figure C.1: Schematic of the power stage of T .

into the stationary reference frame

I
1
2
I = . 0
3
1
I0
2
1
2
3
2
1
2
1
Ia
2

3 .
I
2 b
1
Ic
2
(C.1)
and the 0 dq0 transformation which rotates the direct and quadrature compo-
nents at the line frequency

Id
sin (1 t) cos (1 t) 0 I

Iq = cos (1 t) sin (1 t) 0 I

I0
0
0
1
I0
(C.2)
The transformations are based on peak quantities and the resulting constant dq0
current components are
Id = Ipk g cos
(C.3)
Iq = Ipk g sin
(C.4)
I0 = 0
(C.5)
227
where g is the gain of the current sensors. The zero component (I0 ) is null since the
three-phase system is balanced. The SABER schematic of the transformations are
presented in Fig. C.2.
!
abc ab0 Transformation
ab0 dq0 Transformation
Voltage Gain
+
Iam
+
_
k:2/3
_
Multiplier
+
Iam
Ibm
Idm
Voltage Gain
Ibm
k:1/2
amplitude:1
o
phase:90
frequency:60
Voltage Gain
Icm
Iam
k:1/2
k:0.866
amplitude:1
o
phase:0
frequency:60
Voltage Gain
Voltage Gain
Ibm
Multiplier
k:2/3
_
Multiplier
+
Iam
Voltage Gain
Icm
Ibm
Iqm
Multiplier
k:0.866
Ibm
Figure C.2: Schematic of the 0 and dq0 transformations.

The dq0 current components will be compared to reference dq0 signals and the
error signal will be the input of the current compensator. However, it is necessary
to first determine the plant in order to properly design the compensator. The plants
of the six-switch VSC and rectifiers T , TY , and TB are the same. The plant is the
equivalent circuit of Fig. B.1a) and the loop equation is

ia
vsa
vca

d
vsb L ib vcb = 0

dt
ic
vcc
vsc
The converter voltages can be substituted by

1
vca (t) = Vdc dS1 (t)
2

1
vcb (t) = Vdc dS2 (t)
2

1
vcc (t) = Vdc dS3 (t)
2
228
(C.6)
where dS1 (t), dS2 (t), and dS3 (t) are the the duty cycles of switches S1 , S2 , and S3 of
the six-switch VSC, respectively. The resulting loop equation is

1
ia
dS1
2

vsb L d ib Vdc dS 1 = 0

2 2
dt
1
ic
vsc
dS3
2
vsa
(C.7)
The transformations of (C.1) and (C.2) are now applied to (C.7). Note that
the abc 0 transformation is time invariant, therefore
dIabc
dI0
dt
dt
However, the 0 dq0 transformation is not
d
dT0dq0
dI0
(T0dq0 I0 ) = I0
+ dT0dq0
dt
dt
dt
(C.8)
where T0dq0 is the transformation matrix of (C.2). The resulting loop equation
after the transformations is

Id
Id
Dd
0
Vd
0 1 0

d
Vq = L Iq + L 1 0 0 Iq + Vdc Dq + Vdc 0

dt
0
0 0
I0
D0
12
V0
I0
The dq0 components of the source voltages are
Vd = Vspk
Vq = 0
V0 = 0
which can be substituted into (C.9). At the operating point
dId
=0
dt
dIq
=0
dt
229
(C.9)
therefore, equation (C.9) is simplified to

1
Vspk 1 LIq (s) Vdc Dd (s)
sL
1
Iq (s) =
[1 LId (s) Vdc Dq (s)]
sL
Id (s) =
(C.10)
(C.11)
in the Laplace domain. The block diagram of the plant is presented in Fig. C.3.
Vspk
+
Dd(s)
Vdc
1
sL
S_
Id(s)
w1L
w1L
+
Dq(s)
Vdc
1
sL
Iq(s)
Figure C.3: Block diagram of the plant.

Note the cross-coupling between the dq components of the current. In [121]
the authors addressed this problem by creating faux duty cycles to decouple the
terms
1 L
Iq (t)
Vdc
1 L
Dq (t) = Dq (t)
Id (t)
Vdc
Dd (t) = Dd (t) +
which changes the plant equations of (C.10) and (C.11) to

1
Vspk Vdc Dd (s)
sL
1
Iq (s) = Vdc Dq (s)
sL
Id (s) =
(C.12)
(C.13)
The current compensator is designed for (C.12) and (C.13). The cross-coupling
terms (1 LIq (s) and 1 LId (s)) are added to the output of the compensator.
A simple PI compensator was designed and the SABER schematic of the cur230
rent compensator and the addition of the cross-coupling terms can be seen in Fig.
C.4.
26.5n
8.24n
10k
Voltage gain
+
Idref -7.5
Idm
k:1/15
+
10k
Dd
1Meg
Voltage gain
Iqm
k:0.005
26.5n
8.24n
10k
Voltage gain
+
_
Iqref
Iqm
k:1/15
Dq
10k
1Meg
Voltage gain
k:0.005
Idm
Figure C.4: Schematic of the current compensator.

The dq duty cycles are the result of the summation of the current compensator
outputs and the cross-coupling terms. The duty cycles are transformed back into
the stationary reference frame by the inverse transformation (dq0 0) in order
to determine the duty cycles of the switches in each sector. As an example, the duty
cycle of S1 will be determined for Sector I. Figure C.5a) presents the drive signals
of switches S1 , S2 , and S3 of the six-switch VSC for Sector I.
From Fig. C.5a) it can be seen that
dS1 (t) =
1
[t1 (t) + t2 (t) + t7 (t)]
Ts
where
t7 (t) = (1 ) [Ts t1 (t) t2 (t)]
231
S1
S2
S3
tb
t0 t1 t2
2 2 2
t7
t2
2
v2
t2
vc
30o
v1
t1 t0
2 2
t1 ta
a)
b)
Figure C.5: a) Drive signals of switches S1 , S2 , and S3 of the six-switch

VSC for Sector I and b) derivation of the time associated
with the application of each voltage space vector in Sector I.
which yields
dS1 (t) = 1 +
t1
t2 (t)
+
.
Ts
Ts
(C.14)
In order to determine t1 (t) and t2 (t), Fig. C.5b) is used. The converter voltage
vector is realized by applying voltage space vectors v1 and v2 for t1 (t) and t2 (t),
respectively. The projection of the normalized converter voltage vector onto the
and axes yields
1
t (t) = t1 (t) + t2 (t) sin 30o = t1 (t) + t2 (t)
2
3
t (t) = t2 (t) cos 30o =
t2 (t).
2
Times t1 (t) and t2 (t) can now be defined in terms of t (t) and t (t)
1
t1 (t) = t (t) t (t)
3
2
t2 (t) = t (t)
3
which are substituted into (C.14), resulting in
"
#
3
dS1 (t) = 1 + D (t) +
D (t) .
3
(C.15)
The duty cycles of switches S2 and S3 are obtained following the same procedure.
The duty cycles were calculated for each sector and are summarized in Table C.1.
The SABER schematic of the inverse transformation and the implementation
of (C.15) for obtaining dS1 in Sector I from D and D is presented in Fig. C.6.
232
Table C.1: Duty cycles per sector of switches S1 , S2 , and S3 of TS .

Sector I
h
dS1 (t) = 1 + D (t) +
Sector II
3
D (t)
3
D (t)
dS2 (t) = (1 ) [1 D (t)] + 1+
3
h
i
1
dS3 (t) = (1 ) 1 D (t) 3 D (t)
Sector III
h
dS1 (t) = (1 ) 1 + D (t)
1 D (t)
3
dS2 (t) = 1 D (t) +
D (t)
3
dS3 (t) = 1 D (t)
2
D (t)
3
dS1 (t) = 1 + D (t) +
21
D (t)
3
dS2 (t) = 1 + 23 D (t)

h
i
2
dS3 (t) = (1 ) 1 3 D (t)
Sector IV
h
dS1 (t) = (1 ) 1 + D (t) +
1 D (t)
3
dS2 (t) = 1 D (t) +
2
D (t)
3
dS3 (t) = 1 D (t)
D (t)
3
Sector V
Sector VI
dS1 (t) = 1 + D (t)

i
h
dS2 (t) = (1 ) 1 + 23 D (t)
dS1 (t) = 1 + D (t) 3 D (t)

i
h
dS2 (t) = (1 ) 1 D (t) + 13 D (t)
dS3 (t) = 1
D (t)
3
dS3 (t) = (1 ) [1 D (t)]
1+
D (t)
3
Only the implementation of dS1 in Sector I is presented since the other duty cycles
are obtained in a similar fashion.
Table C.1 shows that the duty cycle of a given switch changes from sector to
sector. In order to properly select the duty cycle of a given switch for each sector,
switches are used to switch among the different duty cycle signals, as presented in
Fig. C.7 for switch S1 . One switch terminal is connected to the duty cycle signal of
a given sector and the switch is driven by a clock signal generator representing that
sector. The output is the duty cycle of the switch throughout the entire line cycle.
The duty cycles of the switches are the input of the pulse-width modulator
which compares the duty cycle (i.e., the modulating signal) with the triangular
carrier signal, also presented in Fig. C.7. The output of the PWM are the drive
signals for switches S1 , S2 , and S3 of TS . These drive signals are combined using the
same combinatorial logic of Fig. 3.12 for the open-loop case.
Figure C.8 presents the phase a source voltage and the phase a input current of
rectifier T for PFC operation and closed-loop current control. The same simulation
233
dq0
ab0 Transformation
Duty Cycle dS1 in Sectors I and IV
Multiplier
+
Dq
+
_
Da
One
+
+
dS1_I
m
amplitude:1
o
phase:90
frequency:60
amplitude:1
o
phase:0
frequency:60
Multiplier
Multiplier
m
Dd
Da
Multiplier
+
Dd
Db
m
Db
Multiplier
Dq
Voltage gain
Multiplier
k:0.577
m
0.5
One
1
Figure C.6: Schematics of the inverse transformation and duty cycle dS1
in Sectors I and IV.
parameters were used as in the case of open-loop operation of Subsection 3.4 of
Chapter 3.1 The initial transient gives way to a steady-state sinusoidal current which
is identical to that of the open-loop case. No saturation limit was implemented in
the control loop, which explains the high current values during the transient.
This simulation proves that the closed-loop control of the six-switch VSC can
be applied to rectifiers T , TY , and TB with minimal additional logic.
P0 = 10 kW, Vspk = 155 V, Vdc = 400 V, f1 = 60 Hz, fs = 10 kHz, L = 1 mH, ESR = 20 m
234
PWM
Duty Cycle Selection

Sector I
CLK
SET
dS1_I
enbl
freq:60
duty:1/6
td:90/21600
Sector II
CLK
dS1
S1
Comparator
dS1_II
offset:0.5
ampl:0.5
period:1/10000
freq:60
duty:1/6
td:150/21600
Sector III
CLK
dS1_III
enbl
freq:60
duty:1/6
td:210/21600
Sector IV
CLK
SET
dS2
dS1
S2
dS1_I
Comparator
offset:0.5
ampl:0.5
period:1/10000
freq:60
duty:1/6
td:270/21600
Sector V
CLK
dS1_II
SET
freq:60
duty:1/6
td:330/21600
Sector VI
CLK
enbl
dS3
S3
dS1_III
Comparator
offset:0.5
ampl:0.5
period:1/10000
freq:60
duty:1/6
td:30/21600
Figure C.7: Schematics of the duty cycle selection for switch S1 and
PWM.
235
200
ia(t)
150
vsa(t)
100
50
0
50
100
150
200
0
0.01
0.02
0.03
0.04
0.05
t(s)
0.06
0.07
0.08
0.09
0.1
Figure C.8: Simulation result of the phase a source voltage and phase
a input current of T for PFC operation and closed-loop
current control.
236
APPENDIX D
Derivation of the Conduction and Switching Losses of
Rectifiers TY and TS
D.1
Rectifier TY
The same initial considerations used for T are applied here for TY . The
purpose of this analysis is not to reach design equations for the bidirectional switches
as was done for T . Instead, the rms current equations over a switching cycle and
the switching losses are calculated with the intention of comparing the total losses
of this topology with those of T and TS .
D.1.1
Conduction Losses
The analysis of the conduction losses will be carried out for bidirectional switch
S1 but the same analysis can be extended to S2 and S3 . As in the case of Sab of T ,
the current through S1 presents three current envelopes: ia (t), ib (t), and ic (t),
where ia (t) is the outer envelope. The envelopes of current iS1 (t) are presented in
Fig. D.1. The portions of the envelopes that define the switch current are highlighted
in the figure. Once again, subsectors are defined based on the zero crossing points
of the line currents, as indicated in Fig. D.1.
-ib(w1t) ia(w1t) -ic(w1t)

iS1(wt)
xa
xa
xc
VI
xb
wt
xb
Ib IIa IIb IIIa IIIb IVa IVb Va
Vb VIa VIb Ia
xc
II
III
IV
Figure D.1: Current envelopes of iS1 (t).

The shape of the current through switch S1 is quite different in each subsector,
as illustrated in Fig. D.2 over a switching cycle in each subsector.
237
Subsector Ia
(ia)
Subsector Ib
(ia)
Subsector IIa
(ia)
Subsector IIb
(-ib)
(ia)
Subsector IIIa
Subsector IIIb
Subsector IVa
Subsector IVb
(-ib)
(-ic)
(ia)
(ia)
(ia)
(ia)
Subsector Va
Subsector Vb
(ia)
Subsector VIa
(ia)
Subsector VIb
(ia)
(-ic)
(ia)
Figure D.2: Switch current iS1 (t) for a switching cycle of each subsector.
Although it is not obvious from Fig. D.2, Sectors I, II, and III are symmetrical
to Sectors IV, V, and VI. Therefore, only the rms currents for each subsector of
Sectors I, II, and III need to be calculated
v "
#
u

u
3
3
3
2
t
2
+ (ib )
M sin 1 t
Msin 1 t +
iS1 ,Iarms = 2ia 1
2
6
2
2
v "
#
u

u
3
iS1 ,Ibrms = t2i2a 1

M sin 1 t
2
6
s

3

2
iS1 ,IIarms = ia 2 M sin 1 t
2
3
s

3
2
2
iS1 ,IIbrms = ia 2 M sin 1 t
2
3
v "
u

#
u
3
5
iS1 ,IIIarms = t2i2a 1
M sin 1 t
2
6
v "
u

#

u
5
3
3
3
2
t
2
iS1 ,IIIbrms = 2ia 1
M sin 1 t
+ (ic )
Msin 1 t +
2
6
2
2
238
These equations will be used in the loss comparison of rectifier topologies T and
TY with TS .
D.1.2
Switching Losses
The same switching loss analysis used for rectifier T is applied to TY . Figure
D.3 highlights the switching loss instants during Subsector Ia. As was in the case of
T , there are several zero voltage switching transitions, resulting in zero switching
losses.
S1
v0 v1 v2 v0 v2 v1 v0
S2
S3
(ia)
iS1(t)
(-ib)
vS1(t)
(Vdc)
iS2(t)
(ib)
vS2(t)
iS3(t)
vS3(t)
(ic)
(-Vdc)
Figure D.3: Switch currents and voltages across the switches for Subsector Ia.
The combined switching losses of the three bidirectional switches of TY in
239
Sector I are
(ton + tof f ) fs
6
(ton + tof f ) fs
pswY,Ib (t) = Vdc (ia (t) + ib (t) ic (t))
.
6
pswY,Ia (t) = Vdc (ia (t) ib (t) ic (t))
The combined switching losses are the same as for T despite the fact that more
switching transitions occur in T when zero vector {1 1 1} is used. This is true
throughout the entire line cycle. The comparison between these two topologies will,
therefore, depend solely upon the comparison of the conduction losses.
D.2
Rectifier TS
The analysis for the standard topology was carried out in the same manner
as for the alternative topologies (T and TY ). When TS operates as a rectifier,

the switches are used for current continuity while the diodes are responsible for
the energy transfer. Each switch conducts for half of the line cycle and its antiparallel diode conducts for the other half of the cycle, as shown in Fig. D.4 for
switch S1 and diode D1 of Fig. 2.1. The subsectors in the case of the six-switch
VSC are functions only of the zero crossing angle of one of the phase currents, which
simplifies significantly the derivation of the stress equations.
D.2.1
Conduction Losses
The rms currents of switch S1 for each subsector are
iS1 ,IIbrms
v "
u

#
u
3
11
3
7
= ti2a 1 +
M sin 1 t +
+
M ( 1) sin 1 t +
2
6
2
6
(D.1)
v
"
u

#
u
3
5
iS1 ,IIIarms = iS1 ,IIIbrms = ti2a (1 ) 1
M sin 1 t
2
6
v
"
u

#
u
3
5
iS1 ,IVarms = iS1 ,IVbrms = ti2a (1 ) 1
M sin 1 t +
2
6
240
(D.2)
(D.3)
iD1(wt)
iS1(wt)
wt
wt
V VI I
II III IV V
V VI I
Subsectors IIb and Va

(ia)
iS1(t)
II III IV V
Subsectors IIa and Vb

(ia)
iD1(t)
Ts
Ts
Sectors III and IV

(ia)
i (t)
Sectors I and VI
(ia)
i (t)
S1
D1
Ts
Ts
Figure D.4: Currents through switch S1 and diode D1 over a line cycle
and over a switching cycle for different sectors.
iS1 ,Varms
v "
u

#

3
u
3
5
M sin 1 t +
+
M ( 1) sin 1 t +
= ti2a 1 +
2
6
2
6
(D.4)
where is the apportioning factor which determines the partitioning of the zero
vector time interval between zero vectors v0 and v7 .
The rms currents of switch S1 in each subsector (D.1) to (D.4) can be used
to determine the variation of the current stress in the switch over a line cycle, as
presented in Fig. D.5 for a 24o current phase lead and an apportioning factor of 0.5.
The vertical axis of the graph was normalized by the output power of the rectifier.
Multiplying the vertical axis value by the actual on-state resistance (in ) results
in the instantaneous conduction loss of the switch as a percentage of the rectifier
output power.
The conduction losses of the switch can be expressed by
pc,S1 (t) = Ron i2S1 (t)
assuming the on-state resistance of switch S1 is Ron . Considering that the six unidirectional switches of TS have the same on-state resistance, the total combined
241
2
i S ,rms 0.04
1
P0
0.03
0.02
0.01
0
1
wt
Figure D.5: Variation of i2S1 ,rms for rated power operation and a 24o phase
lead.
conduction losses are given by

pc,TS (t) = Ron i2S1 (t) + i2S2 (t) + i2S3 (t) + i2S4 (t) + i2S5 (t) + i2S6 (t)

= 2Ron i2S1 (t) + i2S2 (t) + i2S3 (t)
The lumped rms and average current equations over a line cycle are necessary
for the proper thermo-mechanical design and selection of the semiconductor devices.
The rms and average currents of unidirectional switch S1 of rectifier TS are
Ipk,pu 6 (1 ) 12M cos + 3M [9 3 + cos (2)]

ITS ,Srms =
(D.5)
2
6
i
Ipk,pu h
ITS ,Savg =
16 (1 ) + M (2 3) cos + 2 3M (2 1) (cos + sin )
16
(D.6)
s
These equations are valid for all six switches due to the symmetry in the operation
of the topology.
The six-switch VSC was simulated in SABER to confirm (D.5) and (D.6). The
analytical and simulation results are in good agreement and are presented in Table
D.1.
242
Table D.1: Comparison between theoretical and simulation results for the
rms and average currents of the switches of TS .

Rms Current
o
30
11.07 A
11.08 A
0o
10.15 A
10.16 A
o
24
10.57 A
10.59 A
Average Current
30o
3.57 A
3.57 A
o
0
2.96 A
2.95 A
o
24
3.35 A
3.35 A
D.2.2
Switching Losses
The same switching loss analysis used for alternative topology T is applied
to the six-switch VSC. Figure D.6 highlights the switching loss instants during Subsector Ia. Contrary to rectifiers T and TY , only hard-switching occurs, i.e., every
switching transition incurs in losses.
The total combined switching losses of the six unidirectional switches for Subsector Ia are
pswTS ,Ia (t) = Vdc (ia (t) ib (t) ic (t))
(ton + tof f ) fs
6
(D.7)
which is the same as for rectifiers T and TY . Therefore, all of the rectifier topologies
present the same switching losses.
243
S1
v0 v1 v2 v7 v2 v1 v0
S1
S2
S2
S3
S3
v0 v1 v2 v7 v2 v1 v0
iS1(t)
iS4(t) (ia)
vS1(t) (Vdc)
vS4(t)
iS2(t)
(-ib)
vS2(t) (Vdc)
iS3(t)
vS3(t)
(Vdc)
iS5(t)
vS5(t)
(-ic)
(Vdc)
(Vdc)
iS6(t)
vS6(t)
(Vdc)
Figure D.6: Switching loss instants for topology TS during Subsector Ia.
244
APPENDIX E
Mathematica Program for determining the Harmonic
Components of the Dc-Link Current
245
246
247
248

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ANALYSIS OF THREE-PHASE RECTIFIERS WITH

AC-SIDE SWITCHES AND INTERLEAVED

Jian Sun, Thesis Adviser

Kenneth A. Connor, Member

Leila Parsa, Member

Sheppard J. Salon, Member

James Kokernak, Member

Rensselaer Polytechnic Institute

UMI Number: 3357231

ANALYSIS OF THREE-PHASE RECTIFIERS WITH

Rensselaer Polytechnic Institute

Stephanie Katherine Teixeira Miller

LIST OF FIGURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii

1.1 Wind Energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2 Dissertation Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.3 Power Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.4 Wind Turbine Topologies . . . . . . . . . . . . . . . . . . . . . . . . .

1.5 Induction Generator . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.6 Grid Interconnection Requirements . . . . . . . . . . . . . . . . . . .

Voltage Fault Ride-Through . . . . . . . . . . . . . . . . . . . 10

1.7 Survey of Power Electronics Interface Topologies for Induction Generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Six Switch Voltage-Source Converter . . . . . . . . . . . . . . 17

1.8 Dissertation Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Naturally Sampled Carrier-Based Modulation . . .

3.2 Converter Operation and Space Vector Description . . . . . . . . . . 51

Induction Generator Power Requirements under Variable Wind

Rectifier Power Handling Capability . . . . . . . . . . . . . . . 70

Induction Generator/Rectifier System . . . . . . . . . . . . . . 71

4.2 Rectifier T Switch Loss Analysis . . . . . . . . . . . . . . . . . . . . 82

4.3 Diode Loss Analysis

4.4 Loss Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Switch Loss Comparison . . . . . . . . . . . . . . . . . . . . . 99

Diode Loss Comparison

Validity of the Lumped Stress Equations . . . . . . . . . . . . 103

4.5 Common-Mode Voltage Comparison . . . . . . . . . . . . . . . . . . . 104

5. Harmonic Cancellation Effects in Interleaved Three-Phase Voltage-Source

5.2 General Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . 111

6.2 Circulating Current Decomposition and Definitions . . . . . . . . . . 142

Abc Current Control . . . . . . . . . . . . . . . . . . . . . . . 143

Dq Current Control . . . . . . . . . . . . . . . . . . . . . . . . 147

6.4 Nonlinear Average Current Control . . . . . . . . . . . . . . . . . . . 148

Control Strategy Description for a Single VSC Module . . . . 149

6.5 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187

A.2 Wind Turbine Control . . . . . . . . . . . . . . . . . . . . . . . . . . 205

A.3.2 Fixed-Speed Turbines . . . . . . . . . . . . . . . . . . . . . . . 213

A.4.1 Gearbox Transmission . . . . . . . . . . . . . . . . . . . . . . 215

Net generation of electricity by energy source in thousand megawatthours

Wind turbine topologies. . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum harmonic current distortion in percent of current (I)a [2]. . . 12

Maximum ratings of power semiconductor devices [3]. . . . . . . . . . . 20

Voltage space vectors and resulting converter voltages. . . . . . . . . . . 39

Voltage space vector lengths and angular positions.

Time allocated to the voltage space vectors per switching period. . . . . 44

Generation of the voltage space vectors. . . . . . . . . . . . . . . . . . . 54

Switch currents of T operating in Sector I.

Zero crossing angles. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Voltage space vector intervals in the time domain. . . . . . . . . . . . . 88

Comparison between theoretical and simulation results for the average

Analytical and simulated switch and diode current of T . . . . . . . . . 104

Common-mode voltage harmonic amplitudes. . . . . . . . . . . . . . . . 117

Ac phase current harmonic amplitudes. . . . . . . . . . . . . . . . . . . 120

Ac phase current harmonic amplitudes. . . . . . . . . . . . . . . . . . . 121

Inter-module circulating current harmonic amplitudes. . . . . . . . . . . 127

Dc-link current harmonic amplitudes. . . . . . . . . . . . . . . . . . . . 136