The Inverter clock

Introduction
It is desirable for many logic devices to be triggered by a
momentary pulse, of very short duration, that occurs coincident with
the positive (usually the leading) edge or negative (usually the trailing)
edge of the clock pulse. The pulse itself can be either positive or
negative going dependant on whether the device has active Hi or
active Lo inputs. This gives a choice of four different combinations of
positive or negative edge, and positive or negative pulse.
Theory
In all four combinations the inherent propagation delay of an inverter is
used to produce the desired pulse on the desired edge of the clock
pulse. The INVERTER will be used in conjunction with AND, NAND, OR
and NOR gates.
Operation
Positive or Leading Edge Triggers.
A +ve Edge/Active Hi trigger circuit.
This circuit, utilizing an AND and an
INVERTER, will momentarily produce a
positive pulse on the positive or leading
edge of the clock pulse.
When the clock pulse is Lo, one input to the AND is Lo and the other I/P
is Hi due to the INVERTER. This results in a Lo O/P from the AND. When
the clock pulse goes Hi the upper AND I/P goes Hi immediately, but due
to the propagation delay in the INVERTER it's O/P remains Hi for a short
period of time before going Lo. During this short period both I/Ps to the
AND gate are Hi and a positive pulse appears at the AND O/P. This
pulse can be used to trigger an active Hi circuit (such as a Flip-Flop) on
the positive or leading edge of the clock pulse.
A +ve Edge/Active Lo trigger circuit.
This circuit , utilizing a NAND and an
INVERTER, will momentarily produce a
negative pulse on the positive or leading
edge of the clock pulse.
When the clock pulse is Lo, one input to the NAND is Lo and the other
I/P is Hi due to the INVERTER. This results in a Hi O/P from the NAND.
When the clock pulse goes Hi the upper NAND I/P goes Hi immediately,
but due to the propagation delay in the INVERTER it's O/P remains Hi
for a short period of time before going Lo. During this short period both
I/Ps to the NAND gate are Hi and a negative pulse appears at the NAND

O/P. This pulse can be used to trigger an active Lo circuit (such as a

Flip-Flop) on the positive or leading edge of the clock pulse.

Negative or Trailing Edge Triggers

A - ve Edge/Active Hi trigger circuit.
This circuit , utilizing a NOR and an
INVERTER, will momentarily produce a
positive pulse on the negative or trailing
edge of the clock pulse.
When the clock pulse is Hi, one input to the NOR is Hi and the other I/P
is Lo due to the INVERTER. This results in a Lo O/P from the NOR. When
the clock pulse goes Lo the upper NOR I/P goes Lo immediately, but
due to the propagation delay in the INVERTER it's O/P remains Lo for a
short period of time before going Hi. During this short period both I/Ps
to the NOR gate are Lo and a positive pulse appears at the NOR O/P.
This pulse can be used to trigger an active Hi circuit (such as a FlipFlop) on the negative or trailing edge of the clock pulse.
A - ve Edge/Active Lo trigger circuit.
This circuit , utilizing an OR and an
INVERTER, will momentarily produce a
negative pulse on the negative or trailing
edge of the clock pulse.
When the clock pulse is Hi, one input to the OR is Hi and the other I/P is
Lo due to the INVERTER. This results in a Hi O/P from the OR. When the
clock pulse goes Lo the upper OR I/P goes Lo immediately, but due to
the propagation delay in the INVERTER it's O/P remains Lo for a short
period of time before going Hi. During this short period both I/Ps to the
OR gate are Lo and a negative pulse appears at the OR O/P. This pulse
can be used to trigger an active Lo circuit (such as a Flip-Flop) on the
negative or trailing edge of the clock pulse.
Some circuit diagrams will contain a symbolic clock pulse, as shown
below, with an arrow indicating the type of trigger used with a device
or circuit.

+ve edge trigger

-ve edge trigger

Summary:
The pulse itself can be either positive or negative going
dependant on whether the device has active Hi or active Lo inputs.
This gives a choice of four different combinations of positive or
negative edge, and positive or negative pulse. The INVERTER will
be used in conjunction with AND, NAND, OR and NOR gates.
Positive or Leading Edge Triggers.
A +ve Edge/Active Hi trigger circuit.
(AND and NAND GATE to inverter)
Negative or Trailing Edge Triggers
A - ve Edge/Active Hi trigger circuit.
(OR and NOR GATE to inverter)
Quiz:
The 1.______________will be used in conjunction with 2.__________,
3.___________, 4.____________and 5. ____________ gates.
Answers:
1. Inverter
2. AND
3. NAND
4. OR
5. NOR