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Franco Maloberti
2 δR 2 δC 2
δτ
-----
= ------- + -------
τ R C
δτ
• In CMOS technology δR ⁄ R ≈ 40% ; δC ⁄ C ≈ 30% ; hence ----- ≈ 50% ,
τ
unacceptable for most of the applications
•Hybrid realization with functional trimming
•Problems for a fully integrated realization
V1 Φ1 Φ2 V2
T
C
1 Φ1
Φ2
I T
Φ2
V1 Φ1 V2
C
1
∆Q = i∆t = -------------------T
R
V1 V2
t
The two SC structures are
(on average) equivalent to a resistor
T
R eq = -------
C1
If the SC structures are used to get an equivalent time constant τeq = ReqC2
it results:
C2
τ eq = T -------
C1
∆Q = 2C 1 ( V 1 – V 2 )
Φ2 Φ1
C2
R1
_
Φ1 Φ2
+ Φ1
C1
C2
Φ2
_
Φ1
C1
+
Φ1
C2
Φ1 Φ2
_ Φ2
C
1
Φ2 Φ1 +
Φ1
V out ( z ) C1 1
------------------- = – ------- ⋅ ------------
V in ( z ) C2 z – 1
• Structure 2:
C1
V out [ ( n + 1 )T ] = V out ( nT ) – ------- V in ( n + 1 )T ]
C2
• Structure 3:
C1
V out [ ( n + 1 )T ] = V out ( nT ) – ------- { V in [ ( n + 1 )T ] + V in ( nT ) }
C2
• Structure 2:
T 1 (z – 1)
R 1 → ------- s → --- ----------------- BE approximation
C1 T z
• Structure 3:
T 2 (z – 1)
R 1 → ---------- s → --- ----------------- Bilinear approximation
2C 1 T (z + 1)
_ _
Φ1 Φ2
Φ1 Φ2
C1 + +
•The key point is to introduce a full period delay from the input to
the output
_ _
Φ1 Φ2 Φ2 Φ1
C1 + C1' +
Toggle structure:
Φ1
Bilinear resistor: Ct,1 Cb,1
2 4
a 2 = p 0 + ---p 1 + -----2- p 2
T T
2 2 ω0 4
b0 = ω0 – --- ------ + ------
T Q T2
2 8
b 1 = 2ω 0 – ------
2
T
2 2 ω0 4
b2 = ω0 + --- ------ + ------
T Q T2
C
F
D
1 G
B
-
A -
H V01
+
+ V02
F1
F2
Vin
t
V 0, 2 2
DIz + ( AG – DI – DJ )z + ( DJ – AH )
H 2 = ----------- = -------------------------------------------------------------------------------------------------------------------------------------------
V in 2
( DB + DF )z + ( AC + AE – 2DB – DF )z + ( DB – AE )
• 10 Capacitors
• 6 Equations a0, a1, a2, b0, b1, b2
• Dynamic range optimization
F=0 “E type”
_
C2
+
C3
C4
DESIRED SPECIFICATION
Asb
Attenuation
Apb
wpb wsb w
PREWARPED SPECIFICATION
Asb
Attenuation
Apb
w
sin( w pb T/2) sin( w sb T/2)
_R C2
1 C2
C1
_ _
+ +
R3 C1
H DI ( s ) = --------------------------------------- if R1 = T/ C1 and R3 = T/C3 we get: H DI ( s ) = ----------------------------
sC 2 R 1 R 3 + R 1 sTC 2 + C 3
V out ( n + 1 ) ( C 2 + C 3 ) = V out ( n )C 2 + C 1 V in ( n )
–1 ⁄ 2
C1 C1 z
H DI ( z ) = ----------------------------------------- = ---------------------------------------------------------------------
C 2 ( z – 1 ) + zC 3 1⁄2 –1 ⁄ 2 1⁄2
C2 ( z –z ) + z C3
The half clock period delay will be used in the cascaded integrator in
order to get the LD transformation
• The termination is complex and frequency dependent.
• The integrating capacitor C2 must be replaced by C2 + C3/2.
C2
C1
_
F1
+
Vin I6
I2 I4
Passive prototype R6
C1 C3 C5
Vin _ V1 V3 _ V5
+ _ _ _ _ _ _
Vs + + _ V2 + + V4 + + _V
6
1 1 1 1
τ3 τ5
+
-
-
T T
SC implementa- 1
τ1
T τ2 τ4
1
+
+
-
-
T T
tion
+
-
1 1 1 1 1
C1
_
If the op-amp has finite gain A0 the “virtual ground” voltage is V0/A0
1 1 V0 ( n + 1 )
C 2 V 0 ( n + 1 ) 1 + ------ = C 2 V 0 ( n ) 1 + ------ – C 1 V in ( n + 1 ) + -------------------------
A 0 A 0 A0
z-transforming:
Vo ( z ) C1 z
- = – ----------------------------------------------------------------
H ( z ) = ---------------
V in ( z ) 1 C1
C 2 1 + ------ ( z – 1 ) + ------- z
A 0 A0
H id ( z ) H id ( z ) H id ( z )
H ( z ) = ---------------------------------------------------------- = ----------------------------------------------------------------------------------- = ----------------------------------------------------------------------------------------
C1 z C1 C1 C1 z + 1
1 + ------ 1 1 1 1 1 1 1
- + --------------- ------------ 1 + ------- + --------------- ------------ + --- + --- 1 + ------- + --- --------------- + ------------------- ------------
A 0 C 2 A 0 z – 1 A 0 C 2 A 0 z – 1 2 2 A 0 2 C 2 A 0 2C 2 A 0 z – 1
1 C1
Magnitude error m ( ω ) = – ------ 1 + -----------
A0 2 C 2
C1 C1
Phase error θ ( ω ) = ------------------------------------------------ ≅ -----------------------
2C 2 A 0 tan ( ωT ⁄ 2 ) C 2 A 0 ωT
C1
_
1 1 V0 ( n + 1 )
C 2 V 0 ( n + 1 ) 1 + ------ = C 2 V 0 ( n ) 1 + ------ + C 1 V in ( n ) + ------------------------
-
A 0 A 0 A0
C2
C1 (Φ2)
_
Φ2 Φ1
Φ1 Φ2 Φ2
+
(Φ1)
Φ1 Φ1
-Vin
Φ2 Φ2 _
Φ1
-Vin
+
Φ1 Φ1 Φ1
Vin
Φ2 Φ2
Φ1 Φ1
-Vin
Φ2 Φ2 _
Φ2
-Vin
+
Φ1 Φ1 Φ2
Vin
Φ2 Φ2
Φ1 Φ1
Φ2 Φ2
_ +
_
+
Φ2 Φ2
Φ1 Φ1
Φ2 Φ2
Φ1 Φ1
Vin
C1
C2
Φ1
Φ1
Φ2 Φ2 _
C1
Φ2 +
_V Φ1
in
Φ1 Φ2
C2
Ron
S1 C
4kTRon f
The white spectrum of the “on” resistance is shaped by the low pass
2 2 4kTR on ∆f
S n,c = v n, c = 4kTR on H ( f ) ∆f = ----------------------------------------
-
2
1 + ( 2πfR on C )
When the switch is turned “off” the noise voltage vn,c is sampled and
held onto C
S
f
*
v n,c
f CK/2 f