LAB REPORT

4
ECA-II
SUBMITTED TO
SIR FAHAD ALI SHIFA
SUBMITTED BY
MUHAMMAD AWAIS KHALID
FA13-BET-061
MUHAMMAD UMAR NAEEM
FA13-BET-097
UMAIR AHMED CHEEMA
FA13-BET-094

Objective:
Verification of Network Theorems (KCL, KVL and Thevenin
Theorem) in Phasor Domain.
Introduction:

OBJECTIVES
EQUIPMENT AND MATERIALS
Digital Oscilloscopes with Probes
Digital Multi-meter.
Digital Function Generator with Probes.
2.2 uF Capacitor, 1uF capacitors, 100 ohm Resistors

SECTION I (LAB TASKS)

Task A:
(Verification of KCL and KVL)
1. First I created the circuit as shown in Fig No.1.

Fig 1 Circuit diagram for the lab experiment

2. Then I determined the magnitude and phase (i.e. Phasor Value) of all the node
voltages from V1 to V6.

3. Then I filled in the table and blanks in the measurement section. Now I verified
KCL and KVL using your results for each node and each loop.

Task B:
(Verification of Thevenin Theorem)
1. First I assume C3 to be the load capacitor.
2. Then I disconnected the capacitor C3 form the circuit and determine the
magnitude and phase (i.e. Phasor Value) of the open circuit voltage (i.e. V4).
3. Now I replaced C3 with a short circuit and determine the Phasor value of the
short circuit current i.e. the current through resistor R5. To determine this current
determine the Voltage Phasor for R% and divide it by the value of R5 to get the
current through R5.
4. Then I calculated the Thevenin equivalent impedance using the formula
~
V
Z TH = ~ opencircuit
I short circuit
5. Then I determined the output voltage across the output capacitor C3 using the
Thevenin equivalent

Fig No.2 Thevenin Equivalent Circuit

6. Then I compared it with the actual voltage across C3 measured in the previous
task (i.e. V6).
7. Finally results are the same Thevenin theorem is verified.

Section II
Measurement Tables
Name(s) : Muhammad Awais Khalid(061)
Muhammad Umar Naeem(097)
Umair Ahmed Cheema(094)
Task -1
(Fill the table with Phasor values (magnitude and phase) of the node voltages)
~
V1

~
V2

~
V3

~
V4

( 1 ~
V 2 )/ R1

~
~
I R 1=

= ___________________________

( 2 ~
V 3)/ R 2

~
~
I R 2=

= ___________________________

~
( 2 V 4 )/R 3

~
~
I R 3=

= ___________________________

~
V5

~
V6

( 4 ~
V 5)/ R 4

~
~
I R 4=

= ___________________________

( 4 ~
V 6)/ R 5

~
~
I R 5 =

= ___________________________

~
~
I C 1 =I R 2

= ___________________________

~
~
I C 2 =I R 4

= ___________________________

~
~
IC 3 = I R 5

= ___________________________

( 1 ~
V 2)

~
~
V R 1=

= ___________________________

( 2 ~
V 3)

~
~
V R 2=

= ___________________________

( 2 ~
V 4)

~
~
V R 3 =

= ___________________________

( 4 ~
V 5)

~
~
V R 4=

= ___________________________

( 4 ~
V 6)

~
~
V R 5=

= ___________________________

( 3 )

~
V C 1=~

= ___________________________

( 5 )

~
V C 2=~

= ___________________________

( 6 )

~
V C 3=~

= ___________________________

Verification of KCL
Node V2:
The currents entering the node are:
_______________________________________________
The currents leaving the node are:
_________________________________________________

Sum of all currents entering:

_________________________________________________
Sum of all currents leaving:
________________________________________________

Node V4:
The currents entering the node are:
_______________________________________________
The currents leaving the node are:
_________________________________________________
Sum of all currents entering:
_________________________________________________
Sum of all currents leaving:
________________________________________________

Node V6:
The currents entering the node are:
_______________________________________________
The currents leaving the node are:
_________________________________________________
Sum of all currents entering:
_________________________________________________
Sum of all currents leaving:
________________________________________________

Verification of KVL
Loop 1: V1->V2->V3->V1
The voltage rise in the loop:
_______________________________________________
The voltage drops in the loop:
_________________________________________________
Sum of all voltage rise:
_________________________________________________
Sum of all voltage drops:
________________________________________________

Loop 2: V2->V4->V5->V3->V2
The voltage rise in the loop:
_______________________________________________
The voltage drops in the loop:
_________________________________________________
Sum of all voltage rise:
_________________________________________________
Sum of all voltage drops:
________________________________________________

Loop 3: V4->V6->V5->V4
The voltage rise in the loop:
_______________________________________________

The voltage drops in the loop:

_________________________________________________
Sum of all voltage rise:
_________________________________________________
Sum of all voltage drops:
________________________________________________

Loop 4: V1->V2->V4->V5->V1
The voltage rise in the loop:
_______________________________________________
The voltage drops in the loop:
_________________________________________________
Sum of all voltage rise:
_________________________________________________
Sum of all voltage drops:
________________________________________________

Loop 5: V2->V4->V6->V3->V2
The voltage rise in the loop:
_______________________________________________
The voltage drops in the loop:
_________________________________________________
Sum of all voltage rise:
_________________________________________________
Sum of all voltage drops:
________________________________________________

Loop 6: V1->V2->V4->V6->V1
The voltage rise in the loop:
_______________________________________________
The voltage drops in the loop:
_________________________________________________
Sum of all voltage rise:
_________________________________________________
Sum of all voltage drops:
________________________________________________

Task 2

~
V oc =

~I =
sc

Z TH =

~
V out (usingThevenin equivalent)=

~
V out (as measured Task 1)=