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Vtri
Vcont
Page 1 of 34
B+
a
+Vload
+
Vb
Figure 3. Load voltage (Vload = Va Vb) with ma = 0.9 (i.e., in the linear region)
Page 2 of 34
1.5
1
0.5
0
-0.5
-1
-1.5
1.5
1
0.5
0
-0.5
-1
-1.5
Figure 4. Load voltage (Vload = Va Vb) with ma = 0.5 (i.e., in the linear region)
Page 3 of 34
2
1.5
1
0.5
0
-0.5
-1
-1.5
-2
1.5
1
0.5
0
-0.5
-1
-1.5
Figure 5. Load voltage (Vload = Va Vb) with ma = 1.5 (i.e., in the overmodulation region)
Page 4 of 34
Vdc
2
fcont
2ftri fcont
2ftri 3fcont
2ftri 5fcont
4ftri fcont
4ftri 3fcont
4ftri 5fcont
4ftri 7fcont
ma = 0.2
0.200
ma = 0.4
0.400
ma = 0.6
0.600
ma = 0.8
0.800
ma = 1.0
1.000
0.190
0.326
0.370
0.314
0.181
0.024
0.071
0.139
0.212
0.013
0.033
0.163
0.157
0.008
0.105
0.068
0.012
0.070
0.132
0.115
0.009
0.034
0.084
0.119
0.017
0.050
2ftri cluster
4ftri cluster
As ma decreases, the on-times pulses in Figure 3 get proportionally smaller, linearly decreasing
the rms value of the fundamental component of the inverter output (see Figure 4). As ma
increases beyond 1.0, then overmodulation occurs, and the on-time pulses near the centers of the
output waveform gradually merge (see Figure 5). As ma becomes very large (i.e., 5 or 10), all of
the on-time pulses merge, and the inverter output becomes a square wave with predominantly
low-frequency harmonics (i.e., 3rd, 5th, 7th, etc.). The variation of the rms value of the no-load
fundamental output with ma is shown in Figure 6 (taken from [1]).
V1rms
asymptotic to
square wave
value
4 Vdc
2
Vdc
2
ma
1
linear
overmodulation
saturation
Page 5 of 34
In our application, Vcont will be a 60Hz signal taken from a 4.5Vrms AC wall wart transformer
plugged into a 120V wall output. The triangle wave will have a frequency of about 20kHz.
The Control Circuit and Firing Logic
The PWM inverter control circuit is shown in Figures 7, 8a, and 8b. The purpose of this control
circuit is to produce firing signals for the four H-Bridge MOSFETs. Firing signal V(A+,A)
controls MOSFETs A+ and A. Firing signal V(B+,B) controls MOSFETs B+ and B. When
V(A+,A) is high, A+ is on and A is off. When V(A+,A) is low, A+ is off and A
is on. The B-side of the H-Bridge works the same way with V(B+,B). Thus,
2W, DC-DC converter chip to produce isolated 12V from one plug-in 12V regulated wall
wart DC power supply. The wall 0V output of the DC converter chip will not be connected
to the wall wart ground.
Waveform generator generates the triangle wave. Regulated 12Vdc input keeps the
waveform steady and helps to eliminate DC in the output.
Op amp with unity gain, it buffers the DC-filtered output of the waveform generator so that
the triangle wave signal has the low impedance and low noise necessary to properly drive the
comparators. It also inverts the control voltage to produce Vcont.
Comparator performs the PWM comparison logic, and sinks enough current so that the
opto couplers switch on-and-off properly. Because comparisons are made between voltages
that can be positive or negative, the comparator chip must powered by a supply voltage (in
our case 12V), and the comparator chip output is either +12V, or 12V.
Page 6 of 34
red
0.01F
High-pass filter to
block DC
V(A+,A) V(B+,B)
red
(freq. control)
100k
0.01F
1.5k, W
Filtered and
buffered
triangle wave
blue
270k
Vcont
blue
14
violet
blue
1k
12Vdc
regulated from
2W, DC
converter chip
1k
500 trimmer
Approx
22kHz
triangle
wave
10k
1k
Comp
9.53k
1k
trimmer
270k
1k
Vcont
green
green
Op Amp
Waveform Gen.
1
blue
blue
Vcont
green
violet
violet
violet
green
Vcont
2W, DC-DC
converter
Jack for AC
wall wart, with
0.1F capacitor
12Vdc isolated rail
Protoboard common (i.e., the green wires)
(protoboard common is the 0V output pin on the DC converter chip, and is not
connected to the wall wart ground)
Figure 8a. The 16 long piece of 1 x 10 wood piece with inverter control circuit mounted in the lower 4
Page 8 of 34
Page 9 of 34
Page 10 of 34
When checking out your circuit, make sure that each chip is receiving the proper +12V and 12V
supply voltages. Do this using multimeter measurements directly at the appropriate pins on the
chips.
Step 1
The Triangle Waveform Generator
1. The objective of Step 1 is to have the waveform generator portion of the circuit working
properly. Do not plug in either wall wart yet. Build your project on a 16 long piece of 1
x 10 wood, occupying only about the lower 4 inches of the wood. Carefully connect the
DC wall wart jack (with 0.1F ceramic capacitor), the 2W DC converter chip, and the
waveform generator IC plus its supporting components and high-pass filter. Use the sockets
provided. The 2W DC converter chip produces isolated 12V, and its output ground (termed
protoboard common here) is also electrically isolated from the ground terminal of the DC
wall wart. To maintain isolation, the protoboard common must not be connected to the
ground of the wall wart.
2. Perform the power supply wiring continuity check. With the wall wart disconnected, use a
multimeter to
Confirm that the ground terminal of the wall wart is isolated from the 0V output pin
of the DC converter chip.
Confirm that the 12V wall wart output terminal is isolated from the +12V output pin
of the DC converter chip.
3. Perform the following DC converter chip test. Connect the 12V wall wart so that the DC
converter chip is powering your circuit. Then,
Check the +12V and 12V output voltages of the DC converter chip. If either drops
more than 0.5V from nominal, then your circuit is overloading the chip. In that case,
you likely have a wiring short circuit, other wiring problem, or possibly a failed
component. Unplug the wall wart, debug, and fix the problem before proceeding.
Overloading the DC converter chip will cause it to overheat and fail.
Page 11 of 34
4. Using an oscilloscope, observe the output of the triangle-wave generator with respect to the
protoboard common. The triangle wave should have a frequency of approximately 22kHz
(15%) and max/min values of approximately 4V. Note any DC offset by observing the
maximum and minimum values (see Figure 9). Adjust the 500 trimmer potentiometer until
the triangle wave has equal rise and fall times (see Figure 10). To help make the
determination, it is helpful to single step through oscilloscope snapshots.
Indicates DC
offset
Page 12 of 34
5. Confirm that the output of the high-pass filter is free from DC offset and is an idealized
triangle wave (see Figure 11). Save a snapshot of your waveform.
DC offset
minimized
Save screen
snapshot #1
Figure 11. Output of high-pass filter
Page 13 of 34
6. Disconnect the DC wall wart, and then finish wiring the protoboard circuit. For Vcont, you
will use a 4.5Vrms AC wall wart and 500 potentiometer to adjust Vcont. Use a 0.1F
ceramic capacitor on the AC wall wart jack. It is important that you do not interchange
the AC and DC wall warts! The AC wall warts are marked with yellow paint. But before
connecting the AC wall wart, energize your circuit and confirm with an oscilloscope that
both V(A+,A) and V(B+,B), with respect to protoboard 12V reference, are varying
sharply from +24V to 0V. Both waveforms should have a 50% duty cycle. Save a
simultaneous snapshot of the two waveforms. Expect to see the waveforms shown in
Figure 12. Use your multimeter to confirm that your DC measurements are within a few
tenths of a volt compared to those given alongside Figure 12.
For ma = 0, use a
multimeter to check the
following DC voltages
with respect to 12V ref:
V(A+,A) 11.8Vdc
V(B+,B) 11.8Vdc
Save screen
snapshot #2
Figure 12. Output control voltages V(A+,A) and V(B+,B), with respect to
protoboard 12V reference, with Vcont = 0 (i.e., the ma = 0 case)
7. Connect the AC wall wart, and raise the 500 Vcont potentiometer for maximum Vcont.
Use your oscilloscope to simultaneously view Vcont and Vcont with respect to protoboard
common. They should be 180 out of phase. Adjust the 1k, Vcont trimmer potentiometer
so that Vcont has the same rms magnitude as Vcont. With ma at the maximum, use a
multimeter to check AC voltage [V(A+,A) V(B+,B)]. Expect about 21Vac.
8. Lower the 500 Vcont potentiometer for minimum Vcont. Move the oscilloscope probes
back to observe V(A+,A) and V(B+,B) with respect to protoboard 12V reference.
Then, gradually raise the 500 Vcont potentiometer so that Vcont increases from zero to
about 3Vrms. Note the variations in the two waveforms as Vcont increases. The two
Page 14 of 34
waveforms should be more-or-less centered together (see Figures 13 and 14). When the on
period of one waveform gets wider, the on period of the other waveform gets narrower.
Save one simultaneous snapshot of the two waveforms.
Save screen
snapshot #3
Figure 13. Output control voltage V(A+,A) on top, and V(B+,B) on bottom, with respect
to protoboard 12V reference, with ma > 0 (the situation shown is where Vcont is positive)
Figure 14. Output control voltage V(A+,A) on top, and V(B+,B) on bottom, with respect
to protoboard 12V reference, with ma > 0 (the situation shown is where Vcont is negative)
Page 15 of 34
split
Save screen
snapshot #4
Figure 15. Idealized Vload, with ma just into the overmodulation region
Page 16 of 34
10. Since the triangle wave frequency is more than 300 times higher than 60Hz, and furthermore
it is asynchronous with the 60Hz, the averaging feature of the oscilloscope can be used to
remove most of the high frequency components and see the 60Hz component of the idealized
Vload. While using the averaging feature, experiment by raising and lowering Vcont to
observe the linear, overmodulation, and near-saturation regions. Expect to see waveforms
similar to those in Figures 16, 17, and 18. Save a snapshot of your waveform with ma 1.
Save screen
snapshot #5
Figure 16. Idealized Vload observed in the scope averaging mode, with ma in the
linear region
Figure 17. Idealized Vload observed in the scope averaging mode, with ma just into
the overmodulation region
Page 17 of 34
Figure 18. Idealized Vload observed in the scope averaging mode, with ma almost into
the saturation (i.e., square wave) region
11. The FFT capability of the scope is useful in determining the magnitude of the significant
frequencies found in the idealized load voltage waveform. Using the scope screen shown in
Figure 15, adjust Vcont so that (visually) 0.90 < ma < 1 (i.e., just prior to the formation of the
gap in Figure 15). Then, press the math key to use the FFT feature. Adjust the span to
100kHz, adjust the center frequency to 50kHz, and adjust the time axis until the sample rate
is 200kSa/s (kilosamples per second). You should see something similar to Figure 19.
Freeze and capture the oscilloscope trace. The frequencies with the largest components are
easily identified. The frequency span, together with the x-axis grid (or cursors), identify their
frequencies.
4ftri cluster
(92kHz)
Figure 19. FFT of idealized Vload in the linear region with ma 1.0, where the
frequency span and center frequency are set to 100kHz and 50kHz, respectively
Page 18 of 34
By pushing More FFT you can observe and adjust the db scale. If the db scale is
10db/division, while the voltage scale is 10V/division, then each scale volt corresponds to
1db.
Use the cursors to measure the magnitude of the 2ftri cluster (i.e., approx. 46kHz) with
respect to the 60Hz component (in scale volts). Save a snapshot of your waveform.
Convert your volts to db. Then compute the ratio from the log10 relationship. For Figure
20, the computation yields
Save screen
snapshot #6
Figure 20. Determining the magnitude of the strongest high-frequency cluster with
respect to the fundamental (the 46kHz cluster is 7.81V (in dB) down from the
fundamental)
V
7.81db = 20 log10 46kHz
V60 Hz
7.81
V
, so 46kHz = 10 20 = 0.31.
V60 Hz
16.6
V
, so 92kHz = 10 20 = 0.148.
V60 Hz
Page 19 of 34
Figure 22. Low-frequency harmonics for 0.9 < ma < 1.0 are at least 30db down
13. Raise ma to its maximum value so that you approach saturation. At this point, the waveform
takes on the characteristics of a square wave, which has odd harmonics of the fundamental,
Page 20 of 34
whose magnitudes decrease in proportion to harmonic order (i.e., the 3rd harmonic magnitude
is 1/3 of the fundamental, and so on). Computations for Figures 23 and 24 show that the 3rd
and 5th harmonic magnitudes are 0.30 and 0.13 of the fundamental, respectively.
Figure 23. Near saturation, the 3rd harmonic magnitude is 0.30 of the fundamental
Figure 24. Near saturation, the 5th harmonic magnitude is 0.13 of the fundamental
Reference
[1] N. Mohan, T. M. Undeland, W. P. Robbins, Power Electronics Converters, Applications,
and Design, 2nd Edition, John Wiley & Sons, Inc., 1995.
Page 21 of 34
Page 22 of 34
Page 23 of 34
H BRIDGE INVERTER
Vdc
A+
Va
B+
Load
Vb
B
Switching rules
Either A+ or A is always closed,
but never at the same time *
Either B+ or B is always closed,
but never at the same time *
*same time closing would cause a
short circuit from Vdc to ground
Page 24 of 34
H BRIDGE INVERTER
Vdc
A+
Va
B+
Load
Vb
B
Page 25 of 34
But is a square wave output good enough? Not for us! Sinusoidal load
voltage is usually the most desirable. But how do we approximate a
sinusoidal output with only three states (+Vdc, Vdc, 0) ?
The answer: Unipolar PWM modulation
Vcont
Vtri
Vcont
Vcont > Vtri , close switch A+, open
switch A , so voltage Va = Vdc
Vcont < Vtri , open switch A+, close
switch A , so voltage Va = 0
Vcont > Vtri , close switch B+, open
switch B , so voltage Vb = Vdc
Vcont < Vtri , open switch B+, close
switch B , so voltage Vb = 0
Page 26 of 34
Va = 0
Vb = Vdc
Vb = 0
Page 27 of 34
Vdc
Vdc
Page 28 of 34
1.5
1
0.5
ma = 0.50
(linear region)
0
-0.5
-1
-1.5
1.5
1
0.5
0
-0.5
-1
-1.5
Page 29 of 34
2
1.5
1
0.5
ma = 1.5
(overmodulation
region)
0
-0.5
-1
-1.5
-2
1.5
1
0.5
0
-0.5
-1
-1.5
Page 30 of 34
Vdc
Mot
Mot
A
A+
B+
B+
Mot
Mot
A
Vdc
Vdc
A+
B+
A+
B+
A+
Page 31 of 34
The ICs are powered by a 2W dual output DC-DC converter chip, 12Vdc input, isolated 12Vdc
outputs. Details for the dual output converter and its socket are shown below.
Input
Wall wart
Output
Op amps
Notes for the above converter chip keep the input and output sections isolated from each
other.
When energizing your circuit, check the +12V and 12V outputs to make sure they are OK. Low
voltages indicate a short circuit in your wiring, which can burn out the chip in a few minutes.
Page 32 of 34
DC-DC Converter
Dual Op Amp
Dual Comparator
Page 33 of 34
Page 34 of 34