EE 4325 / 6325 VLSI DESIGN

INTRODUCTION TO CAD TOOLS

Outline

VLSI design flow

Basics of UNIX / Linux
CADENCE
HSPICE
WAVEFORM VIEWER

VLSI Design Flow

DESIGN
IMPLEMENTATION & SYNTHESIS
Verilog/Vhdl simulator
Synopsys DesignVision

STANDARD CELL LIBRARY DESIGN

Cadence/synopsys

AUTOMATIC PLACE AND ROUTE

Encounter

DESIGN VERIFICATION
Hspice/NCX/PrimeTime

STANDARD CELL LIBRARY DESIGN

Design Flow for A Cell
Create Views (by Cadence)

Schematic View
Layout View (DRC/LVS/PEX)
Symbol View
Abstract View

Simulation (by Synopsys Hspice)

UNIX / Linux commands I

File Commands
ls list contents of the directory
ls -al formatted listing with hidden files
cd <dir> - change directory to dir
cd change to home
pwd show current working directory
mkdir <dir> create a directory dir
rm f <filename> delete file
cp file1 file2 copy file1 to file2
cp -r dir1 dir2 copy dir1 to dir2; create dir2 if it doesn't exist
mv file1 file2 rename or move file1 to file2 if file2 is an existing directory, moves file1 into
directory file2
Process Management
ps display your currently active processes
Kill %%-- Kills the current process
kill pid kill process id pid
killall proc kill all processes named proc *
bg lists stopped or background jobs; resume a stopped job in the background

UNIX / Linux commands II

Shortcuts
Ctrl+C halts the current command
Ctrl+Z stops the current command, resume with
fg in the foreground or bg in the background
Ctrl+D log out of current session, similar to exit
Ctrl+W erases one word in the current line
Ctrl+U erases the whole line
Ctrl+R type to bring up a recent command
!! - repeats the last command
exit log out of current session
Help for all the commands can be obtained on the terminal using
man <command name>
Servers you can use for VLSI Apache, Jupiter

Please go to TAs tutorial website for learning UNIX / Linux

MOS Transistors

Side View of Transistors

What they really look like a 130nm transistor from the IBM G5 processor:

Image Source: Apple Computer www.apple.com

TOP View of Transistors

N-well
NMOS

PMOS

Cadence Layer Selection Window (LSW)

Active layer
Instances / Pins selectable

Visibility & selection controls for all layers

AV: All layers visible & selectable
NV: All layers invisible & unselectable
AS: All visible layers selectable
NS: All visible layers unselectable
Note: invisible layers are always unselecable
Layer list
Click with LEFT mouse button to select the layer as
the ACTIVE layer
Click with MIDDLE mouse button to switch
VISIBILITY of the layer
Click with RIGHT mouse button to switch
SELECTABILITY of the layer

IBM 130nm Design Rules

Design Rule Check (DRC) Errors

Error showing that the minimum space between two adjacent M1 layers should be
>=0/16um

Layout Versus Schematic (LVS) Errors I

Layout Versus Schematic (LVS) Errors II

Alternatively, you can go to "View->LVS Error Report (Current Cell)" to bring up the net list of errors,
and then you can select the names to highlight the mismatches on both the schematics and layout.

Pitch Size (IO Pin Spacing)

For our project design, in the cell library design, the distance between pins should be
0.48n (n=1, 2, 3) um.
And the distance between the GRLogic and its adjacent pin should be
0.24+0.48*n (n=0, 1, 2, 3) um.

0.48um

Cadence Shortcuts I
Key

Function

Key

Function

Display/View/Zoom

Edit

Zoom in (box)

F4

Switch selection mode (Full/Partial)

Ctrl-z

Zoom in by 2

Undo

Shift-z

Zoom out by 2

Shift-u

Redo

Fit in window

Move

Ctrl-r

Redraw

Stretch

Create ruler

Copy

Shift-k

Delete all rulers

Shift-r

Rotate

del

Delete

Create
r

Create rectangle

Properties

Create path

Ctrl-a

Select all

Shift-p

Create polygon

Ctrl-d

Select none

Create label

Hierarchy

Create instance

Shift-x

Descend into cell (new window)

Ctrl-p

Create pin

Descend into cell (edit in place)

Cadence Shortcuts II
Please go to TAs tutorial website for learning Cadence Tools
Inverter layout tutorial
Layout tips for IBM 130nm technology
DRC, LVS and PEX(parasitic extraction)

HSPICE
TO RUN HSPICE:
1. Source
. /proj/cad/startup/profile.synopsys

2. Type:

hspice <spi_file_name.sp>

3. You can check the output log if theres any warning or error. After it said "job
concluded", your simulation waveform result is stored in
spi_file_name.tr0
4. If there are no errors then the outputs can be viewed by waveform viewers.

5. Use Cosmoscope or waveviewer to view the waveforms by typing scope

& or wv &

HSPICE Example I
* first line must be a comment or empty line
* HSPICE is case in-sensitive and will convert all to lower case and so inv.sp == INV.sp
* Transistor model file
.include/home/cad/kits/IBM_CMRF8SFLM013/IBM_PDK/cmrf8sf/relLM/HSPICE/models/model013.lib_inc

.include inv.sp
* the netlist for INV gate.
.OPTIONS POST = 1
Xinv in out inv
*INV gate with input (in) output (out) (Please follow the port order in inv.sp)
.param VDD = 1.2V * Parameter definitions
vdd! vdd! gnd 1.2V * Power supplies
Vin in GND PWL (0ns VDD 4ns VDD 4.5ns 0 8ns 0 8.5n VDD ) * input voltage source
.tran 10ps 10ns
* Run the transient simulations for 10ns with a step size of 10ps
* Propagation Delay Measurements
.measure tran Tphl_out trig v(in) val='VDD/2' rise=1 + targ v(out) val='VDD/2' fall=1
.measure tran Tplh_out trig v(in) val='VDD/2' fall=1 + targ v(out) val='VDD/2' rise=1
* Average Power Measurement
.measure tran AvgPower avg p(VVdd)
.END

HSPICE Vector Input Example I

* The vector file that has the inputs in a digital format. The file name is case in-sensitive.
; VECTOR PATTERN DEFINITIONS
; Radix -- number of bits associated with each vector (e.g. 1 4 => one 1-bit and one 4-bit vectors)
; Vname -- name of each vector
; IO
-- determines inputs, outputs or bidirectional
; Tunit
-- indicates time unit for the tabular data
; Period -- Used for periodic data to define period for one vector
; Trise
-- Rise time for signals
; Tfall
-- Fall time for signals
; Vih
-- Logic "1" voltage (VDD is defined in the netlist)
; Vol
-- Logic "0" voltage
;===========================================================
; DEFINING TABULAR DATA
; Tabular data is provided in chronological order. In this example since "Period" is defined, the first
; column corresponding to "time is not needed. However, for non-periodic tabular data "time" is
; needed in the first column. If outputs are provided in the tabular data, then Hspice will compare the
; actual and expected outputs

HSPICE Vector Input Example II

;======================== Example ======================================
.VEC Nand2.vec
Radix 1 1
* number of bits associated with each vector
Vname NAND2_A NAND2_B
* name of each vector
IO I I
* inputs, outputs or bidirectional
Tunit ns
* time unit for the tabular data
Period 10
* period for one vector
Trise 0.1
* Rise time
Tfall 0.1
* Fall time
Vih VDD
* Logic "1" voltage
Vil 0.0
* Logic 0" voltage
* Tabular data
00
01
10
11

HSPICE Waveform Viewers

Available viewers:
WaveView
CosmosScope
Please go to TAs tutorial website for using Waveform Viewers