Professional Documents
Culture Documents
/****************************************************/
/** Call UUT Power-Up Subroutine **/
/*********************************************************/
CALL PWRUP();
IF FAIL(6) THEN BRANCH DDONE;
/* if power up fails skip digital tests */
/** Default ASSIGN LOGIC Statement - Modify as needed **/
ASSIGN LGC VCDH=3.5 VCDL=.2 VCST=1.5 VTT=1.5
VIHA=3.5 VILA=0.1 VOHA=2.4 VOLA=0.8 LVLA(1-3840);
END_DIGINIT:
DDONE: CALL PWRDN();
END;
SUBROUTINE PROGRAM_INITIALIZATION();
/** This Load Subroutine is executed once during program
initialization. It is used to determine and store system
hardware configuration information in system variables
that can then be accessed during UUT Power-up and
Power-down sections... **/
/********************* NOTE*****************************/
/** The PROGRAM_INITIALIZATION(), PWRUP(), PWRDN(), and**/
/** DISCHARGE_POWER() Subroutines contain Test Language**/
/** Statements that will allow them to control both **/
/** Alliance and Non-Alliance GR228X power supplies. **/
/** The PROGRAM_INITIALIZATION() Subroutine determines **/
/** the target tester capabilities at Run-Time **/
/** initialization and executes the appropriate **/
/** Programming statements based on the target tester **/
/** configuration. **/
/*********************************************************/
/********************* WARNING!!*************************/
/** "Alliance" PS Power supplies on UNIX based testers **/
/** do not program negative. Negative voltages are **/
/** obtained by reversing the polarity of the leads in **/
/** the test fixture. The only exception to this is **/
3
IF POWER_TYPE = 0 THEN [
LOAD_PS_SEQUENCES:
/** This section will "load" sequences into the
** Alliance Power Supply controller. Programming
** the Alliance Supplies using Sequences will
** produce the fastest UUT test throughput
** because the test programming statements are loaded
** into the Alliance controller only once, at Run-time
** initialization.
** The purpose of each sequence is:
** SET PS SEQUENCE = 1; Power up the UUT
** SET PS SEQUENCE = 2; Power down the UUT
** SET PS SEQUENCE = 3; Disconnect PS Relays **/
SEQUENCE1:
/** Sequence #1 will TURN ON the power supplies. Supplies
are turned on in the order they appear within the sequence.
Remember, PS supplies cannot be programmed to negative
voltages. Negative voltages are obtained by wiring
the HIGH output to the negative supply bus and the LOW
output to the reference bus. **/
SET PS START SEQUENCE = 1;
SET PS(1) V=5 I=2.00 ;
SET PS END SEQUENCE = 1;
SEQUENCE2:
/** Sequence #2 TURNS OFF the power supplies. Supplies
are powered down in the opposite order in which they
were powered up. **/
SET PS START SEQUENCE = 2;
SET PS(1) V=0.0 I=2.00;
SET PS END SEQUENCE = 2;
SEQUENCE3:
/** Sequence #3 DISCONNECTS the power supply relays.
It must be preceded by a call to sequence 2 and a
call to DISCHARGE_POWER to ensure that the power nodes
are completely discharged prior to disconnecting
the relays. **/
SET PS START SEQUENCE = 3;
SET PS(1) DISCONNECT;
SET PS END SEQUENCE = 3;
]; /* End of IF POWER_TYPE = 0 conditional */
/** Finished Initialization, enable control-C processing **/
CALL CNTRL_C(CONTROL='ON');
END SUBROUTINE PROGRAM_INITIALIZATION;
SUBROUTINE PWRUP();
/** This Subroutine is called to Power-up the UUT **/
5
DECLARE VVAL1;
TEST_FOR_POWER:
/* Do not execute this Subroutine if UUT is already
powered up! */
IF UUT_POWER_STATUS = 'ON' THEN RETURN;
PWRON:
CALL CNTRL_C(CONTROL='OFF');
/* disable control C processing */
WRITE 'POWER UP FOR DIGITAL TESTING%NL%';
NOLOG; /* disable logging during power up */
SET PIO(0) HRLY(CLOSE 3); /* GROUND THE PCB */
CHECK_ID:
/* Branch to Alliance or Non-Alliance power-up
statements based on tester power configuration. */
IF POWER_TYPE > 0 THEN BRANCH NA_PWRUP;
ELSE BRANCH A_PWRUP;
NA_PWRUP:
/* This section contains power up statements for
testers with Non-Alliance power supplies. */
SVS_CONNECT_RELAY: /* CONNECT SVS TO UUT, Required on 2282 Only */
IF GR_TARGET = '2282' THEN SET PIO(0) HRLY(CLOSE 7);
SVS1_ON:
SET SVS(1) VB DLY=50M
[
WRITE 'SVS(1) OVERLOAD. CURRENT LIMIT FAILURE.%NL%';
BITSET(FAIL,6);
RETURN;
];
GO_TO_TEST:
/* Now that the Non-Alliance Supplies have been programmed,
branch to measure the supply voltages. Skip the Alliance
power-up section.
*/
BRANCH TEST_POWER;
A_PWRUP:
/* This section calls the Alliance Power Supply
Sequence that will turn on the PS Supplies.
To understand what power supply commands are
executed by each Sequence, refer to the
Sequence definitions in the PROGRAM
INITIALIZATION Load Subroutine.
*/
/*** POWER UP SEQUENCE ***/
PS_ON: /* Turn on UUT Power Supplies...*/
/* Turn on the Alliance power supplies...*/
6
SET PS SEQUENCE = 1;
TEST_POWER:
/** MEASURE OUTPUT VOLTAGE OF ALL POWER SUPPLIES AT THE UUT **/
POWER1: SET SCAN AT(383:249);
SET MUX AT(CHA=DCMVHI:CHB=DCMVLO);
/* Connects Voltage Meter */
MEAS DCV INTO VVAL1 MAX=5.00 VAL=5.00 TOL=5 RDLY=2M FAIL(6)[
IF POWER_TYPE > 0 THEN SUPPLY_NAME='SVS(1)';
ELSE SUPPLY_NAME='PS(1)';
LET SUPPLY_SETTING='5.00 VOLT';
BRANCH PWR_FAIL;
];
CLEAR MUX; CLEAR SCAN;
PWRUP_DONE:
/* If program gets here, then power up is OK. */
BRANCH PWROK;
/****************************************************/
/** IF any power supply voltage measurement FAILs, **/
/** generate diagnostic message and ABORT testing. **/
/** If power is OK, Branch to PWROK. **/
/****************************************************/
PWR_FAIL:
WRITE ID=MESFILE'%NL% %NL%';
WRITE ID=MESFILE '%037%%S%%NL%%036%UUT %S% SUPPLY
FAILED.%NL%'
SUPPLY_NAME,SUPPLY_SETTING;
WRITE ID=MESFILE'VOLTAGE WAS %F%V. %NL%'VVAL1;
WRITE ID=MESFILE'TESTING ABORTED. %NL% %035%%NL%';
PWROK:
CLEAR MUX;
CLEAR SCAN;
LET UUT_POWER_STATUS = 'ON';
LOG; /* re-enable logging */
CALL CNTRL_C(CONTROL='ON');
/* enable control C processing */
END SUBROUTINE PWRUP;
SUBROUTINE PWRDN(); /* POWER DOWN ROUTINE */
/** This Subroutine is used to turn UUT Power off. **/
/** If power is already off, then don't execute this subroutine! **/
IF UUT_POWER_STATUS = 'OFF' THEN RETURN;
PWRD:
CALL CNTRL_C(CONTROL='OFF'); /* disable control C processing */
/* Determine whether to execute Alliance or Non-Alliance
power-down statements.
*/
7
DSCHG_M1:
MEAS DCV DCM INTO VVAL3 HI=+.05 LO=-.05 DLY=50M MAX=50
FAIL()
[
LET CNT=CNT+1;
IF CNT<100 THEN BRANCH DSCHG_M1;
IF POWER_TYPE > 0 THEN LET SUPPLY_NAME='SVS(1)';
ELSE LET SUPPLY_NAME='PS(1)';
WRITE ID=MESFILE 'FAILED TO DISCHARGE %S%%NL%' SUPPLY_NAME;
WRITE ID=MESFILE 'POWER NODE=VCC, REFERENCE NODE=GND%NL%';
WRITE ID=MESFILE 'MEASURED %F%%035%%NL%%NL%' VVAL3;
];
DSCHG_CLR1:
CLEAR MUX; CLEAR STM; CLEAR SCAN;
LOG; /* Turn on Logging again */
END SUBROUTINE DISCHARGE_POWER;
Practice using the Power Editor, generate the test program and
fixture data, and then release the fixture reports.
1. Select Power Supply Editor from the toolbar.
2. Load System Configuration as 2286sys.
3. Load Circuit Data (IDD).
4. Enter required information: +5 Volts, 2 Amps, PS1.
5. Generate a Power Test Program and FWI file.
6. Review program and report.
10
Contains
Test program statements, routines and
instructions for ATG to customize the test
program.
11
AtgInternalWork
Contains
AnalogTestProgram
Practice using the ATG Monitor Page, generate the test program
files, and review files.
1. Set up and run ATG Step 2.
2. Review the importance of all generated files.
14
Generates reports.
Translate generates an object code and symbol table.
The Power Test Program and Fixture Test Program can also be
translated and run as stand-alone tests.
Contains
Fixture section of the
AnalogTestReport file.
Program generated to check that
16
%NONAIL
%HIPRIO
%LOPRIO
/*
2286 NAIL DATABASE REPORT Page 1
Generated by nas_r_310
Nail Assignment Mode NEW
.TPG Filename sy:demo.tpx
Report Date 16-OCT-95 16:47:27
Report Name sy:demo.ndb
Number of Nails Required by TPG
Clock Drive 2
Clock Sync 1
Fast 188
Nail Range Assigned Requested
Clock Drive 9 - 10 1 - 16
Clock Sync 1 - 1 1 - 8
Fast 1 - 608 1 - 640
-----------------------------------------------------------*/
%NAILNOT;
/* leave free for OX */
F3-F16;
F18-F32;
F609-F640;
%NAILLOC; /* Force Nail Assign to place probes on test
points */
TP32.1 ; TP35.1 ; TP36.1 ; TP38.1 ; TP40.1 ; TP41.1 ;
TP42.1 ; TP43.1 ; TP45.1 ; TP46.1 ; TP47.1 ; TP48.1 ;
TP49.1 ; TP50.1 ; TP54.1 ; TP55.1 ; TP56.1 ; TP57.1 ;
TP58.1 ; TP59.1 ; TP60.1 ; TP61.1 ; TP62.1 ; TP63.1 ;
TP64.1 ; TP65.1 ; TP66.1 ; TP67.1 ; TP68.1 ; TP69.1 ;
TP71.1 ; TP73.1 ; TP75.1 ; TP76.1 ; TP77.1 ; TP78.1 ;
TP79.1 ; TP80.1 ; TP81.1 ; TP82.1 ; TP84.1 ; TP85.1 ;
TP86.1 ; TP87.1 ; TP89.1 ; TP90.1 ; TP92.1 ; TP94.1 ;
TP95.1 ; TP96.1 ; TP97.1 ; TP98.1 ; TP99.1 ; TP100.1 ;
*/
F44-> F375 ;
F45-> F183 ;
F46-> F65 ;
F47-> F170 ;
F48-> F177 ;
F49-> F138 ;
F50-> F279 ;
22
Contains
Binary version of the
23
MergedTestProgram.
Binary file the tester uses to test the
fixture.
SymbolTable
Binary file with pointers to labels and
variables used for modifying or
debugging the test set.
FixtureSymbolTable
Binary file containing pointers to
labels and variables used for
modifying or debugging the fixture.
TranslatorListing
Error and warning messages
concerning Language statements,
syntax and nail assignment conflicts.
FixtureObjectCode
24
vector.
If FAIL(n) is omitted from an instrumentation statement,
FAIL(1) is assumed.
Failures occurring during the test program typically set bits
within the FAIL BSTRING.
The program fails if any bits in the FAIL BSTRING remain set
at the end of the test.
When a test statement fails, the specified FAIL vector bit is set
to 1, unless you explicitly inhibit it.
At the end of the program, if any FAIL vector bit remains set,
the FAIL message is displayed. Otherwise, the PASS message is
displayed.
Setting/clearing fail bits have no effect on failure processing.
FAIL bits 1 - 100 are reserved for GenRad tests. User generated
tests should use FAIL bit 100.
FAIL bits can be interrogated and custom diagnostics printed
based on which FAIL bits are set.
DECLARE BSTRING FAIL(m);
|
TEST/MEAS ----- FAIL(n)-----;
Argument
Description
Command keywords for instrumentation statements.
Keyword for FAIL vector bit string.
Maximum number of cells (bits) in the FAIL vector.
Must be DECLAREd at the start of the program.
Number of the FAIL cell that is set if the
instrumentation statement fails. If FAIL(n) is :
- Omitted from the statement, FAIL(1)
is assumed.
- Specified, execution of the statement has no effect
on
the FAIL vector.
TEST/MEAS
FAIL
(m)
(n)
FAIL bit 7 is set if the current source cannot supply enough voltage
27
to force the current for which the DCI is programmed, that is,
voltage compliance error. Because a fail bit is set, the FAIL indicator
is turned on at the end of the program.
TEST DCI DCS [BRANCH CURRENTERR;];
The default FAIL bit 1 is set if the current source is not in voltage
compliance. If this occurs, the FAIL indicator is turned on at the
end of the program. In addition, a branch to the label
CURRENTERR is taken.
TEST DCI DCS FAIL( );
If the current source is not in compliance, set FAIL bit 7. Test the
status of FAIL bit 7 by means of the IF-THEN-ELSE statement. If
FAIL(7) is set, indicating a failure, branch to N30.
IL(27) OS(156) OL(156) FAIL(156);
FAIL bit 156 is set if nail 156 is not low at the above digital test
statement.
Failure-reporting options are user-defined routines and
messages.
Specify which failure-reporting options are used when an
instrumentation statement fails.
Can be specified as parameters within individual
instrumentation statements or can be predefined with a USE
statement.
System test devices supported include: DCS, DCM, ACZ, RM,
ARITH, CONTACT, SHORTS, OPENS, and BURST.
The routines have access to special diagnostic variables defined
by the system when an instrumentation statement fails.
System failure variables do not need to be declared.
Variables cannot be read into by an I/O instruction or by the
TEST/MEAS statement INTO parameter, and they cannot be
assigned a LET statement value.
28
Description
Two-character string indicating the component type
tested/measured in the last FAILed statement.
R
V
Resistance
Voltage
Current
RP
Parallel Resistance
RS
Series Resistance
CP
Parallel Capacitance
CS
Series Capacitance
LP
Parallel Inductance
LS
Series Inductance
XP
XS
ZM
Parallel Reactance
Series Reactance
Impedance Magnitude
DD
VS
IS
AR
DG
FSTAT
Digital
Indicates the status of the test results for the last FAILed
instrumentation statement
*LOW
*HIGH
*FAIL
Measurement failure
#ERR
FLABEL
FDMSG
FPMSG
FCMSG
FMEAS
FHI
FLO
Specifies the I/O channel for the system message file, which is
defined by the MESsage option on the DIAGNOSE monitor
page.
This MESFILE channel should not be explicitly OPENed or
CLOSEd. The MESFILE device, STRIP_PRINTER, CRT, or
FILE, is determined by the DIAGNOSE page Messages to field.
DECLARE FAILSUB( );
SUBROUTINE FAILSUB( );
WRITE ID=MESFILE %S% FAILED %S%%S%%NL% FCMSG,FTYPE,FSTAT;
WRITE ID=MESFILE %S% MEASURED:%5G%%NL% FDMSG,FMEAS;
33
34
The GR228X system has easy to use debugging tools that can
decrease the time you spend debugging your test programs.
Measuring Fault Coverage (ALLFAULT)
35
40
Description
Enables you to display up to 20 plot windows
at a time. Each window has a unique title.
X-Y Coordinates
Uses crosshairs to read X-Y coordinates.
Multiple waveforms in a single window:
Enables you to add waveforms to an existing
window, delete waveforms, lock waveforms,
and hide waveforms.
Window size
Enables you to change the Plot window size.
Waveform attributes
Enables you to select a waveform, change its
color, point size and shape, and the type of
lines it uses to connect points.
Selecting the amount of data to plot:
Enables you to plot an entire array or a
portion of an array (subarray).
Saving, loading, and printing:
Enables you to save data from a plot window
for a future display. You can load previously
saved plot data or print a plot.
Magnification
Enables you to focus (zoom) on a particular
portion of the window.
Log10 mode
Enables you to convert the display of the X or
Y axis on a logarithmic scale.
Scrolling
Enables you to scroll (shift) the waveform
display left, right, up, and down.
Help
Provides on-line help for the plot window.
41
BoundaryScanLibrary (.BSL)
DeviceProbeReport (.DPR)
PinOpensDiagnostics (.POD)
Message (.MES)
SymbolTable (.SMT)
AtgInternalWork (.WOR)
MergedTestProgram (.TPG)
Debug (.DBT)
DebugTraceOld (.DBO)
SingleBoardTpg (.TPS)
AutomaticTestOptions (.ATO)
CircuitDescription (.CKT)
DigitalTestLibrary (.DTL)
AnalogComponentLibrary (.ACL)
AnalogTestLibrary (.ATL)
HybridTestLibrary (.HTL)
NailAssignmentReport (.NAR)
NailFixtureReport (.NFR)
When receiving a test program from a test program developer, use
this checklist to verify that it functions properly.
Step Action
1.
Check fault coverage on the board.
2.
Look over Allfault report.
3.
Understand what components are not tested and why.
4.
Be sure any specialized tests are performed.
Before releasing files to Manufacturing, ensure programs are
43
error free.
Select files for release.
Back up the test set.
Production Batch
In-Circuit Diagnostic Data
Object Code
Symbol Table
Merged Test Program
Data Logging
and Data Display
After completing this module, you should be able to:
Describe the purpose of each data logging option
(Standard, SEL, and RTDC).
Use the Production Test menu within the Preferences Menu to
select the logging options.
Generate a report.
Interpret a Logging file.
Use Data Display to view a report.
Collects data for all components on the UUT.
Amount of test data collected for the components is selected by
the Logging options.
A combination of +PASSES option and LOG page PLOTS
generation is commonly used as a debug tool and is sometimes
44
Sel
Function
Logging is disabled. No .LOG file is created or
appended.
Time stamps are recorded for all main events
associated with executing a test program.
Includes the failing label and key for each failed
component. Measured values are not logged.
Includes any measured value for each failed
component. Test limits are not logged.
Includes test limits and any test type for all
tested components. This option also logs No
tests.
Enables selective data logging. It provides you
with more flexibility in logging test data than
other options.
Symbol
Event
Program
Loaded
Action
@ Test Started
Start the test by pressing the start/continue
button on the keypad or Run key on the
keyboard.
Test
Aborted
Abort the test by pressing the Reset key on the
keypad or Control C on the keyboard. After
you abort a test, the system prompts:
Do you wish to cancel the last boards logging
data [Y/N]?
Passing
board test
finished
Test completed with no failures
(vacuum released).
/ Failing
board test
finished
46
* Error in
test
A test error occurred, such as a voltage source
overload or a current source compliance
condition.
& System
error
A Run-Time System error occurred.
! Test
canceled
Logged test data for last board was ignored.
After a board test is completed, if you decide
that the results should be ignored, press Reset
or Control Y on the keyboard to display the
prompt:
Do you wish to cancel the last boards logging
data [Y/N]?
Entering Y cancels a test entry in the .LOG
file for the previous test. Any other operator
action will retain the logged data. The logged
data not actually deleted, the canceled test
entry enables the Log Report Generator to
disregard the logged data for that board.
] Return to
Diagnose
mode
Unloads the test program
label key value limits type device message
Description
Analog measurement passed
Analog measurement failed high
Analog measurement failed low
No measurement made
Digital test failed
BUSTEST failure caused by an associated IC
SHORTS test failure
OPENS test failure
BUSTEST failure caused by bus
47
(C
(F
~
Digital failure messages are taken from the resulting .IDD file
and analog failure messages are taken from the .OBC file.
You can log additional messages if the selective logging option
is chosen and the MESSAGE = text is programmed in the
%COMPONENTS section of the .SEL file.
1 Access the Diagnose Monitor page.
2 Choose Mode=TEST, then choose the desired
Logging = [option]
The other fields may be set to the default.
3 Run the test with a sample lot of boards, GenRad recommends
20-25 board sample lots.
If you cannot use a sample lot of boards, use the gold
debugged board and run the test 20 times. To run the test, enter
at the TEST mode prompt: RUN=20
4 Set up the LOG page as follows:
Mode=GENERATE
Report=PLOTS
Plot=ALL
The other fields may be set to the default.
5 Running the LOG page will create a .REP file.
6 Print the .REP file and analyze the results.
The Selective Logging Control (.SEL) file is composed of three
optional sections:
%Mode
%Format
%Components
Log Option
TIMES
+FAIL
+VALS
/* Set up global data logging options; log fail data for all
49
50
You can generate three types of component plots, using data from:
Good boards only
Component tests that pass regardless of overall board pass
and fail results
All logged test data
Report Name
Description
Tester Yield Report
Provides a graph of tester yields over
time.
Failure Analysis Report Simultaneously plot opens, shorts,
resistors, inductors, capacitors, digital,
and other failure types as a percent of
all failures over the date range you
select.
Trend Analysis Report
Simultaneously plots opens, shorts,
resistors, inductors, capacitors, digital,
and other failure types as an average
per board for the date range you
select.
Test Times Report
Plots the passing board test time
against time.
Passing Board Volume Report:
Operates slightly different from other
reports. The volume must be
53
54
55
56
The GR228X test system can apply three different test techniques
for detecting and diagnosing device pin defects:
Digital in-circuit test
Junction Xpress test technique
Opens Xpress test technique
NOTE: In many cases, more than one test technique should be
used for a single device. For example, a combination of Junction
Xpress, to detect opens pins defects, and simple digital vectors,
to detect wrong or incorrectly programmed part defects, can
provide better coverage than can be provided by either technique
alone.
57
58
59
61
62
POLEARNs
Hybrid and Analog are better suited for Opens Xpress
Leadless devices like BGAs, COB, etc. use Junction Xpress
Devices that have a Ground or Power plane can use Junction
Xpress
Available as of GR228X Software release 3.3.1 and currently
available on the web.
Evaluates usability of Junction Xpress test technique
Views the .idd or .idx file
NOTE: Because the predictor tool only examines the .idd or .idx
file for a board and does not make electrical measurements on
an actual board, its conclusions will in some cases differ from
those of the tester-based POLEARN command.
jxpredict idd_file > report_file
idd_file typically .idd or .idx
Report file defaults to screen unless > redirected to a file
report_file
jxpredict boardcpu.idx > boardcpu_jx.rpt
64
66
68
69
70
Axial
Can
Drop
Chip
Scanner Subsystem
ICT fixture requires overclamp, OX probes and special
hardware
Note: VMS systems with an AFTM can use Opens Xpress to
test ICs, connectors, and caps. However VMS systems do not
support Cap Xpress or Orient Xpress.
TEST XPRESS
Test Program Development
After completing this module, you should be able to:
Describe the purpose and content of the four data files that
provide TEST XPRESS Tools data to the test program.
Describe the TEST XPRESS Tools test program development
process.
Use the TEST XPRESS Tools procedure to assist you in
72
The four data files that provide TEST XPRESS Tools data to the
test program are: Device Probe Information (.dpi), Device Probe
Report (.dpr), Pin Opens Data (.pod), and POLEARN - generated
Coverage Report.
Contains data used to produce the .dpr file.
73
75
These optional .dpi file statements are normally used when adding
Opens Xpress to an existing test program.
HARDWARE=[ ]
MEAS_CONN=[ ]
AFTM_SLOT=n
AFTM_COMPATIBLE
AFTM_SIGNAL_NAIL, AFTM_RTN_NAIL
SCANNED_SIGNAL_NAIL, SCANNED_RTN_NAIL
GUARD, GUARDGND
PIO_USED
VPLUS_NAIL, VMINUS_NAIL
PRBGND_NAIL
VCCGRD_RLY, GNDGRD_RLY
Indicates which type of fixture hardware will be used so that the
wiring description in the .dpr file will be done correctly.
HARDWARE=OFM; (default)
or
HARDWARE=MUX;
Argument
OFM
MUX
Description
Indicates OFM hardware will be used. Use
OFM hardware on ICA systems with no
AFTM, which is also compatible with
GR2281A and GR2287A test systems as well
as AFTM systems.
Indicates the Buffer/ MUX board hardware
will be used. The MUX hardware can only
be used on GR2281A or GR2287A test
systems and systems having an AFTM
board.
or
MEAS_CONN=DIRECT;
AFTM/Meas-based:
Directly to the AFTM slot
VPLUS_NAIL=1210;
VMINUS_NAIL=1217; /* Not Used - OFM produces its own -5V
supply */
MEAS_CONN=DIRECT; /* Routes signal wires directly
to HF nails */
GUARD=1010;
GUARDGND=1026;
PRBGND_NAIL=900;
SCANNED_SIGNAL_NAIL=916; /* Not Used because the
connection is DIRECT */
SCANNED_RTN_NAIL=924; /* Not Used because the
connection is DIRECT */
VCCGRD_RLY=1;
GNDGRD_RLY=4;
AFTM_COMPATIBLE; /* Causes Jumpers from CS7X & CS8X
to HF nails */
AFTM_SLOT=14;
AFTM_SIGNAL_NAIL=3; /* Applies because connection is
DIRECT - Use HF3 */
AFTM_RTN_NAIL=4; /* Applies because connection is
DIRECT - Use HF4*/
PIO_USED=2,4,6; /* Indicate not to use TDR2, TDR4,
and TDR6*/
/* NOTE: Only the minimum of a list of components to be
tested is required. Settings will default to OFM and
SCANNED. If Junction Xpress tests are to be performed on
non-ICA systems, the AFTM_SLOT must also be specified.*/
79