UNIT III

1. Design an asynchronous sequential circuit that has two inputs X1 and X1 and one output Z.
When X1=0, the output Z is 0. The first change in X2 that occurs while X1 is 1 will cause
output Z to be 1. The output Z will remain 1 until X1 returns to 0. (Refer pg: 6.18-6.21 in
Godse)
2. Design a pulse mode circuit having two input lines X1 and X2 and one output line Z. The
circuit should produce an output pulse to coincide with the last input pulse in the
sequenceX1,
X2, X2. No other input sequence should produce an output pulse. (Refer pg: 6.34 6.35 in
Godse)
3. Draw the state diagram and obtain the primitive flow table for a circuit with two inputs x1
and
x2 and two outputs z1 and z2 that satisfies the following conditions.
1. When x1x2=00, output z1z2=00.
2. When x1=1 and x2 changes from 0 to 1, the output z1z2=01.
3. When x2=1 and x1 changes from 0 to 1, output z1z2=10.
4. Otherwise output does not change. ( Refer pg: 6.26, 6.27 in Godse)
5. Define the following: i) asynchronous sequential circuits, ii) Cycles, iii) critical race,
iv) non- critical race v) race vi) flow table vii) primitive flow table viii) stable state ( Refer
notes)
7. An asynchronous sequential circuit has two internal states and one output. The excitation
and
output function describing the circuit are as follows.
Y1=x1x2+x1y2+x2y1
Y2=x2+x1y1y2+x1y1
Z=x2+y1 (refer 6.24 6.26 in Godse)
UNIT II
1. Design a MOD 10 synchronous counter using JK flip-flops. Write the
excitation table and state table. (Refer pg: 5.37, 5.38 in Godse)
2. Design a sequential circuit with four flip-flops ABCD. The next states of B, C, and D
are equal to the present states of A, B, C respectively. The next state of A is equal to
the EX- OR of present states of C and D. (Refer pg: 5.86 in Godse)
3. Design a mod- 7 counter using JK flip-flops. (Refer pg: 5.49 - 5.51 in Godse)
4. Design a BCD Up / Down counter using S R flip-flops. (Refer pg: 5.98 5.102 in Godse)
5. Design a synchronous decade counter using D flip-flops. (Refer pg: 5.92, 5.93 in Godse)
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6. Explain the working of JK flip- flop. What is race around condition? How is it
overcome? Explain these concepts with relevant timing diagrams. (Refer pg: 4.13 -4.16 in
Godse)
7. Design a 3 bit up / down counter using JK flip flops and Explain its working with
timing
diagrams. (Refer pg: 5.42, 5.43 in Godse)
8. Using SR flip-flops design a parallel counter, which counts in the sequence
101,110,001,010,000,111,101(Refer pg: 5.81, 5.82 in Godse)
9. Design a synchronous sequential counter using JK flip-flop and avoid lock out condition,
for
467314 (Refer pg: 5.28, 5.29 in Godse)
10. Expalin the operation of Master Slave JK flip-flop with suitable diagrams. (Refer 4.17
4.19

in Godse)
UNIT I
1. Determine the prime-implicants of the Boolean function by using the tabulation
method(w, x, y, z)=(1,4,6,7,8,9,10,11,15) (Refer pg: 1.62 1.64 in Godse)
2. Simplify the following Boolean expression using Quine McCluskey method:
F=m(0,9,15,24,29,30)+d(8,11,31). (Refer pg : 1.66 1.68 in Godse)
3. Design a combinational logic diagram for BCD to Excess-3 code converter. (Refer pg:
3.36,3.37 in Godse)
4. Find a minimum sum of products expression for the following function using QuineMcClusky method.
F (A,B,C,D,E) = (0,2,3,5,7,9,11,13,14,16,18,24,26,28,30) (Refer pg: 1.62 -1.64 in Godse)
5. Determine the minimum sum of products and minimum product of sums for f =
bcd+bcd+acd+abbcd. (Refer pg: 1.42 & 1.54 in Godse)
6. Find the minterm expansion of f (a, b, c, d) = a (b+d) +acd (Refer notes)
7. Explain with necessary diagram a BCD to 7 segment display decoder. (Refer pg: 3.55
3.59 in
Godse)
9. With a suitable block diagram explain the operation of BCD adder (Refer pg: 3.20 3.22
in
Godse)
10. Draw and explain the working of a carry-look ahead adder. (Refer pg: 3.15 3.18 in
Godse)advantages and disadvantages of Totem pole output?
Advantages:
1. External pull up resistor is not required
2. Operating speed is high
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Disadvantages:
Output of two gates cannot be tied together.
108. Explain the wired And connection?
When the open collector outputs of two or more gates can be connected together, the
connection is called a wired AND.
It is represented as:
1. In wired AND connection, the output is high only when all the switches are open
2. Hence, the output is equivalent to the logical AND operation of the logic function
performed
by the gates.
109. State the advantages and disadvantages of wired AND connection.
Advantage is, Outputs of two gates can be tied together using wired-AND technique.
Disadvantage is, Operating Speed is Low.
How to avoid Lock out Condition?
1. The counter should be provided with an additional circuit. This will force the counter from
an unused state to the next state as initial state.
2. It is not always necessary to force all unused states into an initial state. Because from
unused
states which are not forced, the circuit may eventually arrive at a forced unused state. This
frees the circuit from the Lock out condition.
What are the types of shift register?
1. Serial in serial out shift register? 2. Serial in parallel out shift register 3. Parallel in serial

out shift register 4. Parallel in parallel out shift register 5. Bidirectional shift register shift
register.
95. What are the types of counter?
1. Synchronous counter 2. Asynchronous Counter
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96. What are the two models in synchronous sequential circuits.

1. Moore circuit 2. Mealy circuit
97. What is moore circuit?
When the output of the sequential circuit depends only on the present state of the flip-flop,
the sequential circuit is referred to as moore circuit.
98. What is Mealy circuit?
When the output of the sequential circuit depends on both the present state of flip- flop and
on the input, the sequential circuit is referred to as mealy circuit.
99. Define successor
In a state diagram, if an input sequence, x takes a machine from state si to state sj, then sj is
said to be the x - successor of si.
100. Define strongly connected machine?
In a sequential machine many times certain subsets of states may not be reachable from
other subsets of states, even if the machine does not contain any terminal state. However, if
for
every pair of states si, sj of a sequential machine, there eights an input sequence which takes
M
from Si to Sj then sequential machine M is said to be strongly connected.
101. State and prove consensus theorem in Boolean algebra?
In simplification of Boolean expression, the redundant term in an expression can be
eliminated to form the equivalent expression. The theorem used for this simplification is
called
consensus theorem. For ex in expression of the AB+AC+BC, the term BC is redundant and
can be
eliminated using Consensus theorem.Give Applications of MUX?
Applications:
1. MUX can be used to realize a Boolean function
2. It can be used in communication systems e.g. time division multiplexing
104. Define Latch?
It is a sequential device that checks all of its inputs continuously and changes its outputs
accordingly at any time, independent of a clocking signal.
83. What do you mean by present state?
The information stored in the memory elements at any given time defines the present state
of the sequential circuit.
84. What do you mean by next state?
The present state and the external inputs determine the outputs and the next state of the
sequential circuit.
85. What are the types of sequential circuits?
1. Synchronous sequential circuits 2. Asynchronous sequential circuits

86. Define synchronous sequential circuit

In synchronous sequential circuits, signals can affect the memory elements only at discrete
instant of time.
87. Define Asynchronous sequential circuit?
In asynchronous sequential circuits change in input signals can affect memory element at
any instant of time
88. Define flip-flop
Flip - flop is a sequential device that normally. samples its inputs and changes its outputs
only at times determined by clocking signal.
89. List various types of flip-flop
1] S.R. latch 2] D latch 3] Clocked J.K. flip-flop 4] T flip-flop
90. What is race around condition?
In the JK latch, the output is feedback to the input, and therefore change in the output results
change in the input. Due to this in the positive half of the clock pulse if J and K are both high
then
output toggles continuously. This condition is known as race around condition.
91. Define rise time and fall time?
The time required to change the voltage level from 10% to 90% is known as rise time, and
the time required to change the voltage level from 90% to 10% is known as fall time.
92. Define propagation Delay?
A propagation delay is the time required to change the output after application of the input.
93. Define shift Registers
The binary information in a register can be moved from stage to stage within the register or
into or out of the register upon application of clock pulses. This type of bit movement or
shifting is
essential for certain arithmetic and logic operations used in microprocessors. This gives rise
to a
group of registers called shift registers.