DIGITAL SIMULATION OF UNINTERRUPTIBLE POWER SUPPLY (UPS) AND DYNAMIC VOLTAGE

RESTORER (DVR) FOR VOLTAGE SAG MITIGATION

Khalid Mohamed Nor Hasmaini Mohamad

Department of Electrical Engineering TNB Research Sdn. Bhd

Faculty of Engineering No.1, Lorong Ayer Hitam
University of Malaya Kawasan Institusi, Bandar Baru Bangi
Kuala Lumpur – Malaysia Selangor-Malaysia
Abstract:

In this paper, circuit models of Uninterruptible Power Supply (UPS) and Dynamic Voltage Restorer
(DVR) are presented. The models are used in a digital simulation to determine their dynamic
responses over practically monitored voltage sags. The voltage sag data are obtained from a power
quality monitoring projects in Peninsular Malaysia, which records voltage sags at 52 sites. The circuit
models of the mitigation devices include a complete Pulse Width Modulated (PWM) synthesis scheme
and its control circuits. From the simulation, the UPS and DVR component size as well as the amount
of energy storage required can be estimated.

I) INTRODUCTION
Concerns over process disruptions, which involves
critical and sensitive loads, have prompted
researchers to find ways to enhance power quality
such as developing voltage sag mitigation techniques.
Effectively, these mitigation technique devices can be
grouped into two classes namely, custom power
devices and power line conditioners. Typical custom
power devices included the Dynamic Voltage
Restorer (DVR) and Distribution Static Compensator
(D-Statcom), whereas power line conditioner
included motor generator sets (M-G sets),
Uninterruptible Power Supply (UPS), Magnetic
Synthesizers and Superconducting Storage Devices
(SSDs) [14].
This paper describes circuit models of UPS and DVR,
the two most common mitigation equipment. In
addition, we have also developed models for
critical/sensitive equipment such as single-phase ac
contactor and three-phase induction motor. The load
models are employed in the digital simulation to
determine the dynamics response during voltage sags
as well as to predict the ride-through capability of the
equipment. This information can be used to
determine size and cost of the mitigation equipment
required. Then, both mitigation equipment model and
sensitive load model are integrated together so that a
complete system can be simulated.
The model is tested/simulated using voltage sag data
from a power quality monitoring projects in
Peninsular Malaysia under TNB Research Sdn. Bhd
that records the voltage sags events at 52 sites. These sites
consist of various transmission levels and distribution
levels. Digital simulations help engineers to design their
product before producing a prototype or the effectiveness
of the proposed mitigation scheme. In this project, the
digital simulation studies have been carried out using
PSCAD/EMTDC program.
This paper also presents a complete Pulse Width
Modulated (PWM) synthesis scheme and the control
system adopted in both models. The general requirement
of such control system is to obtain a sinusoidal waveform
with low total harmonic distortion and good dynamic
characteristics.
This paper is organized in such following way: section II
will provide the digital simulation information for UPS
included its circuit configuration, the operational
principle, the control and its result. In section III, the same
as Section II is applied for DVR. Finally, the conclusion is
presented in Section IV.
II. UNINTERRUPTIBLE POWER SUPPLY (UPS)
A) Circuit Configuration
Normally, UPS are used to interface critical loads such as
computers and communication systems to the utility
systems. In general, the basic schematic diagram of the
proposed on-line UPS model shows in Figure 1 consists of
three basic elements, such as full bridge rectifier, battery
storage, and full bridge PWM inverter. Two transfer
switches are used to transfer the input for the converter
from the main ac line to the storage battery or vice versa.
In addition, two bypass switches are employed for
reverting to main ac line in the event of UPS failure
or overload. Also, an L-C low pass filter is employed
at the output of rectifier and inverter for eliminating
unwanted harmonic component from the output
voltage. A newly developed model of sag generator is
applied in the UPS model, which should performed
similar function as Programmable AC Source. It is
quality monitor is used to analyze the capability of UPS to
mitigate voltage sags, which can be obtained from the
circuit given in Figure 3. In this case, similar circuit in
Figure 2 is applied, but the sag generator model is
replaced with the circuit in Figure 3 to replay the voltage
sags event.

0.1
V
inserted at the main ac source such as shown in
Figure 2. The sag generator specifically designs to data1.txt

create voltage sag event by varying the ac voltage and

time. It is designed in PSCAD/EMTDC using
FORTRAN program.
Figure 3: The PSCAD/EMTDC circuit for recorded
voltage sag data
BYPASS
SWITCH
B) The Operational Principle
SAG FULL BRIDGE FULL BRIDGE LC BYPASS
LOAD
GENERATOR RECTIFIER INVERTER FILTER SWITCH Generally, the operation of the UPS can be divided into 2
operations mode such as normal operation modes and
back-up operation modes.
CONTROLS
B.1. Normal Operation Modes
BATTERY
STORAGE
In normal operation mode, switch S1 is kept close and S2
Figure 1: Schematic Diagram for UPS is off. The full-bridge inverter receives energy from the
main source through full-bridge rectifier. Practically, the
A PSCAD/EMTDC circuit for simulating the single charger continuously charges the batteries. But to reduce
phase on-line UPS is shown in Figure 2. In the complication in the design for overall system evaluations,
circuit, we also have applied two isolating the batteries are simply modeled as a dc source. The
transformers. The purpose is to avoid the battery bypass switch BP1 is closed to allow the inverter to
storage from very high voltage and reduce the supply voltage to the load. In case of power supply
required number of battery storage. Instead of sag becomes overloaded, or when the inverter fails, BP1 is
generator, the recorded voltage sag data from power turned off while BP2 is turned on.

Io 2
0.5 V_dc S4 S2
D D
D 1 D 1 2
Bypass Switch S12 Bypass Switch
D D 2Inv1 2Inv2 D
Switch BP1 BP2
Vs 1.0 S1 Switch
0.1 0.5 D Vo
S2
SAG V #1 #2 #2 #1 300.0
500. 500.0 500.0 2
R=0 S3
0
50.0
f

1.0 1 1
D D
D D 2Inv3 2Inv4
0.1

Full Bridge Dc Source Full Bridge

Rectifier Inverter
Figure 2: The PSCAD/EMTDC circuit for single phase on-line UPS
B.2. Back-up Power Mode signal (T_on and T_off). One set of the signal is to turning
on the inverter switch and the other one is turning off the
If failure or sags occurred in the main ac source, static switch. There are two switches applied in this circuit, i.e
switch S1 is opened and S2 is closed, shifting the G1 and G2, which represent INV1, INV4 and INV2,
input from the main ac source to the battery storage INV3 respectively.
or in this case the dc source. Thus, the full bridge
H H
inverter receives energy directly from the battery to Vr_on
OFF OFF
continue supplying the loads. Practically, after the L L
T_on
main ac source recover, the static switch S1 will be
H H
closed again and the UPS will change its operating Vr_off
ON ON

mode from back-up power mode to normal operation T_off

L L

mode. 2 2
G1 G2

C) Control Techniques

The output voltage of the inverter is required to be
sinusoidal with controllable magnitude and
frequency. To achieve this requirement, Pulse Width
Modulation (PWM) switching scheme is usually
used. In order to produce a sinusoidal output voltage
waveform at 50Hz frequency, a sinusoidal reference
control signal at 50Hz frequency is compared with a
triangular waveform as shown in Figure 4. The
triangular waveform is at a switching frequency,
which is 33 times more than the fundamental
frequency of 50Hz or 1650Hz, which establishes the
frequency where the inverter switches are switched.
The switching frequency can be increased but it will
also increase the magnitude of higher harmonics and
the switching losses. The difference between 50Hz
sine waveform and the triangular waveform will
produce the PWM signal or the switching points such
as shown in Figure 4. The signal is used to drive the
inverter switches i.e INV1, INV2, INV3 and INV4
consisting of Gate Turn-off Thyristor (GTOs). In this
configuration, the PWM amplitude signal is between
0.0 and 1.0 with frequency of 50Hz.
PWM SIGNAL
INV1
INV2
GATE DRIVE
CIRCUIT
INV3
Figure 5: The Gate Drive Circuit for the Inverter
D) Simulation Results
In the proposed UPS model, rectifier and inverter are
simulated separately and then both of them were
simulated together as a system. Each of the simulation is
presented using PSCAD/EMTDC to demonstrate the
system characteristics. Sample result is provided for the
whole system simulation output for UPS model.
A voltage source of 240V/50Hz is applied for the
simulation above. The voltage supplied into the converter
depends on the isolating transformer turn ratio. Therefore,
in the proposed model, both rectifier and inverter circuits
use a 12 Vac and a 12 Vdc voltage respectively as main
voltage sources.
For the complete system simulations, the UPS model was
tested under linear and non-linear load. In order to observe
the performance of the UPS model during sags,
appropriate simulations with different input configuration
at the main source are applied:
a) Sag generator used to create various types of voltage
sags is inserted at the main source
b) Sample voltage sags data from Power Quality
monitored sites is inserted at the main source

50Hz Reference INV4

Sine Wave +240
:SUPPLY VOLTAGE

+144
+48
V

-48
1650Hz Triangular -144
Wave - 2 40
0. 3 3 0.4175 0.505 0.5925 0.68

Figure 4: Inverter control block diagram. :OUTPUT VOLTAGE

+170
+102

The gate drive circuit shows in Figure 4 consist of an +34

V

-34

EMTDC/PSCAD component so called Interpolated -102

- 1 700. 3 3 0.4175 0.505 0.5925 0.68

Firing Pulses such as exhibit in Figure 5. This Time (sec)

component required two set of signals which are the
reference signal (Vr_on and V_off) and triangular (a) Supply and load voltage waveform
 waveform contained only 8.346% of Total Harmonic
Distortion.
:FILTERED OUTPUT VOLTAGE
+230
+138
+46
V

-46 :SUPPLY VOLTAGE

-138 +30
-230 +18
0.33 0.41 0.49 0.57 0.65 0.73

kV
+6
-6
:PWM SIGNAL -18
+1.5 -30 0
+1.1 0.64 1.28 1.92 2.56
+0.7
+0.3 :FILTERED OUTPUT VOLTAGE
-0.1 +30
-0.5
0.33 0.41 0.49 0.57 0.65 0.73 +18
+6

kV
Time (sec) -6
-18
-30 0 0.64 1.28 1.92 2.56
(b) Filtered load voltages and PWM signal waveform Time (sec)
Figure 6: Simulation results for linear load
Figure 7: Simulation results for recorded voltage sag data
The simulation results using sag generator as input at
the main source is presented in Figure 6. For instance, III) DYNAMIC VOLTAGE RESTORER
by using sag generator, voltage sags with 50% sag
magnitude and 0.2s duration is constructed. Figure 6 A) Circuit Configuration
shows a simulation result when the UPS is tested
under linear load. Here, a 300Ω resistive load is used Dynamic Voltage Restorer (DVR) is designed to protect
to represent linear load. The simulation is run for one- voltage sags on lines feeding sensitive/critical equipment.
second duration. From Figure 6(a), it can be seen that Unlike UPS, the DVR is specifically designed for large
initially, nominal voltage, 240V is supplied to the loads (ranging from 2MVA to 10MVA) served at
system, then, at 0.4 seconds, the voltage start to drop distribution voltage.
to 120V for 0.2s duration and then recover to 240V
again. The results obtained at the load terminal In this paper, a simple single phase DVR and a three-
depicted in Figure 6(a) and 6(b) have demonstrated phase DVR model are developed using PSCAD/EMTDC
the capability of the UPS in mitigating voltage sags. program. The DVR is typically designed to inject the
The output voltage waveform remained unchanged missing voltage onto the power line through a series
even when voltage sags occurred. By applying a LC transformer such as shows in Figure 8. Figure 8 depicts
low-pass filter in the circuit, total harmonics the proposed single line DVR circuit.
distortions (THD) value is significantly reduced Iin Iout
(9.5%) and hence forms a smooth sinusoidal #1 300.0

waveform at the output voltage waveform. Note that R=0 #2

V
the peak output voltage is 230V. In Figure 6(b), it SAG
D 1 D 1
also exhibits the PWM signal to drive the switches 50.0 2500.0
f 2Inv1 2Inv2
use in the inverter. D

0.05
In case of non-linear load configuration, we have 60.0

connected the capacitor and resistor at the load side.

The output result is similar with the result when linear
load is applied. The only difference is on the THD
value, as it has been found that the THD of the load
voltage is 19% and is higher than that in Figure 6(b),
which has 9.5% of THD.
For the second input configuration, the recorded
voltage sag data from power quality monitor is
replayed during the simulation. Since the data is a
high voltage data (33kV), different size of battery
storage and isolating transformer are applied. Figure
7 shows the voltage supply waveform and its load
voltage waveform. It was found that the load voltage
2500.0
D
1 1
D D
2Inv3 2Inv4
Figure 8: A single phase DVR circuit
Basically, the DVR comprises of three main parts, which
are the inverter, dc energy storage and control system. The
inverter configuration modeled in this circuit model is a
PWM full bridge inverter. The switching inverter
consisting IGBTs is employed in the model. The dc
energy storage unit for the proposed model, which is
interfaced to the inverter, is simply a capacitor. It is
adopted to reduce complications during simulation.
This capacitor draws the charging energy from the
main power. In this model, a large capacitor is used to
store the energy. Furthermore, the control system is
employed to ensure only the missing voltage is
injected to the series transformer. In addition, a Low
Pass Filter is connected at the inverter side to
attenuate high frequency voltage. We used a linear
load. This circuit also using the similar sag generator
used in UPS model.
B) The Operational Principle
The basic idea of the DVR is to inject the missing
voltage into the system through series injection
transformer when it is subjected to voltage sags.
D) Simulation Results
In the proposed DVR model, single-phase and three-
phase DVR is developed to analyze their dynamic
performance during disturbances. We have simulated
them using PSCAD/EMTDC program. For the
simulations above, we used 240V/50Hz voltage source.
The proposed DVR model is simulated with linear load.
Simulation results using sag generator as input at the main
source is shown in Figure 10 and Figure 11. Figure 10 and
Figure 11 show the simulation results for single-phase and
three-phase DVR respectively. For instance, using the sag
generator, voltage sag of 50% sag magnitude and 0.2s
duration is injected to the single phase DVR.
Supply Voltage
+240
+144

Therefore, the sags is unseen by the loads. During +48

V
-48
normal operation, the capacitor received energy from -144

the main source. When voltage drops is detected, the -240 0 0.2 0.4 0.6 0.8 1

capacitor started to recharge and deliver dc supply to +250

Output Voltage

the inverter. Then, the inverter will ensure only the +152

+54
missing voltage is injected to the transformer. The
V

-44

inverter fully functioned during voltage sags. During -142

-240 0 0.2 0.4 0.6 0.8 1

undisturbed power supply condition, the inverter only Time (sec)
supplies a small injection voltage to the transformer.
(a) Supply and Load Voltage
C) Control Techniques
Injection Voltage
+120
For the proposed DVR model, only the missing
voltage should be injected to the series transformer.
V

Therefore, the PWM modulation scheme for the

-130 0 1
inverter is configured to produce the injection voltage
at the output of the inverter. +250
Dc Storage

+200
+150
V

This configuration used the same PWM scheme as +100

+50
UPS but with difference control. The difference + 00 1

between the nominal voltage waveform and the Time (sec)

voltage sags waveform is set as a voltage reference (b) Injection Voltage and DC Storage
for the PWM scheme (see Figure 9). A control to Figure 10: Simulation result for Single-Phase DVR
detect the start and the end of voltage sags are
developed so that the inverter will only supply the Vltg Source A Vltg Source B Vltg Source C
+ 2 4 0
injection voltage at that duration. +144

+ 4 8
V

0.0 -48

Phase -144
Ref_Vol

- 2 400. 3 5 0.396 0.442 0.488 0.534 0.58

N
0.24 Sin + N/D
Mag D - + 2 3 0
Vltg Output a Vltg Output b Vltg Output c

Freq +138
F D
50.0 + 4 6
V

-46
0.24

-138

- 2 300. 3 5 0.396 0.442 0.488 0.534 0.58

Vsag Time (sec)

Figure 9: The Circuit Diagram of Voltage Reference Figure 11: Simulation result for Three-Phase DVR
From the observation in Figure 10(a), it can be seen
that there is a bit of voltage drop, about 5V, in the
load voltage during voltage sags because of the
discharging capacitor (see figure 10(b)). This drop
will not occur if a real storage unit is employed in the
proposed model, as it does not performed discharging
characteristics.
For the given supply voltage shows in Figure 10(a),
the DVR have successfully compensated voltage
drop. To yield the output voltage mentioned above,
the injection voltage depicted in Figure 10(b) has
been injected to the series transformer.
Figure 11 shows the simulation result for three-phase
DVR. For simplification, 240V voltage supply is
utilized for this model. For instance, the sag generator
is set to 50% sags with 0.1s duration. The result is
quite similar with the result of single phase DVR.
Clearly, the load voltages (see Figure 11) stay steady
despite the supply voltage drops about 50%.
However, there is impulse transient appearing at the
beginning and at the end of the voltage sag event.
IV. CONCLUSION
The simulation results demonstrated the capability of
the PSCAD/EMTDC Uninterruptible Power Supply
(UPS) and Dynamic Voltage Restorer (DVR) models
as well as the sag generator. It was found that the
models performed well with linear load but with
transients voltages for non-linear load. In the project
recorded voltage sag data are successfully replayed
during simulation. This is useful if we were to
perform a post-mortem to determine how particular
voltage sag caused a disruption.
With the models we have developed, we are now able
to simulate any processes that are subjected to various
types of practical voltage sags. We can see the impact
of voltage ratings, load sizes and the storage energy
of mitigation equipment. In future work, we will use
these models to determine, design and size mitigation
equipment.
V. ACKNOWLEDGEMENT
The author, Hasmaini Mohamad gratefully
acknowledge the financial assistance given by the
TNB Sdn.Bhd and TNB Research Sdn.Bhd for her to
carry out Master studies at the University of Malaya.
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IEEE 1997
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VII. BIOGRAPHIES
Khalid Mohamed Nor was born in Sungai Pelong in Selangor,
Malaysia. He graduated with First Class Honors in Bachelor of
Engineering from the University of Liverpool, England. He la ter
obtained his MSc in 1978 and PhD in 1981 from the University of
Manchester Institute of Science and Technology, England. He joined the
University of Malaya, Malaysia as a lecturer in 1981 and currently is a
professor in the department of electrical engineering in the said
university. He is a Senior Member of IEEE.
Hasmaini Mohamad was born in Kota Bharu,Kelantan, Malaysia in
1976. She graduated in Bachelor of Engineering from Department of
Electrical, University of Malaya, Kuala Lumpur. Currently, she is
working at TNB Research as a Research Associate and at the same time
is pursuing Master of Engineering and Science at the University Malaya.
Her major interest is in power quality mitigation.