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SINGLE TIMER
DESCRIPTION
SOP-8
FEATURES
DIP-8
APPLICATIONS
*Precision timing
*Pulse generation
*Time delay generation
BLOCK DIAGRAM
Threshold
Vcc
Control
Voltage
Trigger
Contek
Tri.
Comp.
Thr.
Comp.
Output
3 Output
Dischage
FlipFlop
Reset 4
1
GND
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NE555
C)
SYMBOL
Supply Voltage
Power Dissipation
Lead Temperature
Operating Temperature
Storage Temperature
VALUE
Vcc
Pd
Tlead
Topr
Tstg
Supply voltage
Supply Current
(Note 1)
Timing Error(monostable)
Initial Accurary(Note 2)
Drift with Temperature
Drift with Supply Voltage
Timing Error(astable)
Initial Accurary(Note 2)
Drift with Temperature
Drift with Supply Voltage
Control Voltage
SYMBOL
Vcc
Icc
MIN
4.5
Vcc=5V,RL=
Vcc=15V,RL=
TYP
3
7.5
RA=1k to 100kmW
C=0.1mF
1.0
50
0.1
ACCUR
Dt/DT
Dt/DVcc
Vc
RA=1k to 100kmW
C=0.1mF
2.25
150
0.3
10.0
3.33
10.0
3.33
0.1
1.67
5
0.01
0.7
0.1
VTH
Threshold Current(Note 3)
Trigger Voltage
ITH
Vtr
Trigger Current
Reset Voltage
Reset Current
Itr
Vrst
Irst
VOL
VOH
C ,Vcc=5 ~ 15V)
TEST CONDITIONS
V
mW
C
C
C
ACCUR
Dt/DT
Dt/DVcc
Threshold Voltage
UNIT
16
600
300
0 to 70
-65 to 150
tR
tF
Vcc=15V
Vcc=5V
Vcc=15V
Vcc=5V
9.0
2.6
Vcc=5V
Vcc=15V
Vtr=0
1.1
4.5
0.4
Vcc=15V
Isink=10mA
Isink=50mA
Vcc=5V
Isink=5mA
Vcc=15V
Isource=200mA
Isource=100mA
Vcc=5V
Isource=100mA
12.75
2.75
ILKG
MAX
UNIT
3.0
%
ppm/ C
%/V
16
6
15
0.5
V
mA
mA
0.25
2.2
5.6
2.0
1.0
0.4
%
ppm/ C
%/V
V
V
V
V
mA
V
V
mA
V
mA
0.06
0.3
0.25
0.75
V
V
0.05
0.35
11.0
4.0
12.5
13.3
V
V
3.3
100
100
20
V
nSec
nSec
nA
100
Note 1:Supply current when output is high is typically 1mA less at Vcc 5V.
Note 2:Tested at Vcc=5.0V and Vcc=15V.
Note 3:this will determine the maximum value of RA+RB for 15V operation, The maximum total is R=20M W, and
for 5V operation the maximum total is R=6.7M W.
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NE555
APPLICATION CIRCUIT
RB
Threshold
C1
Trigger
RA
Discharge
7
5
Q1
Lower
comparator
Upper
comparator
R3
R2
R1
VCC
GND
FLIP-FLOP
Contek NE555
Reset
APPLICATION NOTES
The application circuit shows astable mode configuration.
Pin 6 (Threshold ) is tied to Pin 2 ( Trigger ) and Pin 4 ( reset ) is tied to Vcc ( Pin 8 ). The external capacitor C1 of Pin
6 and Pin 2 charges through RA,RB and dischages through RB only. In the internal circuit of Contek NE555 , one input
of the upper comparator is at voltage of 2/3Vcc(R1=R2=R3),another input is connected to Pin 6.As soon as C1
is charging to higher than 2/3Vcc, transistor Q1 is turned ON and discharge C1 to collector voltage of transistor Q1.
Therefore, the flip-flop circuit is reset and output is low.
One input of lower comparator is at voltage of 1/3Vcc,
discharge transistor Q1 turn off and C1 charges through RA and RB. Therefore, the flip-flop circuit is set output high.
That is, when C1 charges through RA and RB , output is high and when C1 discharge through RB ,output is low. The
charge time(output is high) t1 is 0.6 9 3( RA+RB) C1 and the discharge time (output is low) T2 is 0.6 9 3 RB*C1.
1
Vcc - Vcc
3
=0.693
ln
2
Vcc - Vcc
3
T1=0.693*(RA+RB)*C1
T2=0.693*RB*C1
T=T1+T2=0.693(RA+2RB)*C1.
Then the frequency of astable mode is given by
f =
1
T
1.44
(RA + RB) * C1
D. C. =
T2
T
RB
RA + 2RB .
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