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QUESTION BANK
Subject
Subject Code
Faculty
Class
AB + A C D + A B D + A B C D
[May 2009]
7. Simplify the following Boolean function by Karnaugh map method:
F(A, B, C, D) = m(1, 5, 9, 12, 13, 15)
[May 2009]
8. Convert (367)10 into Excess - 3 code.
[Dec 2008]
9. Express Gray code 10111 into binary numbers.
[Dec 2008]
10. Write the Boolean function of an X-OR gate give its truth table.
[Dec 2008]
11. What is the largest binary number that can be expressed with 12 bits? What is the
equivalent decimal and hexadecimal?
[May 2008]
12.Simplify (x+y) (x+y' ) to a minimum number of literals.
[May 2008]
13. Find the minterm of xy+yz+xy' z.
[May 2008]
14. What are minterms?
[May 2007]
15. Convert the following function into sum of product form (AB+C)(B+CD)
[May 2007]
16. Convert the following number from one base to other (65.342)8=( )7
[May 2007]
17. What is the advantage of gray codes over the binary number sequence?
[May 2007]
[May 2004]
[May 2004]
[Dec 2003]
[Dec 2003]
PART-B
1. (i).Simplify the following Boolean function F together with dont-care
condition d, and then express the simplified function in sum of
minterms
F (w, x, y, z) = (1,3,7,11,15) + d (0,2,5)
(ii) Implement the following Boolean function with NAND gates.
F (x, y, z) = (1,2,3,4,5,7) .
[May 2010]
2. Determine the prime-implicants of the Boolean function by using the
tabulation method.
F(w, x, y, z)=(1,4,6,7,8,9,10,11,15) .
[May 2010]
3. Simplify the following Boolean expression using Quine McCluskey method:
F=m(0,9,15,24,29,30)+d(8,11,31).
[Nov 2009]
4. i) Implement Boolean expression for EXOR gate using NAND and NOR gates.
ii) Prove that (AB+C+D)(C+D)(C+D+E)=ABC+D.
iii) Using 2s complement perform (42)10 (68)10
[Nov 2009]
5. Simplify the following Boolean function F together with dont care condition using
....Karnaugh map method.
a. F(A,B,C,D) = m(0, 6, 8, 13,14), d(A, B, C, D) = m(2, 4, 10)
b. F(A,B,C,D) = m(0, 2, 4, 5, 8, 14, 15), d(A, B, C, D) = m(7, 10,13)
c. F(A,B,C,D) = m(4, 6, 7, 8, 12, 15),
d. d(A, B, C, D) = m(2,3,5,10,11,14)
[May 2009]
6. Simplify the following Boolean expressions to a minimum number of literals.
(i)
ABC + ABC+AB
(ii) ABC + AC + B
(iii)
(A+B)(A+B)
(iv)BC(AD + AD) + AB
(v) (A + B+ AB)(AB + AC + BC)
[May 2009]
7. (i) Obtain the canonical POS for F(A,B,C,D) = (A+B)(B+C)(A+C)
(ii) Using k-map method obtain the minimal SOP and POS expressions for the
f unction F(x,y,z,w) = (1,3,4,5,6,7,9,12,13)
[Dec 2008]
8. (i) Apply Demorgan theorem for the function (a+b+c)d.
(ii) Find the complement of A+BC+AB.
[May 2008]
9. Using Tabulation method simplify the Boolean function
F(V,W,X.Y,Z)=S(0,1,8,11,12,15,20,21,22,24,29,31) which has the dont care
conditions d(9,18,30)
[May 2007]
10. (i).Simplify the Boolean function using map method:
F(w,x,y,z)= S(0,2,4,6,8,10,12,14)
(ii).Perform subtraction on the following numbers using the 9s complement of
subtrahend
(1)5763-3145
(2)59-9876
(3)5200-561
[May 2007]
11. Using Tabulation method simplify the Boolean function
F(w, x, y, z) = (1, 2, 3, 5, 9, 12, 14, 15) which has the dont care conditions
d(4, 8, 11).
[Dec 2007]
12. Reduce the Boolean function using K Map technique and implement using
gates F(w, x, y, z) = (0, 1, 4, 8, 9, 10) which has the dont care conditions
d(w, x, y, ,z) = (2, 11).
[Dec 2007]
13. What is the advantage of using Tabulation method? Determine the prime
implicants of the following function using Tabulation method.
F(w,x,y,z) = (1,4,6,7,8,9,10,11,15)
[Dec 2006]
14. Given the following Boolean function
F = AC + AB + ABC + BC
Express it in sum of minterms and find the minimal SOP expression [May 2006]
15. Find a minimum sum of products expression for the following function using
Quine-McClusky method.
F (A,B,C,D,E) = (0,2,3,5,7,9,11,13,14,16,18,24,26,28,30)
[Dec 2005]
16. (i) Determine the minimum sum of products and minimum product of sums for
f = bcd+bcd+acd+abbcd
(ii) Find the minterm expansion of f(a,b,c,d) = a(b+d)+acd
[May 2005]
17. (i) Find a network of AND and OR gates to realize f(a,b,c,d) =
m (1,5,6,10,13,14)
(ii) Design a network to convert 8-4-2-1 BCD code to excess 3 code. [May 2005]
18.Simplify the following Boolean function by using Tabulation method
F=(0,1,2,8,10,11,14,15)
[Dec 2004]
19. State and Prove the postulates of Boolean Algebra.
[May 2004]
20. (i) State and prove DeMorgans Theorem.
(ii) Determine the SOP form of F(abcd)= (0,2,4,6,8) + d(10,11,12,13,14,15)
[Dec 2003]
Distinguish between the combinational and sequential logic circuits. [May 2010]
What do you mean by HDL?
.
[May 2010/ May 2003]
Draw the logic diagram for half adder.
[Nov 2009]
Define Combinational circuit.
[May 2009/ May 2004]
What is the need for code conversion? Give two commonly used codes.[May 2009]
Give the truth table of Full adder.
[Dec 2008/ May 2004]
List the important features of HDL.
[Dec 2008]
What are functions of encoders and decoders?
[May 2008]
What is Multiplexer?
[May 2008]
What is logic synthesis in HDL?
[Dec 2007]
What is a priority encoder?
[Dec 2007]
What are the modeling techniques available to build HDL module? [May2007]
What is a demultiplexer?
[Dec 2006]
What is a full adder?
[May2007/ 2006]
Write down the truth table of a half subtractor
[Nov 2005/ 2004]
Draw the half adder circuit.
[Nov 2005]
Explain the design procedure for combinational circuits
[May 2004]
What is overflow?
[May 2004]
Write down the truth table of a. full subtractor.
[Nov 2003]
Draw 4 bit binary parallel adder
[Nov 2003]
What is meant by VHDL and what is its advantage
[Nov 2003]
Define magnitude comparator?
[Nov 2003]
What are the two steps in Gray to binary conversion?
[May 2003]
What is HDL?
[May 2003]
PART B
1. Design a combinational logic diagram for BCD to Excess-3 code converter.
[May 2010]
[Nov 2009]
[May 2009]
[May 2009]
[Dec 2008]
[Dec 2008]
9. Construct a combinational circuit to convert given binary coded decimal number into
an Excess 3 code. For example when the input to the gate is 0110 then the circuit
should generate output as 1001.
[May 2008]
10. Construct a full adder circuit and write a HDL program module for the same.
[May 2008/ May 2007]
11. Construct a BCD adder circuit and write a HDL program module for the same.
[May 2008]
What is Multiplexer?
[May 2010]
Define Encoder.
[May 2010]
What is the difference between decoder and demultiplexer?
[Nov 2009]
What is programmable logic array? How does it differ from ROM? [Nov 2009]
What is Decoder? Draw the block diagram and truth table for 2 to 4 decoder.
[May 2009]
[May 2009/ May 2007/ May 2003]
[May 2007]
PART B
1. (i) Design a 3 to 8-line decoder with necessary diagram.
(ii) Implement the given Boolean function using 4 1 multiplexer.
F(x, y, z) =(1, 2, 6, 7) .
[May 2010]
2. We have found a minimum sum of products expression for each of two
function, F and G, minimizing them individually (no sharing)
F = WY + XYZ
G = WXY + XY +WYZ .
(i) Implement them with a ROM.
(ii) Implement them in the PLA using no more than four terms. .
[May 2010]
3.Explain with necessary diagram a BCD to 7 segment display decoder. [Nov 2009]
21. Distinguish between combinational logic circuits and sequential logic circuits?
[Apr 2005]
PART B
1. Design a synchronous sequential circuit using JK flip-flop to generate the following
sequence and repeat. 0, 1, 2, 4, 5, 6
[May 2010]
2. What is the aim of state reduction? Reduce the given state diagram and prove that the
both state diagrams are equal.
[May 2010]
19. Design a modulus 5 counter using JK flip flop and implement it. Construct its
Timing diagram
[Nov 2005]
20. What is race around condition? How is it avoided?
[Nov 2005]
21. Draw the schematic diagram of Master slave JK FF and input and output
waveforms. Discuss how does it prevent race around condition. [Nov 2005/May 2005/
Nov 2006]
[Nov 2005]
12.
13.
14.
15.
PART B
1. With suitable example and diagram explain the hazards in combinational and
sequential logic circuits.
[May 2010]
2. With necessary example and diagram explain the concept of reduction of state and
flow tables.
[May 2010]
3. (i)Design a comparator.
(ii)Design a non sequential ripple counter which will go through the states
3,4,5,7,8,9,10,3,4..draw bush diagram also [Nov2009]
11
5. Design an asynchronous sequential circuit wih inpus x1 and x2 and one output z.
Initially both the inputs are equal to 0. When x1 and x2 becomes 1, z becomes 1.
When second input also becomes 1, z = 0; The output stays at 0 until circuit goes
back to initial state.
[May 2009]
6. Discuss in detail the static hazards.
[May 2009]
7. a) Develop the state diagram and primitive flow table for a logic system that has 2
inputs, x and y and an output z. And reduce primitive flow table. The behavior
of the circuit is stated as follows. Initially x = y = 0. Whenever x = 1 and y = 0
then z = 1, whenever x = 0 and y = 1 then z = 0. When x = y = 0 or x = y = 1 no change
in z it remains in the previous state. The logic system has edge-triggered inputs without
having a clock. The logic system changes state on the rising edges
of the 2 inputs. Static input values are not to have any effect in changing the z
output.
[Dec 2008]
8. (i) What is the objective of state assignment in asynchronous circuit? Give
hazard free realization for the following Boolean functions
f(A, B, C, D) = M(0, 2, 6, 7, 8, 10, 12) (8)
(ii) Summarize the design procedure for asynchronous sequential circuit. (8)
[Dec 2008]
11.An asynchronous network has two inputs and one output. The input sequence
X1X2 =00, 01,11causes the output to become 1.The next input change then
causes the output to return to 0. No other input sequence will produce a 1
output. Construct the state diagram using primitive flow table.
[Dec 2007]
12. i)Give hazard-free realization for the following Boolean function
F(A,B,C,D)=m(1,3,6,7,13,15)
ii) Summarize the design procedure for asynchronous sequential circuit. [May 2007]