IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 59, NO.

5, MAY 2012

1263

Virtual-Source-Based Self-Consistent Current

and Charge FET Models: From Ballistic to
Drift-Diffusion Velocity-Saturation Operation
Lan Wei, Member, IEEE, Omar Mysore, Student Member, IEEE, and Dimitri Antoniadis, Fellow, IEEE

AbstractA simple analytical FET channel charge partitioning

model valid under ballistic and quasi-ballistic transport conditions is developed. With this model, the virtual-source (VS) based
charge-based transport compact model is extended to include
self-consistent analytical channel charge partitioning models for
quasi- and fully-ballistic conditions, with continuous current and
charges and their derivatives. Driftdiffusion with or without
velocity-saturation transport conditions are also comprehended
with adaptations of existing-literature models, and the resulting
terminal charges and capacitances are compared with those assuming ballistic operation. With only a limited number of physically meaningful parameters, the extended VS compact model
forms an ideal platform for the exploration of the dynamic behavior of current and future FET devices. The simple model
is validated here by comparison with experimental data from a
well-characterized industry 45-nm metal/high-k complementary
metaloxidesemiconductor including parasitic elements using a
Verilog-A implementation to simulate ring oscillators. It is also
validated by comparison with S-parameter-derived capacitances
of near-ballistic IIIV high-electron mobility transistors. In both
cases, the effects of different assumed transport conditions on the
dynamic device behavior are explored.
Index TermsBallistic transport, charge model, compact
model, MOSFET, virtual-source model.

I. I NTRODUCTION

ALCULATIONS of speculative device IV characteristics from physically meaningful parameters, e.g., injection velocity, source/drain resistance, etc., in ballistic FETs
is typically the domain of sophisticated technology computeraided design simulations [1][6], but computationally efficient
compact models are essential to facilitate fast circuit simulation of large-scale circuits. The widely adopted thresholdvoltage-based compact models (such as BSIM [7] and PTM
[8]) and surface-potential-based compact models (such as PSP
[9]) usually calculate the device characteristics using around
a hundred to several hundreds of parameters related to fabri-

Manuscript received November 1, 2011; revised December 29, 2011;

accepted January 26, 2012. Date of publication March 2, 2012; date of
current version April 25, 2012. The work is supported by the Focus Center
Research ProgramCenter for Materials, Structures and Devices (MSD) center.
The review of this paper was arranged by Editor H. Shang.
The authors are with the Microsystems Technology Laboratories,
Massachusetts Institute of Technology, Cambridge, MA 02139 USA (e-mail:
lanwei@mit.edu; omysore@mit.edu; daa@mit.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TED.2012.2186968

cation process specifications and device geometric design, as

required for industrial-strength circuit simulation. On the other
hand, the recently developed concept of the virtual-source (VS)
charge/velocity has proven a reliable basis for a source/drainsymmetrical compact static IV model that preserves the
physical aspects with a small number of device parameters,
which can be mostly obtained through straightforward device
characterization [10], [11]. The previously published VS IV
model serves well for the purposes of technology benchmarking
and performance projection based on static device characteristics [12], [13]. However, for dynamic operation, the channel
charge behavior must be accounted for. The time-dependent
variation in the channel charge is supplied by displacement
currents through the device terminals [14] that, obviously, cannot be predicted by the static transport theory. Thus, models of
terminal-associated charges/capacitances are necessary to allow
the model to perform dynamic circuit simulation. This paper
extends the VS model to provide intrinsic-charge (capacitances)
descriptions that, for the first time, extend all the way to
the ballistic regime, where it can be shown that the gradual
channel approximation (GCA) is often violated. Rather than
calculating all of the interterminal capacitances separately from
the transport models as in several other compact models [7],
the intrinsic charges associated with each terminal are selfconsistently determined with the current model. The resulting
equations are remarkably simple, whereas the current, charges,
and their derivatives are continuous. The extended VS model
maintains the advantage of using only a limited number of
input parameters, most of which have straightforward physical
meanings and can be directly measured from device characterization. Implemented in Verilog-A language [15], the extended
VS model enables fast dynamic circuit simulation. In Section II,
the key aspects of the VS model are reviewed. In Section III,
the channel charge models associated with source and drain
terminals are derived for ballistic devices; for simplicity, the
charge associated with the body terminal needed for bulkSi MOSFETs is not discussed in this paper but is simply
implemented in the model. Consistency between the VS transport model and the derived charge model is guaranteed. In
Section IV, the new model is validated by comparison with
experimental data from a well-characterized industrial 45-nm
metal/high-k complementary MOS [16], in ring-oscillator
(RO) simulations (in Verilog-A implementation). In Section V,
the model is validated by comparison with S-parameter-derived
capacitances of near-ballistic IIIV HEMTs [17].

0018-9383/$31.00 2012 IEEE

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Note that, throughout this paper, by VS model, we refer

to (1) with vx0 independent of bias. Of course, this equation
is valid in general, e.g., under the drift/diffusion assumption,
where Fsat would be set equal to 1, and vx0 then becomes
bias dependent up to Vd = Vdsat , the saturation voltage, and the
constant for Vd > Vdsat .
III. DYNAMIC VS M ODEL W ITH C HANNEL
C HARGE PARTITIONING

Fig. 1. Schematic of a short-channel n-MOSFET with corresponding energy

diagram. The dashed and dashed-dotted lines illustrate the linear and parabolic
potential profile approximations of V (x), which are discussed later. The solid
line represents the real potential profile.

In order to account for dynamical behavior, the model terminal charges must produce the full matrix of capacitive components and their voltage dependences. The approach developed
in [20] directly determines the intrinsic charges associated with
the source and drain terminals following (3). Lg is the channel
length. Qi (x) is the channel charge areal density along the
channel at position x. Equation (3) is universally true as long
as the device operates under quasi-static conditions (cf. [14,
App. L]), regardless of drift/diffusion or ballistic transport.
Hence, the key step to partition the intrinsic channel charge
to the source (QS ) and drain (QD ) terminal components is to
determine Qi as a function of x

L

g 

1 Lxg Qi dx
QS =
0
(3)
L

g x

Q
=

Q
dx.
D
i
Lg
0

Fig. 2. Fsat versus Vds /Vdsat with different .

II. R EVIEW OF VS T RANSPORT M ODEL

When devices are scaled down to the deep submicrometer
regime, the carriers experience fewer scattering events traveling
along the channel, as compared with long-channel devices.
For sufficiently short channels and depending on the channel
materials system devices then operate in the quasi-ballistic
(QB) transport regime [18], [19]. The VS model is a recently
developed simple, semiempirical, highly accurate, and shortchannel FET IV model [10], [11], which is valid for both QB
and fully ballistic transports. The virtual source is at or near the
maximum of the energy barrier for carriers in the channel. In
saturation, the width-normalized current Id is calculated as the
product of the charge areal density at the virtual source Qixo and
the channel-injected carrier velocity at the virtual source [the
VS velocity vxo ; see (1)]. Fig. 1 illustrates this for an n-channel
FET. Vgs and Vds are the gate/source and drain/source voltages,
respectively, and Ec is the conduction-band-edge energy. To
account for nonsaturation, the product of charge density and
carrier velocity is multiplied by an empirical saturation function
Fsat , which provides continuity across all regions of operation
[10], [9], as shown in the following expression [see (2) and
Fig. 2]. It has been found that excellent fit to experimental IV
characteristics of all types of FETs that have been examined so
far is achieved with a typical value of of about 1.8 [10], i.e.,
Id = Fsat Qixo vx0
Vds /Vdsat
Fsat =
.
1/
(1 + (Vds /Vdsat ) )

(1)
(2)

Following [14] and [21], the charge partitioning models for

drift/diffusion transport with assumed cases of nonsaturated
(NVsat) and saturated (Vsat) drift velocity are derived in
Appendix A, in order to aid the forthcoming discussion and to
correct minor derivation errors in [14, eqs. (7.78) and (7.79)].
We note that, at this point, to calculate Qi as a function of x, the
GCA is explicitly assumed in [14] and [21] for both the NVsat
and Vsat cases [see (A1)].
It is well known that, in ballistic transport devices, the
drift/diffusion theory fails to describe the current as in either
(A2a) or (A2b). Moreover, we note that QB-condition GCA
is not generally valid for relating channel charge density with
the channel potential at all positions x through (A1) (see
Appendix B). The more fundamental condition for calculating
Qi (x) is current continuity and is adopted in the QB model.
From previous simulation studies of the FET operation in
saturation, potential V (x) under ballistic conditions can be
empirically approximated as either linear [see (4a)] [22] or
parabolic [see (4b)] [23] function of x, i.e.,
x
Vds
(4a)
V (x) =
Lg

V (x) =

x
Lg

2
Vds .

(4b)

As shown later in this paper, the derived intrinsic terminal

charges do not have a strong dependence on the assumed shape
of the potential profile. Therefore, instead of a complicated
description of the potential profile, either the linear or parabolic approximation serves well in deriving analytical charge

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1265

models with reasonable accuracy. Now assuming operation in

saturation under ballistic conditions, using the linear potential
profile [see (4a)] assumption and combining it with carrier
energy conservation (5) and current continuity (6) [this is (1)
of the VS model with Fsat = 1] yield x-integrable Qi shown
in (7a). Similarly, starting from (4b) yields (7b) for parabolic
potential profile. One new parameter is introduced, i.e., the
carrier effective transport mass m . q is the electron charge, i.e.,

2 + 2qV (x)
(5)
vx = vx0
m
Id = Qix0 vx0 = Qi (x) vx (x)
Qi (x) = 
Qi (x) = 

Qix0
1+k

x
Lg

Qix0
 2
1 + k Lxg

(6)
(7a)

(7b)
Fig. 3. IV characteristics of Intel 45-nm HP devices (The experimental data
date back to year 2006, prior to the publication of [16]) VS model versus
experimental measurement for (a) NMOS and (b) PMOS. These are test devices
replicating devices in RO circuits provided by Intel.

where
k=

2qVds
2 .
m vx0

(7c)

Substituting (7a) or (7b) in (3) and carrying out the integration, (8a) and (8b) are derived for QSQB and QDQB , which
are the channel charges associated with source and drain in the
ballistic transport, respectively. Under QB transport conditions,
on the average, carriers lose part of their kinetic energy due to
scattering. This can be roughly approximated by increasing the
carrier effective mass m . Since Qix0 appears in both the current [see (1)] and the aforementioned intrinsic charge equations,
the internal consistency of IV and QV (and therefore CV )
characteristics is guaranteed, i.e.,



QSQB = Lg Qix0 (4k+4) k+1(6k+4)

3k2



(8a)
QDQB = Lg Qix0 (2k4) 2k+1+4
3k



1
QSQB = Lg Qix0 sinh ( k) k+11
k
k 
(8b)
QDQB = Lg Qix0 k+11 .
k
In the nonsaturation region of operation, Vds is generally
small, and the potential profile is wider and flatter than in
saturation conditions. Under such conditions, carrier transport
approaches drift/diffusion conditions dominated by mobility, as
opposed to velocity for operation in saturation. It is important to
note here that, even for purely ballistic conditions, an effective
mobility can be still defined (often termed as ballistic mobility
[24][26]) Therefore, at very low Vds , devices are assumed
to operate under the drift/diffusion mode, regardless of which
mode (NVsat, Vsat, or QB) is used to describe operation at
high Vds . In (9), function Fsat that is used to link the linear to
saturation regions is also used to extend the QB charge model
to the nonsaturation region, so that the model converges to the
NVsat case [see (A4a)] at low Vds , i.e.,

QS = (1 Fsat ) QSNvsat + Fsat QSQB
(9)
QD = (1 Fsat ) QDNvat + Fsat QDQB .

The dynamic VS model with three (selectable) charge distribution models downstream of the virtual source (NVsat, Vsat,
and QB) has been implemented in Verilog-A language with
additional empirical models for channel charges arising from
inner-fringing capacitances and drain-induced barrier lowering
(DIBL). The bias-dependent inner-fringing capacitances are
modeled with empirical functions that take into account the
screening effect from the channel. In the NVsat and Vsat cases,
the function of Qi on x is explicitly included through the IV
models as in (A2a) and (A2b). The Vsat theory and the corresponding IV models in (A3b) assume an upper limit of the
carrier velocity, whereas the VS model allows the acceleration
of the carrier velocity along the channel. Mathematically, the
VS model is capable of describing the drift/diffusion transport,
as long as Qix and vx have the appropriate form versus bias
for at least one point along the channel. Of course, this point is
not necessarily the virtual source. In the extreme case where
the critical field for velocity saturation (Ecrit ) is very small, the
VS transport model and the Vsat transport model converge with
vix0 = vsat . The drift/diffusion charge models [see (A4a) and
(A4b)] as derived in the Appendix A are self-consistent with
the IV model in (A3a) and (A3b). In the VS model, the virtual
source point is assumed to be at x = 0. Under this assumption,
(A1) becomes Qixo = Cox Vgt at x = 0. Equations (A4a) and
(A4b) are then proportionally scaled according to Qixo to
guarantee the self-consistency between the current and charge
models. In the Vsat model throughout this paper, we assume
vsat = vix0 to calculate the critical electric field Ecrit in (A2b)
and (A3b).

IV. S IMULATION OF D IGITAL C IRCUITS

The VS model was fitted to 45-nm high-performance (HP)
devices (Fig. 3). These are test devices replicating devices

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TABLE I
K EY PARAMETERS FOR T RANSPORT AND C HARGE M ODELS
F ITTED TO I NTEL S 45 nm HP D EVICES

in RO circuits were provided by Intel [16].1 Table I lists

the key fitting parameters of the VS model and the parasitic
capacitances obtained by fitting measured gate and junction
capacitances. Note that the electron effective mass, relative to
me , i.e., the free electron mass, is fitted to the results from
the Non-equilibrium Greens function simulation for strainedSi electrons [22], [27], [28]. The peak carrier velocity at the
drain end calculated from the VS QB model ( 8 107 cm/s)
is close to that from NEGF simulations of similar devices [22].
The strained-Si hole effective mass is somewhat underestimated
by assuming the same value as for electrons.
Fig. 4 shows the channel charges associated with the gate
terminal without Fig. 4(a) and with Fig. 4(b) extrinsic capacitances, calculated from the Vsat, and the QB charge models.
As expected, the results of the two models converge at Vds = 0,
where devices always operate under low-field drift/diffusion
(NVsat) conditions without carrier velocity reaching saturation
velocity as previously discussed. At Vgs = Vds = 1 V, the QB
model predicts 58% lower intrinsic gate charge in Fig. 4(a) and
39% lower total gate charge in Fig. 4(b) compared with the
Vsat model. Under ballistic conditions, carriers accelerate to
higher velocities than under velocity-saturationdrift/diffusion
conditions, and hence, ballistic devices are expected to have
lower total intrinsic channel charge and capacitances. We observe that, compared with the difference between QB and Vsat
models, the intrinsic channel charge is not very sensitive to
either the carrier effective mass [see Fig. 5(a)] or to the potential
profile assumptions [see Fig. 5(b)]. With the parameters listed
in Table I, k in (7c) is on the order of magnitude of 100 with
Vds around 1 V. Thus, as shown in (7a) and (7b), Qi rapidly
decreases from Qix0 as carriers move away from the source.
The carrier density near the source dominates the total channel
1 Courtesy of R. Rios and K. Kuhn, Intel. Experimental data date back to
the year 2006. Early development transistor characteristics that were further
optimized for the final production version of Intel 45-nm transistors described
in [16].

Fig. 4. NFET gate charge (a) without and (b) with fringing capacitances
calculated by the Vsat and QB models to be self-consistent with the transport
characteristics shown in Fig. 3. Lower gate charges of 58% and 39% are
calculated by the QB than by the Vsat model at Vgs = Vds = 1 V without
and with fringing capacitances, respectively.

carrier density and the charges associated with each terminal.

The carrier density at the virtual source is mainly determined
by the effective oxide thickness and Vgs , and is insensitive to
m or to the shape of the potential profile along the channel.
Fig. 6 shows the modeled gate capacitances with key parameters in Table I. Good agreement is achieved between the
calculations and the endpoint experimental measurements that
were available (full CV measurement data are not available),
indicating that the device extrinsic capacitances are correctly
accounted for. Note that a voltage-dependent inner-fringing capacitance is necessary in order to produce this agreement. Since
Vds = 0, all three models converge and give the same result. As
shown in Fig. 4, the main difference between charges resulting
from the QB and Vsat models happens when the device is near
to or in saturation with high Vgs and Vds bias and the difference
diminishes in the linear region. This significantly diminishes
the channel charge reduction benefits of the ballistic transport
in real circuits. Fig. 7 shows measured and simulated delays
in RO circuits, where the devices were calibrated to match
both the device IV and CV characteristics as in Figs. 3 and
6, respectively. The RO simulation results with either charge
model match very well the experimental delays for different
fan-outs. The RO stage delays predicted by the QB model
are less than 3% lower than those by the Vsat model and the
difference decreases with increasing fan-out. This demonstrates

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1267

Fig. 7. RO delays versus fan-out. The insets show the circuit topology and
stage delay data in picoseconds. The delay calculated by the VS model with
layout-extracted interconnect capacitance added for each fanout case agree very
well with the measurement. Compared with Vsat, the QB model predicts less
than 3% lower delay at FO = 1, and the difference decreases as FO increases.
This is because, during a switching event, devices spend little time in the
saturation region where the charge model choice makes significant difference
and also because the contribution of extrinsic capacitances is significant even
in these simple circuits.
TABLE II
K EY PARAMETERS FOR T RANSPORT AND C HARGE M ODELS
F ITTED TO THE E XPERIMENTAL HEMT D EVICES

Fig. 5. Sensitivity of NFET gate charge, reflecting intrinsic channel charge

only, calculated by the QB model on (a) carrier effective mass and (b) channel
potential profile. Compared with the difference between QB and Vsat model
predictions, differences resulting from the specific V (x) profile assumption are
insignificant.

V. I MPACT OF BALLISTIC T RANSPORT

ON RF C IRCUIT PARAMETERS

Fig. 6. Gate capacitance versus |Vgs | at Vds = 0 V. QB and Vsat models are
identical at this value of Vds The capacitances calculated by the VS model with
the fitted Cif and Cof (see Table I) match well with the measured points for
both NMOS and PMOS. All three models converge to the NVsat case when
Vds = 0 V. The measured points correspond to devices replicating those in the
RO circuits.

that the significant channel charge reduction due to QB operation in saturation results in very small delay benefit because
devices during switching pass in addition subthreshold and
linear regions, where differences between charges are minimal,
and also because extrinsic capacitances that participate in the
switching event are quite significant relative to intrinsic ones.

Compared with digital Si devices, the intrinsic capacitances

can have more significant impact on device RF performance.
In short-channel HEMT devices, carriers move through the
channel in a near-ballistic mode [29]. The VS transport model
has been fitted to InGaAs HEMTs [17] with 30- and 130-nm
gate length [30], [31]. The key parameters are listed in Table II.
The IV characteristics in the 130-nm case are shown in
Fig. 8 as an example. Since the 30-nm device is expected to
be ballistic, the effective mass calculated from band structure
information [31] is used. On the other hand, the 130-nm device
operates in the QB regime; thus, the value of m is expected
to be increased to account for scattering. As shown in Fig. 9,
gate capacitances calculated from the self-consistent QB model,
with m = 0.2me , match experimental S-parameter-extracted
results at the 130-nm channel length within measurement uncertainty. The calculated results are also shown for the 30-nm
channel length. As expected, the calculated Cgs decreases with
decreasing mass, but the effect is not dramatic; the effect of
mass choice is even less dramatic for Cgd . In any case, it is
noteworthy that the QB model predicts the correct scaling trend
for Cgd , whereas the Vsat model predicts an opposite trend.

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independent outer-fringing capacitance; it is shown by the

dashed line in Fig. 9(b). The total Cgd calculated from the QB
model is larger than its parasitic component, which means that
the intrinsic Cgd is positive. Because Cgd = (Qg /Vds ),
a positive intrinsic Cgd component indicates that the intrinsic
channel charge decreases as Vds increases. In the QB case,
an (positive) increment in Vds impacts the channel charges in
two competing ways. On one hand, the barrier seen by the
electrons is lowered due to DIBL, which tends to increase the
channel electron density at the virtual source (increase Qg ). On
the other hand, assuming no DIBL, the downstream electron
velocity is increased, which decreases the downstream electron
density (decreases Qg ). The latter effect is the more prominent
one; hence, the intrinsic Cgd component is net positive, i.e., it
is added to the parasitic component, and it increases with the
channel length. In the Vsat case under GCA, Vds does not affect
the channel charge other than via DIBL, for a device operating
in the saturation regime. Thus, only DIBL plays a role in this
case, which results in a negative intrinsic Cgd added to the
parasitic component, and it decreases (becomes more negative)
with the channel length.
VI. C ONCLUSION

Fig. 8. (a) IV characteristics of InGaAs HEMT. VS model versus experimental measurement at Lg = 130 nm. (b) Schematic of the device structure.

Fig. 9. S-parameter extracted (a) gate-to-source capacitances Cgs and

(b) gate-to-drain capacitances Cgd corresponding to the inset in Fig. 8. Vgs =
0.3 V, and Vds = 0.5 V. The capacitances predicted by the QB model match
the experimental extraction within the measurement errors. Cgd calculated
assuming velocity-saturation drift/diffusion transport predicts opposite gatescaling trend to measurements (see text for discussion). vxo = 3 107 and
3.2 107 cm/s for 130- and 30-nm HEMTs, respectively [30]. For the QB
model parabolic, V (x) is assumed with m = 0.2me for the 130-nm HEMT
and 0.05me /0.03me /0.01me for the 30-nm HEMT.

By developing an analytical channel charge distribution approach, we have implemented the FET VS compact model with
self-consistent transport and charge models covering ballistic
and drift/diffusion transport conditions. With few physical parameters, the model can enable fast circuit simulation with
speculative FET devices using physically based parameters.
The model has been validated by comparing calculations with
experimental results for both digital and RF devices. Ballistic
transport may reduce intrinsic channel charge by about 60%
compared with velocity-saturation drift/diffusion transport in
the 45-nm Si MOSFETs operating in saturation; however, this
results to minimal benefit in the switching delay due to the
dominance of extrinsic charges (capacitances), and therefore,
its effect cannot be reasonably resolved by comparing dynamic
circuit measurements with simulations. However, the QB model
is required to match the measured of Cgs and Cgd for HEMT
devices, where the Vsat model predicts the incorrect scaling
trend for Cgd .
A PPENDIX A
C HARGE PARTITIONING M ODELS FOR
D RIFT /D IFFUSION T RANSPORT
When the GCA is valid, Qi can be calculated as a function
of V as in
Vgt = Vgs Vth
Qi (x) = Cox (Vgt V (x)) .

Understanding the different model-calculated Cgd scaling

trends is instructive. Note first that a parasitic capacitance of
0.112 fF/m, independent of the channel length, extracted experimentally at Vds = 0.5 V [30] is included into the calculation
of Cgd as a lumped component corresponding to the voltage-

(A1)

In the linear region, the width-normalized drain current Id

assuming strong inversion is described in the indefinite form
following (A2a) or (A2b) and the definite form in (A3a) or
(A3b) for nonsaturated drift velocity (NVsat) or for saturated

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1269

drift velocity (Vsat) models, respectively. Cox is the gate dielectric capacitance per unit area. Vth is the threshold voltage,
s is the low-field mobility, and vsat is the saturation velocity.
Ecrit is the critical electric field when velocity saturates and is
related to s and vsat by Ecrit = vsat /s . is to account for
the body effect [19], [20], i.e.,
Id = Qi (x) s dV /dx
s dV /dx
Id = Qi (x)
/dx
1 + dV
Ecrit
s Cox
Id =
(Vgt 0. 5Vdsat )Vds
Lg
C
 s ox  (Vgt 0. 5Vdsat )Vds .
Id =
s Vds
Lg 1 + Lv
sat

(A2a)
(A2b)
(A3a)
(A3b)

By substituting (A3a) or (A3b) into (A2a) or (A2b), (3)

are transformed into integrations with V . Carrying out the
integration, the channel charge associated with source and drain
terminals for NVsat and Vsat drift/diffusion models in the
linear region are expressed by (A5a) and (A5b), respectively.
When Ecrit L  Vds , (A5b) converges into (A5a). QSNVsat
and QDNVsat are the channel charges associated with source
and drain in NVsat, respectively, whereas QSVsat and QDVsat
are the channel charges associated with source and drain in
Vsat, respectively. By replacing Vds with Vds Fsat in (A5a)
and (A5b), the models are extended into the saturation region,
whereas the resulting capacitances are continuous with all
voltages. Reference [14, eqs. (7.75)(7.79)] derived the charge
partitioning models for velocity-saturation devices following
the same procedure. However, the steps of substituting (7.77)
and (7.78) into (7.49) and integrating (7.49) to obtain (7.78) and
(7.79) were conducted with mathematical errors. The correct
derivation should give (A5b) and (A4b), respectively, i.e.,

2
2 Vds
A = 12(Vgt 0.5V
ds )
(A4a)
5V 2Vds
B = 10(Vgtgt0.5V
)
ds



A = A 1 + Vds
Ecrit L


(A4b)
2
Vds
B = B 1 +
Ecrit
L(10V
4V
)
gt
ds



QDNvsat = Cox  12 Vgt 13 Vds + AB
 (A5a)
1
1
B)

 QSNvsat = Cox 12 Vgt 16 Vds + A(1
QDVsat = Cox  2 Vgt 3 Vds + A B 
 (A5b)
QSVsat = Cox 12 Vgt 16 Vds + A (1 B  ) .
A PPENDIX B
FAILURE OF GCA IN BALLISTIC T RANSPORT
The GCA assumes that the vertical (transverse) electric field
is much higher than the longitudinal field everywhere in a
MOSFET channel. Thus, the channel charge density at any
position x in the channel of an n-type device is determined by
(B1). V is a continuous function with x, i.e.,
Qi (x) = Cox (Vgs Vth V (x)) .

(B1)

The carrier velocity at position x can be derived with energy

conservation through (B.). Coefficient b (0 b 1) quantifies
the portion of the potential energy converted to the kinetic

Fig. 10. Dependence of (blue solid lines) V1 and (red dashed lines) V2 on b
at different Vgt . V2 crosses zero, whereas V1 never crosses zero.

energy (i.e., not lost due to scattering) from source to position

x and would generally be a function of x. Apparently, b is a
function of x, i.e.,

2 + b(x) 2q V (x).
vx (x) = vx0
(B2)
m
Assume the virtual source is close enough to the source that
the potential at the virtual source is zero referring to source.
Then, current continuity leads to (B3). Substituting (B1) and
(B2) into (B3), we have (B4), i.e.,
Qi (x) =

Cox (Vgs Vth ) vx0

Qix vx0
=
vx (x)
vx (x)

(B3)

Cox (Vgs Vth ) vx0

Cox (Vgs Vth V (x)) = 
.
2q
V
(x)
1 + b(x) m

(B4)

2
With k0 = 2q/m vx0
and Vgt = Vgs Vth , (B4) is simplified into (B5), which has three real solutions, i.e., V0 , V1 , and
V2 as in (B6). As b is a function of x, V1 and V2 are functions
of x, i.e.,



1
2Vgt
2
2
V (x) V (x) 2Vgt
+ Vgt
=0
b(x) k0
b(x) k0

V0 = 0

V1 (x) =

V (x) =
2

(B5)
1
2
1
2




2Vgt

1
b(x)k0

2Vgt

1
b(x)k0




4Vgt
b(x)k0
4Vgt
b(x)k0

1
b2 (x)k02

1
b2 (x)k02


 (B6)
.

Fig. 10 shows the dependence of V1 and V2 on b, with k0 =

100 and Vgt = 0.1 V, 0.3 V, and 0.5 V. In any physical n-type
MOSFET operating in the linear region, the potential profile
V (x) monotonically increases from zero at the source to Vds
at the drain. The physical solution has to cover the range from
0+ V to Vds continuously. As a result, V2 , which crosses 0, is
the physical solution, whereas V1 is not. In order for V2 to cover
the entire range from 0+ V to Vds , b has to be a function of
x, which monotonically increases with x. In the fully ballistic
transport, b is always 1. Thus, it is impossible to have a physical
solution of the potential profile from source to drain under the
assumption of GCA. In other words, GCA never holds in the
fully ballistic transport.

1270

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 59, NO. 5, MAY 2012

Fig. 11. V2 max versus k0 with various Vgt .

In QB transport, it is not unreasonable to expect that b varies

with x. V2 is at its upper boundary of V2 max [see (B7)] when
b = 1, i.e., the transport is fully ballistic as follows:

1
1 4Vgt
1
V2 max = Vgt

2.
(B7)
k0
2
k0
k0
When GCA holds throughout the channel, there must be a
physical solution at the drain, which means that Vds < V2 max .
Thus, Vds V2 max is a sufficient condition that GCA fails in
QB transport.
Fig. 11 sketches V2 max as a function of k0 at different Vgt .
GCA is easily violated when Vgt is small or/and k0 is small.
When V2 max is negative, GCA is invalid even under very small
positive Vds .
ACKNOWLEDGMENT
The authors would like to thank Dr. K. Kuhn and
Dr. R. Rios (Intel), Prof. J. del Alamo, Dr. D.-H. Kim
(Massachusetts Institute of Technology), and Prof. Y. Cao
(Arizona State University) for useful discussions and experimental data.
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WEI et al.: VIRTUAL-SOURCE-BASED-SELF-CONSISTENT CURRENT AND CHARGE FET MODELS

Lan Wei (M11) received the B.S. degree in microelectronics and economics from Peking University,
Beijing, China, in 2005 and M.S. and Ph.D. degrees
in electrical engineering from Stanford University,
Stanford, in 2007 and 2010, respectively.
She was a Research Intern with Intel in 2006,
IBM Research in 2007, and STMicroelectronics and
Grenoble Institute of Technology in 2008. She is currently a Postdoctoral Associate with Microsystems
Technology Laboratories, Massachusetts Institute of
Technology, Cambridge. She has authored or coauthored more than 30 technical papers. She has been serving on the Technical
Program Committee of the IEEE International Electron Devices Meeting since
2011 and has been a reviewer for several IEEE journals. She has contributed
to the Process Integration, Devices, and Structures Chapter of the International
Technology Roadmap for Semiconductors 2009 Edition. Her research focuses
on technology scaling and projection from circuit- and chip-level perspectives,
device/circuit interactive design, and integrated biosystem.

Omar Mysore (S10) received the B.S. degree in

electrical engineering in 2011 from Massachusetts
Institute of Technology, Cambridge, where he is
currently working toward the M.E. degree.
His research interests include numerical simulation and compact modeling.

1271

Dimitri Antoniadis (M79SM83F90) was born

in Athens, Greece. He received the B.S. degree in
physics from the National University of Athens,
Athens, in 1970 and the M.S. and Ph.D. degrees
in electrical engineering from Stanford University,
Stanford, CA, in 1972 and 1976, respectively.
He joined the faculty of Massachusetts Institute
of Technology, Cambridge, in 1978 and is currently
Ray and Maria Stata Professor of Electrical Engineering. He is also the Director of the National
Multi-University Focus Research Center for Materials Structures and Devices. He has made seminal contributions in the areas
of solid-state processes and electronic devices, quantum-effect devices, and
CMOS device engineering. His current research is on nanoscale electronic
devices in Si, Ge, and IIIV materials.
Prof. Antoniadis is a member of the National Academy of Engineering. He
is also a recipient of several professional awards.