Professional Documents
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Operational
Amplifiers
Keith A. Hudson
M1306117
11/03/2014
Keith A. Hudson
M1306117
Contents
1
Assumptions ............................................................................................................................................... 6
2.1
Requirements ...................................................................................................................................... 7
2.2
2.3
Requirements .................................................................................................................................... 17
3.2
3.3
Requirements .................................................................................................................................... 23
4.2
4.3
Conclusions ............................................................................................................................................... 36
Bibliography .............................................................................................................................................. 37
Keith A. Hudson
M1306117
Figures
Figure 1: Adder / Subtractor circuit ................................................................................................................... 8
Figure 2: Testing i/p A ........................................................................................................................................ 9
Figure 3: Testing i/p B ...................................................................................................................................... 10
Figure 4: Testing i/p C ...................................................................................................................................... 11
Figure 5: A = 5 V, B = 4 V, Output = 1.3 V......................................................................................................... 12
Figure 6: A = 5 V, B = 4 V, C = 2 V, Output = 0.3 V ........................................................................................... 13
Figure 7: A = 5 V, B = 4 V, C = 5 V, Output = -1.2 V .......................................................................................... 14
Figure 8: Adder / subtractor circuit ................................................................................................................. 15
Figure 9: Multi-meters showing the actual output from each Op Amp .......................................................... 16
Figure 10: Op Amp Integrator circuit ............................................................................................................... 17
Figure 11: The simulated Integrator Circuit ..................................................................................................... 18
Figure 12: The input and output wave forms .................................................................................................. 19
Figure 13: Input / Output ranges ..................................................................................................................... 19
Figure 14: Output voltage at 0.4s .................................................................................................................... 20
Figure 15: integrator circuit on breadboard .................................................................................................... 21
Figure 16: Power supply................................................................................................................................... 21
Figure 17: Function generator producing the square wave input for the integrator ..................................... 21
Figure 18: Setting up the PSU and initial oscilloscope output ......................................................................... 22
Figure 19: Oscilloscope output ........................................................................................................................ 22
Figure 20: Input 0000, Output 0 ...................................................................................................................... 25
Figure 21: Input 0001, Output 1 ...................................................................................................................... 26
Figure 22: Input 0010, Output 2 ...................................................................................................................... 26
Figure 23: Input 0011, Output 3 ...................................................................................................................... 27
Figure 24: Input 0100, Output 4 ...................................................................................................................... 27
Figure 25: Input 0101, Output 5 ...................................................................................................................... 28
Figure 26: Input 0110, Output 6 ...................................................................................................................... 28
Figure 27: Input 0111, Output 7 ...................................................................................................................... 29
Figure 28: Input 1000, Output 8 ...................................................................................................................... 29
Figure 29: Input 1001, Output 9 ...................................................................................................................... 30
Figure 30: Input 1010, Output 10 .................................................................................................................... 30
Figure 31: Input 1011, Output 11 .................................................................................................................... 31
HNC Electrical and Electronic Engineering
Keith A. Hudson
M1306117
Keith A. Hudson
M1306117
Tables
Table 1: Amplification values for each input value............................................................................................ 7
Table 2: Values for A and B and the expected Output .................................................................................... 12
Table 3: Values for A, B and C and the expected Output ................................................................................ 13
Table 4: Same values for A and B and a different C and the expected Output ............................................... 14
Table 5: Values for resistor, R and capacitor, C ............................................................................................... 17
Table 6: Input vs. output voltage ..................................................................................................................... 18
Table 7: Weighting associated with each bit ................................................................................................... 23
Table 8: Input values and expected outputs ................................................................................................... 23
Table 9: Prime factors ...................................................................................................................................... 24
Table 10: Amplification values for each input bit ............................................................................................ 24
Table 11: Ideal vs. real Op Amp ....................................................................................................................... 36
Keith A. Hudson
M1306117
1 Assumptions
The actual value of the resistors used will be slightly different to the manufacturers stated value. This may
be as much as 10% for a resistor with a silver band. Those with a brown tolerance band are more accurate
1%. Resistors with smaller tolerances (i.e. more accurate) are available but they are more expensive. For
these experiments resistors with a tolerance of 1% would be sufficiently accurate.
These experiments assume the use of ideal Op Amps. These have the following characteristics:
1.
2.
3.
4.
5.
6.
7.
The power supply needs to provide an accurate voltage to the Op Amp rails and as input. The model used
is a HY3005D-2. The Data Sheet for this model states accuracy is:
Source:
Load:
constant voltage
constant voltage
0.01%
0.01%
1mV
5mV
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M1306117
(Task 1a)
2.1 Requirements
A circuit is required with the following characteristics:
.Therefore, if we know
to
Input A
Input B
Input C
= 5 k
= 2 k
To add two numbers (i.e. voltages) together we simply connect the wires together and the op-amp will
amplify them according to the resistor ratios used. The output from the op-amp will be negative (i.e.
inverted), so we need to pass the result through a second inverting op-amp to invert it again, thus
correcting the sign.
Our circuit needs to perform the following arithmetic operation:
. If we multiply
both sides by -1 we get
. The output from the first op-amp is
. So if
we add C to that output, and invert the result we are left with the required output result.
Keith A. Hudson
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For each input a variable resistor was connected to a five volt source to allow an input value to be selected
in the range 0-5V. Initially all the inputs were set to zero. Input A was then set to 2V to ensure the
amplification was correct. If Input A is 2V, the circuit output should be 0.40V. The result can be seen in
Figure 2. This was the repeated for Input B. This time the Output should be 0.20V, See Figure 3. For Input C
the output should be 1.00V, see Figure 4.
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The next step is to test that 0.1 * i/p A + 0.2 * i/p B produces the correct results.
Table 2: Values for A and B and the expected Output
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Keeping A and B unchanged; a larger value of C is be used to ensure a negative result is correctly
calculated.
Table 4: Same values for A and B and a different C and the expected Output
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(minus because
).
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The output from the adder Op Amp is 1,501 V. The output from the subtractor Op Amp is 1.017 V. The
respective values are not exactly 1.5 and 1.0 for a number of reasons:
The input voltage to the Op Amps was not exactly 5.0 V. (Actually 5.1 V.)
The resistance of the wires may have affected the input ratios slightly.
The calibration of the PSUs and multi-meters may be out.
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, where
The above circuit (see Figure 10) is an example of an Op Amp Integrator circuit. The output is calculated as
follows:
(Bird, 2010)
10) circuit. If we ignore the (-) sign because we know this is an inverting amplifier, then we need:
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A signal generator was used to produce a square wave (Peak-to-peak: 5V, max +2.5V, min -2.5V) input to
the circuit. The input and output waves were displayed on an oscilloscope. As Figure 12 shows the output
is a triangular wave. The output is the integral of the input.
Figure 13 shows the input and the output values. The output starts at 0V and drops at a constant rate to 247mV. It then increases at a constant rate back to 0V.
Table 6: Input vs. output voltage
Time (s)
i/p (V)
o/p (mV)
0
+2.5
0
<0.5
+2.5
-247
>0.5
-2.5
0
1.0
-2.5
+247
Table 6 shows the input and output voltages during the first oscillation of the input square wave and the
corresponding triangular output wave. When the input is positive the output is negative and when the
input is negative the output is positive.
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becomes
At time, t=0.4s, the output voltage will be:
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Figure 17: Function generator producing the square wave input for the integrator
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Due to an error in wiring the integrator circuit, the Op Amp was damaged and consequently failed to
produce the desired output (see Figure 19).
Wiring up circuits using breadboard is extremely fiddly and mistakes are easy to make and difficult to
locate. Proteus is relatively easy to use and generates errors if things are incorrectly wired. When using
Proteus all the components are working. Real components are easy to damage and may not be working
when even when they are new.
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(Task 1c)
4.1 Requirements
This circuit requires four digital inputs. Each input will be on or off. For simplicity an input voltage of 1V will
be used for on, and 0V will be used for off. In practice any set voltage could be used to represent on.
Each of the four input bits will be weighted differently:
Bit
1
2
3
4
Weight
1
2
4
8
Binary
0001
0010
0100
1000
MSB
Input bits
1000
1001
1010
1011
1100
1101
1110
1111
Output Value
8
9
10
11
12
13
14
15
LSB
Input bits
0000
0001
0010
0011
0100
0101
0110
0111
Output Value
0
1
2
3
4
5
6
7
For the input bits MSB is on the right, LSB on the left
The adder/subtractor circuit Figure 1 can be easily adapted to fulfil the requirements of this circuit:
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1
2
4
8
2
2*2
2*2*2
Bit 1
Bit 2
Bit 3
Bit 4
The multiplier is 1
The multiplier is 2
The multiplier is 4
The multiplier is 8
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Two PSUs to power the Op Amp. One also provides power to the dip-switches.
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The values shown in Figure 38 differ from those in the simulator primarily because different input voltages
were used. Had the voltage been the same, there would probably still show some slight difference:
The supply voltage to the Op Amps was not exactly 12.0 V. (Actually +12.0, -12.1 V.)
The resistance of the wires may have affected the input ratios slightly.
The calibration of the PSUs and oscilloscope may be out.
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5 Conclusions
Although the ideal Op Amp does not exist, many of those available are close enough.
Table 11: Ideal vs. real Op Amp
Characteristic
Ideal Op Amp
Voltage gain
Infinite.
Input resistance
Infinite.
2M.
Output resistance
Zero.
Typically 75.
Zero.
A few mV.
Output voltage
Real Op Amp
Very high gain. Open-loop gain in the
order of 200,000.
Gain remains constant up to about
10kHz.
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6 Bibliography
BBC, 2014. BBC - GCSE Bitesize: Highest common factor and lowest common multiple. [Online]
Available at: http://www.bbc.co.uk/schools/gcsebitesize/maths/number/primefactorshirev1.shtml
[Accessed 06 03 2014].
Bird, J., 2010. 19.8 Op amp integrator. In: Electrical and Electronic Principles and Technology. Fourth ed.
Oxford: Newnes, pp. 303-304.
Middlesbrough College, 2013. The Operational Amplifier. Middlesbrough: Middlesbrough College.