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INTRODUCTION
Engineering: A profession in which a knowledge of mathematical, natural and
social sciences gained by study, experience, and practice is applied with
judgment to develop ways to utilize economically the materials and forces of
nature for benefit of society.
Circuit: An interconnection of electrical devices in which there is at least one
closed path in which current may flow.
Passive and active elements:
An active element is defined as an element which is capable of furnishing an
average power greater than zero to some external device, where the average is
taken over an infinity time interval. Ideal sources are active elements, and an
operational amplifier is also an active device.
Passive element is defined as an element that cannot supply an average
power that is greater than zero over an infinite time interval. The resistor,
capacitor and inductor are passive elements. The resistor is a passive element
because the energy it received is usually transformed into heat. Both the inductor
and capacitor are also passive elements because which are capable of storing
finite amounts of energy, but they cannot provide an unlimited amount of energy
or finite average power over an infinity time interval
Resistors
Resistor is a component which opposes flow of current. The voltage and current
relation in resistor is given by the Ohms law V= IR. The resistance of a
conductor of length l and cross sectional area A is given by R = l /A, where
is the resistivity of the conductor.
When N number of resistors is connected in series the equivalent or total
resistance (R) is the sum of the individual resistances. R = R 1 +R2 + .. +RN .
When N resistors are connected in parallel the equivalent or total resistance
(R) is given by 1/R = 1/R1 + 1/R2 + . 1/RN
Tolerance: Tolerance is the range of resistance values which enables a user to
use a single resistor within its range. This is necessary because resistors cannot
manufacture for all values.
Let tolerance be x%, and the resistance be R. Then this resistor can be used
in the
Color coding:
The resistance value of the resistor can be found by the color bands on a
resistor.
The first two color bands give the first two digits of the resistor. The third color
gives the power of 10, multiplied with the first two digits or the number of zeros
followed by the first two digits. The fourth band gives the tolerance value.
How to find Resistor values:
Color coding:
Step1: Learn the colors
The color 'Gold' is not featured in the above table. If the 3rd band is gold it means
multiplying by 0.1. Example, 1.2 ohm @ 5% would be brown-red-gold-gold. 12
multiplied by 0.1 gives 1.2 dont get confused by gold as a resistance or a tolerance
value. Just watch the location/position of the band.
Power rating of a resistor: It indicates the maximum power that a resistor can
handle.
While we design the circuit, the maximum current (which should not exceed) that
can flow through the resistor Imax is given by
IMAX
Variable resistors:
There are two types of variable resistors, continuous and discrete variable
resistors
Potentiometers:
In potentiometers the variation of resistance is in
continuous manner. It has three leads. The maximum resistance can be obtained
by connecting the extreme leads to the circuit. In this case the resistance can not
be varied though the knob is turned. Variable resistance can be obtained by
connecting center lead with any one of the extreme leads. In this case the
variation in the resistance can be obtained by turning the knob.
Decade Resistance Box
In DRB, the variation in resistance is in discrete manner. The required
resistance is achieved by locating the knob at the required numerical positions.
The total resistance of DRB = sum of the product of the knob position
numbers and the multiplication factors.
Rheostat:
Rheostat is a continuously varying resistor, whose resistance can be varied
linearly. Rheostats have very high power ratings. These are used where precise
value of resistance is required.
Capacitor
Inductors
The ability of conductor to produce voltage is known as inductance. A current
carrying conductor produces a magnetic field and that changing magnetic field
will induce a voltage. The inductance is expressed in Henries. We define the
inductance L by the voltage current relationship
i
L
V = L (di/dt)
V
Physical inductor may be constructed by winding a length of wire into coil.
The inductance of this coil is proportional to the square of the number of
complete turns made by conductor out of which it is formed. For example, an
inductor or coil that has the form of a long helix of very small pitch is found to
have an inductance of N2A/S.
Where A is the cross-sectional area, S is the Axial length of the coil, and (mu) is
the constant of the material inside the helix called the permeability, = o =
410-7 H / m2
The reactance offered by the inductor is given by X L = 2f L, where f is the
applied signal frequency, thus inductor acts as a short circuit to DC.
(0,2,4)
3
(voltage applied to y-plates, frequency = f)
ex
0
1
2
(Voltage applied to
X-plates, frequency = f)
4
y1
Major Axis.
y2
X
x1
x2
Fig: 1.3 PHASE SHIFT MEASUREMENT
Y
Y2
Y1
X
X1
X2
Bread board
A bread board has been designed for easy circuit connection. The figure below
represents a bread board.
I
II
III
IV
Digital multimeter
Digital instrument are generally used to measure the parameters of the
interest in a laboratory are 1) voltage
2) current
3) power
4) frequency 5)
Logic.
The basic building block of a Digital instrument is shown below.
A/D converter
Signal
Processing
Digital display
Half digit 0 or 1
full digit 0-9
Insulators, semiconductors and metals.
A very poor conductor of electricity is called an insulator. An excellent
conductor is a metal. A substance whose conductivity lies between an insulator and
a conductor is known as a semiconductor.
The forbidden energy gap is relatively high (approx. 6 eV) for an insulator,
where as it is relatively small (approx. 1eV) for a semiconductor. In a metal the
conduction and valance band overlap each other.
Semiconductors are of two types
1. Intrinsic semiconductor
2. Extrinsic semiconductor
Silicon and
Silicon:
1.
2.
3.
Germanium:
1. Lower PIV rating (up to 400V)
2. Lower current rating
3. Lower temperature range (1000C)
The advantage of Germanium over Silicon is the lower forward bias voltage required
to reach the region of upward swing, 0.3V for Germanium and 0.7V for Silicon.
On the other hand, the reverse saturation current for silicon is less than that of
germanium,
Is (Si): Is (Ge) = 1: 103
Experiment No: 1
0-30V
0-1V
0-30V
0-10mA
0-500A
1N4007
470, 1k
1No.
1 No.
1 No.
1 No.
1 No.
1No.
1No
P -N JUNCTION DIODE:
If donor impurities are introduced into one side and acceptors into the other
side of a single crystal of a semiconductor, a p-n junction is formed.
Junction
Acceptor ion
Donor ion
Hole
Electron
P-type
n-type
P N JUNCTION DIODE
Depletion
region
The region uncovered by +ve and ve ions is called the depletion region, the
space charge region or the transition region. The thickness of the region is the order
of the wavelength of the visible light (0.05 micron). When p-n junction is formed, the
+
+
+
V
PN JUNCTION
DIODE (measured
UNDER REVERSE
BIAS
VRReverse
bias voltage
in V)
IR Reverse bias current (measure in A)
The current flows in reverse direction. Due to minority carriers,
there is a small current in the reverse direction and is called as
reverse saturation current (Io).
Io depends upon temperature.
I = -I O at room
temperature
Volt-ampere characteristics:
I
(mA)
Ge
Si
Cut-in-Voltage V
VZ I (A)
The characteristics of the semiconductor diode can be defined by the following
equation for forward and reverse bias regions.
I = IO (e V / VT 1)
Where V = applied potential,
I = diode current
IO = reverse saturation current or a scale current which is a function of
donor and acceptor impurity concentration, diode temperature and area of the
junction etc.,
= emission co-efficient (empirical constant). This empirical constant
accounts for any recombination of hole and electrons, which may occur when the
carriers diffuse across the depletion region of the forward biased p-n junction.
A
Diode
Rf Forward resistance
(In the order of 100)
B
B
Rr Forward resistance
(In the order of M)
B
Forward bias
Reverse bias
CIRCUIT DIAGRAM:
470
0-30V
0-10mA
+ A
470
+
1N4007
V 0-1V
0-30V
0-500uA
+ A
+
1N4007
V 0-30V
PROCEDURE
Fig-1
Fig -2
FORWARD BIAS:
FORWARD
BIAS
REVERSE BIAS
1. Connect the circuit as shown in the fig 1
2. Vary the supply voltage gradually, starting from zero. Increase the applied
voltage and note the voltmeter reading(V)
3. For each 0.1 V step in V note the corresponding forward current (I) till V
becomes say 0.7 V. I should not exceed 10mA.
4. Tabulate the result and draw the V-I characteristics under forward bias
conditions.
REVERSE BIAS:
1. Connect the circuit as shown in the fig(2)
2. Measure the current (reverse current) and voltage by increasing the voltage
1V steps. Do up to 20V.
3. Tabulate the results and plot the
S.No V(volts)
I (mA)
reverse bias characteristics.
1
0
0
4. Here the reverse current will be in
2
0.1
0.25
micro amperes.
3
0.2
0.4
5.
The reciprocal of the slope of these
4
0.3
0.5
curves for both the conditions gives the
5
0.4
0.65
resistance for forward and reverse bias
6
0.5
1
conditions.
7
0.55
1.7
OBSERVATIONS:
8
0.6
4
9
0.62
6.1
10
0.64
8.5
S.No V(volts)
I (A)
11
0.66
12.5
1
1
0
2
2
0
Forward bias
3
3
0
Reverse bias
4
4
0
5
5
0
6
6
0
7
7
0
8
8
0
LENDI institute of Engineering, and
technology
9
9
0
..Jonnada
17
10
10
0
MODEL GRAPHS
V (volts)
Vr
If
Ir
I (mA)
I A
Vf
V (volts)
Reveres
bias
CONCLUSION:
The ideal resistance of the diode in forward bias is 0
Practical dynamic resistance of the diode in forward bias is 20 which is very low
The ideal resistance of the diode in reverse bias is .
Practical dynamic resistance of the diode in reverse bias is 28.260k which is very
high
Equipment Limitation:
470: To limit the flow of current in the circuit and protect the diode.
Even though we can use above 470 resistances but the voltage drop across
resister will be more and it requires more power supply, because of equipment
limitation we are using 470 .
Draw the piece wise linear V-I characteristics of a p-n diode, what is the circuit
model for ON state and OFF state?
What is Hole? How does it contribute to conduction?
Define depletion region?
How diode acts as a switch?
What parameters in a germanium diode differ from those in a silicon
Diode?
0-30V
0-10mA
0-100mA
0-1V
0-10V
1 No.
BZ 6.2 V
470, 1k
1No.
1No.
1 No.
1 No.
1 No.
1 No.
COMPONENTS:
1. Zener diode
2. Resistor
CIRCUIT DIAGRAMS:
470
0-30V
0-10mA
470
+ A
6Z2
Fig 1
FORWARD BIAS
+
V
0-1V
0-30V
0-100mA
+
A
+
6Z2
V 0-10V
Fig - 2
REVERSE BIAS
THEORY:
The diode which is designed with adequate power dissipation capabilities
to operate in the breakdown region is Zero diode.
Approximated
V
VZ
PROCEDURE:
ON state
V>VZ
VZ
OFF state
VZ >V>0V
FORWARD BIAS:
1. Connect the circuit as shown in fig(1)
2. Vary the supply voltage gradually, starting from zero. Increase the supply
voltage and note the voltmeter reading (V) for each 0.1V step in V, note the
corresponding forward current (I) till V becomes say 0.7 V. I should not
exceed 10mA.
3. Tabulate the results and draw the V-I characteristics under forward bias
conditions.
REVERSE BIAS:
1. Connect the circuit as shown in fig(2)
2. Increase the supply voltage suitably, to read Iz in steps of 5mA, starting from
zero upto say 40mA, note the corresponding values of Vz.
3. Tabulate the results and draw the V-I characteristics under reverse bias
conditions.
OBSERVATIONS:
Forward bias
S.No V(volts)
0.1
0.2
0.3
0.4
0.5
0.6
0.64
0.66
Reverse bias
I (mA)
0.09
0.20
0.29
0.41
0.51
0.87
1.67
2.62
S.No
V(volts)
I (mA)
0
0
1
0.25
Department of Electronics and Communication
Engineering
2
0.27
Electronic Devices and Circuits
Lab 0.5
3
4
1
0.68
2.92
4.2
1.16
0.7
4.79
4.6
2.5
0.72
9.92
4.8
5
4.9
10
5.0
15
5.1
20
5.1
25
5.1
30
5.1
35
5.1
40
MODEL GRAPHS
V (volts)
If
I
I (mA)
I (mA)
Vf
V (volts)
CONCLUSION:
The ideal resistance of the diode in forward bias is 0.
Practical dynamic resistance of the diode in forward bias is 9.6 which is very small
The given break down voltage of the zener diode is 5.1V
The practical break down voltage of the zener diode is 5.1V
Equipment Limitation:
470: To limit the flow of current in the circuit and protect the diode.
Even though we can use above 470 resistances but the voltage drop across
resister will be more and it requires more power supply, because of equipment
limitation we are using 470 .
Voltmeter (0-1) V: the minimum voltage required for the diode to starts conduction
is 0.6v. so the voltmeter range (0-1)v is sufficient.
Experiment No: 3
0-100mA
1No.
1No.
1No.
COMPONENTS:
1. Diode
2. Transformer
3. Capacitors
1N4007
230V / 16-0-16 V, 0.5A,
1000F / 63V
2 Nos.
1No.
2 No.
AC Input
Transformer
1.
2.
3.
4.
Rectifier
Filter
Regulator
1N4007
+
AC Input
RL
0
Let Vi = VmSint
Vm is the peak value.
V
Rf
Vi
RL
+
Vi
i=0
RL v=vi
Thus the output current is unidirectional and it will have non-zero average value.
Its average value = area of one cycle divided by the base
I dc
1
2
1
Im sin d 0d
2 0
I
I
Idc = m cos 0 = m
2
Idc =
Irms =
2
0 i d =
1 2
i m sin 2 d = Im / 2
2 0
id ]
0
Rectifier
circuit
Capacitor
filter
DC load RL
AC mains
The action of this system depends upon the fact that the capacitors stores
energy during the conduction period and delivers this energy to the load during the
non-conducting period. In this way the time during which the current passes through
the load is prolonged, and the ripple is considerably decreased.
The half wave capacitor filter is shown below.
i
+
+ v iL
vi
iC
vo
RL
transformer
charging in
transformer
discharging
100% = Vr (Rms)
Vdc
Voltage regulation:
The variation of dc output as a function of dc load current is called regulation.
The percentage regulation is given as
% regulation = V no load V load 100%
V load
V no load dc output voltage under zero load current (R L =)
V load
dc output voltage at normal load current at which regulation is
determined.
For ideal power supply the output voltage is independent of the load current or the
load resistance and the percentage regulation is zero
HALF WAVE RECTIFIER WITHOUT FILTER CIRCUIT DIAGRAM:
0-100mA
+ A
AC mains
1N4007
+
DMM
DRB
3.
4.
5.
V
Time
OBSERVATIONS:
S.No IDC
VDC
VAC
(ma)
(V)
(V)
10
20
30
40
50
60
70
80
90
100
7.2
7.1
7.0
6.9
6.8
6.8
6.8
6.7
6.6
6.5
9.2
9.1
9.0
8.9
8.8
8.8
8.8
8.7
8.6
8.5
= VAC/VDC
1.272
1.281
1.283
1.289
1.294
1.294
1.294
1.298
1.303
1.307
VNL=7.5V
%regulation
VNL-VDC 100
VDC
4.16
5.63
7.14
8.66
10.29
10.29
10.29
11.94
13.65
15.38
DIB
1N4007
AC mains
+ A
1000F
63V
N2
+
-
1000F
63V
+
V
-
DMM
DRB
N3
PROCEDURE:
Connect the circuit as shown in the diagram.
Give input from AC mains and measure the secondary voltage Vs of the
2.
transformer.
Measure the no load DC voltage using DMM. Let this be V NL.
3.
Now connect the DRB. Vary the DRB and note the values of I dc, in steps of
4.
10mA until the current reaches 100mA.
At each step measure the VDC and VAC. Calculate ripple factor as the ratio of
5.
VAC VDC.
Model wave form for half wave rectifier with filter:
1.
Time
Ripples in half wave rectifier
OBSERVATIONS:
VNL =21.4v
S.No IDC
10
20
30
VDC
19.7
18.9
18.6
(ma)
= VAC /VDC
(*10-3)
190.2
189.5
188.3
9.65
10.02
10.12
VAC
%regulation
VNL-VDC 100
VDC
4.56
8.99
10.75
18.4
17.7
17.2
16.5
16.1
15.5
15.5
188
187.6
187
187.4
187.8
188
185.5
10.21
10.59
10.87
11.35
11.66
12.12
12.16
11.95
16.38
19.76
24.84
27.95
32.9
32.9
Experiment No: 4
0-100mA
1No.
1No.
1No.
COMPONENTS:
AC Input
Transformer
5.
6.
7.
8.
Rectifier
Filter
Regulator
AC mains
i1
+ Vo +
vm
i2
i2
im
0
i
im
Idc
t
During the positive cycle of the input signal D 1 is forward biased and i 1 current
is flown through D1 and RL. During negative half cycle of the input signal, D 2 is
reverse biased and i2 current is flowing through D2 and RL. The current to the load,
which is the sum of these currents, i = i 1+i2. The dc and rms values of the load
current and load voltages are.
Idc = Average value = Area of one cycle divided by the base [because here base
(time) =
]
Im
1
im
(2) = 2Im /
Vm
2I R
Where Im =
, Vdc I dc R L m L
R f RL
Vm is the peak transformer secondary voltage from one end to the center tap.
The dc output voltage of the Fullwave connection is twice that for the half wave
circuit. Because the area above the axis for one full AC input cycle is twice that
obtained for a half-wave system.
2
I m 1 cos 2
1
2
2
2
I rms = I m sin ..d =
d
0
0
2
Im
2
sin 2
= Im2 / 2
0
Irms =
Im
2
PIV:
AC mains
When any one of the two diodes is reversed biased, (let that is replaced by
open circuit) the maximum voltage appears across that open circuit. This can be
solved by following equivalent circuits
B
vmA
RL
vm
RL
vm
vm
C
1N4007
0-100mA
+A
+
DMM
DRB
1N4007
PROCEDURE:
Connect the circuit as shown in the diagram.
1.
Give input from AC mains and measure the secondary voltage Vs of the
2.
transformer.
Measure the no load DC voltage using DMM. Let this be V NL.
3.
V
Time-
OBSERVATIONS:
VNL=14.1V
S.No IDC
VDC
VAC
(ma)
(V)
(V)
10
20
30
40
50
60
70
80
90
100
14.0
13.9
13.8
13.8
13.7
13.7
13.7
13.7
13.6
13.6
6.2
6.1
6.0
6.0
6.0
6.0
6.0
6.0
6.0
6.0
= VAC/VDC
0.442
0.438
0.434
0.434
0.434
0.437
0.437
0.437
0.441
0.441
%regulation
VNL-VDC 100
VDC
0.71
1.43
2.17
2.17
2.91
2.91
2.91
2.91
3.67
3.67
Plot the graph of V DC verses IDC. Vs IDC and calculate the theoretical values of
expected DC output voltage and observe the output on CRO.
FULL WAVE RECTIFIER WITH FILTER CIRCUIT DIAGRAM:
AC mains
+ A
+
-
N2
0-100mA
DIB
1N4007
1000F
63V
+
-
1000F
63V
+
V
-
DMM
N3
1N4007
DRB
PROCEDURE:
Repeat the experiment for a full wave rectifier with the connections as shown in the
above figure and tabulate the results.
OBSERVATIONS:
S.No IDC(mA)
10
20
30
40
50
60
70
80
90
100
VDC(v)
VAC(mv)
= VAC /VDC
(*10-3)
19.7
18.9
18.6
18.4
17.7
17.2
16.5
16.1
15.5
15.5
190.2
189.5
188.3
188
187.6
187
187.4
187.8
188
185.5
9.65
10.02
10.12
10.21
10.59
10.87
11.35
11.66
12.12
12.16
%regulation
VNL-VDC 100
VDC
4.56
8.99
10.75
11.95
16.38
19.76
24.84
27.95
32.9
32.9
CONCLUSIONS:
Theoretical and practical ripple factors for full wave rectifier are very less.
The graphical representation of %Regulation verses I DC is linear.
RESULT: - Experimentally the efficiency
(Without filter) Percentage of Regulation
Ripple factor
(With filter)
Percentage of Regulation
= 81.14%
= 0.56
= 0.482
= 0.109
QUESTIONS:
1.
2.
Why does ripple factor is good for full wave rectifier than the half wave
rectifier?
The frequency of the full wave rectifier is twice that of a input signal frequency
and the frequency of the half wave rectifier is same as that of the I/P signal
frequency, Explain why?
Why should be the PIV rating of the diode in full wave rectifier is twice that of
diode in half wave rectifier?
Experiment No: 5
TRANSISTOR CE CONFIGURATION
(INPUT AND OUTPUT)
AIM: To obtain the input and output characteristics of a given transistor in CE
Configuration.
APPARATUS:
1. Power supplies
2. Ammeters
3. Voltmeters
0-30V
0-1mA,
0- 10 mA,
0-100mA
0-1V
0-30V
2Nos.
BC 107
1K
1No.
1No.
1 No.
1 No.
1 No.
1 No.
1 No.
COMPONENTS:
1. Transistor
2. Resistor
THEORY:Input characteristics
CE=
2V
CE=
1V
CE=
0V
IB
Transistor
VBE
The input characteristic is the plot of the input current I B Vs input voltage VBE
for a range of values of output voltage V CE.
SATURATION
REGION
Output Characteristics
The output characteristics are a plot of the output current I C versus output voltage
VCE for a range of values of input current IB.
IC
IB=600A
IB=550A
0
ACTIVE REGION
IB=500A
Active Region
In the active region the collector junction is reversed biased and emitter
junction is forward biased. In this region the transistor outputIB=0A
current I C responds
most sensitively to an input signal.
VCE
In the active region the output characteristic I C is given
by
CUTOFF REGION
IC = IB + (1+) ICO.
ICEO = ICBO
Note that IB >>ICO, and hence IC IB in the active region.
The curves of the output characteristics are not as horizontal as those of the
output characteristics in the common base configuration.
Assume that, because of the early effect , increases by only one half of 1%
from 0.98 to 0.985, as VCE increases from a few volts to 10 volts, then the value of
Beta increases from (0.98/1-0.98) = 49 to (0.985/1-0985) = 66, or about 34%. This
numerical example illustrates that a very small change in reflects a very large
change in the value of , and hence upon the common emitter curves.
Cut-off region
The cut-off region is defined as the condition where the collector current is
equal to the reverse saturation current I CO and the emitter current is zero. For the
transistor to be in cut-off, IE=0, IC=ICO, IB = -IC = -ICO, and VBE is a reverse voltage
whose magnitude is of the order of 0.1V for germanium and 0 V for silicon transistor.
Saturation region
1K 0-10 mA
+
-
0-30V
BC107
+
V
+
V
0-1V
0-30V
0-30V
Output characteristics
IB(ma)
0
0.18
0.2
0.3
0.4
0.9
1.2
1.8
2.5
3.8
5.9
10
VCE=1v
VBE(v)
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.72
0.74
0.76
0.78
0.8
0.92
IB(ma)
0
0.2
0.3
0.4
0.5
0.6
0.8
1.3
1.6
2.1
2.7
3.6
10
C
ON
CL
US
IO
NS
:
S.No IB=580A
IC
VCE
0.3 1
0.4 2
0.5 4
0.6 7
0.7 9
0.8 10
0.8 11
0.8 12
IB=600A
IC
VCE
0.6 1
0.6 3
0.7 5
0.8 7
0.9 8
0.9 9
0.9 10
1.0 11
1.0 12
IB=620A
IC
VCE
0.9
1
0.9
2
1.0
4
1.1
6
1.2
8
1.3
10
1.4
11
1.4
12
effect.
From the Plot drawn Between IC & VCE for constant values of IE we observe that IC
increases for constant value of IE.
RESULT: - For Input Characteristics dynamic resistance
= 33.33
For Output Characteristics dynamic resistance= 400
QUESTIONS
1.
2.
3.
4.
5.
Experiment No: 6
TRANSISTOR CB CONFIGURATION
AIM: To obtain the input and output characteristics of a given transistor in CB
Configuration.
APPARATUS:
1. Power supplies
2. Ammeters
3. Voltmeters
0-30V
0-10mA
0-1V
0-30V
2Nos.
2Nos.
1 No.
1 No.
COMPONENTS:
1. Transistor BC 107
2. Resistor -1K
-1No.
-1No.
THEORY:
In the common base configuration, the base is common to both input and
output circuit. The output (collector) current I C is completely determined by the input
(emitter) current IE and the output (collector to base) voltage V CB.
0V
CB=
1V
CB=
2V
IE
For fixed values of collector voltage VVEBCB, as the base to emitter voltage (V EB) is below
the cut-in voltage (V) the emitter current is very small. When V EB exceeds this V the
emitter current increases rapidly. The increase in the magnitude of collector voltage
will cause the base width modulation and the emitter current increases for less value
of VEB.
Output characteristics
The output characteristics will relate output current I C to an output voltage VCB
for various values of IE.The output characteristics have three basic regions.
1) Active Region
2) Cut-Off Region
3) Saturation Region
IC
IE = 3mA
IE = 2mA
Active Region
ACTIVE REGION
In the active region the collector
junction is reversed biased and emitter
junction is forward biased. In this region the transistor output
IE = current
1mA I C responds
most sensitively to an input signal.
In the active region the output characteristic I C is given by
IE = region.
0mA
0B0. IE >>IBO, and hence IC IE in the active
IC = IE+I
VCB
and is less than 1.So the
collectorREGION
current is essentially independent
of collector
CUT-OFF
voltage and depends only upon emitter current.
the magnitude of collector current is (slightly) less than that of the emitter current.
Saturation Region
The region to the left of the ordinate, V CB = 0, and above the characteristic I E =
0, in which both emitter and collector junction are forward biased, is called the
saturation region. There is a large change in the collector current with small change
in collector voltage.
Cut-off Region
The region below the IE = 0 characteristic, for which emitter and collector
junctions are both reverse biased, is referred to as a cut-off region.
CIRCUIT DIAGRAM
1K
0-30V
0-10mA
0-10mA
BC107
A +
0-1V
A +
V
0-30V
+
LENDI institute of Engineering, and technology
..Jonnada
43
0-30V
PROCEDURE:
INPUT CHARACTERISTICS:
1.
2.
OUTPUT CHARACTERISTICS:
1. Starting with VEB = 0, increase it to get I E = 1mA. Then increase the V CB in
steps and note down the values of Ic, without exceeding the rated values.
2. Tabulate the results. Repeat for different values of I E , say 2mA & 3mA and
draw the family of characteristics.
OBSERVATIONS:
INPUT CHARACTERISTICS
S.No VCB = 0v
VEB IE
1
0
0
2
0.1 0.11
3
0.2 0.22
4
0.3 0.32
5
0.4 0.42
6
0.5 0.63
7
0.52 0.79
8
0.54 1.06
9
0.56 2.35
10
0.58 3.72
11
0.6 6.0
12
0.62 9.43
VCB = 1v
VEB IE
0
0
0.1 0.11
0.2 0.22
0.3 0.32
0.4 0.42
0.5 0.61
0.52 3.35
0.54 6.68
0.56 8.65
OUTPUT CHARACTERISTICS
S.No IE = 1mA
IC
VCB
1
0.43 0
2
0.52 2
3
0.64 4
4
0.73 6
5
0.82 8
6
0.92 10
7
1.0 12
8
1.1 14
9
1.17 16
10
1.26 18
11
1.34 20
IE = 2mA
IC
VCB
1.42 0
1.74 2
1.83 4
1.89 6
1.98 8
2.05 10
2.07 12
2.16 14
2.23 16
2.35 18
2.4 20
CONCLUSIONS:
IE = 3mA
IC
VCB
2.42 0
2.68 2
2.8
4
2.9
6
2.99 8
3.07 10
3.13 12
3.21 14
3.31 16
3.43 18
3.47 20
Experiment No: 7
i1
hr = h12 = V1
= reverse open circuit voltage amplification
V2 i 2 = 0
(dimensionless)
hf = h21 = i2
i1
ho = h22 = i1
V2
V1
hrV2
i2
i1
h f i1
ho
V2
VBE = hieib+hrevce
Ic = hfe Ib + hoeVce
hie
+
Vbe
E
B
Ib
Ic
hreVce
hfeib
hoe
Vce
-
Vce
I b
I b
I b 2 I b1
V
Vbe
hre be
Ib
Vce Vce
i
i
h fe c c Vce
i f
ib
i
ic
hoe c
Ib
Vce Vce
The hybrid small signal model for common collector configuration
hie
hie
+
Vbe
C
hreVce
Ie
Ib
hfeib
hoe
Vce
- C
VBC = hicib+hrcvec
Ie = hfc ib + hoeVec.
And h-parameter are given by
hic
Vbc Vbe
I b
I b
Vbc
Vec
i
h fc e
ib
i
hoe e
Vec
hrc
Vec
Vbc
ib
Vec
ie
V
ib ec
ie
ib
Vec
hib
Veb
+C
Ie
hrbVcb
Ic
E
+
hfbie
hob
Vcb
B-
- B
Veb = hibie+hrbvcb
ic = hfb ie + hobVcb.
and h-parameter given by
hib
Veb Veb
ie
ib
Vcb
ie
Vcb Vcb
i
i
h fb c c Vcb
ie ie
i
ic
hob c
ie
Vcb Vcb
OBSERVATIONS:
The h-parameters for CE configuration are
hrb
0.64 0.6
200
0.8 0.610 3
0.64 0.58
0.06
1 0
0.55 0.52
5 .6
6.5 1.210 3
0.65 0.58
0.07
1 0
FET CHARACTERISTICS
AIM: To obtain the static characteristics (V DS vs. ID.). To obtain the transfer
characteristics (VGS vs. ID) of a given FET and to calculate the parameters of FET (rd,
m, )
APPARATUS:
1.
2.
3.
4.
Power supplies
ammeter
Voltmeters
R.P.S
0-30V
0- 10mA
0-10V
0-30V
2Nos.
BFW 11
IN 4007
1No
1No
1 No
1 No
1 No
COMPONENTS:
1. FET
2. Diode
THEORY:FET CHARACTERISTICS
The field effect transistor is a three terminal semiconductor device. The three
terminals are Gate, Drain and Source. The FET is a majority carrier (Unipolar)
device and it is a voltage controlled current source. It is a voltage controlled device
since the output drain current is controlled by Gate to source voltage. It can also acts
as a current source since the output drain current independent on the drain
resistance or drain to source voltage
The high input impedance and low noise are two of the advantages of FET.
The main disadvantage of FET is relatively small gain bandwidth product as
compared to transistor.
An important feature of the FET is that, it is often simpler to fabricate and
occupies less space on the chip then does the BJT. To the resultant component
density can be extremely high, of a exceeding of 10 5 MOSFET per chip. MOS
SYMBOLS
Drain
N- Channel JFET
D
Gate 1
P Channel JFET
Gate 2
Source
G
S
Lead configuration
The direction of the arrow indicates the directions in which the gate current
would flow of the gate junction were forward biased.
CIRCUIT DIAGRAM:
0-10mA
+A
1N4007
BFW 11
+
0-30V
0-30V
0-10V
0-30V
PROCEDURE:
A) STATIC CHARACTERISTICS:
2.
3.
Connect the circuit as shown in the figure. The diode is only for protection.
Keep the gate voltage VGS = 0V and increase the drain voltage V D from zero
to 10 V in convenient steps, noting the drain current I D at each step.
Plot the graph between VD and ID.
Repeat the experiment for different values of gate voltage.
B) TRANSFER CHARACTERISTICS:
Keep the VDS constant say 10 V and record I D for different (-ve) values of VGS
starting from zero. Tabulate the result and draw the graphs.
STATIC CHARACTERISTICS:
S.No
1
2
3
4
5
6
7
8
9
10
11
VGS = 0
VDS (volts)
0
1
2
3
4
5
6
7
8
9
10
ID(mA)
0
4
5.9
6.5
6.7
6.8
6.8
6.8
6.8
6.8
6.8
VGS = -1V
VDS (volts)
0
1
2
3
4
5
6
7
8
9
10
ID(mA)
0
2
2.4
2.6
2.6
2.7
2.7
2.8
2.8
2.9
2.9
VDS = 2V
VGS (volts)
0
1
2
3
4
5
ID(mA)
5.3
2.2
0.2
0.1
0.1
0.1
VGS = -2V
VDS (volts)
0
1
2
3
4
5
6
7
8
9
10
TRANSFER CHARACTERISTICS
S.No
1
2
3
4
5
6
VDS = 10v
VGS (volts)
0
1
2
3
4
5
ID(mA)
6.8
2.7
0.8
0.4
0.4
0.4
ID(mA)
0
0.4
0.5
0.6
0.6
0.6
0.6
0.7
0.7
0.8
0.8
6
7
8
9
10
0.4
0.4
0.4
0.4
0.4
6
7
8
9
10
0.1
0.1
0.1
0.1
0.1
MODEL GRAPHS:
TRANSFER
CHARACTERISTICS
ID
STATIC CHARACTERISTICS
VGS = 0V
VGS = -1V
VGS
VGS = -2V
VDS = 5V
CONCLUSIONS:
VDS = 2V
From the graphical representation of IDVS VDS we observed that as VGS increasing
VDS
ID decreasing.
From the graphical representation of I DVS VGS we observed that at VGS =0 ID is
maximum. As VGS is increasing ID decreasing.
RESULT:
QUESTIONS:
Experiment No: 9
1 No.
1 No.
1 No.
1 No.
COMPONENTS:
1. Resistors
2. Capacitors
3. Transistors
220
1No.
Other resistors of designed values.
10 F
2Nos
100F
1No.
BC 547
1No.
THEORY
RC
C2 = 10F
+
R1
VCC = 12V
C1 10F
-
DRB
Signal
Generator
BC 547
RS 220
CIRCUIT DIAGRAM:
CRO
CE 100F
R2
RE
DESIGN:
Design 1
Determine the values of RC, RE, R1, R2 for the network for the operating points
indicated
VCC = 12 V, ICQ = 5mA, VCEQ = 6V VBE = 0.6V.
VEN = VCC / 10=1.2V
RE = VEN / IE = VEN / IC (IE IC )= 240
RC = VRC / IC = (VCC VCEQ - VEN) / IC= 960
VBN = VBE + VE = 1.8V
R2 (1 / 10 ) RE = 5.76k
VBN = (R2 /(R1+R2)) VCC
240
RE =
IE
IC
5X10 3
R E 240
VRC VCC VCEQ VEN
Ic
IC
12 6 1.2
960
=
5X10 3
R C 960
RC
R 2 7.2K
R 2 7.2K
VBN
R2
X12
R1 R 2
1.9
7.2K
X12
R 1 7.2K
R1 =38.27K
PROCEDURE:
1. Connect the circuit with component values calculated.
2. Verify the co-ordinates of operating points and note down any deviations from
the designed values (VCEQ, ICQ and VBE).
3. Connect the signal generator with a sine wave of 1 KHz frequency to the input
and increase the input to such a level that the output waveform of the signal
as observed on CRO is not distorted.
4. Measure the input and output voltages and calculate the gain of the amplifier.
Av = (VO/P / VI/P).
5. To measure the input impedance, find the voltage drop across the known
resistance RS. The input current therefore is measured as the voltage across
Rs / Rs value. Input impedance Zi = Vi /Ii
6. To measure the input impedance, measure the output signal voltage V O/P
without any load. Connect a resistive load and then adjust the load until the
new output signal VO/P equal to the one half of the original signal. Remove the
ROUT from the circuit and measure its value. The measured value is the output
impedance of the circuit.
7. To measure the current gain AI, note down the output signal voltage when Ro
is connected and divide it by Ro to get the output current. Now current gain =
output current / input current. The power gain is the product of voltage gain
and current gain.
8. Vary the frequency of the input signal from 50Hz to 1MHz in suitable steps
and calculate gain at each step. Plot the graph between gain in dB Vs
frequency. Note down the half power points and find the bandwidth of the
amplifier.
9. Observe the phase relation between input and output signals at different
frequencies.
MODEL GRAPHS:
AV
Max
Gain in dBs
3dB point
Bandwidth
Output
Voltage (V)
1.2
1.4
1.6
3.8
4.2
4.8
4.8
4.8
5
5
5
5
5
5
5
5
5
5
4.8
4.6
4.5
4.4
4.0
3.8
3
2.8
2.2
1.5
Gain(V0/Vi)
20 log10 (V0/Vi)
30
35
40
95
105
120
120
120
125
125
125
125
125
125
125
125
125
125
120
115
112
110
100
95
75
70
55
37
29.54243
30.88136
32.0412
39.55447
40.42379
41.58362
41.58362
41.58362
41.9382
41.9382
41.9382
41.9382
41.9382
41.9382
41.9382
41.9382
41.9382
41.9382
41.58362
41.21396
40.98436
40.82785
40
39.55447
37.50123
36.90196
34.80725
31.36403
RESULTS ANALYSIS:
Input sinusoidal voltage = 40mv
Input Frequency = 1 KHz
Output voltage = 5V (Sine Wave)
Operating Point: - (Under Zero signal conditions)
VCEQ 5.4V
VBE 0.65v
VRC 5.32
5.3ma
RC
1K
After applying the signal,
I CQ
5V
0.125X10 3
40mv
=125(>100)
Ii
VR S 1.8mv
8.18A
RS
220
Vi
40mv
Ii 8.18X10 6
=4890
O/P Resistance = 1111
I/P Resistance =
output Volatage
2.5V
1 No.
1 No.
1 No.
1 No.
COMPONENTS:
1. Resistors
220
33K
8.2K,
10K
10 F
BC 547
2. Capacitors
3. Transistors
1 No.
1 No.
1 No.
1 No.
2Nos.
1No.
THEORY
When the output is taken from the emitter terminal of the transistor as shown
in the fig. The network is referred to as Common collector transistor amplifier. This
configuration is also called emitter follower, because its voltage gain is close to unity,
and hence a change across the load at the emitter. In other words the emitter follows
the input signal.
In a.c analysis the collector is grounded, so, actually a common collector
configuration the input resistance R I of emitter follower is very high (Hundreds of Kilo
ohms) and output resistance R O is very low (tens of ohms). Hence the common
collector circuit can be used as a buffer stage which performs the function of
resistance transformation.(From high to low resistance) over a wide range of
frequencies, with voltage gain close to unity. The emitter follower increases the
power level of the signal, i.e., it provides power gain.
For the common collector amplifier,+ the current gain AI is high (approximately
equal to common emitter stage) AV is lessVcc
than
unity (but close to unity), R I is the
= 12V
highest and RO is the lowest of the three (CE, CB & CC) configurations. This circuit
is widely applied as a buffer stage between a high impedance source and low
impedance load.
K
The emitter follower is33frequently
used for impedance matching purposes; the
emitter follower (due to its low output resistance) is often used to drive capacitive
loads.
CIRCUIT DIAGRAM:
RS 220
C1 10F
Q1 BC 547
C2 10F
10 K
LENDI
institute
Signal
Generator
CRO
PROCEDURE:
1. Connect the circuit as shown in the figure
2. The operating points VCEQ , IEQ and VBE are measured.
3. Connect the signal generator with a sine wave of 1 KHz frequency to the input
and increase the input to such a level that the output waveform of the signal
as observed on CRO is not distorted.
4. Measure the input and output voltages and calculate the gain of the amplifier.
Av = (VO/P / VI/P).
5. To measure the input impedance, find the voltage drop across the known
resistance RS, which gives drop in RMS Value. Convert this RMS value to
peak to peak value for further calculations. The input current therefore is
measured as the voltage across Rs (VRS (p_p)), VRS (pp) / Rs value. Input
impedance Zi = Vi /Ii
6. To measure the input impedance, measure the output signal voltage V O/P
without any load. Connect a resistive load and then adjust the load until the
new output signal VO/P equal to the one half of the original signal. Remove the
ROUT from the circuit and measure its value. The measured value is the output
impedance of the circuit.
7. To measure the current gain AI, note down the output signal voltage when Ro
is connected and divide it by R 0 to get the output current. Now current gain =
output current / input current. The power gain is the product of voltage gain
and current gain.
8. Vary the frequency of the input signal from 50Hz to 1MHz in suitable steps
and calculate gain at each step. Plot the graph between voltage gain Vs
frequency. Note down the half power points and find the bandwidth of the
amplifier.
Gain in dB
Frequency
TABULATION:
Input Voltage = 40mV
S.No
Frequenc
y ( Hz)
Output
Voltage (mV)
Gain(V0/Vi)
20 log10 (V0/Vi)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
50
80
100
200
800
1K
2K
5K
8K
10K
20K
50K
80K
100K
200K
32
32
33
34
34
34
34
34
34
34
34
33
32
32
32
0.8
0.8
0.82
0.85
0.85
0.85
0.85
0.85
0.85
0.85
0.85
0.82
0.8
0.8
0.8
-1.94
-1.94
-1.67
-1.41
-1.41
-1.41
-1.41
-1.41
-1.41
-1.41
-1.41
-1.67
-1.94
-1.94
-1.94
500K
800K
1MEG
32
32
32
0.8
0.8
0.8
-1.94
-1.94
-1.94
CONCLUSIONS:
The voltage gain obtained is 0.85 which is almost equal to the theoretical value
which is unity. The bandwidth obtained is 1 MHz which is very high.
RESULTS:
Voltage gain (AV)
=
0.85
Current gain (AI)
=
514.71
Input impedance (Zi)
=
733.3K
Output impedance (ZO)
=
711
Bandwidth
=
1MHz
The frequency response of a Common Collector Amplifier is studied.
QUESTIONS:
1. Why the common collector amplifier is also called emitter follower?
2. Which of the amplifiers (CE, CB or CC) has a highest input resistance
(RI)?
3. How will the size of the biasing resistor Ri effect the input impedance of
Experiment No: 11
1No.
1No.
1 No.
1 No.
47k
RS and RD as
+ per design
10 F
VDD 12 V
BFW 11
2. Capacitors
3. FET
CIRCUIT DIAGRAM:
RD
3Nos.
1No.
C2 10uF
BFW 11
C1 10uF
1 No.
RG
CRO
INPUTinstitute of Engineering, and technology
LENDI
..Jonnada
64 C3 10uF
RS
THEORY: - A small signal low frequency FET has a Nortons output circuit with
a dependent current generator whose magnitude is proportional to gate to
source voltage. The output resistance is d. The input resistance between gate
and source is infinite, since it is assumed that the reverse biased gate and
source draws no current.
FET can be used for analyzing the three basic FET
amplification configurations. (i) Common Source (CS), (ii) Common drain (CD),
(iii)Common gate (CG) The CS amplifier provides good voltage amplification.
Voltage Gain:- Source resistor (Rs) is used to set the Q-point but is passed by
Cs for mid frequency operation. From the small signal equivalent circuit, the
output voltage,
VO = -RD/RD+rd Vgs where VGS=VI
Hence, the voltage gain, AV=VO/VI = -Rd RD+rd
DESIGN:
Select VGSQ near the max. gm value say VP / 2, IDSS = 10 mA, VP = -4V, Yos = 2S,
rd = 1 / Yos
2
VGSQ
IDQ = IDSS 1
V
P
VGSQ
Vp
2 I DSS
VP
VGSQ
1
VP
4.
5.
6.
MODEL GRAPHS:
Gain in
dB
AV
Max
3dB point
Bandwidth
Frequency
TABULATION:
S.No
Frequency
(Hz)
Input
Voltage
Output
Voltage
Vi
V0
(mV)
(V)
Gain
V
AV 0
Vi
1
50
40
0.2
2
100
40
0.24
3
200
40
0.26
4
500
40
0.28
5
1k
40
0.28
6
2k
40
0.28
7
5k
40
0.28
8
10k
40
0.28
9
50k
40
0.28
10
70k
40
0.28
LENDI100k
institute40of Engineering,
11
0.28
..Jonnada
12
200k
40
0.26
13
500k
40
0.22
14
700k
40
0.16
15
1MHz
40
0.12
5
6
6.5
7
7
7
7
7
7
7
and
7
66
6.5
5.5
4
3
Gain in Decibels
(dB)
20 log 10 AV
With Feedback
13.98
15.563
16.25
17.5
17.5
17.5
17.5
17.5
17.5
17.5
technology
17.5
16.25
14.8
12.04
9.54
CONCLUSIONS:
1. The drain resistance of a JFET (0.1 to 1 M)
2. As capacitive reactance decreases with increasing frequency, the resultant
output impedance will be lower at higher frequencies there by reducing the
gain
RESULTS:
Designed Voltage gain
Practical Voltage gain
=8
=7
The Frequency response of JFET amplifier is obtained. Voltage gain and band width
are calculated.
Band Width = 699.97 KHz.
QUESTIONS:
1.
2.
3.
4.
Experiment No: 12
Power supply
CRO
Digital multimeter.
Signal generator
(0-30V)
1 No.
1 No.
1 No.
1 No.
COMPONENTS:
1. Resistors
2. Capacitors
3. Potentiometer
4. Transistors
1 No.
1 No.
1 No.
THEORY:
The RC Phase shift Oscillator consists of transistor amplifier and three
cascaded (series) RC sections. The output of the last RC combination being
returned to the base of the transistor. If the loading of the phase shift network on the
amplifier can be neglected. The amplifier introduces 180 0 Phase shift to the voltage
which appears on the base. The Three RC sections will give additional phase shift,
at some frequency the phase shift introduced by the RC network will be equal to
1800, at this frequency the total phase shift from the base around the circuit and
back to the base will be exactly zero. This particular frequency will be the one at
which the circuit will oscillates, provided the magnitude of amplification is sufficiently
large. The frequency of oscillation is given by
R1
RC
A
Q1 BC 547
R
R2
RE
CE
100uF
DESIGN:
K = 2.7 = Rc / R, find out the value of R.
C
1
2Rf 0 6 4 K
1K POT
PROCEDURE:
1. Connect the circuit as shown in the figure.
2. First check the amplifier section (i.e., find out the operating points)
3. Adjust the potentiometer such that oscillations are sustained. Monitor the
output waveform using CRO.
4. Measure the voltages at each RC section.
5. Measure the phase shift introduced by each section forming Lissajous
figures. Use the sine wave at reference voltage.
6. Measure the waveform frequency and compare it with theoretical value.
OBSERVATIONS
Designed Theoretical Frequency = 1 kHz
Practical Waveform Frequency = 800Hz
Phase Shift across Node A and B = 67.38
Phase Shift across Node B and C
= 64.15
Phase Shift across Node C and D
= 45.59
Over All Phase Shift (Practical) =177
Theoretical Phase Shift
=180
Theoretical Frequency Formula =1/2RC6
Conclusions:
We observed from the waveforms that theoretical and practical frequencies are
approximately equal and also observed that RC phase shift oscillator generates
audio frequencies (20Hz to 20 kHz).
RESULT: - The Theoretical and Practical Output Frequencies obtained.
QUESTIONS:
1. How the Barkhausen Criteria is satisfied in the RC phase-shift oscillator?
2. How do you vary the frequency of the RC phase-shift oscillator?
3. What is the maximum phase-shift that can be obtained by a single RC
section?
4. Under what conditions the amplifier behaves as an oscillator?
5. What is the frequency range that can be obtained by the RC phase shift
oscillator?
Experiment No: 13
1 No.
1 No.
1 No.
47K
10K
Potentiometer of 5K
0.01F
LM 741
2. Capacitors
3. Operational amplifier
2 Nos.
1 No.
1 No.
2 No.
1 No.
THEORY:
An oscillator, in which a balanced bridge is used as the feedback network is
known as Wien bridge oscillator, is shown below.
The active element is an operational amplifier which has a very large positive
voltage gain, If the bridge balance is desired, in order to get oscillation, then R 1and
R2 must be chosen so that , vi=0 ( R4 / (R3 + R4) = 1/3 or R3 = 2 R4.)
The frequency of oscillation (f0 = 1/2RC) is precisely the null frequency of the
balanced bridge continuous variation of frequency is accomplished by varying
simultaneously the two capacitors
+ VCC 15V
2
CIRCUIT DIAGRAM:
Output
- VEE 15V
R1
C1
R3
PROCEDURE:
1. Connect the circuit as shown in the figure below.
2. In place of capacitors connect DCB.
3. In place of R4 connect a potentiometer.
4. Connect CRO at the output terminal.
5. Vary the potentiometer until the oscillations are sustained.
6. Find the frequency of oscillations, and verify the observed output with
theoretical values.
7. repeat the above steps 5 and 6 for various values of C
Observations
S.No
Value of C
1
2
0.01F
0.1F
Value of
f0
f0
R
theoretic practica
al
l
47k
338.6Hz 300.3H
47k
33.86Hz
z
30Hz
=
=
QUESTIONS:
1.
2.
3.
4.
Experiment No: 14
Power supply
CRO
Digital multimeter.
Signal generator
0-30V
1 No.
1 No.
1 No.
1 No.
COMPONENTS:
220
1 No.
33K
8.2K
10K
10 F
BC 547
2. Capacitors
3. Transistors
1 No.
1 No.
1 No.
3Nos.
1No.
THEORY:
The FET common drain amplifier (source follower) and the BJT common
collector amplifier (emitter follower) are the examples of voltage series topology.
Voltage series feedback amplifier improves the characteristics of voltage
amplifier. i.e., Input resistance increases and output resistance decreases.
Rif = RI (1+A)
Rof = Ro / (1+A)
Af = A / (1+A)
FLF= FL / (1+A)
FHF = FH (1+A)
R1 33K
RS 220
PROCEDURE:
Signal
Generator
C2 10
C1 10F
Q1 BC547
CRO
R2 8.2K
RE 10K
Without feedback
- 3dB line
MODEL GRAPHS
-
Gain in dB
3dB line
With feedback
Frequency
TABULATION:
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Frequency
(Hz)
50
100
200
500
1k
2k
5k
10k
50k
70k
100k
200k
500k
700k
1MHz
Input
Voltage
Output
Voltage
Vi
V0
(mV)
(V)
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
Gain
V
AV 0
Vi
Gain in Decibels
(dB)
20 log 10 AV
With Feedback
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
-0.915
OBSERVATIONS:
Input voltage Vin = 40mV
Output voltage V0 = 36mV
Voltage gain (AV) = V0/ Vin = 0.9
Input current Ii
= VRs/RS = 5.1A
Input impedance (Zi) = VIN/ Ii = 7.8k
Output impedance (ZO)
= 130
Output current = I0 = VR0/R0 = 0.45/130 = 138.4A
Current gain (AI)
= I0/ Ii
= 138/5.1 = 27.05
bandwidth.
= very large
Experiment No: 15
1 No.
1 No.
1 No.
1 No.
COMPONENTS:
1. Resistors
220
1No.
2. Capacitors
3. Transistors
THEORY:
The common emitter transistor amplifier with a resistance in the emitter and
FET common source amplifier with a resistor in the source lead are examples of
current series topology. A current series feedback amplifier improves the
characteristics of transconducatnace amplifier, that is both input resistance and
output resistances are increased. This topology stabilizes the Trans conductance g m.
In current series feedback amplifier, as shown in figure, the feedback signal is
the voltage Vf across emitter resistor and sampled signal is the load current through
the collector resistor. Hence this is the case of current-series feedback. To remove
the feedback the emitter resistor must be removed or bypassed by a capacitor
CIRCUIT DIAGRAM:
VCC = 12V
R1
RC
RS 220 C1 10F
C2 = 10F
Q1 BC 547
DRB
Signal
Generator
40mV/1KHz
R2
RE
CE 100F
CRO
DESIGN:
Determine the values of R C, RE, R1, R2 for the network for the operating points
indicated
VCC = 12 V, ICQ = 5mA, VCEQ = 6V VBE = 0.6V.
VEN = VCC / 10=1.2V
RE = VEN / IE = VEN / IC (IE IC )= 240
RC = VRC / IC = (VCC VCEQ - VEN) / IC= 960
VBN = VBE + VE = 1.8V
R2 (1 / 10) RE = 5.76k
- 3dB line
-
3dB line
Gain in dB
Frequency
TABULATION:
S.No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Frequency
(Hz)
50
100
200
500
1k
2k
5k
10k
50k
70k
100k
200k
500k
700k
1MHz
Input
Voltage
Output
Voltage
Vi
V0
(mV)
(V)
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
0.96
0.96
0.96
0.96
0.96
0.96
0.96
0.96
0.96
0.96
0.96
0.96
0.96
0.96
0.94
Gain
V
AV 0
Vi
24
24
24
24
24
24
24
24
24
24
24
24
24
24
23.5
Gain in Decibels
(dB)
20 log 10 AV
With Feedback
27.6
27.6
27.6
27.6
27.6
27.6
27.6
27.6
27.6
27.6
27.6
27.6
27.6
27.6
27.42
OBSERVATIONS:
Input voltage Vin
= 40mV
Output voltage V0
= 0.96V
Voltage gain (AV)
= V0/ Vin = 24
Input current Ii
= VRs/RS = 6.42A
Input impedance (Zi) = Vin/ Ii = 6.22k
Output impedance (ZO)
= 700
Output current = I0 = VR0/R0 = 0.48/700 = 0.68mA
Current gain (AI)
= I0/ Ii
= 106.7
Power gain
= AV*AI = 2560.7
Bandwidth
= very large
CONCLUSION:
From the observation the observations by comparing with the CE amplifier, in current
series feedback amplifier input impedances increases and voltage gain deceases
due to negative feedback.
QUESTIONS:
1. What is meant by Feedback?
2. Distinguish between negative and positive feedback.
3. Distinguish between current and voltage feedback.
4. Discuss the effect of negative feedback on 1) gain 2) Input impedance3)
output impedance 4) distortion.
5. Discuss the effect of egative feedback on 1)gain 2) Input impedance3) output
impedance 4) distortion.
Experiment No:-16
COLPITTS OSCILLATOR
AIM: To design a Colpitts oscillator and study its performance.
APPARATUS:
1. Power supply
2. CRO
3. Digital multimeter.
(0-30V)
1 No.
1 No.
1 No.
COMPONENTS:
1. Resistors
2. Capacitors
3. Inductor
4. Transistors
COLPITTS OSCILLATOR
The RC phase shift and wein bridge oscillator are RC tunable oscillators. That
I, the frequency at oscillator is determined by the resistance and capacitance values
used. These oscillators are particularly suited to one range of frequencies from
several Hertz to several hundred Kilohertz and so include the range of audio
frequencies. At frequencies in the Megahertz range, these have no advantages over
circuits employing tuned LC networks.
CIRCUIT DIAGRAM:
VCC +12V
R1
RC
CC1 10uF
CC2 = 10uF
Q1 BC 547
R2
RE
C1
C2
L
Design
L = 1mH
C = C1 in series with C2, find out C
Hfe = > C2 / C1
Find out C1 and C2
Find out the values of frequency for different values of L values by using the formula
fo =
1
2
LC
PROCEDURE:
1. Connect the circuit as shown in the figure.
2. The output oscillations are to be observed by CRO.
3. Vary the values of C1 for sustained oscillations and compare these values with
theoretical values.
4. Now vary the L and note down the frequency of oscillations and compare
them with theoretical ones.
Value of C1
40pF
40pF
Value of C2
0.01F
0.01F
Value of L
2mH
3mH
fO theoritical
575.05kHz
469.52kHz
fO practical
416.6kHz
357kHz
OBSERV ATIONS:
C1 = 40Pf
C2 = 0.01F L = 2mH
= 416.6 kHz
1
2
LC
Conclusions:
This means that theoretical and practical frequencies are approximately equal. We
also observed that COLPITTS OSCILLATOR generates radio frequencies
RESULT: - Both theoretical and Practical frequencies of Colpitts Oscillator are
obtained for given set of capacitors.
QUESTIONS:
1. How the Barkhausen criterion is satisfied in Colpitts oscillator?
2. What is the feedback network in the oscillator?
3. What is the frequency range that can be obtained by the Colpitts oscillator?
4. What are applications of LC tuned oscillators?
HARTLEY OSCILLATOR
AIM: To design a Hartley oscillator and study its performance.
APPARATUS:
1. Power supply (0-30V)
2. CRO
3. Digital multimeter.
4. Bread Board
COMPONENTS:
1. Resistors
2. Capacitors
1 No.
1 No.
1 No.
1 No.
Resistors as per designed values
C as per designed values
10F
2 Nos.
100F
1 No.
L1 and L2 are as per designed value.
BC 547
1 No.
3. Inductor
4. Transistors
THEORY:
The Hartley oscillator uses the LC network as a feedback network. This
Hartley oscillator is formed by changing the capacitors in the Colpitts tank circuit to
inductors and by changing the tunable inductor to an adjustable capacitor. Both the
Colpitts and Hartley oscillator configuration requires an amplifier with inverting ( 180 0
phase shift) gain in order to sustain oscillations.
CIRCUIT DIAGRAM:
VCC +12V
R1
RC
C1 10uF
R2
L2
C2 = 10u
Q1 BC 547
CE 100uF
RE
L1
C
PROCEDURE:
1. Connect the circuit as shown in the figure.
2. The output oscillations are to be observed by CRO.
Value of L1
Value of L2 Value of C
fO theoritical
fO practical
Experiment No: 18
1 No.
1 No.
1 No.
1 No.
1. Resistors
220
1No.
Other resistors of designed values.
10 F
2Nos
100F
1No.
BC 547
1No.
2. Capacitors
3. Transistors
THEORY :
The output of one stage is coupled to the input of the next stage via a
Blocking capacitor, which is used to block the DC component of the out[put
voltage at output terminal from reaching the input of next stage. The emitter
resistor RE and resistor R1 and R2 are used to prevent the loss of amplification
due to negative feedback
RC
C2 = 10F
+
R1
VCC = 12V
C1 10F
-
RL
Signal
Generator
BC 547
RS 220
CIRCUIT DIAGRAM:
CRO
CE 100F
R2
RE
DESIGN:
Determine the values of RC, RE, R1, R2 for the network for the operating points
indicated
VCC = 12 V, ICQ = 5mA, VCEQ = 6V VBE = 0.6V.
VEN = VCC / 10=1.2V
RE = VEN / IE = VEN / IC (IE IC )= 240
RC = VRC / IC = (VCC VCEQ - VEN) / IC= 960
VBN = VBE + VE = 1.8V
R2 (1 / 10) RE = 5.76k
VBN = (R2 /(R1+R2)) VCC
R1 = 30k
PROCEDURE:
MODEL GRAPHS:
AV
Max
Gain in dBs
3dB point
Bandwidth
Frequency
TABULATION:
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Frequency
(Hz)
50
100
200
500
1k
2k
5k
10k
50k
70k
100k
200k
500k
700k
1MHz
Input
Voltage
Output
Voltage
Vi
V0
(mV)
(V)
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
1.2
1.8
2
2.4
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2
1.8
1.6
Gain
V
AV 0
Vi
30
45
50
60
65
65
65
65
65
65
65
65
50
45
40
Gain in Decibels
(dB)
20 log 10 AV
With Feedback
29.54
33.06
33.97
35.58
36.25
36.25
36.25
36.25
36.25
36.25
36.25
36.25
33.97
33.06
32.04
OBSERVATIONS:
Input voltage Vin = 40mV
Output voltage V0 = 2.6V
Voltage gain (AV) = V0/ Vin = 65
Input current Ii
= VRs/RS = 17.8A
Input impedance (Zi) = VIN/ Ii = 2.24k
Output impedance (ZO)
= 500
Output current = I0 = VR0/R0 = 1.3/500 = 2.6mA
= I0/ Ii
= 146
= 699.9 kHz
Conclusions:
Conclusions can be made on theoretical and practical values A V, AI, Zi Zo of CC
amplifier.
RESULT: - The Frequency response of single stage RC Coupled Amplifier is
obtained. Voltage gain and Bandwidth are obtained.
QUESTIONS:
1. What is the effect of transistor junction capacitances on frequency response
of an amplifier?
2. What are the functions of bypass capacitor and blocking capacitor?
Experiment No: 19
SCR CHARACTERISTICS
AIM: To draw the forward and reverse characteristics of SCR.
APPARATUS:
1. Power supply (dual channel)
2. Voltmeters
3. Ammeters
0-30V
0-30V
0-10mA
0-100mA
1 No.
2 Nos
1 No
1 No
Gate
IGT
TYN 604
Cathode
Anode
VF
Cathode
Anode
Gate
Forward break over voltage (VBO), is that voltage above which the SCR enters the
conduction region (on state).
Holding current(IH) , is that value of current below which the SCR switches from
the conduction state to the forward blocking region( off state).
Holding voltage (VH), is that voltage required to turn off the SCR.
SCR is used in relay control, motor control, phase control, heater control, battery
chargers, inverters, regulated power supplies and static switches.
CIRCUIT DIAGRAM:
1K
+
V1
0-100mA
V 0-30V
-
0-10mA
TYN 604
A +
1K
0-30V
0-500uA
+
V 0-30V
-
+
V1
TYN 604
PROCEDURE:
Forward characteristics:
Connect the circuit as shown below.
1.
Keep the gate voltage to Zero and increase the input voltage from zero to
2.
15, not down the corresponding ammeter readings I A and VA
Set the gate voltage to 10V and increase the anode voltage from 0 to say
3.
15Volts, and observe that at a particular anode voltage the anode current
shoots-off, resulting the anode voltage falls towards zero (SCR firing).
If it does not happened, repeat the above step till you observe the firing.
4.
Note down the value of IG at which the Firing happens.
5.
Now slightly increase (decrease) by 0.1V of gate voltage and note down
6.
the values of IA for different values of VA stating from zero to V BO and
beyond.
Plot the graph VA VS IA for different values of IG.
7.
Reverse Characteristics:
Connect the circuit as shown in the figure.
1.
Increase the anode voltage V1 from zero to 20V in steps of 1V.
2.
Note down the anode current IA for every step of VA.
3.
Plot the graph VA VS IA
4.
MODEL GRAPH
Forward characteristics
IA
VH
IG2> IG1>0
IG2
IG Large
IG1
IG = 0
IH
VA
VFBO
Reverse Characteristics
OBSERVATIONS:
Tabulation for Forward characteristics:
IG=5.68mA
IG=5.7mA
S.No
VA
IA
VA
1
0
0
0
2
2.5
0.1
2.5
3
5
0.2
5
4
7.5
0.4
7.5
5
10
0.8
10
6
27.5
1.0
20
7
0.75
20
0.75
8
0.75
25
0.75
IG=5.8mA
IA
0
0.2
0.4
0.6
1.0
1.6
18
20
VA
0
2.5
5
7.5
10
17.5
0.75
0.75
VA(V)
IA(A)
1
2
3
4
5
6
7
8
0
2
4
6
8
10
12
14
16
0
45
115
185
215
320
395
460
495
Conclusions:
IA
0
0.3
0.4
0.6
1.0
1.6
16
20
Lead Configuration
Anode
Cathode
Gate 1
Base 1
Gate 2
Source
JFET BFW-11
Offset Null
TYN 604
Cathode Anode
Base -2
Emitter
Gate
NC
INV I/P
+VCC
Non- INV-I/P
Output
Offset Null
-VEE
LENDI
institute
of Engineering, and technology
Silicon Controlled
Rectifier
OP-AMP LM 741
..Jonnada
94
TYN 604
Experiment No: 20
1 No.
1 No.
THEORY:-
(0,2,4)
4
3
3
(voltage applied to y-plates, frequency = f)
ex
0
1
2
3
(Voltage applied to
X-plates, frequency = f)
t
Fig 1.2 LISSAJOUS PATTERNS
When two equal voltages of equal frequency but with 90 0 or 2700 phase shift
displacement are applied to a CRO, the trace on the CRO is a circle. An ellipse is
formed if the two voltages are not equal and /or out of phase.
Major Axis.
y1
y2
X
x1
x2
Fig: 1.3 PHASE SHIFT MEASUREMENT
Major axis
Y2
Y1
X
X1
X2
Fig: 1.4 PHASE SHIFT MEASUREMENT
If the major axis of the ellipse lies in the first and third quadrants as in fig:
1, the phase angle is either between 0 0 and 900 or 2700 and 3600. When the major
axis of the ellipse lies in second and fourth quadrants as in Fig: 2, the phase angle is
either between 900 and 1800 or between 1800 and 2700.
Tabular Form:-
Waveform
Sine Waveform
Triangular Waveform
Square Waveform
Amplitude
Time period
Frequency