6 13 = 78

Multiplication:

Sequential Shift/Add-Method
Method to avoid adder arrays

Sequential addition from row to row:

0
0 1
+0 1 1
0 1 0 0

0
1
0
0
1
0
1

1
1
1
0
0

1 0
0 1
1 0
0

Sum:
00000110
00000110
00011110
01001110
Product

1 1 0

with each cycle,

1. partial product increases by one digit
2. multiplier is reduced by one digit
MSBs of partial product and multiplicand
are aligned in each cycle

Multiplicand

Bits:
4:4

shift register for partial product and multiplier

6 13 = 78

Example 1:

Product

Multiplier

Test = 1

4:4

5:3

ADD

Shift

6:2

6:2

7:1

7:1

8:0

Test = 0
Shift

NOADD

Test = 1

ADD

Shift

not the multiplicand is shifted

partial product and multiplier are

Test = 1

ADD

Shift

DONE!

219

220

15 13 = 195

Example 2:
1

Multiplicand

Carry

Product

Multiplier

Test = 1

ADD

Shift with carry

Test = 0 NOADD
Shift with carry

Test = 1

ADD

Shift with carry

Test = 1

ADD

Sequential Shift/Add-Method
1. Load multiplier into lower half of shift
register (the upper half is to be zeroed)
2. test LSB of the shift register
3. if LSB is set
then add multiplicand to the upper
half of the shift register
else add nothing (make sure carrybit is cleared!)
4. perform right shift including carry on full
shift register
5. repeat from 2. as long as multiplier part of
shift register is not empty
6. after termination, the shift register (both
halves!) contains the product

221

Signed Multiplication
Sign and magnitude representation:
Calculate unsigned product as
|p| = |x| |y|
p0(2n2) = x0(n2) y0(n2)
determine sign separately as
sgn(p) = sgn(x) sgn(y)

p2n1 = xn1 yn1

More difcult if 2s complement is used:
use 2s complement of negative multiplicand for summing up partial products
sign extension is needed

Shift with carry

DONE!

222

Easy to implement in software

223

224

(5) (+6) = (30)

Example:
Multiplicand:

Disadvantages:

Booth Algorithm

1. Sign-extension for negative multiplicands

not applicable for negative multipliers
2. long sequences of 1s in the multiplier
large number of summands

Unsigned
0 1 0 1
1s complement 1 0 1 0
2s complement 1 0 1 1

Based on the observation that



0
1
1
0

0
1
1
0

0
1
1
0

0
1
0
0

0
1
0
1
1
0

1
1
0
1
0
0

1
0
0
0
0
0

Multiplicand
Multiplier
0000 x1011
0010 x1011
0100 x1011
0000 x1011

1 1 1 1 1 0 0

(carry)

1 1 1 0 0 0 1 0

Product

26
0
+1

25
1
0

24
1
0

23
1
1

22
0
0

25 + 24 + 23 = 32 + 16 + 8
= 56
26 23 = 64 8
= 56

228

in case of a negative multiplier, negate both

operands by applying the 2s complement
Solution for problem 2.:

Booth Recoding

Consider the example of encoding 56:

21
0
0

20
0
0

Generate sequence of 1s in bits j to k by subtraction of two operands with single 1 each:

1000 (8)
0001 (1)
0111 (7)

1. Parse multiplier from left to right

(i = n1 0)
2. for each change from 0 to 1 or vice versa,
encode 1:
if bit i is 0 and bit i1 is 1
recode to +1
if bit i is 1 and bit i1 is 0
recode to 1
3. for bit 0, assume bit i = 1 with value 0
During the multiplication:
the multiplicand is added for +1 digits
the 2s complement is added for 1 digits

229

01000000 (64)
00001000 (8)
00111000 (56)

This method works equally well for both unsigned and 2s complement representations

226

Booth Recoding

27
0
0

Solution for problem 1.:

analyze groups of 1s in the multiplier and

replace them by a shorter and more efcient representation (Booth algorithm)

225

1
0
0
0
1
0

227

Booth Algorithm and Bit Pairing

The Booth technique has its major advantage if
1. the operands have a large number of bits
2. multiplier contains long sequences of 1s
it has its limitations if
the multiplier contains only small groups
of 1s or even alternating 01 pairs
It can be enhanced by bit-pairing,
50% maximum number of summands
handling 01 pairs efciently
additional overhead for multiplicand

230

1
1

0
2

1
1

1
1

0
0

231

0
0

0
2

0
2

1
1

1
1

0
0

1
1

0
1
1
0
0
0

1

For the sequential shift/add hardware, bitpairing reduces the summation effort substantially, with or without Booth recoding

1
0
0
0
1
1

0
232

Good multiplier:
0
0
0
0

1
1
1

Ordinary multiplier:
1
1
0
0

0
2

. . . wont help if multiplier is optimal after

conventional Booth recoding

1
1

3. End of a 1s-sequence:

Bit-pairing can reduce the number of summands further

0
0

0
+2

Worst-case multiplier:
0
1
0
1
0

+1

Bit-Pair Booth Recoding Examples

2. Begin of a 1s-sequence:

Worst case: May double the number of

non-zero summands

1
1

0
1

1
1

1 +1
1

Booth algorithm can reduce number of nonzero summands considerably

0 1
1

Conclusions for Booth Algorithm

0
0

+1 1
+1

1
1

0
0

1
0

1
1

1. Within a sequence:

0 +1
+1

Apply Booth recoding on the multiplier rst,

then pair bits

1
1

Bit-Pairing of Booth Recoding

233