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6igure A-( /&A,M;lo!al S)ste% Interrupts
The other interrupt model is the standard AT st(le mentioned a0ove which uses %!A %3Gs attached to a
master slave pair of 82*6 '%Cs. The s(stem vectors correspond to the %!A %3Gs. The %!A %3Gs and their
mappings to the 82*6 pair are part of the AT standard and are well defined. This mapping is depicted in
5igure *&".
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6.2.13 Smart Battery Table (SBST)
%f the platform supports 0atteries as defined 0( the !mart ;atter( !pecification 4. or 4.4, then an !mart
;atter( Ta0le =!;!T> is present. This ta0le indicates the energ( level trip points that the platform re:uires
for placing the s(stem into the specified sleeping state and the suggested energ( levels for warning the user
to transition the platform into a sleeping state. Notice that while !mart ;atteries can report either in current
=mAFmAh> or in energ( =mWFmWh>, 2!'M must set them to operate in energ( =mWFmWh> mode so that
the energ( levels specified in the !;!T can 0e used. 2!'M uses these ta0les with the capa0ilities of the
0atteries to determine the different trip points. 5or more precise definitions of these levels, see section
3.6.3, J;atter( $as $auge.L
Ta!le A-#& S%art <atter) 5escription Ta!le >S<ST? 6or%at
6ield
<)te
Length
<)te
3ffset 5escription
@eader
!ignature " O!;!T.M !ignature for the !mart ;atter( -escription Ta0le.
1ength " " 1ength, in 0(tes, of the entire !;!T
3evision 4 8 4
Checksum 4 6 .ntire ta0le must sum to Hero.
2.M%- + 4 2.M %-
2.M Ta0le %- 8 4+ 5or the !;!T, the ta0le %- is the manufacturer model %-.
2.M 3evision " 2" 2.M revision of !;!T for supplied 2.M Ta0le %-.
Creator %- " 28 Dendor %- of utilit( that created the ta0le. 5or ta0les containing
-efinition ;locks, this is the %- for the A!1 Compiler.
Creator 3evision " 32 3evision of utilit( that created the ta0le. 5or ta0les containing
-efinition ;locks, this is the revision for the A!1 Compiler.
Warning .nerg(
1evel
" 3+ 2.M suggested energ( level in milliWatt&hours =mWh> at which
2!'M warns the user.
1ow .nerg( 1evel " " 2.M suggested platform energ( level in mWh at which 2!'M
will transition the s(stem to a sleeping state.
Critical .nerg(
1evel
" "" 2.M suggested platform energ( level in mWh at which 2!'M
performs an emergenc( shutdown.
6.2.14 Embedded Controller Boot Resources Table (ECDT)
This optional ta0le provides the processor&relative, translated resources of an .m0edded Controller. The
presence of this ta0le allows 2!'M to provide .m0edded Controller operation region space access 0efore
the namespace has 0een evaluated. %f this ta0le is not provided, the .m0edded Controller region space will
not 0e availa0le until the .m0edded Controller device in the AM1 namespace has 0een discovered and
enumerated. The availa0ilit( of the region space can 0e detected 0( providing a C3.$ method o0#ect
underneath the .m0edded Controller device.
Ta!le A-## 1%!edded Controller <oot "esources Ta!le 6or%at
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248 Advanced Configuration and 'ower %nterface !pecification
6ield <)te
Length
<)te
3ffset 5escription
@eader
!ignature " O.C-T.M !ignature for the .m0edded Controller Ta0le.
1ength " " 1ength, in 0(tes, of the entire .m0edded Controller Ta0le
3evision 4 8 4
Checksum 4 6 .ntire ta0le must sum to Hero.
2.M%- + 4 2.M %-
2.M Ta0le %- 8 4+ 5or the .m0edded Controller Ta0le, the ta0le %- is the
manufacturer model %-.
2.M 3evision " 2" 2.M revision of .m0edded Controller Ta0le for supplied 2.M
Ta0le %-.
Creator %- " 28 Dendor %- of utilit( that created the ta0le. 5or ta0les containing
-efinition ;locks, this is the %- for the A!1 Compiler.
Creator 3evision " 32 3evision of utilit( that created the ta0le. 5or ta0les containing
-efinition ;locks, this is the revision for the A!1 Compiler.
.CCC2NT321 42 3+ Contains the processor relative address, represented in $eneric
Address !tructure format, of the .m0edded Controller
CommandF!tatus register.
0ote< 2nl( !(stem %F2 space and !(stem Memor( space are
valid for values for AddressC!paceC%-.
.CC-ATA 42 "8 Contains the processor&relative address, represented in $eneric
Address !tructure format, of the .m0edded Controller -ata
register.
0ote< 2nl( !(stem %F2 space and !(stem Memor( space are
valid for values for AddressC!paceC%-.
,%- " + ,ni:ue %-I!ame as the value returned 0( the C,%- under the
device in the namespace that represents this em0edded
controller.
$'.C;%T 4 +" The 0it assignment of the !C% interrupt within the $'./C!T!
register of a $'. 0lock descri0ed in the 5A-T that the
em0edded controller triggers.
.CC%- Daria0le +* A!C%%, null terminated, string that contains a full( :ualified
reference to the name space o0#ect that is this em0edded
controller device =for e/ample, JBBC!;.'C%.%!A..CL>. Guotes
are omitted in the data field.
AC'% 2!'M implementations supporting .m0edded Controller devices must also support the .C-T. AC'%
4. 2!'M implementation will not recogniHe or make use of the .C-T. The following e/ample code
shows how to detect whether the .m0edded Controller operation regions are availa0le in a manner that is
0ackward compati0le with prior versions of AC'%F2!'M.
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Device(%)()
!ame(R%:)$0ne2)
;ethod(_R%:$3)
#f(6e8ual(&r,($ F))
Store(&r,4$ R%:))
/
/
/
;ethod(%)&@$()
#f(6e8ual(R%:)$0ne2))
#f(6,reater%8ual(_R%@$3))
Return(0ne)
/
%l2e
Return(7ero)
/
Return(R%:))
/
/
To detect the availa0ilit( of the region, call the .CAD method. 5or e/ample<
#f (\_SB.P)#(.%)(.%)&@())
...re,ion2 are available...
/
el2e
...re,ion2 are not available...
/
6.2.15 System Resource Afnity Table (SRAT)
This optional ta0le provides information that allows 2!'M to associate processors and memor( ranges,
including ranges of memor( provided 0( hot&added memor( devices, with s(stem localities F pro/imit(
domains. 2n N,MA platforms, !3AT information ena0les 2!'M to optimall( configure the operating
s(stem during a point in 2! initialiHation when evaluation of o0#ects in the AC'% Namespace is not (et
possi0le. 2!'M evaluates the !3AT onl( during 2! initialiHation.
Ta!le A-#( Static "esource Affinit) Ta!le 6or%at
6ield <)te
Length
<)te
3ffset
5escription
@eader
!ignature " O!3ATM. !ignature for the !(stem 3esource Affinit( Ta0le.
1ength " " 1ength, in 0(tes, of the entire !3AT. The length implies the
num0er of .ntr( fields at the end of the ta0le
3evision 4 8 2
Checksum 4 6 .ntire ta0le must sum to Hero.
2.M%- + 4 2.M %-.
2.M Ta0le %- 8 4+ 5or the !(stem 3esource Affinit( Ta0le, the ta0le %- is the
manufacturer model %-.
2.M 3evision " 2" 2.M revision of !(stem 3esource Affinit( Ta0le for supplied
2.M Ta0le %-.
Creator %- " 28 Dendor %- of utilit( that created the ta0le.
Creator 3evision " 32 3evision of utilit( that created the ta0le.
3eserved " 3+ 3eserved to 0e 4 for 0ackward compati0ilit(
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6ield <)te
Length
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5escription
3eserved 8 " 3eserved
!tatic 3esource
Allocation
!tructureVnW
&&& "8 A list of static resource allocation structures for the platform. !ee
section *.2.4*.4,L'rocessor 1ocal A'%CF!A'%C Affinit(
!tructureL and section *.2.4*.2 Memor( Affinit( !tructureL.
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6.2.15.1
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Processor Local APIC/SAPIC Afnity Structure
The 'rocessor 1ocal A'%CF!A'%C Affinit( structure provides the association 0etween the A'%C %- or
!A'%C %-F.%- of a processor and the pro/imit( domain to which the processor 0elongs. Ta0le *&3*
provides the details of the 'rocessor 1ocal A'%CF!A'%C Affinit( structure.
Ta!le A-#A Processor Local APIC@SAPIC Affinit) Structure
6ield <)te
Length
<)te
3ffset
5escription
T(pe 4 'rocessor 1ocal A'%CF!A'%C Affinit( !tructure
1ength 4 4 4+
'ro/imit( -omain
V9<W
4 2 ;itV9<W of the pro/imit( domain to which the processor 0elongs.
A'%C %- 4 3 The processor local A'%C %-.
5lags " " 5lags I 'rocessor 1ocal A'%CF!A'%C Affinit( !tructure. !ee
Ta0le *&3+ for a description of this field.
1ocal !A'%C .%- 4 8 The processor local !A'%C .%-.
'ro/imit( -omain
V34<8W
3 6 ;itV34<8W of the pro/imit( domain to which the processor 0elongs.
3eserved " 42 3eserved
Ta!le A-#- 6lags M Processor Local APIC@SAPIC Affinit) Structure
6ield <it
Length
<it
3ffset
5escription
.na0led 4 %f clear, the 2!'M ignores the contents of the 'rocessor 1ocal
A'%CF!A'%C Affinit( !tructure. This allows s(stem firmware to
populate the !3AT with a static num0er of structures 0ut onl(
ena0le them as necessar(.
3eserved 34 4 Must 0e Hero.
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6.2.15.2
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Memory Afnity Structure
The Memor( Affinit( structure provides the following topolog( information staticall( to the operating
s(stem<
The association 0etween a range of memor( and the pro/imit( domain to which it 0elongs
%nformation a0out whether the range of memor( can 0e hot&plugged.
Ta0le *&39 provides the details of the Memor( Affinit( structure.
Ta!le A-#. Me%or) Affinit) Structure
6ield <)te
Length
<)te
3ffset
5escription
T(pe 4 4 Memor( Affinit( !tructure
1ength 4 4 "
'ro/imit( -omain " 2 %nteger that represents the pro/imit( domain to which the
processor 0elongs
3eserved 2 + 3eserved
;ase Address 1ow " 8 1ow 32 ;its of the ;ase Address of the memor( range
;ase Address @igh " 42 @igh 32 ;its of the ;ase Address of the memor( range
1ength 1ow " 4+ 1ow 32 ;its of the length of the memor( range.
1ength @igh " 2 @igh 32 ;its of the length of the memor( range.
3eserved " 2" 3eserved.
5lags " 28 5lags I Memor( Affinit( !tructure. %ndicates whether the region
of memor( is ena0led and can 0e hot plugged. -etails in !ee
Ta0le *&38.
3eserved 8 32 3eserved.
Ta!le A-#/ 6lags M Me%or) Affinit) Structure
6ield <it
Length
<it
3ffset
5escription
.na0led 4 %f clear, the 2!'M ignores the contents of the Memor( Affinit(
!tructure. This allows s(stem firmware to populate the !3AT with
a static num0er of structures 0ut onl( ena0le then as necessar(.
@ot 'lugga0le
*
4 4 The information conve(ed 0( this 0it depends on the value of the
.na0led 0it.
%f the .na0led 0it is set and the @ot 'lugga0le 0it is also set. The
s(stem hardware supports hot&add and hot&remove of this memor(
region
%f the .na0led 0it is set and the @ot 'lugga0le 0it is clear, the
s(stem hardware does not support hot&add or hot&remove of this
memor( region.
%f the .na0led 0it is clear, the 2!'M will ignore the contents of
the Memor( Affinit( !tructure
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6ield <it
Length
<it
3ffset
5escription
NonDolatile 4 2 %f set, the memor( region represents Non&Dolatile memor(
3eserved 26 3 Must 0e Hero.
6.2.16 System Locality Distance Information Table (SLIT)
This optional ta0le provides a matri/ that descri0es the relative distance =memor( latenc(> 0etween all
!(stem 1ocalities, which are also referred to as 'ro/imit( -omains. !(stems emplo(ing a Non ,niform
Memor( Access =N,MA> architecture contain collections of hardware resources including for e/ample,
processors, memor(, and %F2 0uses, that comprise what is known as a JN,MA nodeL. 'rocessor accesses
to memor( or %F2 resources within the local N,MA node is generall( faster than processor accesses to
memor( or %F2 resources outside of the local N,MA node.
The value of each .ntr(Vi,:W in the !1%T ta0le, where i represents a row of a matri/ and : represents a
column of a matri/, indicates the relative distances from !(stem 1ocalit( F 'ro/imit( -omain i to ever(
other !(stem 1ocalit( : in the s(stem =including itself>.
The i,: row and column values correlate to the value returned 0( the C'AM o0#ect in the AC'% namespace.
!ee section +.2.42, JC'AM ='ro/imit(>L for more information.
The entr( value is a one&0(te unsigned integer. The relative distance from !(stem 1ocalit( i to !(stem
1ocalit( : is the iD; E : entr( in the matri/, where N is the num0er of !(stem 1ocalities. ./cept for the
relative distance from a !(stem 1ocalit( to itself, each relative distance is stored twice in the matri/. This
provides the capa0ilit( to descri0e the scenario where the relative distances for the two directions 0etween
!(stem 1ocalities is different.
The diagonal elements of the matri/, the relative distances from a !(stem 1ocalit( to itself are normaliHed
to a value of 4. The relative distances for the non&diagonal elements are scaled to 0e relative to 4. 5or
e/ample, if the relative distance from !(stem 1ocalit( i to !(stem 1ocalit( : is 2.", a value of 2" is stored
in ta0le entr( iD;E : and in :D;E i, where N is the num0er of !(stem 1ocalities.
%f one localit( is unreacha0le from another, a value of 2** =/55> is stored in that ta0le entr(. -istance
values of &6 are reserved and have no meaning.
Ta!le A-#, SLIT 6or%at
6ield <)te
Length
<)te
3ffset
5escription
@eader
!ignature " O!1%TM. !ignature for the !(stem 1ocalit( -istance
%nformation Ta0le.
1ength " " 1ength, in 0(tes, of the entire !(stem 1ocalit( -istance
%nformation Ta0le.
3evision 4 8 4
Checksum 4 6 .ntire ta0le must sum to Hero.
2.M%- + 4 2.M %-.
2.M Ta0le %- 8 4+ 5or the !(stem 1ocalit( %nformation Ta0le, the ta0le %- is the
manufacturer model %-.
*
2n /8+&0ased platforms, the 2!'M uses the @ot 'lugga0le 0it to determine whether it should shift into
'A. mode to allow for insertion of hot&plug memor( with ph(sical addresses over " $;.
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6ield <)te
Length
<)te
3ffset
5escription
2.M 3evision " 2" 2.M revision of !(stem 1ocalit( %nformation Ta0le for
supplied 2.M Ta0le %-.
Creator %- " 28 Dendor %- of utilit( that created the ta0le. 5or the -!-T,
3!-T, !!-T, and '!-T ta0les, this is the %- for the A!1
Compiler.
Creator 3evision " 32 3evision of utilit( that created the ta0le. 5or the -!-T,
3!-T, !!-T, and '!-T ta0les, this is the revision for the
A!1 Compiler.
Num0er of !(stem
1ocalities
8 3+ %ndicates the num0er of !(stem 1ocalities in the s(stem.
.ntr(VWVW 4 "" Matri/ entr( =,>, contains a value of 4.
N
.ntr(VWVNum0er of
!(stem 1ocalities&4W
4 Matri/ entr( =, Num0er of !(stem 1ocalities&4>
.ntr(V4WVW 4 Matri/ entr( =4,>
NN NN
.ntr(VNum0er of
!(stem 1ocalities&4W
VNum0er of !(stem
1ocalities&4W
4 Matri/ entr( =Num0er of !(stem 1ocalities&4, Num0er of
!(stem 1ocalities&4>, contains a value of 4
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6.3 ACPI Namespace
5or all -efinition ;locks, the s(stem maintains a single hierarchical namespace that it uses to refer to
o0#ects. All -efinition ;locks load into the same namespace. Although this allows one -efinition ;lock to
reference o0#ects and data from another =thus ena0ling interaction>, it also means that 2.Ms must take care
to avoid an( naming collisions
+
. 2nl( an unload operation of a -efinition ;lock can remove names from
the namespace, so a name collision in an attempt to load a -efinition ;lock is considered fatal. The
contents of the namespace changes onl( on a load or unload operation.
The namespace is hierarchical in nature, with each name allowing a collection of names J0elowL it. The
following naming conventions appl( to all names<
All names are a fi/ed 32 0its.
The first 0(te of a name is inclusive of< OAMIO?M, OCM, =/"4I/*A, /*5>.
The remaining three 0(tes of a name are inclusive of< OAMIO?M, OMIO6M, OCM, =/"4I/*A, /3I
/36, /*5>.
;( convention, when an A!1 compiler pads a name shorter than " characters, it is done so with
trailing underscores =OCM>. !ee the language definition for AM1 Name!eg in !ection 4+, JAC'%
!ource 1anguage 3eference.L
Names 0eginning with OCM are reserved 0( this specification. -efinition ;locks can onl( use names
0eginning with OCM as defined 0( this specification.
A name proceeded with OBM causes the name to refer to the root of the namespace =OBM is not part of
the 32&0it fi/ed&length name>.
A name proceeded with O^M causes the name to refer to the parent of the current namespace =O^M is
not part of the 32&0it fi/ed&length name>.
./cept for names preceded with a OBM, the current namespace determines where in the namespace hierarch(
a name 0eing created goes and where a name 0eing referenced is found. A name is located 0( finding the
matching name in the current namespace, and then in the parent namespace. %f the parent namespace does
not contain the name, the search continues recursivel( upwards until either the name is found or the
namespace does not have a parent =the root of the namespace>. This indicates that the name is not found
9
.
An attempt to access names in the parent of the root will result in the name not 0eing found.
There are two t(pes of namespace paths< an a0solute namespace path =that is, one that starts with a OBM
prefi/>, and a relative namespace path =that is, one that is relative to the current namespace>. The
namespace search rules discussed a0ove, onl( appl( to single Name!eg paths, which is a relative
namespace path. 5or those relative name paths that contain multiple Name!egs or 'arent 'refi/es, O^M, the
search rules do not appl(. %f the search rules do not appl( to a relative namespace path, the namespace
o0#ect is looked up relative to the current namespace. 5or e/ample<
ABCD FFsearch rules appl(
^ABCD FFsearch rules do not appl(
XYZ.ABCD FFsearch rules do not appl(
\XYZ.ABCD FFsearch rules do not appl(
+
5or the most part, since the name space is hierarchical, t(picall( the 0ulk of a d(namic definition file will
load into a different part of the hierarch(. The root of the name space and certain locations where
interaction is 0eing designed are the areas in which e/tra care must 0e taken.
9
,nless the operation 0eing performed is e/plicitl( prepared for failure in name resolution, this is
considered an error and ma( cause the s(stem to stop working.
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228 Advanced Configuration and 'ower %nterface !pecification
All name references use a 32&0it fi/ed&length name or use a Name ./tension prefi/ to concatenate multiple
32&0it fi/ed&length name components together. This is useful for referring to the name of an o0#ect, such as
a control method, that is not in the scope of the current namespace.
The figure 0elow shows a sample of the AC'% namespace after a -ifferentiated -efinition ;lock has 0een
loaded.
P
$
d
d
Root
G%PR
CP*1
GPI'1
%STA
%O&
%O..
G%SB
PCI1
%7I'
%CRS
I'$1
%A'R
%PR1
G%5P$
%-1!
%$1"
%-1(
H Processor Tree
H Processor 1 o0Iect
H Power resource for I'$1
H Method to return status of power resourse
H Method to turn on power resourse
H Method to turn off power resourse
H S,stem 0us tree
H PCI 0us
H 'e9ice I'
H Current resources )PCI 0us num0er+
H I'$1 de9ice
H PCI de9ice 83 function 8
H Power resource reJuirements for '1
H 5eneral purpose e9ents )5P%STS+
H Method to handle le9el 5P%STS4!
H Method to handle edge 5P%STS4"
H Method to handle le9el 5P%STS4(
P
$
d
Pac:age
Processor O0Iect
Power Resource
O0Iect
Bus/'e9ice O0Iect
'ata O0Iect
Control Method )AM- code+
#e,
6igure A-A 1xa%ple ACPI 0a%eSpace
Care must 0e taken when accessing namespace o0#ects using a relative single segment name 0ecause of the
namespace search rules. An attempt to access a relative o0#ect recurses toward the root until the o0#ect is
found or the root is encountered. This can cause unintentional results. 5or e/ample, using the namespace
descri0ed in 5igure *.*, attempting to access a CC3! named o0#ect from within the BC!;C.'C%.%-. will
have different results depending on if an a0solute or relative path name is used. %f an a0solute pathname is
specified =BC!;C.'C%.%-..CC3!> an error will result since the o0#ect does not e/ist. Access using a
single segment name =CC3!> will actuall( access the BC!;C.'C%.CC3! o0#ect. Notice that the access will
occur successfull( with no errors.
6.3.1 Predefned Root Namespaces
The following namespaces are defined under the namespace root.
Ta!le A-($ 0a%espaces 5efined 2nder the 0a%espace "oot
0a%e 5escription
GD;P1 $eneral events in $'. register 0lock.
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0a%e 5escription
GDP" AC'% 4. 'rocessor Namespace. AC'% 4. re:uires all 'rocessor o0#ects to 0e defined
under this namespace. AC'% allows 'rocessor o0#ect definitions under the BC!;
namespace. 'latforms ma( maintain the BC'3 namespace for compati0ilit( with AC'% 4.
operating s(stems. An AC'%&compati0le namespace ma( define 'rocessor o0#ects in either
the BC!; or BC'3 scope 0ut not 0oth.
5or more information a0out defining 'rocessor o0#ects, see section 8, J'rocessor 'ower
and 'erformance !tate Configuration and Control.L
GDS< All -eviceF;us 20#ects are defined under this namespace.
GDSI !(stem indicator o0#ects are defined under this namespace. 5or more information a0out
defining s(stem indicators, see section 6.4, BC!4 !(stem %ndicators.L
GDTI AC'% 4. Thermal ?one namespace. AC'% 4. re:uires all Thermal ?one o0#ects to 0e
defined under this namespace. Thermal ?one o0#ect definitions ma( now 0e defined under
the BC!; namespace. AC'%&compati0le s(stems ma( maintain the BCT? namespace for
compati0ilit( with AC'% 4. operating s(stems. An AC'%&compati0le namespace ma(
define Thermal ?one o0#ects in either the BC!; or BCT? scope 0ut not 0oth.
5or more information a0out defining Thermal ?one o0#ects, see section 44, JThermal
Management.L
6.3.2 Objects
All o0#ects, e/cept locals, have a glo0al scope. 1ocal data o0#ects have a per&invocation scope and lifetime
and are used to process the current invocation from 0eginning to end.
The contents of o0#ects var( greatl(. Nevertheless, most o0#ects refer to data varia0les of an( supported
data t(pe, a control method, or s(stem software&provided functions.
6.4 Defnition Block Encoding
This section specifies the encoding used in a -efinition ;lock to define names =load time onl(>, o0#ects,
and packages. The -efinition ;lock is encoded as a stream from 0eginning to end. The lead 0(te in the
stream comes from the AM1 encoding ta0les shown in section 49, JAC'% !ource 1anguage =A!1>
3eference,L and signifies how to interpret some num0er of following 0(tes, where each following 0(te can
in turn signif( how to interpret some num0er of following 0(tes. 5or a full specification of the AM1
encoding, see section 49, JAC'% !ource 1anguage =A!1> 3eference.L
Within the stream there are two levels of data 0eing defined. 2ne is the packaging and o0#ect declarations
=load time>, and the other is an o0#ect reference =package contentsFrun&time>.
All encodings are such that the lead 0(te of an encoding signifies the t(pe of declaration or reference 0eing
made. The t(pe either has an implicit or e/plicit length in the stream. All e/plicit length declarations take
the form shown 0elow, where P3g,engt1 is the length of the inclusive length of the data for the operation.
+ea"Byte P/g+ength data444 +ea"Byte ...
Pkg#ength
6igure A-- AML 1ncoding
.ncodings of implicit length o0#ects either have fi/ed length encodings or allow for nested encodings that,
at some point, either result in an e/plicit or implicit fi/ed length.
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23 Advanced Configuration and 'ower %nterface !pecification
The P3g,engt1 is encoded as a series of 4 to " 0(tes in the stream with the most significant two 0its of 0(te
Hero, indicating how man( following 0(tes are in the P3g,engt1 encoding. The ne/t two 0its are onl( used
in one&0(te encodings, which allows for one&0(te encodings on a length up to /35. 1onger encodings,
which do not use these two 0its, have a ma/imum length of the following< two&0(te encodings of /555,
three&0(te encodings of /55555, and four&0(te length encodings of /555555555.
%t is fatal for a package length to not fall on a logical 0oundar(. 5or e/ample, if a package is contained in
another package, then 0( definition its length must 0e contained within the outer package, and similarl( for
a datum of implicit length.
At some point, the s(stem software decides to JloadL a -efinition ;lock. 1oading is accomplished when
the s(stem makes a pass over the data and populates the AC'% namespace and initialiHes o0#ects
accordingl(. The namespace for which population occurs is either from the c'rrent namespace location, as
defined 0( all nested packages or from the root if the name is preceded with OBM.
The first o0#ect present in a -efinition ;lock must 0e a named control method. This is the -efinition
;lockMs initialiHation control.
'ackages are o0#ects that contain an ordered reference to one or more o0#ects. A package can also 0e
considered a verte/ of an arra(, and an( o0#ect contained within a package can 0e another package. This
permits multidimensional arra(s of fi/ed or d(namic depths and vertices.
,nnamed o0#ects are used to populate the contents of named o0#ects. ,nnamed o0#ects cannot 0e created in
the Jroot.L ,nnamed o0#ects can 0e used as arguments in control methods.
Control method e/ecution ma( generate errors when creating o0#ects. This can occur if a Method that
creates named o0#ects 0locks and is reentered while 0locked. This will happen 0ecause all named o0#ects
have an a0solute path. This is true even if the o0#ect name specified is relative. 5or e/ample, the following
A!1 code segments are functionall( identical.
=4>
;ethod (D%&D$)
Scope (\_SB_.500)
!ame (B&R$) // Run time definition
/
/
=2>
Scope (\_SB_)
!ame (\_SB_. 500.B&R$) // 6oad time definition
/
Notice that in the a0ove e/ample the e/ecution of the -.A- method will alwa(s fail 0ecause the o0#ect
BC!;C.522.;A3 is created at load time.
6.5 Using the ACPI Control Method Source Language
2.Ms and ;%2! vendors write definition 0locks using the AC'% Control Method !ource language =A!1>
and use a translator to produce the 0(te stream encoding descri0ed in section *.", J-efinition ;lock
.ncodingL. 5or e/ample, the A!1 statements that produce the e/ample 0(te stream shown in that earlier
section are shown in the following A!1 e/ample. 5or a full specification of the A!1 statements, see section
49, JAC'% !ource 1anguage =A!1> 3eference.L
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// &S6 %-ample
DefinitionBloc+ (
Pforboo+.amlP$ // 0utput 5ilename
PDSD<P$ // Si,nature
(-(3$ // DSD< )ompliance Revi2ion
P0%;P$ // 0%;#D
Pforboo+P$ // <&B6% #D
(-4((( // 0%; Revi2ion
)
// 2tart of definition bloc+
0perationRe,ion(\:#0$ S12tem#0$ (-43G$ (-4)
5ield(\:#0$ B1te&cc$ !o6oc+$ Pre2erve)
)<(4$ 4$
/
Scope(\_SB) // 2tart of 2cope
Device(P)#() // 2tart of device
PowerRe2ource(5%<($ ($ () // 2tart of pwr
;ethod (_0!)
Store (0ne2$ )<(4) // a22ert power
Sleep (F() // wait F(m2
/
;ethod (_055)
Store (7ero$ )<(4) // a22ert re2etQ
/
;ethod (_S<&)
Return ()<(4)
/
/ // end of power
/ // end of device
/ // end of 2cope
/ // end of definition bloc+
6.5.1 ASL Statements
A!1 is principall( a declarative language. A!1 statements declare o0#ects. .ach o0#ect has three parts, two
of which can 0e null<
0b9ect >L 0b9ect<1pe 5i-ed6i2t @ariable6i2t
&ixed,ist refers to a list of known length that supplies data that all instances of a given =b:ectType must
have. %t is written as =a, 0, c,>, where the num0er of arguments depends on the specific 20#ectT(pe, and
some elements can 0e nested o0#ects, that is =a, 0, =:, r, s, t>, d>. Arguments to a &ixed,ist can have default
values, in which case the( can 0e skipped. !ome 20#ectT(pes can have a null &ixed,ist.
Aariable,ist refers to a list, not of predetermined length, of child o0#ects that help define the parent. %t is
written as _/, (, H, aa, 00, cc`, where an( argument can 0e a nested o0#ect. 20#ectT(pe determines what
terms are legal elements of the Aariable,ist. !ome 20#ectT(pes can have a null varia0le list.
5or a detailed specification of the A!1 language, see section 49, JAC'% !ource 1anguage =A!1>
3eference.L 5or a detailed specification of the AC'% Control Method Machine 1anguage =AM1>, upon
which the output of the A!1 translator is 0ased, see section 48, JAC'% Machine 1anguage =AM1>
!pecification.L
6.5.2 Control Method Execution
The operating software will initiate well&defined control methods as necessar( to either interrogate or
ad#ust s(stem&level hardware state. This is called an invocation.
A control method can use other internal, or well defined, control methods to accomplish the task at hand,
which can include defined control methods provided 0( the operating software. %nterpretation of a Control
Method is not preemptive, 0ut it can 0lock. When a control method does 0lock, the operating software can
initiate or continue the e/ecution of a different control method. A control method can onl( assume that
access to glo0al o0#ects is e/clusive for an( period the control method does not 0lock.
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$lo0al o0#ects are those Name!pace o0#ects created at ta0le load time.
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6.5.2.1
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Access to Objects and Operation Regions
Control Methods can reference an( o0#ects an(where in the Namespace as well as address spaces defined
in operation regions. Control methods must have e/clusive access to the an( address accessed via
2p3egions. Control methods do not directl( access an( other hardware registers, including the AC'%&
defined register 0locks. !ome of the AC'% registers, in the defined AC'% registers 0locks, are maintained on
0ehalf of control method e/ecution. 5or e/ample, the $'./C;1E is not directl( accessed 0( a control
method 0ut is used to provide an e/tensi0le interrupt handling model for control method invocation.
0oteH Accessing an 2p3egion ma( 0lock, even if the 2p3egion is not protected 0( a mute/. 5or e/ample,
0ecause of the slow nature of the em0edded controller, an em0edded controller 2p3egion field access ma(
0lock.
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6.5.2.2
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6.5.2.2
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Arguments
,p to seven arguments can 0e passed to a control method. .ach argument is an o0#ect which in turn could
0e a JpackageL st(le o0#ect that refers to other o0#ects. Access to the argument o0#ects is provided via the
A!1 ArgTer% =Arg+) language elements. The num0er of arguments passed to an( control method is fi/ed
and is defined when the control method package is created.
Method arguments can take one of the following forms<
4> An AC'% name or namepath that refers to a named o0#ect. This includes the 1ocalA and ArgA names.
%n this case, the o0#ect associated with the name is passed as the argument.
2> An AC'% name or namepath that refers to another control method. %n this case, the method is invoked
and the return value of the method is passed as the argument. A fatal error occurs if no o0#ect is
returned from the method. %f the o0#ect is not used after the method invocation it is automaticall(
deleted.
3> A valid A!1 e/pression. %n the case, the e/pression is evaluated and the o0#ect that results from this
evaluation is passed as the argument. %f this o0#ect is not used after the method invocation it is
automaticall( deleted.
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6.5.2.3
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Method Calling Convention
The calling convention for control methods can 0est 0e descri0ed as call-by-reference-constant. %n this
convention, o0#ects passed as arguments are passed 0( JreferenceL, meaning that the( are not copied to new
o0#ects as the( are passed to the called control method =A calling convention that copies o0#ects or o0#ect
wrappers during a call is known as call-by-2al'e or call-by-copy>.
This call-by-reference-constant convention allows internal o0#ects to 0e shared across each method
invocation, therefore reducing the num0er of o0#ect copies that must 0e performed as well as the num0er of
0uffers that must 0e copied. This calling convention is appropriate to the low&level nature of the AC'%
su0s(stem within the kernel of the host operating s(stem where non&paged d(namic memor( is t(picall( at
a premium. The A!1 programmer must 0e aware of the calling convention and the related side effects.
@owever, unlike a pure call-by-reference convention, the a0ilit( of the called control method to modif(
arguments is e/tremel( limited. This reduces aliasing issues such as when a called method une/pectedl(
modifies a o0#ect or varia0le that has 0een passed as an argument 0( the caller. %n effect, the arguments that
are passed to control methods are passed as constants that cannot 0e modified e/cept under specific
controlled circumstances.
$enerall(, the o0#ects passed to a control method via the ArgA terms cannot 0e directl( written or modified
0( the called method. %n other words, when an ArgA term is used as a target operand in an A!1 statement,
the e/isting ArgA o0#ect is not modified. %nstead, the new o0#ect replaces the e/isting o0#ect and the ArgA
term effectivel( 0ecomes a 1ocalA term.
The onl( e/ception to the read&onl( argument rule is if an ArgA term contains an 20#ect 3eference created
via the $ef=f A!1 operator. %n this case, the use of the ArgA term as a target operand will cause an(
e/isting o0#ect stored at the AC'% name referred to 0( the $ef=f operation to 0e overwritten.
%n some limited cases, a new, writa0le o0#ect ma( 0e created that will allow a control method to change the
value of an ArgA o0#ect. These cases are limited to ;uffer and 'ackage o0#ects where the JvalueL of the
o0#ect is represented indirectl(. 5or ;uffers, a writa0le %nde/ or 5ield can 0e created that refers to the
original 0uffer data and will allow the called method to read or modif( the data. 5or 'ackages, a writa0le
%nde/ can 0e created to allow the called method to modif( the contents of individual elements of the
'ackage.
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6.5.2.4
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Local Variables and Locally Created Data Objects
Control methods can access up to eight local data o0#ects. Access to the local data o0#ects have shorthand
encodings. 2n initial control method e/ecution, the local data o0#ects are N,11. Access to local o0#ects is
via the A!1 1ocalTerm language elements.
,pon control method e/ecution completion, one o0#ect can 0e returned that can 0e used as the result of the
e/ecution of the method. The JcallerL must either use the result or save it to a different o0#ect if it wants to
preserve it. !ee the description of the 3eturn A!1 operator for additional details
Name!pace o0#ects created within the scope of a method are d(namic. The( e/ist onl( for the duration of
the method e/ecution. The( are created when specified 0( the code and are destro(ed on e/it. A method
ma( create d(namic o0#ects outside of the current scope in the Name!pace using the scope operator or
using full path names. These o0#ects will still 0e destro(ed on method e/it. 20#ects created at load time
outside of the scope of the method are static. 5or e/ample<
Scope (\RS7)
!ame (B&R$ G) // )reate2 \RS7.B&R
;ethod (500$ 4)
Store (B&R$ )R%:) // 2ame effect a2 Store (\RS7.B&R$ )R%:)
!ame (B&R$ T) // )reate2 \RS7.500.B&R
Store (B&R$ DR%:) // 2ame effect a2 Store (\RS7.500.B&R$ DR%:
!ame (\RS7.500B$ F) // )reate2 \RS7.500B
/ // end method
/ // end 2cope
The o0#ect BAS?.;A3 is a static o0#ect created when the ta0le that contains the a0ove A!1 is loaded. The
o0#ect BAS?.522.;A3 is a d(namic o0#ect that is created when the Name (BAR, 7) statement in the 522
method is e/ecuted. The o0#ect BAS?.522; is a d(namic o0#ect created 0( the BAS?.522 method when
the Name (\XYZ.FOOB, 3) statement is e/ecuted. Notice that the BAS?.522; o0#ect is destro(ed after
the BAS?.522 method e/its.
6.6 ACPI Event Programming Model
The AC'% event programming model is 0ased on the !C% interrupt and $eneral&'urpose .vent =$'.>
register. AC'% provides an e/tensi0le method to raise and handle the !C% interrupt, as descri0ed in this
section.
6.6.1 ACPI Event Programming Model Components
The components of the AC'% event programming model are the following<
2!'M
5A-T
'M4aC!T!, 'M40C!T! and 'M4aC.N, 'M40C.N fi/ed register 0locks
$'.C;1E and $'.4C;1E register 0locks
$'. register 0locks defined in $'. 0lock devices
!C% interrupt
AC'% AM1 code general&purpose event model
AC'% device&specific model events
AC'% .m0edded Controller event model
The role of each component in the AC'% event programming model is descri0ed in the following ta0le.
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Ta!le A-(+ ACPI 1vent Progra%%ing Model Co%ponents
Co%ponent 5escription
2!'M 3eceives all !C% interrupts raised =receives all !C% events>. .ither handles the
event or masks the event off and later invokes an 2.M&provided control method
to handle the event. .vents handled directl( 0( 2!'M are fi/ed AC'% eventsK
interrupts handled 0( control methods are general&purpose events.
5A-T !pecifies the 0ase address for the following fi/ed register 0locks on an AC'%&
compati0le platform< 'M4/C!T! and 'M4/C.N fi/ed registers and the
$'./C!T! and $'./C.N fi/ed registers.
'M4xC!T! and
'M4xC.N fi/ed
registers
'M4/C!T! 0its raise fi/ed AC'% events. While a 'M4/C!T! 0it is set, if the
matching 'M4/C.N 0it is set, the AC'% !C% event is raised.
$'.xC!T! and
$'.xC.N fi/ed
registers
$'./C!T! 0its that raise general&purpose events. 5or ever( event 0it implemented
in $'./C!T!, there must 0e a compara0le 0it in $'./C.N. ,p to 2*+
$'./C!T! 0its and matching $'./C.N 0its can 0e implemented. While a
$'./C!T! 0it is set, if the matching $'./C.N 0it is set, then the general&purpose
!C% event is raised.
!C% interrupt A level&sensitive, sharea0le interrupt mapped to a declared interrupt vector. The
!C% interrupt vector can 0e shared with other low&priorit( interrupts that have a
low fre:uenc( of occurrence.
AC'% AM1 code
general&purpose event
model
A model that allows 2.M AM1 code to use $'./C!T! events. This includes
using $'./C!T! events as JwakeL sources as well as other general service events
defined 0( the 2.M =J0utton pressed,L Jthermal event,L Jdevice presentFnot
present changed,L and so on>.
AC'% device&specific
model events
-evices in the AC'% namespace that have AC'%&specific device %-s can provide
additional event model functionalit(. %n particular, the AC'% em0edded controller
device provides a generic event model.
AC'% .m0edded
Controller event model
A model that allows 2.M AM1 code to use the response from the .m0edded
Controller Guer( command to provide general&service event defined 0( the 2.M.
6.6.2 Types of ACPI Events
At the direct AC'% hardware level, two t(pes of events can 0e signaled 0( an !C% interrupt<
5i/ed AC'% events
$eneral&purpose events
%n turn, the general&purpose events can 0e used to provide further levels of events to the s(stem. And, as in
the case of the em0edded controller, a well&defined second&level event dispatching is defined to make a
third t(pe of t(pical AC'% event. 5or the fle/i0ilit( common in toda(Ms designs, two first&level general&
purpose event 0locks are defined, and the em0edded controller construct allows a large num0er of
em0edded controller second&level event&dispatching ta0les to 0e supported. Then if needed, the 2.M can
also 0uild additional levels of event dispatching 0( using AM1 code on a general&purpose event to su0&
dispatch in an 2.M defined manner.
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6.6.2.1
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Fixed ACPI Event Handling
When 2!'M receives a fi/ed AC'% event, it directl( reads and handles the event registers itself. The
following ta0le lists the fi/ed AC'% events. 5or a detailed specification of each event, see section ", JAC'%
@ardware !pecification.L
Ta!le A-(& 6ixed ACPI 1vents
1vent Co%%ent
'ower
management
timer carr( 0it
set.
5or more information, see the description of the TM3C!T! and TM3C.N 0its of the
'M4/ fi/ed register 0lock in section ".9.3.4, J'M4 .vent $rouping,L as well as the
TM3CDA1 register in the 'MCTM3C;1E in section ".9.3.3, J'ower Management
Timer.L
'ower 0utton
signal
A power 0utton can 0e supplied in two wa(s. 2ne wa( is to simpl( use the fi/ed status
0it, and the other uses the declaration of an AC'% power device and AM1 code to
determine the event. 5or more information a0out the alternate&device 0ased power
0utton, see section ".9.2.2.4.2, Control Method 'ower ;utton.L
Notice that during the ! state, 0oth the power and sleep 0uttons merel( notif( 2!'M
that the( were pressed.
%f the s(stem does not have a sleep 0utton, it is recommended that 2!'M use the
power 0utton to initiate sleep operations as re:uested 0( the user.
!leep 0utton
signal
A sleep 0utton can 0e supplied in one of two wa(s. 2ne wa( is to simpl( use the fi/ed
status 0utton. The other wa( re:uires the declaration of an AC'% sleep 0utton device
and AM1 code to determine the event.
3TC alarm AC'%&defines an 3TC wake alarm function with a minimum of one&month granularit(.
The AC'% status 0it for the device is optional. %f the AC'% status 0it is not present, the
3TC status can 0e used to determine when an alarm has occurred. 5or more
information, see the description of the 3TCC!T! and 3TCC.N 0its of the 'M4/ fi/ed
register 0lock in section ".9.3.4, J'M4 .vent $rouping.L
Wake status The wake status 0it is used to determine when the sleeping state has 0een completed.
5or more information, see the description of the WAEC!T! and WAEC.N 0its of the
'M4/ fi/ed register 0lock in section ".9.3.4, J'M4 .vent $rouping.L
Ta!le A-(& 6ixed ACPI 1vents (continued)
1vent Co%%ent
!(stem 0us
master re:uest
The 0us&master status 0it provides feed0ack from the hardware as to when a 0us master
c(cle has occurred. This is necessar( for supporting the processor C3 power savings
state. 5or more information, see the description of the ;MC!T! 0it of the 'M4/ fi/ed
register 0lock in section ".9.3.4, J'M4 .vent $rouping.L
$lo0al release
status
This status is raised as a result of the $lo0al 1ock protocol, and is handled 0( 2!'M as
part of $lo0al 1ock s(nchroniHation. 5or more information, see the description of the
$;1C!T! 0it of the 'M4/ fi/ed register 0lock in section ".9.3.4, J'M4 .vent
$rouping.L 5or more information on $lo0al 1ock, see section *.2.4.4, J$lo0al 1ock.L
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6.6.2.2
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General-Purpose Event Handling
When 2!'M receives a general&purpose event, it either passes control to an AC'%&aware driver, or uses an
2.M&supplied control method to handle the event. An 2.M can implement up to 428 general&purpose
event inputs in hardware per $'. 0lock, each as either a level or edge event. %t is also possi0le to
implement a single 2*+&pin 0lock as long as itMs the onl( 0lock defined in the s(stem.
An e/ample of a general&purpose event is specified in section ", JAC'% @ardware !pecification,L where
.CC!T! and .CC.N 0its are defined to ena0le 2!'M to communicate with an AC'%&aware em0edded
controller device driver. The .CC!T! 0it is set when either an interface in the em0edded controller space
has generated an interrupt or the em0edded controller interface needs servicing. Notice that if a platform
uses an em0edded controller in the AC'% environment, then the em0edded controllerMs !C% output must 0e
directl( and e/clusivel( tied to a single $'. input 0it.
@ardware can cascade other general&purpose events from a 0it in the $'./C;1E through status and ena0le
0its in 2perational 3egions =%F2 space, memor( space, 'C% configuration space, or em0edded controller
space>. 5or more information, see the specification of the $eneral&'urpose .vent ;locks =$'./C;1E> in
section ".9.".4, J$eneral&'urpose .vent 3egister ;locks.L
2!'M manages the 0its in the $'./ 0locks directl(, although the source to those events is not directl(
known and is connected into the s(stem 0( control methods. When 2!'M receives a general&purpose event
=the event is from a $'./C;1E !T! 0it>, 2!'M does the following<
4. -isa0les the interrupt source =$'./C;1E .N 0it>.
2. %f an edge event, clears the status 0it.
3. 'erforms one of the following<
-ispatches to an AC'%&aware device driver.
Gueues the matching control method for e/ecution.
Manages a wake event using device C'3W o0#ects.
". %f a level event, clears the status 0it.
*. .na0les the interrupt source.
The 2.M AM1 code can perform 2.M&specific functions custom to each event the particular platform
might generate 0( e/ecuting a control method that matches the event. 5or $'. events, 2!'M will e/ecute
the control method of the name BC$'..CT++ where ++ is the he/ value format of the event that needs to 0e
handled and T indicates the event handling t(pe =T must 0e either O.M for an edge event or O1M for a le2el
event>. The event values for status 0its in $'.C;1E start at Hero =CT> and end at the =$'.C;1EC1.N
F 2> & 4. The event values for status 0its in $'.4C;1E start at $'.4C;A!. and end at $'.4C;A!. Z
=$'.4C;1EC1.N F 2> & 4. $'.C;1EC1.N, $'.4C;A!., and $'.4C;1EC1.N are all defined in the
5A-T.
5or 2!'M to manage the 0its in the $'./C;1E 0locks directl(<
.na0le 0its must 0e readFwrite.
!tatus 0its must 0e latching.
!tatus 0its must 0e readFclear, and cleared 0( writing a J4L to the status 0it.
6.6.2.2.1 Wake Events
An important use of the general&purpose events is to implement device wake events. The components of the
AC'% event programming model interact in the following wa(<
When a device asserts its wake signal, the general&purpose status event 0it used to track that
device is set.
While the corresponding general&purpose ena0le 0it is ena0led, the !C% interrupt is asserted.
%f the s(stem is sleeping, this will cause the hardware, if possi0le, to transition the s(stem into the
! state.
2nce the s(stem is running, 2!'M will dispatch the corresponding $'. handler.
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The handler needs to determine which device o0#ect has signaled wake and performs a wake
Notif( command on the corresponding device o0#ect=s> that have asserted wake.
%n turn 2!'M will notif( 2!'M native driver=s> for each device that will wake its device to
service it.
.vents that wake ma( not 0e intermi/ed with non&wake =runtime> events on the same $'. input. The onl(
e/ception to this rule is made for the special devices 0elow. 2nl( the following devices are allowed to
utiliHe a single $'. for 0oth wake and runtime events<
4> ;utton -evices
'N'CC P 'ower ;utton -evice
'N'C- P 1id -evice
'N'C. P !leep ;utton -evice
2> 'C% ;us Wakeup .vent 3eporting ='M.>
'N'A3 P 'C% @ost ;ridge
All wake events that are not e/clusivel( tied to a $'. input =for e/ample, one input is shared for multiple
wake events> must have individual ena0le and status 0its in order to properl( handle the semantics used 0(
the s(stem.
6.6.2.2.2 Dispatching to an ACPI-Aware Device Driver
Certain device support, such as an em0edded controller, re:uires a dedicated $'. to service the device.
!uch $'.s are dispatched to native 2! code to 0e handled and not to the corresponding $'.&specific
control method.
%n the case of the em0edded controller, an 2!&native, AC'%&aware driver is given the $'. event for its
device. This driver services the em0edded controller device and determines when events are to 0e reported
0( the em0edded controller 0( using the Guer( command. When an em0edded controller event occurs, the
AC'%&aware driver dispatches the re:uests to other AC'%&aware drivers that have registered to handle the
em0edded controller :ueries or :ueues control methods to handle each event. %f there is no device driver to
handle specific :ueries, 2.M AM1 code can perform 2.M&specific functions that are customiHed to each
event on the particular platform 0( including specific control methods in the namespace to handle these
events. 5or an em0edded controller event, 2!'M will :ueue the control method of the name CG++. where
++ is the he/ format of the :uer( code. Notice that each em0edded controller device can have :uer( event
control methods.
!imilarl(, for an !M;us driver, if no driver registers for !M;us alarms, the !M;us driver will :ueue
control methods to handle these. Methods must 0e placed under the !M;us device with the name CGAA
where AA is the he/ format of the !M;us address of the device sending the alarm.
6.6.2.2.3 Queuing the Matching Control Method for Execution
When a general&purpose event is raised, 2!'M uses a naming convention to determine which control
method to :ueue for e/ecution and how the $'. .2% is to 0e handled. The $'./C!T! 0its in the
$'./C;1E are inde/ed with a num0er from through 55. The name of the control method to :ueue for an
event raised from an ena0le status 0it is alwa(s of the form BC$'..CTxx where xx is the event value and T
indicates the event .2% protocol to use =either edge or level>. The event values for status 0its in
$'.C;1E start at Hero =CT>, end at the =$'.C;1EC1.N F 2> & 4, and correspond to each status 0it
inde/ within $'.C;1E. The event values for status 0its in $'.4C;1E are offset 0( $'.C;A!. and
therefore start at $'.4C;A!. and end at $'.4C;A!. Z =$'.4C;1EC1.N F 2> & 4.
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2"8 Advanced Configuration and 'ower %nterface !pecification
5or e/ample, suppose an 2.M supplies a wake event for a communications port and uses 0it " of the
$'.C!T! 0its to raise the wake event status. %n an 2.M&provided -efinition ;lock, there must 0e a
Method declaration that uses the name BC$'..C1" or B$'..C." to handle the event. An e/ample of a
control method declaration using such a name is the following<
;ethod (\_:P%._6(.) // :P% . level wa+e handler
!otif1 (\_SB.P)#0.)0;($ 3)
/
The control method performs whatever action is appropriate for the event it handles. 5or e/ample, if the
event means that a device has appeared in a slot, the control method might acknowledge the event to some
other hardware register and signal a change notif( re:uest of the appropriate device o0#ect. 2r, the cause of
the general&purpose event can result from more then one source, in which case the control method for that
event determines the source and takes the appropriate action.
When a general&purpose event is raised from the $'. 0it tied to an em0edded controller, the em0edded
controller driver uses another naming convention defined 0( AC'% for the em0edded controller driver to
determine which control method to :ueue for e/ecution. The :ueries that the em0edded controller driver
e/changes with the em0edded controller are num0ered from through 55, (ielding event codes 4 through
55. =A :uer( response of from the em0edded controller is reserved for Jno outstanding events.L> The
name of the control method to :ueue is alwa(s of the form CGxx where xx is the num0er of the :uer(
acknowledged 0( the em0edded controller. An e/ample declaration for a control method that handles an
em0edded controller :uer( is the following<
;ethod(_JF.) // embedded controller event for thermal
!otif1 (\_SB.<7(.<";4$ (-=()
/
When an !M;us alarm is handled 0( the !M;us driver, the !M;us driver uses a similar naming
convention defined 0( AC'% for the driver to determine the control method to :ueue for e/ecution. When
an alarm is received 0( the !M;us host controller, it generall( receives the !M;us address of the device
issuing the alarm and one word of data. 2n implementations that use !M;A1.3TY for notifications, onl(
the device address will 0e received. The name of the control method to :ueue is alwa(s of the form CGxx
where xx is the !M;us address of the device that issued the alarm. The !M;us address is 9 0its long
corresponding to he/ values through 95, although some addresses are reserved and will not 0e used. The
control method will alwa(s 0e :ueued with one argument that contains the word of data received with the
alarm. An e/ception is the case of an !M;us using !M;A1.3TY for notifications, in this case the
argument will 0e . An e/ample declaration for a control method that handles a !M;us alarm follows<
;ethod(_J4=$ 4) // <hermal 2en2or device at addre22 ((44 (((
// &r,( contain2 notification value (if an1)
// &r,( L ( if device 2upport2 onl1 S;B&6%R<Q
!otif1 (\_SB.<7(.<";4$ (-=()
/
6.6.2.2.4 Managing a Wake Event Using Device _PRW Objects
A deviceMs C'3W o0#ect provides the Hero&0ased 0it inde/ into the general&purpose status register 0lock to
indicate which general&purpose status 0it from either $'.C;1E or $'.4C;1E is used as the specific
deviceMs wake mask. Although the hardware must maintain individual device wake ena0le 0its, the s(stem
can have multiple devices using the same general&purpose event 0it 0( using 2.M&specific hardware to
provide second&level status and ena0le 0its. %n this case, the 2.M AM1 code is responsi0le for the second&
level ena0le and status 0its.
2!'M ena0les or disa0les the device wake function 0( ena0ling or disa0ling its corresponding $'. and 0(
e/ecuting its C'!W control method =which is used to take care of the second&level ena0les>. When the $'.
is asserted, 2!'M still e/ecutes the corresponding $'. control method that determines which device
wakes are asserted and notifies the corresponding device o0#ects. The native 2! driver is then notified that
its device has asserted wake, for which the driver powers on its device to service it.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 2"6
%f the s(stem is in a sleeping state when the ena0led $'. 0it is asserted the hardware will transition the
s(stem into the ! state, if possi0le.
6.6.2.2.5 Determining the System Wake Source Using _Wxx Control
Methods
After a transition to the ! state, 2!'M ma( evaluate the C!W! o0#ect in the BC$'. scope to determine the
inde/ of the $'. that was the source of the transition event. When a single $'.s is shared among multiple
devices, the platform provides a CW// control method, where // is $'. inde/ as descri0ed in !ection
*.+.2.2.3, that allows the source device of the transition to 0e determined . %f implemented, the CW//
control method must e/ist in the BC$'. scope or in the scope of a $'. 0lock device.
%f CW// is implemented, either hardware or firmware must detect and save the source device as descri0ed
in !ection 9.3.*, JC!W! =!(stem Wake !ource>L. -uring invocation, the CW// control method determines
the source device and issues a 0otif)=Tdevice),/2> on the device that caused the s(stem to transition to
the ! state. %f the device uses a 0us&specific method of arming for wakeup, then the 0otif) must 0e issued
on the parent of the device that has a C'3W method. The CW// method must issue a
Notif(=Tdevice),/2> onl( to devices that contain a C'3W method within their device scope. 2!'MMs
evaluation of the C!W! and CW// o0#ects is indeterminate. As such, the platform must not rel( on C!W!
or CW// evaluation to clear an( hardware state, including $'./C!T! 0its, or to perform an( wakeup&
related actions.
%f the $'. inde/ returned 0( the C!W! o0#ect is onl( referenced 0( a single C'3W o0#ect in the s(stem, it
is implied that the device containing that C'3W is the wake source. %n this case, it is not necessar( for the
platform to provide a CW// method.
6.6.3 Device Object Notifcations
-uring normal operation, the platform needs to notif( 2!'M of various device&related events. These
notifications are accomplished using the Notif( operator, which indicates a target device, thermal Hone, or
processor o0#ect and a notification value that signifies the purpose of the notification. Notification values
from through /95 are common across all device o0#ect t(pes. Notification values of /C and a0ove are
reserved for definition 0( hardware vendors for hardware specific notifications. Notification values from
/8 to /;5 are device&specific and defined 0( each such device. 5or more information on the Notif(
operator, see section 49.*.8*, JNotif( =Notif(>.L
Ta!le A-(# 5evice 3!Cect 0otification 7alues
7alue 5escription
<us Check This notification is performed on a device o0#ect to indicate to 2!'M that it
needs to perform the 'lug and 'la( re&enumeration operation on the device tree starting
from the point where it has 0een notified. 2!'M will onl( perform this operation at 0oot,
and when notified. %t is the responsi0ilit( of the AC'% AM1 code to notif( 2!'M at an(
other times that this operation is re:uired. The more accuratel( and closer to the actual
device tree change the notification can 0e done, the more efficient the operating s(stemMs
response will 0eK however, it can also 0e an issue when a device change cannot 0e
confirmed. 5or e/ample, if the hardware cannot notice a device change for a particular
location during a s(stem sleeping state, it issues a ;us Check notification on wake to
inform 2!'M that it needs to check the configuration for a device change.
4 5evice Check ,sed to notif( 2!'M that the device either appeared or disappeared. %f
the device has appeared, 2!'M will re&enumerate from the parent. %f the device has
disappeared, 2!'M will invalidate the state of the device. 2!'M ma( optimiHe out re&
enumeration. %f C-CE is present, then Notif(=ob:ect,4> is assumed to indicate an undock
re:uest.
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2* Advanced Configuration and 'ower %nterface !pecification
7alue 5escription
2 5evice :ake ,sed to notif( 2!'M that the device has signaled its wake event, and that
2!'M needs to notif( 2!'M native device driver for the device. This is onl( used for
devices that support C'3W.
3 1Cect "eJuest ,sed to notif( 2!'M that the device should 0e e#ected, and that 2!'M
needs to perform the 'lug and 'la( e#ection operation. 2!'M will run the C.7/ method.
" 5evice Check Light ,sed to notif( 2!'M that the device either appeared or
disappeared. %f the device has appeared, 2!'M will re&enumerate from the device itself,
not the parent. %f the device has disappeared, 2!'M will invalidate the state of the
device.
* 6reJuenc) Mis%atch ,sed to notif( 2!'M that a device inserted into a slot cannot 0e
attached to the 0us 0ecause the device cannot 0e operated at the current fre:uenc( of the
0us. 5or e/ample, this would 0e used if a user tried to hot&plug a 33 M@H 'C% device into
a slot that was on a 0us running at greater than 33 M@H.
+ <us Mode Mis%atch ,sed to notif( 2!'M that a device has 0een inserted into a slot or
0a( that cannot support the device in its current mode of operation. 5or e/ample, this
would 0e used if a user tried to hot&plug a 'C% device into a slot that was on a 0us
running in 'C%&A mode.
9 Power 6ault ,sed to notif( 2!'M that a device cannot 0e moved out of the -3 state
0ecause of a power fault.
8 Capa!ilities Check This notification is performed on a device o0#ect to indicate to
2!'M that it needs to re&evaluate the C2!C control method associated with the device.
6 5evice DPL5 Check ,sed to notif( 2!'M to reevaluate the C'1- o0#ect, as the
-eviceMs connection point has changed.
/A "eserved
/; S)ste% Localit) Infor%ation 2pdate -(namic reconfiguration of the s(stem ma(
cause e/isting relative distance information to change. The platform sends the !(stem
1ocalit( %nformation ,pdate notification to a point on a device tree to indicate to 2!'M
that it needs to invoke the C!1% o0#ects associated with the !(stem 1ocalities on the
device tree starting from the point notified.
/C&/95 "eserved
;elow are the notification values defined for specific AC'% devices. 5or more information concerning the
o0#ect&specific notification, see the section on the corresponding deviceFo0#ect.
Ta!le A-(( Control Method <atter) 5evice 0otification 7alues
Hex value 5escription
/8 <atter) Status Changed ,sed to notif( 2!'M that the Control Method ;atter( device
status has changed.
/84 <atter) Infor%ation Changed ,sed to notif( 2!'M that the Control Method ;atter(
device information has changed. This onl( occurs when a 0atter( is replaced.
/82 <atter) Maintenance 5ata Status 6lags Check ,sed to notif( 2!'M that the Control
Method ;atter( device 0atter( maintenance data status flags should 0e checked.
/83&/;5 "eserved
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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Ta!le A-(A Power Source 3!Cect 0otification 7alues
Hex value 5escription
/8 Power Source Status Changed. ,sed to notif( 2!'M that the power source status has
changed.
/84&/;5 "eserved
Ta!le A-(- Ther%al Ione 3!Cect 0otification 7alues
Hex value 5escription
/8 Ther%al Ione Status Changed ,sed to notif( 2!'M that the thermal Hone
temperature has changed.
/84 Ther%al Ione Trip points Changed ,sed to notif( 2!'M that the thermal Hone trip
points have changed.
/82 5evice Lists Changed ,sed to notif( 2!'M that the thermal Hone device lists =CA1/,
C'!1, CT?-> have changed.
/83 Ther%al "elationship Ta!le Changed ,sed to notif( 2!'M that values in the thermal
relationship ta0le have changed.
/8"&/;5 "eserved
Ta!le A-(. Control Method Power <utton 0otification 7alues
Hex value 5escription
/8 S$ Power <utton Pressed ,sed to notif( 2!'M that the power 0utton has 0een pressed
while the s(stem is in the ! state. Notice that when the 0utton is pressed while the
s(stem is in the !4&!" state, a -evice Wake notification must 0e issued instead.
/84&/;5 "eserved
Ta!le A-(/ Control Method Sleep <utton 0otification 7alues
Hex value 5escription
/8 S$ Sleep <utton Pressed ,sed to notif( 2!'M that the sleep 0utton has 0een pressed
while the s(stem is in the ! state. Notice that when the 0utton is pressed while the
s(stem is in the !4&!" state, a -evice Wake notification must 0e issued instead.
/84&/;5 "eserved
Ta!le A-(, Control Method Lid 0otification 7alues
Hex value 5escription
/8
Lid Status Changed ,sed to notif( 2!'M that the control method lid device status has
changed.
/84&/;5 "eserved
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2*2 Advanced Configuration and 'ower %nterface !pecification
Ta!le A-A$ Processor 5evice 0otification 7alues
Hex value 5escription
/8
Perfor%ance Present Capa!ilities Changed. ,sed to notif( 2!'M that the num0er of
supported processor performance states has changed. This notification causes 2!'M to
re&evaluate the C''C o0#ect. !ee section 8, J'rocessor 'ower and 'erformance !tate
Configuration and Control,L for more information.
/84
C States Changed ,sed to notif( 2!'M that the num0er or t(pe of supported processor
C !tates has changed. This notification causes 2!'M to re&evaluate the CC!T o0#ect. !ee
section 8, J'rocessor 'ower and 'erformance !tate Configuration and Control,L for more
information.
/82 Throttling Present Capa!ilities Changed. ,sed to notif( 2!'M that the num0er of
supported processor throttling states has changed. This notification causes 2!'M to re&
evaluate the CT'C o0#ect. !ee section 8, J'rocessor 'ower and 'erformance !tate
Configuration and Control,L for more information.
/83&/;5 "eserved
Ta!le A-A+ 2ser Presence 5evice 0otification 7alues
Hex value 5escription
/8
2ser Presence Changed ,sed to notif( 2!'M that a meaningful change in user
presence has occurred, causing 2!'M to re&evaluate the C,'- o0#ect.
/84&/;5 "eserved
Ta!le A-A& A%!ient Light Sensor 5evice 0otification 7alues
Hex value 5escription
/8
ALS Illu%inance Changed ,sed to notif( 2!'M that a meaningful change in am0ient
light illuminance has occurred, causing 2!'M to re&evaluate the CA1% o0#ect.
/84
ALS Color Te%perature Changed ,sed to notif( 2!'M that a meaningful change in
am0ient light color temperature or chromacit( has occurred, causing 2!'M to re&
evaluate the CA1T andFor CA1C o0#ects.
/82 ALS "esponse Changed ,sed to notif( 2!'M that the set of points used to conve( the
am0ient light response has changed, causing 2!'M to re&evaluate the CA13 o0#ect.
/83&/;5 "eserved
6.6.4 Device Class-Specifc Objects
Most device o0#ects are controlled through generic o0#ects and control methods and the( have generic
device %-s. These generic o0#ects, control methods, and device %-s are specified in sections +, 9, 8, 6, 4,
and 44. !ection *.+.*, J-efined $eneric 20#ects and Control Methods,L lists all the generic o0#ects and
control methods defined in this specification.
@owever, certain integrated devices re:uire support for some device&specific AC'% controls. This section
lists these devices, along with the device&specific AC'% controls that can 0e provided.
!ome of these controls are for AC'%&aware devices and as such have 'lug and 'la( %-s that represent these
devices. The following ta0le lists the 'lug and 'la( %-s defined 0( the AC'% specification.
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Ta!le A-A# ACPI 5evice I5s
Plug and
Pla) I5
5escription
'N'C8 ACPI Not declared in AC'% as a device. This %- is used 0( 2!'M for the hardware
resources consumed 0( the AC'% fi/ed register spaces, and the operation regions used 0(
AM1 code. %t represents the core AC'% hardware itself.
'N'A* ;eneric Container 5evice A device whose settings are totall( controlled 0( its AC'%
resource information, and otherwise needs no device or 0us&specific driver support. This
was originall( known as $eneric %!A ;us -evice. This %- should onl( 0e used for
containers that do not produce resources for consumption 0( child devices. An( s(stem
resources claimed 0( a 'N'A* deviceMs CC3! o0#ect must 0e consumed 0( the
container itself.
'N'A+ ;eneric Container 5evice This device 0ehaves e/actl( the same as the 'N'A*
device. This was originall( known as ./tended %F2 ;us. This %- should onl( 0e used for
containers that do not produce resources for consumption 0( child devices. An( s(stem
resources claimed 0( a 'N'A+ deviceMs CC3! o0#ect must 0e consumed 0( the
container itself.
'N'C6 1%!edded Controller 5evice A host em0edded controller controlled through an AC'%&
aware driver.
'N'CA Control Method <atter) A device that solel( implements the AC'% Control Method
;atter( functions. A device that has some other primar( function would use its normal
device %-. This %- is used when the devices primar( function is that of a 0atter(.
'N'C; 6an A device that causes cooling when JonL =- device state>.
Ta!le A-A# ACPI 5evice I5s (continued)
Plug and
Pla) I5
5escription
'N'CC Power <utton 5evice A device controlled through an AC'%&aware driver that provides
power 0utton functionalit(. This device is onl( needed if the power 0utton is not
supported using the fi/ed register space.
'N'C- Lid 5evice A device controlled through an AC'%&aware driver that provides lid status
functionalit(. This device is onl( needed if the lid state is not supported using the fi/ed
register space.
'N'C. Sleep <utton 5evice A device controlled through an AC'%&aware driver that provides
power 0utton functionalit(. This device is optional.
'N'C5 PCI Interrupt Link 5evice A device that allocates an interrupt connected to a 'C%
interrupt pin. !ee section +., JConfiguration,L for more details.
'N'C8 Me%or) 5evice This device is a memor( su0s(stem.
AC'%4 SM<us +$ Host Controller An !M;us host controller =!M;&@C> compati0le with the
em0edded controller&0ased !M;&@C interface =as specified in section 42.6, J!M;us
@ost Controller %nterface via .m0edded ControllerL> and implementing the !M;us 4.
!pecification.
AC'%2 S%art <atter) Su!s)ste% The !mart 0atter( !u0s(stem specified in section 4,
J'ower !ource -evices.L
AC'%3 AC 5evice The AC adapter specified in section 4, J'ower !ource -evices.L
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2*" Advanced Configuration and 'ower %nterface !pecification
Plug and
Pla) I5
5escription
AC'%" Module 5evice This device is a container o0#ect that acts as a 0us node in a namespace.
A Module -evice without an( of the CC3!, C'3! and C!3! methods 0ehaves the same
wa( as the $eneric Container -evices ='N'A* or 'N'A+>. %f the Module -evice
contains a CC3! method, onl( these resources descri0ed in the CC3! are availa0le for
consumption 0( its child devices. Also, the Module -evice can support C'3! and C!3!
methods if CC3! is supported.
AC'%* SM<us &$ Host Controller An !M;us host controller =!M;&@C compati0le with the
em0edded controller&0ased !M;&@C interface =as specified in section 42.6, J!M;us
@ost Controller %nterface via .m0edded ControllerL> and implementing the !M;us 2.
!pecification.
AC'%+ ;P1 <lock 5evice This device allows a s(stem designer to descri0e $'. 0locks
0e(ond the two that are descri0ed in the 5A-T.
AC'%9 Processor 5evice This device provides an alternative to declaring processors using the
Processor A!1 statement. !ee section 8.", J-eclaring 'rocessorsL, for more details.
AC'%8 A%!ient Light Sensor 5evice This device is an am0ient light sensor. !ee section 6.2,
JControl Method Am0ient 1ight !ensor -eviceL.
AC'%6 I@3xAPIC 5evice This device is an %F2 unit that complies with 0oth the A'%C and
!A'%C interrupt models.
AC'%A I@3 APIC 5evice This device is an %F2 unit that complies with the A'%C interrupt
model.
AC'%; I@3 SAPIC 5evice This device is an %F2 unit that complies with the !A'%C interrupt
model.
6.6.5 Defned Generic Objects and Control Methods
The following ta0le lists all of the AC'% namespace o0#ects defined in this specification and provides a
reference to the defining section of the specification. 20#ect names reserved 0( AC'% 0ut defined 0( other
specifications are also listed along with their corresponding specification reference.
Ta!le A-A( 5efined ;eneric 3!Cect and Control Methods
3!Cect 5escription "eference
CAC/ Thermal ?one o0#ect that returns active cooling polic( threshold values
in tenths of degrees Eelvin.
44.3.4
CA-3 -evice o0#ect that evaluates to a deviceMs address on its parent 0us. 5or
the displa( output device, this o0#ect returns a uni:ue %-. =;.*.4,
JCA-3 & 3eturn the ,ni:ue %- for this -evice.L>
+.4.4
CA1C 20#ect evaluates to current Am0ient 1ight Color Chromacit( 6.2."
CA1% The current am0ient light 0rightness in lu/ =lumen per s:uare meter>. 6.2.2
CA1N 3esource data t(pe reserved field name 49.4.8
CA1' Am0ient light sensor polling fre:uenc( in tenths of seconds. 6.2.+
CA13 3eturns a set of am0ient light 0rightness to displa( 0rightness mappings
that can 0e used 0( an 2! to cali0rate its am0ient light polic(.
6.2.*
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Ta!le A-A( 5efined ;eneric 3!Cect and Control Methods
3!Cect 5escription "eference
CA1T The current am0ient light color temperature in degrees Eelvin. 6.2.3
CA1x Thermal Hone o0#ect containing a list of cooling device o0#ects. 44.3.2
CA!% 3esource data t(pe reserved field name 49.4.8
C;A! 3esource data t(pe reserved field name 49.4.8
C;;N 'C% 0us num0er setup 0( the ;%2! +.*.*
C;C1 3eturns a 0uffer of 0(tes indicating list of 0rightness control levels
supported.
;.+.2
C;CM !ets the 0rightness level of the 0uilt&in displa( output device. ;.+.3
C;-N Correlates a docking station 0etween AC'% and legac( interfaces. +.*.3
C;5! Control method e/ecuted immediatel( following a wake event. 9.3.4
C;%5 Control Method ;atter( information o0#ect 4.2.2.4
C;1T 20#ect that conve(s userMs 0atter( level threshold preferences to
platform.
6.4.3
C;M 3esource data t(pe reserved field name 49.4.8
C;MC 'owers source o0#ect used to initiate 0atter( cali0ration c(cles or to
control the charger and whether or not a 0atter( is powering the s(stem.
4.2.2.9
C;M- 'ower source o0#ect that returns information a0out the 0atter(Ms
capa0ilities and current state in relation to 0atter( cali0ration and
charger control features.
4.2.2.+
C;GC 20#ect that returns current displa( 0rightness level. ;.+."
C;!T Control Method ;atter( status o0#ect 4.2.2.3
C;TM 3eturns estimated runtime at the present average rate of drain, or the
runtime at a specified rate.
4.2.2.*
C;T' !ets Control Method ;atter( trip point 4.2.2."
CC;A 'rovides the Configuration ;ase Address for a 'C% ./press host 0ridge 'C% 5irmware
!pecification,
3evision 3.
http<FFpcisig.com
CC%- -evice identification o0#ect that evaluates to a deviceMs 'lug and 'la(
Compati0le %- list.
+.4.2
CC3! -evice configuration o0#ect that specifies a deviceMs c'rrent resource
settings, or a control method that generates such an o0#ect.
+.2.4
CC3T Thermal Hone o0#ect that returns critical trip point in tenths of degrees
Eelvin.
44.3.3
CC!- 20#ect that conve(s C&!tate dependencies 8.".2.2
CC!T 'rocessor power state declaration o0#ect 8.".2.4
C-CE %ndicates that the device is a docking station. +.*.2
C-C! 3eturns the status of the displa( output device. ;.+.+
C--C 3eturns the .-%- for the displa( output device ;.+.*
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
2*+ Advanced Configuration and 'ower %nterface !pecification
Ta!le A-A( 5efined ;eneric 3!Cect and Control Methods
3!Cect 5escription "eference
C--N 20#ect that associates a logical software name =for e/ample, C2M4>
with a device.
+.4.3
C-.C 3esource data t(pe reserved field name 49.4.8
C-$! Control method used to :uer( the state of the output device. ;.+.9
C-%! -evice configuration control method that disa0les a device. +.2.2
C-MA 20#ect that specifies a deviceMs c'rrent resources for -MA transactions. +.2.3
C-2- Control method used to enumerate devices attached to the displa(
adapter.
;.".2
C-2! Control method used to ena0leFdisa0le displa( output switching. ;.".4
C-!M $eneric device control method o0#ect 6.4*.4
C-!! Control method used to set displa( device state. ;.+.8
C-!W !et up a device for device&onl( wake 9.2.4
C.// Control method e/ecuted as a result of a general&purpose event. *.+.2.2,
*.+.2.2.3
C.C Control Method used to define the offset address and Guer( value of an
!M;&@C defined within an em0edded controller device.
42.42
C.-1 -evice removal o0#ect that returns a packaged list of devices that are
dependent on a device.
+.3.4
C.7/ -evice insertionFremoval control method that e#ects a device. +.3.3
C.7- -evice removal o0#ect that evaluates to the name of a device o0#ect
upon which a device is dependent. Whenever the named device is
e#ected, the dependent device must receive an e#ection notification.
+.3.2
C5-. 20#ect that indicates the presence or a0sence of flopp( disks. 6.4.4
C5-% 20#ect that returns flopp( drive information. 6.4.2
C5-M Control method that changes the mode of flopp( drives. 6.4.3
C5%A 20#ect used to provide correlation 0etween the fi/ed hardware register
0locks defined in the 5A-T and the devices that implement these fi/ed
hardware registers.
+.2."
C$1 2!&defined $lo0al 1ock mute/ o0#ect *.9.4
C $1E %ndicates the need to ac:uire the $lo0al 1ock, must 0e ac:uired when
accessing the device.
+.*.9
C$'- Control method that returns which D$A device will 0e posted at 0oot ;."."
C$'. 4. $eneral&'urpose .vents root name space
2. 20#ect that returns the !C% interrupt within the $'/C!T! register
that is connected to the .C.
*.3.4
42.44
C$3A 3esource data t(pe reserved field name. 49.4.8
C$T5 %-. device control method to get the Advanced Technolog( Attachment
=ATA> task file needed to re&initialiHe the drive to 0oot up defaults.
6.6.4.4
C$TM %-. device control method to get the %-. controller timing information. 6.6.2.4.4
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 2*9
Ta!le A-A( 5efined ;eneric 3!Cect and Control Methods
3!Cect 5escription "eference
C$!; 20#ect that provides the $lo0al !(stem %nterrupt ;ase for a hot&plugged
%F2 A'%C device.
+.2.*
C$T! Control method e/ecuted #ust prior to setting the sleep ena0le
=!1'C.N> 0it.
9.3.3
C@. 3esource data t(pe reserved field name 49.4.8
C@%- -evice identification o0#ect that evaluates to a deviceMs 'lug and 'la(
@ardware %-.
+.4."
C@2T 20#ect returns critical temperature when 2!'M enters !" 44.3."
C@'' An o0#ect that specifies the Cache&line siHe, 1atenc( timer, !.33
ena0le, and '.33 ena0le values to 0e used when configuring a 'C%
device inserted into a hot&plug slot or initial configuration of a 'C%
device at s(stem 0oot.
+.2.+
C@'A 20#ect that provides device parameters when configuring a 'C% device
inserted into a hot&plug slot or initial configuration of a 'C% device at
s(stem 0oot. !upersedes C@''.
+.2.9
C%5T %'M% %nterface T(pe %ntelligent 'latform
Management
%nterface
!pecification.
http<FFwww.intel.com
FdesignFserversFipmiF
inde/.htm
C%N% -evice initialiHation method that performs device specific initialiHation. +.*.4
C%NT 3esource data t(pe reserved field name 49.4.8
C%3C 'ower management o0#ect that signifies the device has a significant
inrush current draw.
9.2.42
C1// Control method e/ecuted as a result of a general&purpose event. *.+.2.2,
*.+.2.2.3
C1CE -evice insertionFremoval control method that locks or unlocks a device. +.3."
C1.N 3esource data t(pe reserved field name 49.4.8
C1%- 20#ect that returns the status of the 1id on a mo0ile s(stem. 6.".4
C11 3esource data t(pe reserved field name 49.4.8
CMA5 3esource data t(pe reserved field name 49.4.8
CMAT 20#ect evaluates to a 0uffer of MA-T A'%C !tructure entries. +.2.8
CMAA 3esource data t(pe reserved field name 49.4.8
CM.M 3esource data t(pe reserved field name 49.4.8
CM%5 3esource data t(pe reserved field name 49.4.8
CM%N 3esource data t(pe reserved field name 49.4.8
CM!$ !(stem indicator control that indicates messages are waiting. 6.4.2
CM1! 20#ect that provides a human reada0le description of a device in
multiple languages.
+.4.*
C255 'ower resource o0#ect that sets the resource off. 9.4.2
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
2*8 Advanced Configuration and 'ower %nterface !pecification
Ta!le A-A( 5efined ;eneric 3!Cect and Control Methods
3!Cect 5escription "eference
C2N 'ower resource o0#ect that sets the resource on. 9.4.3
C2! 20#ect that evaluates to a string that identifies the operating s(stem. *.9.2
C2!C Conve( specific software support F capa0ilities to the platform allowing
the platform to configure itself appropriatel(.
+.2.6
C2!T 2!'M !tatus %ndication +.3.*
C'C1 'ower source o0#ect that contains a list of devices powered 0( a power
source.
4.3.2
C'CT 'rocessor performance control o0#ect 8.".".4
C'-C 'rocessor -river Capa0ilities 8.".4
C'%C Control method that conve(s interrupt model in use to the s(stem
firmware.
*.8.4
C'1- 20#ect that provides ph(sical location description information. +.4.+
C''C Control method used to determine num0er of performance states
currentl( supported 0( the platform.
8.".".3
C''. 20#ect provides polling interval to retrieve Corrected 'latform .rror
information
-%$+" Corrected
'latform .rror
'olling
!pecification.
http<FFwww.dig+".org
Fspecifications
C'3 AC'% 4. 'rocessor Namespace *.3.4
C'3 'ower management o0#ect that evaluates to the deviceMs power
re:uirements in the - device state =device full( on>.
9.2.9
C'34 'ower management o0#ect that evaluates to the deviceMs power
re:uirements in the -4 device state. 2nl( devices that can achieve the
defined -4 device state according to its given device class would suppl(
this level.
9.2.8
C'32 'ower management o0#ect that evaluates to the deviceMs power
re:uirements in the -2 device state. 2nl( devices that can achieve the
defined -2 device state according to its given device class would suppl(
this level.
9.2.6
C'3! -evice configuration o0#ect that specifies a deviceMs possible resource
settings, or a control method that generates such an o0#ect.
+.2.4
C'3T An o0#ect that specifies the 'C% interrupt 3outing Ta0le. +.2.44
C'3W 'ower management o0#ect that evaluates to the deviceMs power
re:uirements in order to wake the s(stem from a s(stem sleeping state.
9.2.4
C'! 'ower management control method that puts the device in the -
device state. =device full( on>.
9.2.2
C'!4 'ower management control method that puts the device in the -4
device state.
9.2.3
C'!2 'ower management control method that puts the device in the -2
device state.
9.2."
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 2*6
Ta!le A-A( 5efined ;eneric 3!Cect and Control Methods
3!Cect 5escription "eference
C'!3 'ower management control method that puts the device in the -3
device state =device off>.
9.2.*
C'!C 'ower management o0#ect that evaluates to the deviceMs current power
state.
9.2.+
C'!- 20#ect that conve(s '&!tate dependencies 8.".".*
C'!1 Thermal Hone o0#ect that returns list of passive cooling device o0#ects. 44.3.*
C'!3 'ower source o0#ect that returns present power source device. 4.3.4
C'!! 20#ect indicates the num0er of supported processor performance states. 8.".".2
C'!D Thermal Hone o0#ect that returns 'assive trip point in tenths of degrees
Eelvin.
44.3.+
C'!W 'ower management control method that ena0les or disa0les the deviceMs
wake function.
9.2.44
C'TC 20#ect used to define a processor throttling control register. 8.".3.4
C'T! Control method used to notif( the platform of impending sleep
transition.
9.3.2
C'AM 20#ect used to descri0e pro/imit( domains within a machine. +.2.42
CGxx .m0edded Controller Guer( and !M;us Alarm control method *.+.2.2.3
C3;2 3esource data t(pe reserved field name 49.4.8
C3;W 3esource data t(pe reserved field name 49.4.8
C3.$ Notifies AM1 code of a change in the availa0ilit( of an operation
region.
+.*."
C3.D 3evision of the AC'% specification that 2!'M implements. *.9."
C3MD -evice insertionFremoval o0#ect that indicates that the given device is
remova0le.
+.3.+
C3N$ 3esource data t(pe reserved field name 49.4.8
C32M Control method used to get a cop( of the displa( devicesM 32M data. ;.".3
C3T 3esource T(pe field of the GWord!pace, -Word!pace or Word!pace
address descriptors
49.4.8
C3TD 20#ect indicates whether temperature values are relative or a0solute. 44.3.9
C3W 3esource data t(pe reserved field name 49.4.8
C! 'ower management package that defines s(stem BC! state mode. 9.3.".4
C!4 'ower management package that defines s(stem BC!4 state mode. 9.3.".2
C!2 'ower management package that defines s(stem BC!2 state mode. 9.3.".3
C!3 'ower management package that defines s(stem BC!3 state mode. 9.3."."
C!" 'ower management package that defines s(stem BC!" state mode. 9.3.".*
C!* 'ower management package that defines s(stem BC!* state mode. 9.3.".+
C!4- @ighest -&state supported 0( the device in the !4 state. 9.2.43
C!2- @ighest -&state supported 0( the device in the !2 state. 9.2.4"
C!3- @ighest -&state supported 0( the device in the !3 state. 9.2.4*
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
2+ Advanced Configuration and 'ower %nterface !pecification
Ta!le A-A( 5efined ;eneric 3!Cect and Control Methods
3!Cect 5escription "eference
C!"- @ighest -&state supported 0( the device in the !" state. 9.2.4+
C!W 1owest -&state supported 0( the device in the ! state which can wake
the device
9.2.49
C!4W 1owest -&state supported 0( the device in the !4 state which can wake
the s(stem
9.2.48
C!2W 1owest -&state supported 0( the device in the !2 state which can wake
the s(stem
9.2.46
C!3W 1owest -&state supported 0( the device in the !3 state which can wake
the s(stem
9.2.2
C!"W 1owest -&state supported 0( the device in the !" state which can wake
the s(stem
9.2.24
C!; !(stem 0us scope *.3.4
C!;! !mart ;atter( o0#ect that returns !mart ;atter( configuration. 4.4.2
C!C' Thermal Hone o0#ect that sets user cooling polic( =Active or 'assive>. 44.3.8
C!-- Control method that informs the platform of the t(pe of device attached
to a !ATA port.
6.6.3.3.4
C!.$ .valuates to the 'C% !egment $roup num0er. +.*.+
C!@3 3esource data t(pe reserved field name 49.4.8
C!% !(stem indicators scope 6.4
C!%? 3esource data t(pe reserved field name 49.4.8
C!1% 20#ect that provides updated distance information for a s(stem localit(. +.2.43
C!'- Control method used to update which video device will 0e posted at
0oot.
;.".*
C!3! -evice configuration control method that sets a deviceMs settings. +.2.4"
C!3D %'M% !pec 3evision %ntelligent 'latform
Management
%nterface
!pecification.
http<FFwww.intel.com
FdesignFserversFipmiF
inde/.htm
C!!T !(stem indicator control method that indicates the s(stem status. 6.4.4
C!TA 4. -evice insertionFremoval control method that returns a deviceMs
status.
2. 'ower resource o0#ect that evaluates to the current on or off state of
the 'ower 3esource.
+.3.9
9.4."
C!TM %-. device control method used to set the %-. controller transfer
timings.
6.6.2.4.2
C!T3 20#ect evaluates to a ,nicode string to descri0e a device. +.4.9
C!,N 20#ect that evaluates to the slot uni:ue %- num0er for a slot. +.4.8
C!W! 20#ect that returns the source event that caused the s(stem to wake. 9.3.*
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 2+4
Ta!le A-A( 5efined ;eneric 3!Cect and Control Methods
3!Cect 5escription "eference
CTC/ 3eserved for use 0( the A!1 compiler. 49.2.4.4
CTC4 Thermal Hone o0#ect that contains thermal constant for 'assive cooling. 44.3.6
CTC2 Thermal Hone o0#ect that contains thermal constant for 'assive cooling. 44.3.4
CTM' Thermal Hone o0#ect that returns current temperature in tenths of
degrees Eelvin.
44.3.44
CT'C 20#ect evaluates to the current num0er of supported throttling states. 8.".3.3
CT'T Control method invoked when a devicesM em0edded temperature sensor
crosses a temperature trip point.
44.3.42
CT3A 3esource data t(pe reserved field name 49.4.8
CT3! 3esource data t(pe reserved field name 49.4.8
CT3T 20#ect provides thermal relationship information 0etween platform
devices.
44.3.43
CT!- 20#ect that conve(s Throttling !tate dependencies 8.".3."
CT!5 T(pe&!pecific 5lags fields in a Word, -Word or GWord address space
descriptor
49.4.8
CT!' Thermal Hone o0#ect that contains thermal sampling period for 'assive
cooling.
44.3.4"
CT!T 20#ect returns minimum temperature separation for deviceMs
programma0le temperature trip points.
44.3.4*
CT!! 20#ect evaluates to a ta0le of support throttling states. 8.".3.2
CTT' 3esource data t(pe reserved field name 49.4.8
BCTT! Control method used to prepare to sleep and run once awakened 9.3.+
CTS' 3esource data t(pe reserved field name 49.4.8
CT? AC'% 4. thermal Hone scope *.3.4
CT?- 20#ect evaluates to a package of device names associated with a
Thermal ?one.
44.3.4+
CT?M 20#ect indicates the thermal Hone of which a device is a mem0er. 44.3.49
CT?' Thermal Hone polling fre:uenc( in tenths of seconds. 44.3.48
C,%- -evice identification o0#ect that specifies a deviceMs uni:ue persistent
%-, or a control method that generates it.
+.4.6
C,'C 20#ect provides ,!; port capa0ilities information.. 6.4"
C,'- 20#ect that returns user presence information. 6.49.4
C,'' 20#ect evaluates to user presence polling interval. 6.49.2
CD'2 3eturns 32&0it integer indicating the video post options. ;.".+
BCWAE 'ower management control method run once s(stem is awakened. 9.3.9
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
2+2 Advanced Configuration and 'ower %nterface !pecification
6.7 Predefned Objects
The AM1 interpreter of an AC'% compati0le operating s(stem supports the evaluation of a num0er of
predefined o0#ects. The o0#ects are considered J0uilt inL to the AM1 interpreter on the target operating
s(stem.
A list of predefined o0#ect names are shown in the following ta0le.
Ta!le A-AA Predefined 3!Cect 0a%es
0a%e 5escription
BC$1 $lo0al 1ock
BC2! Name of the operating s(stem
BC2!% 2perating !(stem %nterface support
BC3.D 3evision of the AC'% specification that 2!'M implements.
6.7.1 \_GL (Global Lock Mutex)
This predefined o0#ect is a Mute/ o0#ect that 0ehaves like a Mute/ as defined in section 49.*.96, JMute/
=-eclare !(nchroniHationFMute/ 20#ect>,L with the added 0ehavior that ac:uiring this Mute/ also ac:uires
the shared environment $lo0al 1ock defined in section *.2.4.4, J$lo0al 1ock.L This allows Control
Methods to e/plicitl( s(nchroniHe with the $lo0al 1ock if necessar(.
6.7.2 \_OSI (Operating System Interfaces)
This o0#ect provides the platform with the a0ilit( to :uer( 2!'M to determine the set of AC'% related
interfaces, 0ehaviors, or features that the operating s(stem supports.
The C2!% method has one argument and one return value. The argument is an 2! vendor defined string
representing a set of 2! interfaces and 0ehaviors or an AC'% defined string representing an operating
s(stem and an AC'% feature group of the form, J=SAendorString&&eat're4ro'pStringL.
S)ntax
_0S# (Interface)LB BooleanResult
Argu%ents
Interface< Strin, U Strin, 'E' Strin,
!pecifies the 2! interface F 0ehavior compati0ilit( string or the 5eature $roup !tring, as defined
in Ta0le *&*9, or the 2! Dendor !tring 'refi/&2! Dendor !pecific !tring. 2! Dendor !tring
'refi/es are defined in Ta0le *&*+.
"eturn 7alue
BooleanResult< DWord)on2t
A return value of / indicates that interface, 0ehavior, feature, is not supported.
A return value of /55555555 indicates that interface, 0ehavior, feature, is supported.
2!'M ma( indicate support for multiple 2! interface F 0ehavior strings if the operating s(stem supports
the 0ehaviors. 5or e/ample, a newer version of an operating s(stem ma( indicate support for strings from
all or some of the prior versions of that operating s(stem.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 2+3
C2!% provides the platform with the a0ilit( to support new operating s(stem versions and their associated
features when the( 0ecome availa0le. 2!'M can choose to e/pose new functionalit( 0ased on the C2!%
argument string. That is, 2!'M can use the strings passed into C2!% to ensure compati0ilit( 0etween older
platforms and newer operating s(stems 0( maintaining known compati0le 0ehavior for a platform. As such,
it is recommended that C2!% 0e evaluated 0( the BC!;.%N% control method so that platform compati0le
0ehavior or features are availa0le earl( in operating s(stem initialiHation.
!ince feature group functionalit( ma( 0e dependent on 2!'M implementation, it ma( 0e re:uired that 2!
vendor&defined strings 0e checked 0efore feature group strings.
'latform developers should consult 2! vendor specific information for 2! vendor defined strings
representing a set of 2! interfaces and 0ehaviors. AC'% defined strings representing an operating s(stem
and an AC'% feature group are listed in the following ta0les.
Ta!le A-A- 3perating S)ste% 7endor Strings
3perating S)ste% 7endor String Prefix 5escription
J5ree;!-L 5ree ;!-
J@'&,AL @' ,ni/ 2perating .nvironment
J1inu/L $N,F1inu/ 2perating s(stem
J2penDM!L @' 2penDM! 2perating .nvironment
JWindowsL Microsoft Windows
Ta!le A-A. 6eature ;roup Strings
6eature ;roup String 5escription
JModule -eviceL 2!'M supports the declaration of module device =AC'%"> in the
namespace and will enumerate o0#ects under the module device scope.
J'rocessor -eviceL 2!'M supports the declaration of processors in the namespace using the
AC'%9 processor device @%-.
J3. Thermal ModelL 2!'M supports the e/tensions to the AC'% thermal model in 3evision
3..
J./tended Address !pace
-escriptorL
2!'M supports the ./tended Address !pace -escriptor
J3. C!C' ./tensionsL 2!'M evaluates C!C' with the additional acoustic limit and power limit
arguments defined in AC'% 3..
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
2+" Advanced Configuration and 'ower %nterface !pecification
C2!% ./ample A!1 using 2! vendor defined string<
Scope (_SB) //Scope
#f ()ondRef0f (_0S#$6ocal())
Store(.$ <00S)
/
/
%l2e
Switch(&r,4)
_%4F
Store(0ne$ \_SB.P)#..SF6%) // <urn on e9ection re8ue2t 6%D
!otif1(S6<F$ F) // %9ection re8ue2t driven from :P%4F
/
/
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
348 Advanced Configuration and 'ower %nterface !pecification
7.3.6 _RMV (Remove)
The optional C3MD o0#ect indicates to 2!'M whether the device can 0e removed while the s(stem is in
the working state and does not re:uire an( AC'% s(stem firmware actions to 0e performed for the device to
0e safel( removed from the s(stem =in other words, an( device that onl( supports surprise&st(le removal>.
An( such remova0le device that does not have C1CE or C.7/ control methods must have an C3MD o0#ect.
This allows 2!'M to indicate to the user that the device can 0e removed and to provide a wa( for shutting
down the device 0efore removing it. 2!'M will transition the device into -3 0efore telling the user it is
safe to remove the device.
This method is reevaluated after a device&check notification.
Arguments<
None
3esult Code<
I The device cannot 0e removed.
4 I The device can 0e removed.
0ote< 2perating !(stems implementing AC'% 4. interpret the presence of this o0#ect to mean that the
device is remova0le.
7.3.7 _STA (Status)
This o0#ect returns the status of a device, which can 0e one of the following< ena0led, disa0led, or removed.
Arguments<
None
3esult Code =0itmap><
;it !et if the device is present.
;it 4 !et if the device is ena0led and decoding its resources.
;it 2 !et if the device should 0e shown in the ,%.
;it 3 !et if the device is functioning properl( =cleared if the device failed its diagnostics>.
;it " !et if the 0atter( is present.
;its *I34 3eserved =must 0e cleared>.
%f 0it is cleared, then 0it 4 must also 0e cleared =in other words, a device that is not present cannot 0e
ena0led>.
A device can onl( decode its hardware resources if 0oth 0its and 4 are set. %f the device is not present =0it
cleared> or not ena0led =0it 4 cleared>, then the device must not decode its resources.
%f a device is present in the machine, 0ut should not 0e displa(ed in 2!'M user interface, 0it 2 is cleared.
5or e/ample, a note0ook could have #o(stick hardware =thus it is present and decoding its resources>, 0ut
the connector for plugging in the #o(stick re:uires a port replicator. %f the port replicator is not plugged in,
the #o(stick should not appear in the ,%, so 0it 2 is cleared.
C!TA ma( return 0it clear =not present> with 0it 3 set =device is functional>. This case is used to indicate
a valid device for which no device driver should 0e loaded =for e/ample, a 0ridge device.> Children of this
device ma( 0e present and valid. 2!'M should continue enumeration 0elow a device whose C!TA returns
this 0it com0ination.
%f a device o0#ect =including the processor o0#ect> does not have an C!TA o0#ect, then 2!'M assumes that
all of the a0ove 0its are set =in other words, the device is present, ena0led, shown in the ,%, and
functioning>.
This method must not reference an( operation regions that have not 0een declared availa0le 0( a C3.$
method.
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7.4 Resource Data Types for ACPI
The CC3!, C'3!, and C!3! control methods use packages of resource descriptors to descri0e the resource
re:uirements of devices.
7.4.1 ASL Macros for Resource Descriptors
A!1 includes some macros for creating resource descriptors. The A!1 s(nta/ for these macros is defined in
section 49.*, JA!1 2perator 3eferenceL, along with the other A!1 operators.
7.4.2 Small Resource Data Type
A small resource data t(pe ma( 0e 2 to 8 0(tes in siHe and adheres to the following format<
Ta!le --&+ S%all "esource 5ata T)pe Tag <it 5efinitions
3ffset 6ield
;(te Tag <itN.O Tag <itsN-H#O Tag <its N&H$O
T(peI !mall item name 1engthIn 0(tes
;(tes 4 to n -ata 0(tes
The following small information items are currentl( defined for 'lug and 'la( devices<
Ta!le --&& S%all "esource Ite%s
S%all Ite% 0a%e 7alue
3eserved /4
3eserved /2
3eserved /3
%3G format /"
-MA format /*
!tart dependent 5unction /+
.nd dependent 5unction /9
%F2 port descriptor /8
5i/ed location %F2 port descriptor /6
3eserved /AI/-
Dendor defined /.
.nd tag /5
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7.4.2.1
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IRQ Descriptor
T)pe $' S%all Ite% 0a%e $x(' Length P & or #
The %3G data structure indicates that the device uses an interrupt level and supplies a mask with 0its set
indicating the levels implemented in this device. 5or standard 'C&AT implementation there are 4* possi0le
interrupts so a two&0(te field is used. This structure is repeated for each separate interrupt re:uired.
Ta!le --&# I"K 5escriptor 5efinition
3ffset 6ield 0a%e
;(te Dalue \ 44n; =T(pe \ , small item name \ /", length \ =2 or 3>>
;(te 4 %3G mask 0itsV9<W, C%NT
;itVW represents %3G, 0itV4W is %3G4, and so on.
;(te 2 %3G mask 0itsV4*<8W, C%NT
;itVW represents %3G8, 0itV4W is %3G6, and so on.
;(te 3 %3G %nformation. .ach 0it, when set, indicates this device is capa0le of driving a certain t(pe of
interrupt. =2ptionalPif not included then assume edge sensitive, high true interrupts.> These 0its
can 0e used 0oth for reporting and setting %3G resources.
0oteH This descriptor is meant for descri0ing interrupts that are connected to '%C&compati0le
interrupt controllers, which can onl( 0e programmed for Active&@igh&.dge&Triggered or Active&
1ow&1evel&Triggered interrupts. An( other com0ination is illegal. The ./tended %nterrupt
-escriptor can 0e used to descri0e other com0inations.
;itV9<*W $eser2ed =must 0e >
;itV"W %nterrupt is shara0le, C!@3
;itV3W %nterrupt 'olarit(, C11
Active&@igh I This interrupt is sampled when the signal is high, or true
4 Active&1ow I This interrupt is sampled when the signal is low, or false.
;itV2<4W Ignored
;itVW %nterrupt Mode, C@.
1evel&Triggered I %nterrupt is triggered in response to signal in a low state.
4 .dge&Triggered I %nterrupt is triggered in response to a change in signal state
from low to high.
0ote< 1ow true, level sensitive interrupts ma( 0e electricall( shared, 0ut the process of how this might
work is 0e(ond the scope of this specification.
0ote< %f 0(te 3 is not included, @igh true, edge sensitive, non&sharea0le is assumed.
!ee section 49.*.**, J%nterrupt =%nterrupt 3esource -escriptor Macro,L for a description of the A!1 macro
that creates an %3G descriptor.
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7.4.2.2
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DMA Descriptor
T)pe $' S%all Ite% 0a%e $xA' Length P &
The -MA data structure indicates that the device uses a -MA channel and supplies a mask with 0its set
indicating the channels actuall( implemented in this device. This structure is repeated for each separate
channel re:uired.
Ta!le --&( 5MA 5escriptor 5efinition
3ffset 6ield 0a%e
;(te Dalue \ 444; =T(pe \ , small item name \ /*, length \ 2>
;(te 4 -MA channel mask 0itsV9<W, C-MA
;itVW is channel
;(te 2
;itV9W $eser2ed =must 0e >
;itsV+<*W -MA channel speed supported, CTS'
%ndicates compati0ilit( mode
4 %ndicates T(pe A -MA as descri0ed in the .%!A
4 %ndicates T(pe ; -MA
44 %ndicates T(pe 5
;itsV"<3W Ignored
;itV2W 1ogical device 0us master status, C;M
1ogical device is not a 0us master
4 1ogical device is a 0us master
;itsV4<W -MA transfer t(pe preference, C!%?
8&0it onl(
4 8& and 4+&0it
4 4+&0it onl(
44 $eser2ed
!ee section 49.*.3, J-MA =-MA 3esource -escriptor Macro>,L for a description of the A!1 macro that
creates a -MA descriptor.
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7.4.2.3
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Start Dependent Functions Descriptor
T)pe $' S%all Ite% 0a%e $x-' Length P $ or +
.ach logical device re:uires a set of resources. This set of resources ma( have interdependencies that need
to 0e e/pressed to allow ar0itration software to make resource allocation decisions a0out the logical device.
-ependent functions are used to e/press these interdependencies. The data structure definitions for
dependent functions are shown here. 5or a detailed description of the use of dependent functions refer to
the ne/t section.
Ta!le --&A Start 5ependent 6unctions
3ffset 6ield 0a%e
;(te Dalue \ C44Cn; =T(pe \ , small item name \ /+, length \= or 4>>
!tart -ependent 5unction fields ma( 0e of length or 4 0(tes. The e/tra 0(te is optionall( used to denote
the compati0ilit( or performanceFro0ustness priorit( for the resource group following the !tart -5 tag. The
compati0ilit( priorit( is a ranking of configurations for compati0ilit( with legac( operating s(stems. This is
the same as the priorit( used in the 'N';%2! interface. 5or e/ample, for compati0ilit( reasons, the
preferred configuration for C2M4 is %3G", %F2 358&355. The performanceFro0ustness performance is a
ranking of configurations for performance and ro0ustness reasons. 5or e/ample, a device ma( have a high&
performance, 0us mastering configuration that ma( not 0e supported 0( legac( operating s(stems. The 0us&
mastering configuration would have the highest performanceFro0ustness priorit( while its polled %F2 mode
might have the highest compati0ilit( priorit(.
%f the 'riorit( 0(te is not included, this indicates the dependent function priorit( is Oaccepta0leM. This 0(te is
defined as<
Ta!le --&- Start 5ependent 6unction Priorit) <)te 5efinition
<its 5efinition
4<
Compati0ilit( priorit(. Accepta0le values are<
$ood configuration< @ighest 'riorit( and preferred configuration
4 Accepta0le configuration< 1ower 'riorit( 0ut accepta0le configuration
2 !u0&optimal configuration< 5unctional configuration 0ut not optimal
3 3eserved
3<2
'erformanceFro0ustness. Accepta0le values are<
$ood configuration< @ighest 'riorit( and preferred configuration
4 Accepta0le configuration< 1ower 'riorit( 0ut accepta0le configuration
2 !u0&optimal configuration< 5unctional configuration 0ut not optimal
3 3eserved
9<" $eser2ed =must 0e >
Notice that if multiple -ependent 5unctions have the same priorit(, the( are further prioritiHed 0( the order
in which the( appear in the resource data structure. The -ependent 5unction that appears earliest =nearest
the 0eginning> in the structure has the highest priorit(, and so on.
!ee section 49.*.444, J!tart-ependent5n =!tart -ependent 5unction 3esource -escriptor Macro>,L for a
description of the A!1 macro that creates a !tart -ependent 5unction descriptor.
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7.4.2.4
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End Dependent Functions Descriptor
T)pe $' S%all Ite% 0a%e $x.' Length P $
2nl( one .nd -ependent 5unction item is allowed per logical device. This enforces the fact that -ependent
5unctions cannot 0e nested.
Ta!le --&. 1nd 5ependent 6unctions
3ffset 6ield 0a%e
;(te Dalue \ C444C; =T(pe \ , small item name \ /9 length \>
!ee section 49.*.39, J.nd-ependent5n =.nd -ependent 5unction 3esource -escriptor Macro,L for a
description of the A!1 macro that creates an .nd -ependent 5unctions descriptor.
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7.4.2.5
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I/O Port Descriptor
T)pe $' S%all Ite% 0a%e $x/' Length P .
There are two t(pes of descriptors for %F2 ranges. The first descriptor is a full function descriptor for
programma0le devices. The second descriptor is a minimal descriptor for old %!A cards with fi/ed %F2
re:uirements that use a 4&0it %!A address decode. The first t(pe descriptor can also 0e used to descri0e
fi/ed %F2 re:uirements for %!A cards that re:uire a 4+&0it address decode. This is accomplished 0( setting
the range minimum 0ase address and range ma/imum 0ase address to the same fi/ed %F2 value.
Ta!le --&/ I@3 Port 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te %F2 port descriptor Dalue \ 4444; =T(pe \ , !mall item name \ /8, 1ength \ 9>
;(te 4 %nformation
;itsV9<4W $eser2ed and must 0e
;itVW =C-.C>
4 The logical device decodes 4+&0it addresses
The logical device onl( decodes address 0itsV6<W
;(te 2 3ange minimum 0ase
address, CM%N 0itsV9<W
Address 0itsV9<W of the minimum 0ase %F2 address that the card ma( 0e
configured for.
;(te 3 3ange minimum 0ase
address, CM%N 0itsV4*<8W
Address 0itsV4*<8W of the minimum 0ase %F2 address that the card ma(
0e configured for.
;(te " 3ange ma/imum 0ase
address, CMAA 0itsV9<W
Address 0itsV9<W of the ma/imum 0ase %F2 address that the card ma(
0e configured for.
;(te * 3ange ma/imum 0ase
address, CMAA 0itsV4*<8W
Address 0itsV4*<8W of the ma/imum 0ase %F2 address that the card ma(
0e configured for.
;(te + ;ase alignment, CA1N Alignment for minimum 0ase address, increment in 4&0(te 0locks.
;(te 9 3ange length, C1.N The num0er of contiguous %F2 ports re:uested.
!ee section 49.*.*+, J%2 =%2 3esource -escriptor Macro,L for a description of the A!1 macro that creates
an %F2 'ort descriptor.
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7.4.2.6
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Fixed Location I/O Port Descriptor
T)pe $' S%all Ite% 0a%e $x,' Length P #
This descriptor is used to descri0e 4&0it %F2 locations.
Ta!le --&, 6ixed-Location I@3 Port 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te 5i/ed 1ocation %F2 port
descriptor
Dalue \ 4444; =T(pe \ , !mall item name \ /6, 1ength \ 3>
;(te 4 3ange 0ase address,
C;A! 0itsV9<W
Address 0itsV9<W of the 0ase %F2 address that the card ma( 0e configured
for. This descriptor assumes a 4&0it %!A address decode.
;(te 2 3ange 0ase address,
C;A! 0itsV6<8W
Address 0itsV6<8W of the 0ase %F2 address that the card ma( 0e configured
for. This descriptor assumes a 4&0it %!A address decode.
;(te 3 3ange length, C1.N The num0er of contiguous %F2 ports re:uested.
!ee section 49.*."9, J5i/ed%2 =5i/ed %F2 3esource -escriptor Macro,L for a description of the A!1 macro
that creates a 5i/ed %F2 'ort descriptor.
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7.4.2.7
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Vendor-Defned Descriptor
T)pe $' S%all Ite% 0a%e $x1' Length P + to .
The vendor defined resource data t(pe is for vendor use.
Ta!le --#$ 7endor-5efined "esource 5escriptor 5efinition
3ffset 6ield 0a%e
;(te Dalue \ 444nnn; =T(pe \ , small item name \ /., length \ =4&9>>
;(te 4 to 9 Dendor defined
!ee Dendor!hort =page 8"4> for a description of the A!1 macro that creates a short vendor&defined resource
descriptor.
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7.4.2.8
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End Tag
T)pe $' S%all Ite% 0a%e $x6' Length P +
The .nd tag identifies an end of resource data.
0oteH %f the checksum field is Hero, the resource data is treated as if the checksum operation succeeded.
Configuration proceeds normall(.
Ta!le --#+ 1nd Tag 5efinition
3ffset 6ield 0a%e
;(te Dalue \ 44444; =T(pe \ , small item name \ /5, length \ 4>
;(te 4 Checksum covering all resource data after the serial identifier. This checksum is
generated such that adding it to the sum of all the data 0(tes will produce a Hero sum.
The .nd Tag is automaticall( generated 0( the A!1 compiler at the end of the "esourceTe%plate
statement.
7.4.3 Large Resource Data Type
To allow for larger amounts of data to 0e included in the configuration data structure the large format is
shown 0elow. This includes a 4+&0it length field allowing up to +" E; of data.
Ta!le --#& Large "esource 5ata T)pe Tag <it 5efinitions
3ffset 6ield 0a%e
;(te Dalue \ 4///////; =T(pe \ 4, 1arge item name \ ///////>
;(te 4 1ength of data items 0itsV9<W
;(te 2 1ength of data items 0itsV4*<8W
;(tes 3 to
=1ength Z 2>
Actual data items
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The following large information items are currentl( defined for 'lug and 'la( %!A devices<
Ta!le --## Large "esource Ite%s
Large Ite% 0a%e 7alue
2"&0it memor( range descriptor /4
$eneric register descriptor /2
3eserved /3
Dendor defined /"
32&0it memor( range descriptor /*
32&0it fi/ed location memor( range descriptor /+
-W23- address space descriptor /9
W23- address space descriptor /8
./tended %3G descriptor /6
GW23- address space descriptor /A
./tended address space descriptor /;
3eserved /C && /95
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7.4.3.1
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24-Bit Memory Range Descriptor
T)pe +' Large Ite% 0a%e $x+
The 2"&0it memor( range descriptor descri0es a deviceMs memor( range resources within a 2"&0it address
space.
Ta!le --#( Large Me%or) "ange 5escriptor 5efinition
3ffset 6ield 0a%e' ASL 6ield
0a%e
5efinition
;(te Memor( range descriptor Dalue \ 44; =T(pe \ 4, 1arge item name \ /4>
;(te 4 1ength, 0itsV9<W Dalue \ 44; =6>
;(te 2 1ength, 0itsV4*<8W Dalue \ ; =>
;(te 3 %nformation This field provides e/tra information a0out this memor(.
;itV9<4W Ignored
;itVW Write status, C3W
4 writea0le =readFwrite>
non&writea0le =read&onl(>
;(te " 3ange minimum 0ase
address, CM%N, 0itsV9<W
Address 0itsV4*<8W of the minimum 0ase memor( address for
which the card ma( 0e configured.
;(te * 3ange minimum 0ase
address, CM%N, 0itsV4*<8W
Address 0itsV23<4+W of the minimum 0ase memor( address for
which the card ma( 0e configured
;(te + 3ange ma/imum 0ase
address, CMAA, 0itsV9<W
Address 0itsV4*<8W of the ma/imum 0ase memor( address for
which the card ma( 0e configured.
;(te 9 3ange ma/imum 0ase
address, CMAA, 0itsV4*<8W
Address 0itsV23<4+W of the ma/imum 0ase memor( address for
which the card ma( 0e configured
;(te 8 ;ase alignment, CA1N,
0itsV9<W
This field contains the lower eight 0its of the 0ase alignment. The
0ase alignment provides the increment for the minimum 0ase
address. =/ \ +" E;>
;(te 6 ;ase alignment, CA1N,
0itsV4*<8W
This field contains the upper eight 0its of the 0ase alignment. The
0ase alignment provides the increment for the minimum 0ase
address. =/ \ +" E;>
;(te 4 3ange length, C1.N,
0itsV9<W
This field contains the lower eight 0its of the memor( range
length. The range length provides the length of the memor( range
in 2*+ 0(te 0locks.
;(te 44 3ange length, C1.N,
0itsV4*<8W
This field contains the upper eight 0its of the memor( range
length. The range length field provides the length of the memor(
range in 2*+ 0(te 0locks.
0otesH
Address 0its V9<W of memor( 0ase addresses are assumed to 0e .
A Memor( range descriptor can 0e used to descri0e a fi/ed memor( address 0( setting the range
minimum 0ase address and the range ma/imum 0ase address to the same value.
2"&0it Memor( 3ange descriptors are used for legac( devices.
Mi/ing of 2"&0it and 32&0it memor( descriptors on the same device is not allowed.
!ee section 49.*.92, JMemor(2" =Memor( 3esource -escriptor Macro>,L for a description of the A!1
macro that creates a 2"&0it Memor( descriptor.
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7.4.3.2
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Vendor-Defned Descriptor
T)pe +' Large Ite% 0a%e $x(
The vendor defined resource data t(pe is for vendor use.
Ta!le --#A Large 7endor-5efined "esource 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te Dendor defined Dalue \ 44; =T(pe \ 4, 1arge item name \ /">
;(te 4 1ength, 0itsV9<W 1ower eight 0its of data length =,,%%- c vendor defined
data>
;(te 2 1ength, 0itsV4*<8W ,pper eight 0its of data length =,,%- c vendor defined
data>
;(te 3 ,,%- specific descriptor su0 t(pe ,,%- specific descriptor su0 t(pe value
;(te "&46 ,,%- ,,%- Dalue
;(te 2&
=1engthZ2>
Dendor -efined -ata Dendor defined data 0(tes
AC'% 3. defines the ,,%- specific descriptor su0t(pe field and the ,,%- field to address potential
collision of the use of this descriptor. %t is strongl( recommended that all newl( defined vendor descriptors
use these fields prior to Dendor -efined -ata.
!ee Dendor1ong =page 8"> for a description of the A!1 macro that creates a long vendor&defined resource
descriptor.
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7.4.3.3
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32-Bit Memory Range Descriptor
T)pe +' Large Ite% 0a%e $xA
This memor( range descriptor descri0es a deviceMs memor( resources within a 32&0it address space.
Ta!le --#- Large #&-<it Me%or) "ange 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te Memor( range descriptor Dalue \ 444; =T(pe \ 4, 1arge item name \ /*>
;(te 4 1ength, 0itsV9<W Dalue \ 44; =49>
;(te 2 1ength, 0itsV4*<8W Dalue \ ; =>
;(te 3 %nformation This field provides e/tra information a0out this memor(.
;itV9<4W Ignored
;itVW Write status, C3W
4 writea0le =readFwrite>
non&writea0le =read&onl(>
;(te " 3ange minimum 0ase address,
CM%N, 0itsV9<W
Address 0itsV9<W of the minimum 0ase memor( address for
which the card ma( 0e configured.
;(te * 3ange minimum 0ase address,
CM%N, 0itsV4*<8W
Address 0itsV4*<8W of the minimum 0ase memor( address for
which the card ma( 0e configured.
;(te + 3ange minimum 0ase address,
CM%N, 0itsV23<4+W
Address 0itsV23<4+W of the minimum 0ase memor( address for
which the card ma( 0e configured.
;(te 9 3ange minimum 0ase address,
CM%N, 0itsV34<2"W
Address 0itsV34<2"W of the minimum 0ase memor( address for
which the card ma( 0e configured.
;(te 8 3ange ma/imum 0ase address,
CMAA, 0itsV9<W
Address 0itsV9<W of the ma/imum 0ase memor( address for
which the card ma( 0e configured.
;(te 6 3ange ma/imum 0ase address,
CMAA, 0itsV4*<8W
Address 0itsV4*<8W of the ma/imum 0ase memor( address for
which the card ma( 0e configured.
;(te 4 3ange ma/imum 0ase address,
CMAA, 0itsV23<4+W
Address 0itsV23<4+W of the ma/imum 0ase memor( address for
which the card ma( 0e configured.
;(te 44 3ange ma/imum 0ase address,
CMAA, 0itsV34<2"W
Address 0itsV34<2"W of the ma/imum 0ase memor( address for
which the card ma( 0e configured.
;(te 42 ;ase alignment, CA1N 0itsV9<W
This field contains ;itsV9<W of the 0ase alignment. The 0ase
alignment provides the increment for the minimum 0ase
address.
;(te 43 ;ase alignment, CA1N 0itsV4*<8W
This field contains ;itsV4*<8W of the 0ase alignment. The 0ase
alignment provides the increment for the minimum 0ase
address.
;(te 4" ;ase alignment, CA1N 0itsV23<4+W
This field contains ;itsV23<4+W of the 0ase alignment. The 0ase
alignment provides the increment for the minimum 0ase
address.
;(te 4* ;ase alignment, CA1N 0itsV34<2"W
This field contains ;itsV34<2"W of the 0ase alignment. The 0ase
alignment provides the increment for the minimum 0ase
address.
;(te 4+ 3ange length, C1.N 0itsV9<W
This field contains ;itsV9<W of the memor( range length. The
range length provides the length of the memor( range in 4&
0(te 0locks.
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3ffset 6ield 0a%e 5efinition
;(te 49 3ange length, C1.N 0itsV4*<8W
This field contains ;itsV4*<8W of the memor( range length. The
range length provides the length of the memor( range in 4&
0(te 0locks.
;(te 48 3ange length, C1.N 0itsV23<4+W
This field contains ;itsV23<4+W of the memor( range length.
The range length provides the length of the memor( range in
4&0(te 0locks.
;(te 46 3ange length, C1.N 0itsV34<2"W
This field contains ;itsV34<2"W of the memor( range length.
The range length provides the length of the memor( range in
4&0(te 0locks.
0oteH Mi/ing of 2"&0it and 32&0it memor( descriptors on the same device is not allowed.
!ee section 49.*.93, JMemor(32 =Memor( 3esource -escriptor Macro>,L for a description of the A!1
macro that creates a 32&0it Memor( descriptor.
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7.4.3.4
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32-Bit Fixed Memory Range Descriptor
T)pe +' Large Ite% 0a%e $x-
This memor( range descriptor descri0es a deviceMs memor( resources within a 32&0it address space.
Ta!le --#. Large 6ixed-Location Me%or) "ange 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te Memor( range descriptor Dalue \ 444; =T(pe \ 4, 1arge item name \ +>
;(te 4 1ength, 0itsV9<W Dalue \ 44; =6>
;(te 2 1ength, 0itsV4*<8W Dalue \ ; =>
;(te 3 %nformation This field provides e/tra information a0out this memor(.
;itV9<4W Ignored
;itVW Write status, C3W
4 writea0le =readFwrite>
non&writea0le =read&onl(>>
;(te " 3ange 0ase address,
C;A! 0itsV9<W
Address 0itsV9<W of the 0ase memor( address for which the card ma(
0e configured.
;(te * 3ange 0ase address,
C;A! 0itsV4*<8W
Address 0itsV4*<8W of the 0ase memor( address for which the card ma(
0e configured.
;(te + 3ange 0ase address,
C;A! 0itsV23<4+W
Address 0itsV23<4+W of the 0ase memor( address for which the card ma(
0e configured.
;(te 9 3ange 0ase address,
C;A! 0itsV34<2"W
Address 0itsV34<2"W of the 0ase memor( address for which the card ma(
0e configured.
;(te 8 3ange length, C1.N
0itsV9<W
This field contains ;itsV9<W of the memor( range length. The range
length provides the length of the memor( range in 4&0(te 0locks.
;(te 6 3ange length, C1.N
0itsV4*<8W
This field contains ;itsV4*<8W of the memor( range length. The range
length provides the length of the memor( range in 4&0(te 0locks.
;(te 4 3ange length, C1.N
0itsV23<4+W
This field contains ;itsV23<4+W of the memor( range length. The range
length provides the length of the memor( range in 4&0(te 0locks.
;(te 44 3ange length, C1.N
0itsV34<2"W
This field contains ;itsV34<2"W of the memor( range length. The range
length provides the length of the memor( range in 4&0(te 0locks.
0oteH Mi/ing of 2"&0it and 32&0it memor( descriptors on the same device is not allowed.
!ee section 49.*.9", JMemor(325i/ed =Memor( 3esource -escriptor>,L for a description of the A!1 macro
that creates a 32&0it 5i/ed Memor( descriptor.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
3"+ Advanced Configuration and 'ower %nterface !pecification
7.4.3.5
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 3"9
Address Space Resource Descriptors
The GW23-, -W23-, W23-, and ./tended Address !pace -escriptors are general&purpose structures
for descri0ing a variet( of t(pes of resources. These resources also include support for advanced server
architectures =such as multiple root 0uses>, and resource t(pes found on some 3%!C processors. These
descriptors can descri0e various kinds of resources. The following ta0le defines the valid com0ination of
each field and how the( should 0e interpreted.
Ta!le --#/ 7alid co%!ination of Address Space 5escriptors fields
DL10 DMI6 DMA6 5efinition
Daria0le siHe, varia0le location resource descriptor for C'3!.
%f CM%5 is set, CM%N must 0e a multiple of =C$3AZ4>. %f CMA5 is set, CMAA
must 0e =a multiple of =C$3AZ4>>&4.
2! can pick the resource range that satisfies following conditions<
%f CM%5 is not set, start address is a multiple of =C$3AZ4> and greater
or e:ual to CM%N. 2therwise, start address is CM%N.
%f CMA5 is not set, end address is =a multiple of =C$3AZ4>>&4 and less
or e:ual to CMAA. 2therwise, end address is CMAA.
4
4
4 4 =%llegal com0ination>
) 5i/ed siHe, varia0le location resource descriptor for C'3!.
C1.N must 0e a multiple of =C$3AZ4>.
2! can pick the resource range that satisfies following conditions<
!tart address is a multiple of =C$3AZ4> and greater or e:ual to CM%N.
.nd address is =start addressZC1.N&4> and less or e:ual to CMAA.
) 4 =%llegal com0ination>
) 4 =%llegal com0ination>
) 4 4 5i/ed siHe, fi/ed location resource descriptor.
C$3A must 0e and C1.N must 0e =CMAA & CM%N Z4>.
7.4.3.5.1 QWord Address Space Descriptor
T)pe +' Large Ite% 0a%e $xA
The GW23- address space descriptor is used to report resource usage in a +"&0it address space =like
memor( and %F2>.
Ta!le --#, K:3"5 Address Space 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te GW23- Address !pace
-escriptor
Dalue\444; =T(pe \ 4, 1arge item name \ /A>
;(te 4 1ength, 0itsV9<W Daria0le< Dalue \ "3 =minimum>
;(te 2 1ength, 0itsV4*<8W Daria0le< Dalue \ =minimum>
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
3"8 Advanced Configuration and 'ower %nterface !pecification
3ffset 6ield 0a%e 5efinition
;(te 3 3esource T(pe %ndicates which t(pe of resource this descriptor descri0es. -efined
values are<
Memor( range
4 %F2 range
2 ;us num0er range
3I464 $eser2ed
462&2**@ardware Dendor -efined
;(te " $eneral 5lags 5lags that are common to all resource t(pes<
;itsV9<"W $eser2ed =must 0e >
;itV3W Min Address 5i/ed, CMA5<
4 The specified ma/imum address is fi/ed
The specified ma/imum address is not fi/ed
and can 0e changed
;itV2W Ma/ Address 5i/ed,CM%5<
4 The specified minimum address is fi/ed
The specified minimum address is not fi/ed
and can 0e changed
;itV4W -ecode T(pe, C-.C<
4 This 0ridge su0tractivel( decodes this address
=top level 0ridges onl(>
This 0ridge positivel( decodes this address
;itVW ConsumerF'roducer<
4IThis device consumes this resource
IThis device produces and consumes this resource
;(te * T(pe !pecific 5lags 5lags that are specific to each resource t(pe. The meaning of the
flags in this field depends on the value of the 3esource T(pe field
=see a0ove>.
;(te + Address space granularit(,
C$3A 0itsV9<W
A set 0it in this mask means that this 0it is decoded. All 0its less
significant than the most significant set 0it must 0e set. That is, the
value of the full Address !pace $ranularit( field =all 32 0its> must
0e a num0er =2
n
&4>.
;(te 9 Address space granularit(,
C$3A 0itsV4*<8W
;(te 8 Address space granularit(,
C$3A 0itsV23<4+W
;(te 6 Address space granularit(,
C$3A 0itsV34<2"W
;(te 4 Address space granularit(,
C$3A 0itsV36<32W
;(te 44 Address space granularit(,
C$3A 0itsV"9<"W
;(te 42 Address space granularit(,
C$3A 0itsV**<"8W
;(te 43 Address space granularit(,
C$3A 0itsV+3<*+W
;(te 4" Address range minimum,
CM%N 0itsV9<W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 3"6
3ffset 6ield 0a%e 5efinition
;(te 4* Address range minimum,
CM%N 0itsV4*<8W
;(te 4+ Address range minimum,
CM%N 0itsV23<4+W
;(te 49 Address range minimum,
CM%N 0itsV34<2"W
;(te 48 Address range minimum,
CM%N 0itsV36<32W
;(te 46 Address range minimum,
CM%N 0itsV"9<"W
;(te 2 Address range minimum,
CM%N 0itsV**<"8W
;(te 24 Address range minimum,
CM%N 0itsV+3<*+W
;(te 22 Address range ma/imum,
CMAA 0itsV9<W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
;(te 23 Address range ma/imum,
CMAA 0itsV4*<8W
;(te 2" Address range ma/imum,
CMAA 0itsV23<4+W
;(te 2* Address range ma/imum,
CMAA 0itsV34<2"W
;(te 2+ Address range ma/imum,
CMAA 0itsV36<32W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
;(te 29 Address range ma/imum,
CMAA 0itsV"9<"W
;(te 28 Address range ma/imum,
CMAA 0itsV**<"8W
;(te 26 Address range ma/imum,
CMAA 0itsV+3<*+W
;(te 3 Address Translation offset,
CT3A 0itsV9<W
5or 0ridges that translate addresses across the 0ridge, this is the
offset that must 0e added to the address on the secondar( side to
o0tain the address on the primar( side. Non&0ridge devices must list
for all Address Translation offset 0its.
;(te 34 Address Translation offset,
CT3A 0itsV4*<8W
;(te 32 Address Translation offset,
CT3A 0itsV23<4+W
;(te 33 Address Translation offset,
CT3A 0itsV34<2"W
;(te 3" Address Translation offset,
CT3A 0itsV36<32W
;(te 3* Address Translation offset,
CT3A 0itsV"9<"W
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
3* Advanced Configuration and 'ower %nterface !pecification
3ffset 6ield 0a%e 5efinition
;(te 3+ Address Translation offset,
CT3A 0itsV**<"8W
;(te 39 Address Translation offset,
CT3A 0itsV+3<*+W
;(te 38 Address length, C1.N
0itsV9<W
;(te 36 Address length, C1.N,
0itsV4*<8W
;(te " Address length, C1.N
0itsV23<4+W
;(te "4 Address length, C1.N
0itsV34<2"W
;(te "2 Address length, C1.N
0itsV36<32W
;(te "3 Address length, C1.N
0itsV"9<"W
;(te "" Address length, C1.N
0itsV**<"8W
;(te "* Address length, C1.N
0itsV+3<*+W
;(te "+ 3esource !ource %nde/ =2ptional> 2nl( present if 3esource !ource =0elow> is present. This
field gives an inde/ to the specific resource descriptor that this
device consumes from in the current resource template for the
device o0#ect pointed to in 3esource !ource.
!tring 3esource !ource =2ptional> %f present, the device that uses this descriptor consumes
its resources from the resources produced 0( the named device
o0#ect. %f not present, the device consumes its resources out of a
glo0al pool. %f not present, the device consumes this resource from
its hierarchical parent.
!ee GWord%2 =page 823>, GWordMemor( =page 82*> and A!1CGWordAddress!pace for a description of
the A!1 macros that creates a GW23- Address !pace descriptor.
7.4.3.5.2 DWord Address Space Descriptor
T)pe +' Large Ite% 0a%e $x.
The -W23- address space descriptor is used to report resource usage in a 32&0it address space =like
memor( and %F2>.
Ta!le --($ 5:3"5 Address Space 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te -W23- Address !pace
-escriptor
Dalue\4444; =T(pe \ 4, 1arge item name \ /9>
;(te 4 1ength, 0itsV9<W Daria0le< Dalue \ 23 =minimum>
;(te 2 1ength, 0itsV4*<8W Daria0le< Dalue \ =minimum>
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 3*4
3ffset 6ield 0a%e 5efinition
;(te 3 3esource T(pe %ndicates which t(pe of resource this descriptor descri0es. -efined
values are<
Memor( range
4 %F2 range
2 ;us num0er range
3I464 $eser2ed
462&2**@ardware Dendor -efined
;(te " $eneral 5lags 5lags that are common to all resource t(pes<
;itsV9<"W $eser2ed =must 0e >
;itV3W Min Address 5i/ed, CMA5<
4 The specified ma/imum address is fi/ed
The specified ma/imum address is not fi/ed
and can 0e changed
;itV2W Ma/ Address 5i/ed,CM%5<
4 The specified minimum address is fi/ed
The specified minimum address is not fi/ed
and can 0e changed
;itV4W -ecode T(pe, C-.C<
4 This 0ridge su0tractivel( decodes this address
=top level 0ridges onl(>
This 0ridge positivel( decodes this address
;itVW ConsumerF'roducer<
4IThis device consumes this resource
IThis device produces and consumes this resource
;(te * T(pe !pecific 5lags 5lags that are specific to each resource t(pe. The meaning of the
flags in this field depends on the value of the 3esource T(pe field
=see a0ove>.
;(te + Address space granularit(,
C$3A 0itsV9<W
A set 0it in this mask means that this 0it is decoded. All 0its less
significant than the most significant set 0it must 0e set. =in other
words, the value of the full Address !pace $ranularit( field =all 32
0its> must 0e a num0er =2
n
&4>.
;(te 9 Address space granularit(,
C$3A 0itsV4*<8W
;(te 8 Address space granularit(,
C$3A 0its V23<4+W
;(te 6 Address space granularit(,
C$3A 0its V34<2"W
;(te 4 Address range minimum,
CM%N 0its V9<W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
;(te 44 Address range minimum,
CM%N 0its V4*<8W
;(te 42 Address range minimum,
CM%N 0its V23<4+W
;(te 43 Address range minimum,
CM%N 0its V34<2"W
;(te 4" Address range ma/imum,
CMAA 0its V9<W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
3*2 Advanced Configuration and 'ower %nterface !pecification
3ffset 6ield 0a%e 5efinition
;(te 4* Address range ma/imum,
CMAA 0its V4*<8W
;(te 4+ Address range ma/imum,
CMAA 0its V23<4+W
;(te 49 Address range ma/imum,
CMAA 0its V34<2"W
;(te 48 Address Translation offset,
CT3A0its V9<W
5or 0ridges that translate addresses across the 0ridge, this is the
offset that must 0e added to the address on the secondar( side to
o0tain the address on the primar( side. Non&0ridge devices must
list for all Address Translation offset 0its.
;(te 46 Address Translation offset,
CT3A 0its V4*<8W
;(te 2 Address Translation offset,
CT3A 0its V23<4+W
;(te 24 Address Translation offset,
CT3A 0its V34<2"W
;(te 22 Address 1ength, C1.N, 0its
V9<W
;(te 23 Address 1ength, C1.N, 0its
V4*<8W
;(te 2" Address 1ength, C1.N, 0its
V23<4+W
;(te 2* Address 1ength, C1.N, 0its
V34<2"W
;(te 2+ 3esource !ource %nde/ =2ptional> 2nl( present if 3esource !ource =0elow> is present. This
field gives an inde/ to the specific resource descriptor that this
device consumes from in the current resource template for the
device o0#ect pointed to in 3esource !ource.
!tring 3esource !ource =2ptional> %f present, the device that uses this descriptor consumes
its resources from the resources produced 0( the named device
o0#ect. %f not present, the device consumes its resources out of a
glo0al pool.
%f not present, the device consumes this resource from its
hierarchical parent.
!ee -Word%2 =page 99+>, -WordMemor( =page 998> and A!1C-WordAddress!pace for a description of
the A!1 macro that creates a -W23- Address !pace descriptor
7.4.3.5.3 Word Address Space Descriptor
T)pe +' Large Ite% 0a%e $x/
The W23- address space descriptor is used to report resource usage in a 4+&0it address space =like
memor( and %F2>.
0oteH This descriptor is e/actl( the same as the -W23- descriptor specified in Ta0le +&29K the onl(
difference is that the address fields are 4+ 0its wide rather than 32 0its wide.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 3*3
Ta!le --(+ :3"5 Address Space 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te W23- Address !pace
-escriptor
Dalue\44; =T(pe \ 4, 1arge item name \ /8>
;(te 4 1ength, 0itsV9<W Daria0le< Dalue \ 43 =minimum>
;(te 2 1ength, 0itsV4*<8W Daria0le< Dalue \ =minimum>
;(te 3 3esource T(pe %ndicates which t(pe of resource this descriptor descri0es. -efined
values are<
Memor( range
4 %F2 range
2 ;us num0er range
3I464 $eser2ed
462&2**@ardware Dendor -efined
;(te " $eneral 5lags 5lags that are common to all resource t(pes<
;itsV9<"W $eser2ed =must 0e >
;itV3W Min Address 5i/ed, CMA5<
4 The specified ma/imum address is fi/ed
The specified ma/imum address is not fi/ed
and can 0e changed
;itV2W Ma/ Address 5i/ed,CM%5<
4 The specified minimum address is fi/ed
The specified minimum address is not fi/ed
and can 0e changed
;itV4W -ecode T(pe, C-.C<
4 This 0ridge su0tractivel( decodes this address
=top level 0ridges onl(>
This 0ridge positivel( decodes this address
;itVW ConsumerF'roducer<
4IThis device consumes this resource
IThis device produces and consumes this resource
;(te * T(pe !pecific 5lags 5lags that are specific to each resource t(pe. The meaning of the
flags in this field depends on the value of the 3esource T(pe field
=see a0ove>.
;(te + Address space granularit(,
C$3A 0itsV9<W
A set 0it in this mask means that this 0it is decoded. All 0its less
significant than the most significant set 0it must 0e set. =%n other
words, the value of the full Address !pace $ranularit( field =all 4+
0its> must 0e a num0er =2
n
&4>.
;(te 9 Address space granularit(,
C$3A 0itsV4*<8W
;(te 8 Address range minimum,
CM%N, 0its V9<W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
;(te 6 Address range minimum,
CM%N, 0its V4*<8W
;(te 4 Address range ma/imum,
CMAA, 0its V9<W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
;(te 44 Address range ma/imum,
CMAA, 0its V4*<8W
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
3*" Advanced Configuration and 'ower %nterface !pecification
3ffset 6ield 0a%e 5efinition
;(te 42 Address Translation offset,
CT3A, 0its V9<W
5or 0ridges that translate addresses across the 0ridge, this is the
offset that must 0e added to the address on the secondar( side to
o0tain the address on the primar( side. Non&0ridge devices must list
for all Address Translation offset 0its.
;(te 43 Address Translation offset,
CT3A, 0its V4*<8W
;(te 4" Address 1ength, C1.N, 0its
V9<W
;(te 4* Address 1ength, C1.N, 0its
V4*<8W
;(te 4+ 3esource !ource %nde/ =2ptional> 2nl( present if 3esource !ource =0elow> is present. This
field gives an inde/ to the specific resource descriptor that this
device consumes from in the current resource template for the
device o0#ect pointed to in 3esource !ource.
!tring 3esource !ource =2ptional> %f present, the device that uses this descriptor consumes
its resources from the resources produced 0( the named device
o0#ect. %f not present, the device consumes its resources out of a
glo0al pool. %f not present, the device consumes this resource from
its hierarchical parent.
!ee Word%2 =page 8"3>, Word;usNum0er =page 8"2> and A!1CWordAddress!pace for a description of the
A!1 macros that create a Word address descriptor.
7.4.3.5.4 Extended Address Space Descriptor
T)pe +' Large Ite% 0a%e $x<
The ./tended Address !pace descriptor is used to report resource usage in the address space =like memor(
and %F2>.
Ta!le --(& 1xtended Address Space 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te ./tended Address !pace
-escriptor
Dalue\4444; =T(pe \ 4, 1arge item name \ /;>
;(te 4 1ength, 0itsV9<W Daria0le< Dalue \ *3
;(te 2 1ength, 0itsV4*<8W Daria0le< Dalue \
;(te 3 3esource T(pe %ndicates which t(pe of resource this descriptor descri0es. -efined
values are<
Memor( range
4 %F2 range
2 ;us num0er range
3I464 $eser2ed
462&2**@ardware Dendor -efined
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 3**
3ffset 6ield 0a%e 5efinition
;(te " $eneral 5lags 5lags that are common to all resource t(pes<
;itsV9<"W $eser2ed =must 0e >
;itV3W Min Address 5i/ed, CMA5<
4 The specified ma/imum address is fi/ed
The specified ma/imum address is not fi/ed
and can 0e changed
;itV2W Ma/ Address 5i/ed,CM%5<
4 The specified minimum address is fi/ed
The specified minimum address is not fi/ed
and can 0e changed
;itV4W -ecode T(pe, C-.C<
4 This 0ridge su0tractivel( decodes this address
=top level 0ridges onl(>
This 0ridge positivel( decodes this address
;itVW ConsumerF'roducer<
4IThis device consumes this resource
IThis device produces and consumes this resource
;(te * T(pe !pecific 5lags 5lags that are specific to each resource t(pe. The meaning of the
flags in this field depends on the value of the 3esource T(pe field
=see a0ove>. 5or the Memor( 3esource T(pe, the definition is
defined in sectionTref). 5or other 3esource T(pes, refer to the
e/isting definitions for the Address !pace -escriptors.
;(te + 3evision %- %ndicates the revision of the ./tended Address !pace descriptor. 5or
AC'% 3., this value is 4.
;(te 9 3eserved
Ta!le --(& 1xtended Address Space 5escriptor 5efinition (continued)
3ffset 6ield 0a%e 5efinition
;(te 8 Address space granularit(,
C$3A 0itsV9<W
A set 0it in this mask means that this 0it is decoded. All 0its less
significant than the most significant set 0it must 0e set. That is, the
value of the full Address !pace $ranularit( field =all 32 0its> must
0e a num0er =2
n
&4>.
;(te 6 Address space granularit(,
C$3A 0itsV4*<8W
;(te 4 Address space granularit(,
C$3A 0itsV23<4+W
;(te 44 Address space granularit(,
C$3A 0itsV34<2"W
;(te 42 Address space granularit(,
C$3A 0itsV36<32W
;(te 43 Address space granularit(,
C$3A 0itsV"9<"W
;(te 4" Address space granularit(,
C$3A 0itsV**<"8W
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
3*+ Advanced Configuration and 'ower %nterface !pecification
3ffset 6ield 0a%e 5efinition
;(te 4* Address space granularit(,
C$3A 0itsV+3<*+W
;(te 4+ Address range minimum,
CM%N 0itsV9<W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
;(te 49 Address range minimum,
CM%N 0itsV4*<8W
;(te 48 Address range minimum,
CM%N 0itsV23<4+W
;(te 46 Address range minimum,
CM%N 0itsV34<2"W
;(te 2 Address range minimum,
CM%N 0itsV36<32W
;(te 24 Address range minimum,
CM%N 0itsV"9<"W
Ta!le --(& 1xtended Address Space 5escriptor 5efinition (continued)
3ffset 6ield 0a%e 5efinition
;(te 22 Address range minimum,
CM%N 0itsV**<"8W
;(te 23 Address range minimum,
CM%N 0itsV+3<*+W
;(te 2" Address range ma/imum,
CMAA 0itsV9<W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
;(te 2* Address range ma/imum,
CMAA 0itsV4*<8W
;(te 2+ Address range ma/imum,
CMAA 0itsV23<4+W
;(te 29 Address range ma/imum,
CMAA 0itsV34<2"W
;(te 28 Address range ma/imum,
CMAA 0itsV36<32W
5or 0ridges that translate addresses, this is the address space on the
secondar( side of the 0ridge.
;(te 26 Address range ma/imum,
CMAA 0itsV"9<"W
;(te 3 Address range ma/imum,
CMAA 0itsV**<"8W
;(te 34 Address range ma/imum,
CMAA 0itsV+3<*+W
;(te 32 Address Translation offset,
CT3A 0itsV9<W
5or 0ridges that translate addresses across the 0ridge, this is the
offset that must 0e added to the address on the secondar( side to
o0tain the address on the primar( side. Non&0ridge devices must list
for all Address Translation offset 0its.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 3*9
3ffset 6ield 0a%e 5efinition
;(te 33 Address Translation offset,
CT3A 0itsV4*<8W
;(te 3" Address Translation offset,
CT3A 0itsV23<4+W
;(te 3* Address Translation offset,
CT3A 0itsV34<2"W
Ta!le --(& 1xtended Address Space 5escriptor 5efinition (continued)
3ffset 6ield 0a%e 5efinition
;(te 3+ Address Translation offset, CT3A
0itsV36<32W
;(te 39 Address Translation offset, CT3A
0itsV"9<"W
;(te 38 Address Translation offset, CT3A
0itsV**<"8W
;(te 36 Address Translation offset, CT3A
0itsV+3<*+W
;(te " Address length, C1.N 0itsV9<W
;(te "4 Address length, C1.N, 0itsV4*<8W
;(te "2 Address length, C1.N 0itsV23<4+W
;(te "3 Address length, C1.N 0itsV34<2"W
;(te "" Address length, C1.N 0itsV36<32W
;(te "* Address length, C1.N 0itsV"9<"W
;(te "+ Address length, C1.N 0itsV**<"8W
;(te "9 Address length, C1.N 0itsV+3<*+W
;(te "8 T(pe !pecific Attri0ute, CATT
0itsV9<W
Attri0utes that are specific to each resource t(pe. The
meaning of the attri0utes in this field depends on the value of
the 3esource T(pe field =see a0ove>. 5or the Memor(
3esource T(pe, the definition is defined section Tref). 5or
other 3esource T(pes, this field is reserved to .
;(te "6 T(pe !pecific Attri0ute, CATT
0itsV4*<8W
;(te * T(pe !pecific Attri0ute, CATT
0itsV23<4+W
;(te *4 T(pe !pecific Attri0ute, CATT
0itsV34<2"W
;(te *2 T(pe !pecific Attri0ute, CATT
0itsV36<32W
;(te *3 T(pe !pecific Attri0ute, CATT
0itsV"9<"W
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3*8 Advanced Configuration and 'ower %nterface !pecification
3ffset 6ield 0a%e 5efinition
;(te *" T(pe !pecific Attri0ute, CATT
0itsV**<"8W
;(te ** T(pe !pecific Attri0ute, CATT
0itsV+3<*+W
!ee section 49.*."4, J./tended!pace =./tended Address !pace 3esource -escriptor Macro>,L for a
description of the A!1 macro that creates an ./tended Address !pace descriptor.
7.4.3.5.4.1 Type Specifc Attributes
The meaning of the T(pe !pecific Attri0utes field of the ./tended Address !pace -escriptor depends on
the value of the 3esource T(pe field in the descriptor. When 3esource T(pe \ =memor( resource>, the
T(pe !pecific Attri0utes field values are defined as follows<
FF These attri0utes can 0e d23edd together as needed.
Ydefine AC'%CM.M23SC,C /4
Ydefine AC'%CM.M23SCWC /2
Ydefine AC'%CM.M23SCWT /"
Ydefine AC'%CM.M23SCW; /8
Ydefine AC'%CM.M23SC,C. /4
Ydefine AC'%CM.M23SCND /8
AC'%CM.M23SC,C Memor( cachea0ilit( attri0ute< The memor( region supports 0eing configured as
not cachea0le.
AC'%CM.M23SCWC Memor( cachea0ilit( attri0ute< The memor( region supports 0eing configured as
write com0ining.
AC'%CM.M23SCWT Memor( cachea0ilit( attri0ute< The memor( region supports 0eing configured as
cachea0le with a dwrite through dpolic(. Writes that hit in the cache will also 0e written to main memor(.
AC'%CM.M23SCW; Memor( cachea0ilit( attri0ute< The memor( region supports 0eing configured as
cachea0le with a dwrite 0ack dpolic(. 3eads and writes that hit in the cache do not propagate to main
memor(. -irt( data is written 0ack to main memor( when a new cache line is allocated.
AC'%CM.M23SC,C. Memor( cachea0ilit( attri0ute< The memor( region supports 0eing configured as
not cachea0le, e/ported, and supports the dfetch and add dsemaphore mechanism.
AC'%CM.M23SCND Memor( non&volatile attri0ute< The memor( region is non&volatile. ,se of memor(
with this attri0ute is su0#ect to characteriHation.
Notice< These 0its are defined so as to match the .5% definition when applica0le.
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7.4.3.5.5 Resource Type Specifc Flags
The meaning of the flags in the T(pe !pecific 5lags field of the Address !pace -escriptors depends on the
value of the 3esource T(pe field in the descriptor. The flags for each resource t(pe are defined in the
following ta0les<
Ta!le --(# Me%or) "esource 6lag >"esource T)pe P $? 5efinitions
<its Meaning
;itsV9<+W 3eserved =must 0e >
;itV*W Memor( to %F2 Translation, CTT'
4 T(peTranslation< This resource, which is memor( on the secondar( side of the
0ridge, is %F2 on the primar( side of the 0ridge.
T(pe!tatic< This resource, which is memor( on the secondar( side of the 0ridge, is
also memor( on the primar( side of the 0ridge.
;itsV"<3W Memor( attri0utes, CMT'. These 0its are onl( defined if this memor( resource descri0es
s(stem 3AM. 5or a definition of the la0els descri0ed here, see section 4*, J!(stem Address
Map %nterfaces.L
Address3angeMemor(
4 Address3ange3eserved
2 Address3angeAC'%
3 Address3angeND!
;itsV2<4W Memor( attri0utes, CM.M
The memor( is non&cachea0le.
4 The memor( is cachea0le.
2 The memor( is cachea0le and supports write com0ining.
3 The memor( is cachea0le and prefetcha0le.
=Notice< 2!'M ignores this field in the ./tended address space descriptor. %nstead it uses the
T(pe !pecific Attri0utes field to determine memor( attri0utes>
;itVW Write status, C3W
4 This memor( range is read&write.
This memor( range is read&onl(.
Ta!le --(( I@3 "esource 6lag >"esource T)pe P +? 5efinitions
<its Meaning
;itsV9<+W 3eserved =must 0e >
;itV*W !parse Translation, CT3!. This 0it is onl( meaningful if ;itV"W is set.
4 !parseTranslation< The primar(&side memor( address of an( specific %F2 port within
the secondar(&side range can 0e found using the following function.
addre22 L (((port V (-555c) ?? 4() UU (port V (-555)) D _<R&
%n the address used to access the %F2 port, 0itsV44<2W must 0e identical to
0itsV24<42W, this gives four 0(tes of %F2 ports on each " E; page.
-enseTranslation< The primar(&side memor( address of an( specific %F2 port within
the secondar(&side range can 0e found using the following function.
addre22 L port D _<R&
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3+ Advanced Configuration and 'ower %nterface !pecification
<its Meaning
;itV"W %F2 to Memor( Translation, CTT'
4 T(peTranslation< This resource, which is %F2 on the secondar( side of the 0ridge, is
memor( on the primar( side of the 0ridge.
T(pe!tatic< This resource, which is %F2 on the secondar( side of the 0ridge, is also %F2
on the primar( side of the 0ridge.
;itV3<2W $eser2ed =must 0e >
;itV4<W C3N$
3 Memor( window covers the entire range
2 %!A3anges2nl(. This flag is for 0ridges on s(stems with multiple 0ridges. !etting this
0it means the memor( window specified in this descriptor is limited to the %!A %F2
addresses that fall within the specified window. The %!A %F2 ranges are< n&n55,
n"&n"55, n8&n855, nC&nC55. This 0it can onl( 0e set for 0ridges entirel(
configured through AC'% namespace.
4 Non%!A3anges2nl(. This flag is for 0ridges on s(stems with multiple 0ridges. !etting
this 0it means the memor( window specified in this descriptor is limited to the non&
%!A %F2 addresses that fall within the specified window. The non&%!A %F2 ranges are<
n4&n355, n*&n955, n6&n;55, n-&n555. This 0it can onl( 0e set for 0ridges
entirel( configured through AC'% namespace.
3eserved
Ta!le --(A <us 0u%!er "ange "esource 6lag >"esource T)pe P &? 5efinitions
<its Meaning
;itV9<W $eser2ed =must 0e >
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7.4.3.6
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3+2 Advanced Configuration and 'ower %nterface !pecification
Extended Interrupt Descriptor
T)pe +' Large Ite% 0a%e $x,
The ./tended %nterrupt -escriptor is necessar( to descri0e interrupt settings and possi0ilities for s(stems
that support interrupts a0ove 4*.
To specif( multiple interrupt num0ers, this descriptor allows vendors to list an arra( of possi0le interrupt
num0ers, an( one of which can 0e used.
Ta!le --(- 1xtended Interrupt 5escriptor 5efinition
3ffset 6ield 0a%e 5efinition
;(te ./tended %nterrupt
-escriptor
Dalue\444; =T(pe \ 4, 1arge item name \ /6>
;(te 4 1ength, 0itsV9<W Daria0le< Dalue \ + =minimum>
;(te 2 1ength, 0itsV4*<8W Daria0le< Dalue \ =minimum>
;(te 3 %nterrupt Dector
5lags
%nterrupt Dector %nformation.
;itV9<"W $eser2ed =must 0e >
;itV3W %nterrupt is sharea0le, DSH"
;itV2W %nterrupt 'olarit(, DLL
Active&@igh< This interrupt is sampled
when the signal is high, or true.
4 Active&1ow< This interrupt is sampled
when the signal is low, or false.
;itV4W %nterrupt Mode, DH1
1evel&Triggered< %nterrupt is triggered in response
to the signal 0eing in either a high or low state.
4 .dge&Triggered< This interrupt is
triggered in response to a change in signal
state, either high to low or low to high.
;itVW ConsumerF'roducer<
4IThis device consumes this resource
IThis device produces and consumes this resource
;(te " %nterrupt ta0le
length
%ndicates the num0er of interrupt num0ers that follow. When this
descriptor is returned from CC3!, or when 2!'M passes this descriptor
to C!3!, this field must 0e set to 4.
;(te
"nZ*
%nterrupt Num0er,
C%NT 0its V9<W
%nterrupt num0er
;(te
"nZ+
%nterrupt Num0er,
C%NT 0its V4*<8W
;(te
"nZ9
%nterrupt Num0er,
C%NT 0its V23<4+W
;(te
"nZ8
%nterrupt Num0er,
C%NT 0its V34<2"W
N N Additional interrupt num0ers
;(te x 3esource !ource
%nde/
=2ptional> 2nl( present if 3esource !ource =0elow> is present. This field
gives an inde/ to the specific resource descriptor that this device
consumes from in the current resource template for the device o0#ect
pointed to in 3esource !ource.
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3ffset 6ield 0a%e 5efinition
!tring 3esource !ource =2ptional> %f present, the device that uses this descriptor consumes its
resources from the resources produces 0( the named device o0#ect. %f not
present, the device consumes its resources out of a glo0al pool.
%f not present, the device consumes this resource from its hierarchical
parent.
0oteH 1ow true, level sensitive interrupts ma( 0e electricall( shared, the process of how this might work is
0e(ond the scope of this specification.
%f the 2! is running using the 82*6 interrupt model, onl( interrupt num0er values of &4* will 0e used, and
interrupt num0ers greater than 4* will 0e ignored.
!ee %nterrupt =page 8"> for a description of the A!1 macro that creates an ./tended %nterrupt descriptor.
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3+" Advanced Configuration and 'ower %nterface !pecification
7.4.3.7
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Generic Register Descriptor
T)pe +' Large Ite% 0a%e $x&
The generic register descriptor descri0es the location of a fi/ed width register within an( of the AC'%&
defined address spaces.
Ta!le --(. ;eneric "egister 5escriptor 5efinition
3ffset 6ield 0a%e' ASL 6ield 0a%e 5efinition
;(te $eneric register descriptor Dalue \ 44; =T(pe \ 4, 1arge item name \ /2>
;(te 4 1ength, 0itsV9<W Dalue \ 44; =42>
;(te 2 1ength, 0itsV4*<8W Dalue \ ; =>
;(te 3 Address !pace %-, CA!% The address space where the data structure or register
e/ists. -efined values are<
/ !(stem Memor(
/4 !(stem %F2
/2 'C% Configuration !pace
/3 .m0edded Controller
/" !M;us
/95 5unctional 5i/ed @ardware
;(te " 3egister ;it Width, C3;W %ndicates the register width in 0its.
;(te * 3egister ;it 2ffset, C3;2 %ndicates the offset to the start of the register in 0its from
the 3egister Address.
;(te + Address !iHe, CA!?
!pecifies access siHe.
&,ndefined =legac( reasons>
4&;(te access
2&Word access
3&-word access
"&Gword access
;(te 9 3egister Address, CA-3 0itsV9<W 3egister Address
;(te 8 3egister Address, CA-3 0itsV4*<8W
;(te 6 3egister Address, CA-3 0itsV23<4+W
;(te 4 3egister Address, CA-3 0itsV34<2"W
;(te 44 3egister Address, CA-3 0itsV36<32W
;(te 42 3egister Address, CA-3 0itsV"9<"W
;(te 43 3egister Address, CA-3 0itsV**<"8W
;(te 4" 3egister Address, CA-3 0itsV+3<*+W
!ee 3egister =page 828> for a description of the A!1 macro that creates a $eneric 3egister resource
descriptor.
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3++ Advanced Configuration and 'ower %nterface !pecification
7.5 Other Objects and Control Methods
Ta!le --(/ 3ther 3!Cects and Methods
3!Cect 5escription
C%N% -evice initialiHation method that is run shortl( after AC'% has 0een ena0led.
C-CE %ndicates that the device is a docking station.
C;-N Correlates a docking station 0etween AC'% and legac( interfaces.
C3.$ Notifies AM1 code of a change in the availa0ilit( of an operation region.
C;;N 'C% 0us num0er set up 0( the ;%2!.
C!.$ %ndicates a 0us segment location.
C$1E %ndicates the $lo0al 1ock must 0e ac:uired when accessing a device.
7.5.1 _INI (Init)
C%N% is a device initialiHation o0#ect that performs device specific initialiHation. This control method is
located under a device o0#ect and is run onl( when 2!'M loads a description ta0le. There are restrictions
related to when this method is called and governing writing code for this method. The C%N% method must
onl( access 2peration 3egions that have 0een indicated to availa0le as defined 0( the C3.$ method. The
C3.$ method is descri0ed in section +.*.", JC3.$ =3egion>.L This control method is run 0efore CA-3,
CC%-, C@%-, C!,N, and C,%- are run.
%f the C!TA method indicates that the device is present, 2!'M will evaluate the CC%N% for the device =if the
C%N% method e/ists> and will e/amine each of the children of the device for C%N% methods. %f the C!TA
method indicates that the device is not present, 2!'M will not run the C%N% and will not e/amine the
children of the device for C%N% methods. %f the device 0ecomes present after the ta0le has alread( 0een
loaded, 2!'M will not evaluate the C%N% method, nor e/amine the children for C%N% methods.
The C%N% control method is generall( used to switch devices out of a legac( operating mode. 5or e/ample,
;%2!es often configure Card;us controllers in a legac( mode to support legac( operating s(stems. ;efore
enumerating the device with an AC'% operating s(stem, the Card;us controllers must 0e initialiHed to
Card;us mode. 5or such s(stems, the vendor can include an C%N% control method under the Card;us
controller to switch the device into Card;us mode.
%n addition to device initialiHation, 2!'M unconditionall( evaluates an C%N% o0#ect under the BC!;
namespace, if present, at the 0eginning of namespace initialiHation.
7.5.2 _DCK (Dock)
This control method is located in the device o0#ect that represents the docking station =that is, the device
o0#ect with all the C.7/ control methods for the docking station>. The presence of C-CE indicates to the
2! that the device is reall( a docking station.
C-CE also controls the isolation logic on the docking connector. This allows an 2! to prepare for docking
0efore the 0us is activated and devices appear on the 0us.
Arguments<
Arg
4I-ock =that is, remove isolation from connector>
I,ndock =isolate from connector>
3eturn Code<
4 if successful, if failed.
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0oteH When C-CE is called with , 2!'M will ignore the return value. The C!TA o0#ect that follows the
C.7/ control method will notif( whether or not the porta0le has 0een e#ected.
7.5.3 _BDN (BIOS Dock Name)
C;-N is used to correlate a docking station reported via AC'% and the same docking station reported via
legac( interfaces. %t is primaril( used for upgrading over non&AC'% environments.
C;-N must appear under a device o0#ect that represents the dock, that is, the device o0#ect with C.#/
methods. This o0#ect must return a -W23- that is the .%!A&packed -ock%- returned 0( the 'lug and
'la( ;%2! 5unction * =$et -ocking !tation %dentifier> for a dock.
0oteH %f the machine does not support 'N';%2!, this o0#ect is not re:uired.
7.5.4 _REG (Region)
The 2! runs C3.$ control methods to inform AM1 code of a change in the availa0ilit( of an operation
region. When an operation region handler is unavaila0le, AM1 cannot access data fields in that region.
=2peration region writes will 0e ignored and reads will return indeterminate data.>.
./cept for the cases shown 0elow, control methods must assume all operation regions inaccessi0le until the
C3.$=3egion!pace, 4> method is e/ecuted. 2nce C3.$ has 0een e/ecuted for a particular operation
region, indicating that the operation region handler is read(, a control method can access fields in the
operation region. Conversel(, control methods must not access fields in operation regions when C3.$
method e/ecution has not indicated that the operation region handler is read(.
5or e/ample, until the .m0edded Controller driver is read(, the control methods cannot access the
.m0edded Controller. 2nce 2!'M has run C3.$=.m0eddedControl, 4>, the control methods can then
access operation regions in .m0edded Controller address space. 5urthermore, if 2!'M e/ecutes
C3.$=.m0eddedControl, >, control methods must stop accessing operation regions in the .m0edded
Controller address space.
The e/ceptions for this rule are<
4. 2!'M must guarantee that the following operation regions must alwa(s 0e accessi0le<
'C%CConfig operation regions on a 'C% root 0us containing a C;;N o0#ect.
%F2 operation regions.
Memor( operation regions when accessing memor( returned 0( the !(stem Address Map
reporting interfaces.
2. 2!'M must make .m0edded Controller operation regions, accessed via the .m0edded
Controllers descri0ed in .C-T, availa0le 0efore e/ecuting an( control method. These operation
regions ma( 0ecome inaccessi0le after 2!'M runs C3.$=.m0eddedControl, >.
'lace C3.$ in the same scope as operation region declarations. The 2! will run the C3.$ in a given scope
when the operation regions declared in that scope are availa0le for use.
5or e/ample<
Scope(\_SB.P)#()
0perationRe,ion(0PR4$ P)#_)onfi,$ ...)
;ethod(_R%:$ 3) .../ // 0SP; e-ecute2 thi2 when P)#0 operation re,ion handler
// 2tatu2 chan,e2
Device(P)#4)
;ethod(_R%:$ 3) .../
Device(%<"()
0perationRe,ion(0PR3$ P)#_)onfi,$ ...)
;ethod(_R%:$3) .../
/
/
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3+8 Advanced Configuration and 'ower %nterface !pecification
Device(#S&()
0perationRe,ion(0PRF$ #/0$ ...)
;ethod(_R%:$ 3) .../ // 0SP; e-ecute2 thi2 when #S&0 operation re,ion handler
// 2tatu2 chan,e2
Device(%)()
!ame(_"#D$ %#S&#D(PP!P()(HP))
0perationRe,ion(0PR.$ %)$ ...)
;ethod(_R%:$ 3) .../ // 0SP; e-ecute2 thi2 when %) operation re,ion
// handler 2tatu2 chan,e2
/
/
/
When the 'C% operation region handler is read(, 2!'M will run the C3.$ method declared in 'C% scope
to indicate that 'C% Config space operation region access is availa0le within the 'C% scope =in other
words, 2'34 access is allowed>. When the %!A operation handler is read(, 2!'M will run the C3.$
method in the %!A scope to indicate that the %F2 space operation region access is availa0le within that
scope =in other words, 2'33 access is allowed>. 5inall(, when the .m0edded Controller operation region
handler is read(, 2!'M will run the C3.$ method in the .C scope to indicate that .C space operation
region access is availa0le within the .C scope =in other words, 2'3" access is allowed>. %t should 0e
noted that 'C% Config !pace 2peration 3egions are read( as soon the host controller or 0ridge controller
has 0een programmed with a 0us num0er. 'C%4Ms C3.$ method would not 0e run until the 'C%&'C% 0ridge
has 0een properl( configured. At the same time, the 2! will also run .T@Ms C3.$ method since its 'C%
Config !pace would 0e also availa0le. The 2! will again run .T@Ms C3.$ method when the .T@
device is started. Also, when the host controller or 0ridge controller is turned off or disa0led, 'C% Config
!pace 2peration 3egions for child devices are no longer availa0le. As such, .T@Ms C3.$ method will 0e
run when it is turned off and will again 0e run when 'C%4 is turned off.
0ote< The 2! onl( runs C3.$ methods that appear in the same scope as operation region declarations that
use the operation region t(pe that has #ust 0een made availa0le. 5or e/ample, C3.$ in the .C device
would not 0e run when the 'C% 0us driver is loaded since the operation regions declared under .C do not
use an( of the operation region t(pes made availa0le 0( the 'C% driver =namel(, config space, %F2, and
memor(>.
Arguments<
Arg< %nteger< 2peration region space<
!(stemMemor(
4 !(stem%2
2 'C%CConfig
3 .m0edded Controller
" !M;us
* CM2!
+ 'C%;A3Target
/8&/55 2.M region space handler
Arg4< %nteger< 4 for connecting the handler, for disconnecting the handler
7.5.5 _BBN (Base Bus Number)
5or multi&root 'C% machines, C;;N is the 'C% 0us num0er that the ;%2! assigns. This is needed to access
a 'C%CConfig operation region for the specific 0us. The C;;N o0#ect must 0e uni:ue for ever( host 0ridge
within a segment since it is the 'C% 0us num0er.
7.5.6 _SEG (Segment)
The optional C!.$ o0#ect evaluates to an integer that descri0es the 'C% !egment $roup =see 'C% 5irmware
!pecification v3.>. %f C!.$ does not e/ist, 2!'M assumes that all 'C% 0us segments are in 'C% !egment
$roup .
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'C% !egment $roup is purel( a software concept managed 0( s(stem firmware and used 0( 2!'M. %t is a
logical collection of 'C% 0uses =or 0us segments>. There is no tie to an( ph(sical entities. %t is a wa( to
logicall( group the 'C% 0us segments and 'C% ./press @ierarchies. C!.$ is a level higher than C;;N.
'C% !egment $roup supports more than 2*+ 0uses in a s(stem 0( allowing the reuse of the 'C% 0us
num0ers. Within each 'C% !egment $roup, the 0us num0ers for the 'C% 0uses must 0e uni:ue. 'C% 0uses
in different 'C% !egment $roup are permitted to have the same 0us num0er.
A 'C% !egment $roup contains one or more 'C% host 0ridges.
The lower 4+ 0its of C!.$ returned integer is the 'C% !egment $roup num0er. 2ther 0its are reserved.
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39 Advanced Configuration and 'ower %nterface !pecification
7.5.6.1
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Example
Device(!D() // thi2 i2 a node (
!ame(_"#D$ '&)P#(((.*)
// Return2 the P)urrent Re2ource2P
!ame(_)RS$
Re2ource<emplate()
Y
/
)
Device(P)#()
!ame(_"#D$ %#S&#D('P!P(&(F*))
!ame(_&DR$ (-(((((((()
!ame(_S%:$ () // <he bu2e2 below the ho2t brid,e belon, to P)# 2e,ment (
Y
!ame(_BB!$ ()
Y
/
Device(P)#4)
Y
!ame(_S%:$ () // <he bu2e2 below the ho2t brid,e belon, to P)# 2e,ment (
Y
!ame(_BB!$ 4I)
Y
/
Y
/
Device(!D4) // thi2 i2 a node 4
!ame(_"#D$ '&)P#(((.*)
// Return2 the P)urrent Re2ource2P
!ame(_)RS$
Re2ource<emplate()
Y
/
)
Device(P)#()
!ame(_"#D$ %#S&#D('P!P(&(F*))
!ame(_&DR$ (-(((((((()
!ame(_S%:$ 4) // <he bu2e2 below the ho2t brid,e belon, to P)# 2e,ment 4
Y
!ame(_BB!$ ()
Y
/
Device(P)#4)
Y
!ame(_S%:$ 4) // <he bu2e2 below the ho2t brid,e belon, to P)# 2e,ment 4
Y
!ame(_BB!$ 4I)
Y
/
/
7.5.7 _GLK (Global Lock)
This optional named o0#ect is located in a device o0#ect. This o0#ect returns a value that indicates to an(
entit( that accesses this device =in other words, 2!'M or an( device driver> whether the $lo0al 1ock must
0e ac:uired when accessing the device. 2!&0ased device accesses must 0e performed while in ac:uisition
of the $lo0al 1ock when potentiall( contentious accesses to device resources are performed 0( non&2!
code, such as !(stem Management Mode =!MM>&0ased code in %ntel architecture&0ased s(stems.
An e/ample of this device resource contention is a device driver for an !M;us&0ased device contending
with !MM&0ased code for access to the .m0edded Controller, !M;&@C, and !M;us target device. %n this
case, the device driver must ac:uire and release the $lo0al 1ock when accessing the device to avoid
resource contention with !MM&0ased code that accesses an( of the listed resources.
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3eturn Codes<
4 $lo0al 1ock re:uired, $lo0al 1ock not re:uired
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39" Advanced Configuration and 'ower %nterface !pecification
8 Power and Performance Management
This section specifies the device power management o0#ects and s(stem power management o0#ects.
2!'M uses these o0#ects to manage the platform 0( achieving a desira0le 0alance 0etween performance
and energ( conservation goals.
-evice performance states ='/ states> are power consumption and capa0ilit( states within the active =->
device power state. 'erformance states allow 2!'M to make tradeoffs 0etween performance and energ(
conservation. -evice performance states have the greatest impact when the implementation is such that the
states invoke different device efficienc( levels as opposed to a linear scaling of performance and energ(
consumption. !ince performance state transitions occur in the active device states, care must 0e taken to
ensure that performance state transitions do not adversel( impact the s(stem.
-evice performance state o0#ects, when necessar(, are defined on a per device class 0asis as descri0ed in
the device class specifications =!ee Appendi/ A>.
The s(stem state indicator o0#ects are also specified in this section.
8.1 Declaring a Power Resource Object
An A!1 Power"esource statement is used to declare a Power"esource o0#ect. A 'ower 3esource o0#ect
refers to a software&controlla0le power plane, clock plane, or other resource upon which an integrated AC'%
power&managed device might rel(. 'ower resource o0#ects can appear wherever is convenient in
namespace.
The s(nta/ of a Power"esource statement is<
Power"esource >reso'rcename. systemle2el. reso'rceorder? Q0a%edListR
where the systemle2el parameter is a num0er and the reso'rceorder parameter is a numeric constant =a
W23->. 5or a formal definition of the Power"esource statement s(nta/, see section 49, JAC'% !ource
1anguage 3eference.L
Systemle2el is the lowest power s(stem sleep level 2!'M must maintain to keep this power resource on =
e:uates to !, 4 e:uates to !4, and so on>.
.ach power&managed AC'% device lists the resources it re:uires for its supported power levels. 2!'M
multiple/es this information from all devices and then ena0les and disa0les the re:uired 'ower 3esources
accordingl(. The reso'rceorder field in the 'ower 3esource o0#ect is a uni:ue value per 'ower 3esource,
and it provides the s(stem with the order in which 'ower 3esources must 0e ena0led or disa0led. 'ower
3esources are ena0led from low values to high values and are disa0led from high values to low values. The
operating software ena0les or disa0les all affected 'ower 3esources in an( one reso'rceorder level at a
time 0efore moving on to the ne/t ordered level. 'utting 'ower 3esources in different order levels provides
power se:uencing and serialiHation where re:uired.
A 'ower 3esource can have named o0#ects under its Namespace location. 5or a description of the AC'%&
defined named o0#ects for a 'ower 3esource, see section 8.2, J-evice 'ower Management 20#ects.L
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The following 0lock of A!1 sample code shows a use of Power"esource.
PowerRe2ource(P#D%$ ($ ()
;ethod(_S<&)
Return (Ror (:#0.#D%#$ 0ne$ 7ero)) // inver2e of i2olation
/
;ethod(_0!)
Store (0ne$ :#0.#D%P) // a22ert power
Sleep (4() // wait 4(m2
Store (0ne$ :#0.#D%R) // deEa22ert re2etQ
Stall (4() // wait 4(u2
Store (7ero$ :#0.#D%#) // deEa22ert i2olation
/
;ethod(_055)
Store (0ne$ :#0.#D%#) // a22ert i2olation
Store (7ero$ :#0.#D%R) // a22ert re2etQ
Store (7ero$ :#0.#D%P) // deEa22ert power
/
/
8.1.1 Defned Child Objects for a Power Resource
.ach power resource o0#ect is re:uired to have the following control methods to allow 0asic control of each
power resource. As 2!'M changes the state of device o0#ects in the s(stem, the power resources that are
needed will also change causing 2!'M to turn power resources on and off. To determine the initial power
resource settings the C!TA method can 0e used.
Ta!le .-+ Power "esource Child 3!Cects
3!Cect 5escription
C255 !et the resource off.
C2N !et the resource on.
C!TA 20#ect that evaluates to the current on or off state of the 'ower 3esource. I255, 4I2N
8.1.2 _OFF
This power resource control method puts the power resource into the 255 state. The control method does
not complete until the power resource is off. 2!'M onl( turns on or off one resource at a time, so the AM1
code can o0tain the proper timing se:uencing 0( using !tall or !leep within the 2N =or 255> method to
cause the proper se:uencing dela(s 0etween operations on power resources.
Arguments<
None
3esult Code<
None
8.1.3 _ON
This power resource control method puts the power resource into the 2N state. The control method does
not complete until the power resource is on. 2!'M onl( turns on or off one resource at a time, so the AM1
code can o0tain the proper timing se:uencing 0( using !tall or !leep within the 2N =or 255> method to
cause the proper se:uencing dela(s 0etween operations on power resources.
Arguments<
None
3esult Code<
None
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8.1.4 _STA (Status)
3eturns the current 2N or 255 status for the power resource.
Arguments<
None
3esult Code<
indicates the power resource is currentl( off.
4 indicates the power resource is currentl( on.
8.2 Device Power Management Objects
5or a device that is power&managed using AC'%, a -efinition ;lock contains one or more of the o0#ects
found in the ta0le 0elow. 'ower management of a device is done using two different paradigms<
'ower 3esource control
-evice&specific control
'ower 3esources are resources that could 0e shared amongst multiple devices. The operating software will
automaticall( handle control of these devices 0( determining which particular 'ower 3esources need to 0e
in the 2N state at an( given time. This determination is made 0( considering the state of all devices
connected to a 'ower 3esource.
;( definition, a device that is 255 does not have an( power resource or s(stem power state re:uirements.
Therefore, device o0#ects do not list power resources for the 255 power state.
5or 2!'M to put the device in the -3 state, the following must occur<
All 'ower 3esources no longer referenced 0( an( device in the s(stem must 0e in the 255 state.
%f present, the C'!3 control method is e/ecuted to set the device into the -3 device state.
The onl( transition allowed from the -3 device state is to the - device state.
5or man( devices the 'ower 3esource control is all that is re:uiredK however, device o0#ects ma( include
their own device&specific control method.
These two t(pes of power management controls =through 'ower 3esources and through specific devices>
can 0e applied in com0ination or individuall( as re:uired.
5or s(stems that do not control device power states through power plane management, 0ut whose devices
support multiple -&states, more information is re:uired 0( the 2! to determine the !&state to -&state
mapping for the device. The AC'% ;%2! can give this information to 2!'M 0( wa( of the C!x- methods.
These methods tell 2!'M for !&state JxL, the highest -&state supported 0( the device is Jy.L 2!'M is
allowed to pick a lower -&state for a given !&state, 0ut 2!'M is not allowed to e/ceed the given -&state.
5urther rules that appl( to device power management o0#ects are<
5or a given !&state, a device cannot 0e in a higher -&state than its parent device.
%f there e/ists an AC'% 20#ect to turn on a device =either through C'!x or C'3x o0#ects>, then a
corresponding o0#ect to turn the device off must also 0e declared and vice versa.
%f there e/ists an AC'% 20#ect that controls power =C'!x or C'3x, where x \, 4, 2, or 3>, then
methods to set the device into - and -3 device states must 0e present.
%f a mi/ture of C'!x and C'3x methods is declared for the device, then the device states supported
through C'!x methods must 0e identical to the device states supported through C'3x methods. AC'%
s(stem firmware ma( ena0le device power state control e/clusivel( through C'!x =or C'3x> method
declarations.
When controlling power to devices which must wake the s(stem during a s(stem sleeping state<
The device must declare its a0ilit( to wake the s(stem 0( declaring either the C'3W or C'!W
o0#ect.
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%f C'3 is present, then 2!'M must choose a sleeping state which is less than or e:ual to the
sleeping state specified.
After 2!'M has called C'T!, it must call the deviceMs C'!W to ena0le wake.
2!'M must transition the device into a -&state which is greater than or e:ual that specified 0( the
deviceMs C!/- o0#ect, 0ut less than or e:ual to that specified 0( the deviceMs C!/W o0#ect.
2!'M ma( transition the s(stem to the specified sleep state.
Ta!le .-& 5evice Power Manage%ent Child 3!Cects
3!Cect 5escription
C-!W Control method that ena0les or disa0les the deviceMs wake function for device&onl( wake.
C'! Control method that puts the device in the - device state =device full( on>.
C'!4 Control method that puts the device in the -4 device state.
C'!2 Control method that puts the device in the -2 device state.
C'!3 Control method that puts the device in the -3 device state =device off>.
C'!C 20#ect that evaluates to the deviceMs current power state.
C'3 20#ect that evaluates to the deviceMs power re:uirements in the - device state =device full(
on>.
C'34 20#ect that evaluates to the deviceMs power re:uirements in the -4 device state. The onl(
devices that suppl( this level are those that can achieve the defined -4 device state according
to the related device class.
C'32 20#ect that evaluates to the deviceMs power re:uirements in the -2 device state. The onl(
devices that suppl( this level are those that can achieve the defined -2 device state according
to the related device class.
C'3W 20#ect that evaluates to the deviceMs power re:uirements in order to wake the s(stem from a
s(stem sleeping state.
C'!W Control method that ena0les or disa0les the deviceMs wake function.
C%3C 20#ect that signifies the device has a significant inrush current draw.
C!4- @ighest -&state supported 0( the device in the !4 state
C!2- @ighest -&state supported 0( the device in the !2 state
C!3- @ighest -&state supported 0( the device in the !3 state
C!"- @ighest -&state supported 0( the device in the !" state
C!W 1owest -&state supported 0( the device in the ! state which can wake the device
C!4W 1owest -&state supported 0( the device in the !4 state which can wake the s(stem.
C!2W 1owest -&state supported 0( the device in the !2 state which can wake the s(stem.
C!3W 1owest -&state supported 0( the device in the !3 state which can wake the s(stem.
C!"W 1owest -&state supported 0( the device in the !" state which can wake the s(stem.
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8.2.1 _DSW (Device Sleep Wake)
%n addition to C'3W, this control method can 0e used to ena0le or disa0le the deviceMs a0ilit( to wake a
sleeping s(stem. This control method can onl( access 2peration 3egions that are either alwa(s availa0le
while in a s(stem working state or that are availa0le when the 'ower 3esources referenced 0( the C'3W
o0#ect are all 2N. 5or e/ample, do not put a power plane control for a 0us controller within configuration
space located 0ehind the 0us. The method should ena0le the device onl( for the last s(stem stateFdevice
state com0ination passed in 0( 2!'M. 2!'M will onl( pass in com0inations allowed 0( the C!x- and
C!xW o0#ects.
The arguments provided to C-!W indicate the eventual -evice !tate the device will 0e transitioned to and
the eventual s(stem state that the s(stem will 0e transitioned to. The target s(stem state is allowed to 0e the
s(stem working state =!>. The C-!W method will 0e run 0efore the device is placed in the designated
state and also 0efore the s(stem is placed in the designated s(stem state.
Compati0ilit( Note< The C'!W method is deprecated in AC'% 3.. The C-!W method should 0e used
instead. 2!'M will onl( use the C'!W method if 2!'M does not support C-!W or if the C-!W method is
not present.
Arguments<
I .na0le F -isa0le< to disa0le the deviceMs wake capa0ilities.
4 to ena0le the deviceMs wake capa0ilities.
4& Target !(stem !tate to indicate s(stem will 0e in !
4 to indicate s(stem will 0e in !4
N
2& Target -evice !tate to indicate that the device will remain in -
4 to indicate that the device will 0e placed in either - or -4
2 to indicate that the device will 0e placed in either -, -4, or -2
3 to indicate that the device will 0e placed in either -, -4, -2, or -3
3esult Code<
None
8.2.2 _PS0 (Power State 0)
This Control Method is used to put the specific device into its - state. This Control Method can onl(
access 2peration 3egions that are either alwa(s availa0le while in a s(stem working state or that are
availa0le when the 'ower 3esources references 0( the C'3 o0#ect are all 2N.
Arguments<
None
3esult Code<
None
8.2.3 _PS1 (Power State 1)
This control method is used to put the specific device into its -4 state. This control method can onl( access
2peration 3egions that are either alwa(s availa0le while in a s(stem working state or that are availa0le
when the 'ower 3esources references 0( the C'34 o0#ect are all 2N.
Arguments<
None
3esult Code<
None
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8.2.4 _PS2 (Power State 2)
This control method is used to put the specific device into its -2 state. This control method can onl( access
2peration 3egions that are either alwa(s availa0le while in a s(stem working state or that are availa0le
when the 'ower 3esources references 0( the C'32 o0#ect are all 2N.
Arguments<
None
3esult Code<
None
8.2.5 _PS3 (Power State 3)
This control method is used to put the specific device into its -3 state. This control method can onl( access
2peration 3egions that are alwa(s availa0le while in a s(stem working state.
A device in the -3 state must no longer 0e using its resources =for e/ample, its memor( space and %F2 ports
are availa0le to other devices>.
Arguments<
None
3esult Code<
None
8.2.6 _PSC (Power State Current)
This control method evaluates to the current device state. This control method is not re:uired if the device
state can 0e inferred 0( the 'ower 3esource settings. This would 0e the case when the device does not
re:uire a C'!, C'!4, C'!2, or C'!3 control method.
Arguments<
None
3esult Code<
The result codes are shown in Ta0le 9&3.
Ta!le .-# DPSC Control Method "esult Codes
"esult 5evice State
-
4 -4
2 -2
3 -3
8.2.7 _PR0 (Power Resources for D0)
This o0#ect evaluates to a package of the following definition<
Ta!le .-( Power "esource "eJuire%ents Package
1le%ent 3!Cect 5escription
4 o0#ect reference 3eference to re:uired 'ower 3esource Y
N o0#ect reference 3eference to re:uired 'ower 3esource YN
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5or 2!'M to put the device in the - device state, the following must occur<
4. All 'ower 3esources referenced 0( elements 4 through N must 0e in the 2N state.
2. All 'ower 3esources no longer referenced 0( an( device in the s(stem must 0e in the 255 state.
3. %f present, the C'! control method is e/ecuted to set the device into the - device state.
C'3 must return the same data each time it is evaluated. All power resources referenced must e/ist in the
namespace.
8.2.8 _PR1 (Power Resources for D1)
This o0#ect evaluates to a package as defined in Ta0le 9&". 5or 2!'M to put the device in the -4 device
state, the following must occur<
4. All 'ower 3esources referenced 0( elements 4 through N must 0e in the 2N state.
2. All 'ower 3esources no longer referenced 0( an( device in the s(stem must 0e in the 255 state.
3. %f present, the C'!4 control method is e/ecuted to set the device into the -4 device state.
C'34 must return the same data each time it is evaluated. All power resources referenced must e/ist in the
namespace.
8.2.9 _PR2 (Power Resources for D2)
This o0#ect evaluates to a package as defined in Ta0le 9&". 5or 2!'M to put the device in the -2 device
state, the following must occur<
4. All 'ower 3esources referenced 0( elements 4 through N must 0e in the 2N state.
2. All 'ower 3esources no longer referenced 0( an( device in the s(stem must 0e in the 255 state.
3. %f present, the C'!2 control method is e/ecuted to set the device into the -2 device state.
C'32 must return the same data each time it is evaluated. All power resources referenced must e/ist in the
namespace.
8.2.10 _PRW (Power Resources for Wake)
This o0#ect is onl( re:uired for devices that have the a0ilit( to wake the s(stem from a s(stem sleeping
state. This o0#ect evaluates to a package of the following definition<
Ta!le .-A :ake Power "eJuire%ents Package
1le%ent 3!Cect
T)pe
5escription
Numeric or
package
%f the data t(pe of this package element is numeric, then this C'3W package
element is the 0it inde/ in the $'./C.N, in the $'. 0locks descri0ed in the
5A-T, of the ena0le 0it that is ena0led for the wake event.
%f the data t(pe of this package element is a package, then this C'3W package
element is itself a package containing two elements. The first is an o0#ect
reference to the $'. ;lock device that contains the $'. that will 0e triggered 0(
the wake event. The second element is numeric and it contains the 0it inde/ in the
$'./C.N, in the $'. ;lock referenced 0( the first element in the package, of the
ena0le 0it that is ena0led for the wake event.
5or e/ample, if this field is a package then it is of the form<
Pac%a&e'()\_#B.PCI*.I#A.+PE, ./
4 Numeric The lowest power s(stem sleeping state that can 0e entered while still providing
wake functionalit(.
2 20#ect
3eference
3eference to re:uired 'ower 3esource Y
N 20#ect
3eference
3eference to re:uired 'ower 3esource YN
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5or 2!'M to have the defined wake capa0ilit( properl( ena0led for the device, the following must occur<
4. All 'ower 3esources referenced 0( elements 2 through N are put into the 2N state.
2. %f present, the C'!W control method is e/ecuted to set the device&specific registers to ena0le the wake
functionalit( of the device.
3. The -&state 0eing entered must 0e at least that specified in the C!/- state 0ut no greater than that
specified in the C!/W state.
Then, if the s(stem enters a sleeping state 2!'M must ensure<
4. %nterrupts are disa0led.
2. The sleeping state 0eing entered must 0e less than or e:ual to the power state declared in element
4 of the C'3W o0#ect.
3. The proper general&purpose register 0its are ena0led.
The s(stem sleeping state specified must 0e a state that the s(stem supports =in other words, a
corresponding BC!x o0#ect must e/ist in the namespace>.
C'3W must return the same data each time it is evaluated. All power resources referenced must e/ist in the
namespace.
8.2.11 _PSW (Power State Wake)
%n addition to the C'3Wcontrol method, this control method can 0e used to ena0le or disa0le the deviceMs
a0ilit( to wake a sleeping s(stem. This control method can onl( access 2peration 3egions that are either
alwa(s availa0le while in a s(stem working state or that are availa0le when the 'ower 3esources references
0( the C'3W o0#ect are all 2N. 5or e/ample, do not put a power plane control for a 0us controller within
configuration space located 0ehind the 0us.
Compati0ilit( Note< The C'!W method is deprecated in AC'% 3.. 2!'M must use C-!W if it is present.
2therwise, it ma( use C'!W.
Arguments<
I .na0le F -isa0le< to disa0le the deviceMs wake capa0ilities.
4 to ena0le the deviceMs wake capa0ilities.
3esult Code<
None
8.2.12 _IRC (In Rush Current)
The presence of this o0#ect signifies that transitioning the device to its - state causes a s(stem&significant
in&rush current load. %n general, such operations need to 0e serialiHed such that multiple operations are not
attempted concurrentl(. Within AC'%, this t(pe of serialiHation can 0e accomplished with the reso'rceorder
parameter of the deviceMs 'ower 3esourcesK however, this does not serialiHe AC'%&controlled devices with
non&AC'% controlled devices. %3C is used to signif( this fact outside of 2!'M to 2!'M such that 2!'M
can serialiHe all devices in the s(stem that have in&rush current serialiHation re:uirements. 2!'M can onl(
transition one device containing an C%3C o0#ect within its device scope to the - state at a time. %t is
important to note that 2!'M does not evaluate the C%3C o0#ect. %t has no defined input arguments nor does
it return an( value. 2!'M derives meaning simpl( from the e/istence of the C%3C o0#ect.
8.2.13 _S1D (S1 Device State)
This o0#ect evaluates to an integer that conve(s to 2!'M the highest power =lowest num0er> -&state
supported 0( this device in the !4 s(stem sleeping state. C!4- must return the same integer each time it is
evaluated. This value overrides an !&state to -&state mapping 2!'M ma( ascertain from the deviceMs
power resource declarations. !ee Ta0le 9&3 for valid result codes.
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%f the device can wake the s(stem from the !4 s(stem sleeping state =see C'3W> then the device must
support wake in the -&state returned 0( this o0#ect. @owever, 2!'M cannot assume wake from the !4
s(stem sleeping state is supported in an( lower -&state unless specified 0( a corresponding C!4W o0#ect.
The ta0le 0elow provides a mapping from -esired Actions to 3esultant -&state entered 0ased on the values
returned from the C!4-, C'3W, and C!4W o0#ects if the( e/ist . =-FC means -onMt Care I evaluation is
irrelevant, and NFA means Non Applica0le I o0#ect does not e/ist>.
Ta!le .-- S+ Action @ "esult Ta!le
-esired Action C!4- C'3W C!4W 3esultant -&state
.nter !4 -FC -FC -FC 2!'M decides
.nter !4, No Wake 2 -FC -FC .nter -2 or -3
.nter !4, Wake 2 4 NFA .nter -2
.nter !4, Wake 2 4 3 .nter -2 or -3
.nter !4, Wake NFA 4 2 .nter -,-4 or -2
8.2.14 _S2D (S2 Device State)
This o0#ect evaluates to an integer that conve(s to 2!'M the highest power =lowest num0er> -&state
supported 0( this device in the !2 s(stem sleeping state. C!2- must return the same integer each time it is
evaluated. This value overrides an !&state to -&state mapping 2!'M ma( ascertain from the deviceMs
power resource declarations. !ee Ta0le 9&3 for valid result codes.
%f the device can wake the s(stem from the !2 s(stem sleeping state =see C'3W> then the device must
support wake in the -&state returned 0( this o0#ect. @owever, 2!'M cannot assume wake from the !2
s(stem sleeping state is supported in an( lower -&state unless specified 0( a corresponding C!2W o0#ect.
The ta0le 0elow provides a mapping from -esired Actions to 3esultant -&state entered 0ased on the values
returned from the C!2-, C'3W, and C!2W o0#ects if the( e/ist . =-FC means -onMt Care I evaluation is
irrelevant, and NFA means Non Applica0le I o0#ect does not e/ist>.
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Ta!le .-. S& Action @ "esult Ta!le
-esired Action C!2- C'3W C!2W 3esultant -&state
.nter !2 -FC -FC -FC 2!'M decides
.nter !2, No Wake 2 -FC -FC .nter -2 or -3
.nter !2, Wake 2 2 NFA .nter -2
.nter !2, Wake 2 2 3 .nter -2 or -3
.nter !2, Wake NFA 2 2 .nter -,-4 or -2
8.2.15 _S3D (S3 Device State)
This o0#ect evaluates to an integer that conve(s to 2!'M the highest power =lowest num0er> -&state
supported 0( this device in the !3 s(stem sleeping state. C!3- must return the same integer each time it is
evaluated. This value overrides an !&state to -&state mapping 2!'M ma( ascertain from the deviceMs
power resource declarations. !ee Ta0le 9&3 for valid result codes.
%f the device can wake the s(stem from the !3 s(stem sleeping state =see C'3W> then the device must
support wake in the -&state returned 0( this o0#ect. @owever, 2!'M cannot assume wake from the !3
s(stem sleeping state is supported in an( lower -&state unless specified 0( a corresponding C!3W o0#ect.
The ta0le 0elow provides a mapping from -esired Actions to 3esultant -&state entered 0ased on the values
returned from the C!3-, C'3W, and C!3W o0#ects if the( e/ist . =-FC means -onMt Care I evaluation is
irrelevant, and NFA means Non Applica0le I o0#ect does not e/ist>.
Ta!le .-/ S# Action @ "esult Ta!le
-esired Action C!3- C'3W C!3W 3esultant -&state
.nter !3 NFA -FC NFA 2!'M decides
.nter !3, No Wake 2 -FC -FC .nter -2 or -3
.nter !3, Wake 2 3 NFA .nter -2
.nter !3, Wake 2 3 3 .nter -2 or -3
.nter !3, Wake NFA 3 2 .nter -, -4 or -2
8.2.16 _S4D (S4 Device State)
This o0#ect evaluates to an integer that conve(s to 2!'M the highest power =lowest num0er> -&state
supported 0( this device in the !" s(stem sleeping state. C!"- must return the same integer each time it is
evaluated. This value overrides an !&state to -&state mapping 2!'M ma( ascertain from the deviceMs
power resource declarations. !ee Ta0le 9&3 for valid result codes.
%f the device can wake the s(stem from the !" s(stem sleeping state =see C'3W> then the device must
support wake in the -&state returned 0( this o0#ect. @owever, 2!'M cannot assume wake from the !"
s(stem sleeping state is supported in an( lower -&state unless specified 0( a corresponding C!"W o0#ect.
The ta0le 0elow provides a mapping from -esired Actions to 3esultant -&state entered 0ased on the values
returned from the C!"-, C'3W, and C!"W o0#ects if the( e/ist . =-FC means -onMt Care I evaluation is
irrelevant, and NFA means Non Applica0le I o0#ect does not e/ist>.
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Ta!le .-, S( Action @ "esult Ta!le
-esired Action C!"- C'3W C!3W 3esultant -&state
.nter !" NFA -FC NFA 2!'M decides
.nter !", No Wake 2 -FC -FC .nter -2 or -3
.nter !", Wake 2 " No .nter -2
.nter !", Wake 2 " 3 .nter -2 or -3
.nter !", Wake NFA " 2 .nter -, -4 or -2
8.2.17 _S0W (S0 Device Wake State)
This o0#ect evaluates to an integer that conve(s to 2!'M the lowest power =highest num0er> -&state
supported 0( this device in the ! s(stem sleeping state w1ere t1e de2ice can wa3e itself! C!W must return
the same integer each time it is evaluated. This value allows 2!'M to choose the lowest power -&state and
still achieve wake functionalit(. %f o0#ect evaluates to Hero, then the device cannot wake itself from an(
lower sleeping state.
8.2.18 _S1W (S1 Device Wake State)
This o0#ect evaluates to an integer that conve(s to 2!'M the lowest power =highest num0er> -&state
supported 0( this device in the !4 s(stem sleeping state w1ic1 can wa3e t1e system. C!4W must return the
same integer each time it is evaluated. This value allows 2!'M to choose a lower !&state to -&state
mapping than specified 0( C!4-. This value must alwa(s 0e greater than or e:ual to C!4-, if C!4- is
present.
8.2.19 _S2W (S2 Device Wake State)
This o0#ect evaluates to an integer that conve(s to 2!'M the lowest power =highest num0er> -&state
supported 0( this device in the !2 s(stem sleeping state w1ic1 can wa3e t1e system. C!2W must return the
same integer each time it is evaluated. This value allows 2!'M to choose a lower !&state to -&state
mapping than specified 0( C!2-. This value must alwa(s 0e greater than or e:ual to C!2-, if C!2- is
present.
8.2.20 _S3W (S3 Device Wake State)
This o0#ect evaluates to an integer that conve(s to 2!'M the lowest power =highest num0er> -&state
supported 0( this device in the !3 s(stem sleeping state w1ic1 can wa3e t1e system. C!3W must return the
same integer each time it is evaluated. This value allows 2!'M to choose a lower !&state to -&state
mapping than specified 0( C!3-. This value must alwa(s 0e greater than or e:ual to C!3-, if C!3- is
present.
8.2.21 _S4W (S4 Device Wake State)
This o0#ect evaluates to an integer that conve(s to 2!'M the lowest power =highest num0er> -&state
supported 0( this device in the !" s(stem sleeping state w1ic1 can wa3e t1e system. C!"W must return the
same integer each time it is evaluated. This value allows 2!'M to choose a lower !&state to -&state
mapping than specified 0( C!"-. This value must alwa(s 0e greater than or e:ual to C!"-, if C!"- is
present.
8.3 OEM-Supplied System-Level Control Methods
An 2.M&supplied -efinition ;lock provides some num0er of controls appropriate for s(stem&level
management. These are used 0( 2!'M to integrate to the 2.M&provided features. The following ta0le lists
the defined 2.M s(stem controls that can 0e provided.
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Ta!le .-+$ <I3S-Supplied Control Methods for S)ste%-Level 6unctions
3!Cect 5escription
BC;5! Control method e/ecuted immediatel( following a wake event.
BC'T! Control method used to notif( the platform of impending sleep transition.
BC$T! Control method e/ecuted #ust prior to setting the sleep ena0le =!1'C.N> 0it.
BC! 'ackage that defines s(stem BC! state mode.
BC!4 'ackage that defines s(stem BC!4 state mode.
BC!2 'ackage that defines s(stem BC!2 state mode.
BC!3 'ackage that defines s(stem BC!3 state mode.
BC!" 'ackage that defines s(stem BC!" state mode.
BC!* 'ackage that defines s(stem BC!* state mode.
BCTT! Control method used to prepare to sleep and run once awakened
BCWAE Control method run once awakened.
8.3.1 \_BFS (Back From Sleep)
C;5! is an optional control method. %f it e/ists, 2!'M must e/ecute the C;5! method immediatel(
following wake from an( sleeping state !4, !2, !3, or !". C;5! allows AC'% s(stem firmware to perform
an( re:uired s(stem specific functions when returning a s(stem sleep state. 2!'M will e/ecute the C;5!
control method 0efore performing an( other ph(sical %F2 or ena0ling an( interrupt servicing upon returning
from a sleeping state. A value that indicates the sleeping state from which the s(stem was awoken =in other
words, 4\!4, 2\!2, 3\!3, "\!"> is passed as an argument to the C;5! control method.
The C;5! method must 0e self&contained =not call other methods>. Additionall(, C;5! ma( onl( access
2p3egions that are currentl( availa0le =see the C3.$ method for details>.
Arguments<
< The value of the previous sleeping state =4 for !4, 2 for !2, and so on>.
8.3.2 \_PTS (Prepare To Sleep)
The C'T! control method is e/ecuted 0( the 2! during the sleep transition process for !4, !2, !3, !", and
for orderl( !* shutdown. The sleeping state value =5or e/ample, 4, 2, 3, " or * for the !* soft&off state> is
passed to the C'T! control method. This method is called after 2!'M has notified native device drivers of
the sleep state transition and 0efore the 2!'M has had a chance to full( prepare the s(stem for a sleep state
transition. Thus, this control method can 0e e/ecuted a relativel( long time 0efore actuall( entering the
desired sleeping state. %f 2!'M a0orts the sleep state transition, 2!'M should run the CWAE method to
indicate this condition to the platform.
The C'T! control method cannot modif( the current configuration or power state of an( device in the
s(stem. 5or e/ample, C'T! would simpl( store the sleep t(pe in the em0edded controller in se:uencing the
s(stem into a sleep state when the !1'C.N 0it is set.
The platform must not make an( assumptions a0out the state of the machine when C'T! is called. 5or
e/ample, operation region accesses that re:uire devices to 0e configured and ena0led ma( not succeed, as
these devices ma( 0e in a non&decoding state due to plug and pla( or power management operations.
Arguments<
< The value of the sleeping state =4 for !4, 2 for !2, and so on>.
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8.3.3 \_GTS (Going To Sleep)
C$T! is an optional control method. %f it e/ists, 2!'M must e/ecute the C$T! control method #ust prior to
setting the sleep ena0le =!1'C.N> 0it in the 'M4 control register when entering the !4, !2, !3, and !"
sleeping states and when entering !* for orderl( shutdown. C$T! allows AC'% s(stem firmware to perform
an( re:uired s(stem specific functions prior to entering a s(stem sleep state. 2!'M will set the sleep
ena0le =!1'C.N> 0it in the 'M4 control register immediatel( following the e/ecution of the C$T! control
method without performing an( other ph(sical %F2 or allowing an( interrupt servicing. The sleeping state
value =4, 2, 3, ", or *> is passed as an argument to the C$T! control method. The C$T! method must not
attempt to directl( place the s(stem into a sleeping state. 2!'M performs this function 0( setting the sleep
ena0le 0it upon return from C$T!. %n the case of entr( into the !* soft off state however, C$T! ma( indeed
perform operations that place the s(stem into the !* state as 2!'M will not regain control.
The C$T! method must 0e self&contained =not call other methods>. Additionall(, C$T! ma( onl( access
2p3egions that are currentl( availa0le =see the C3.$ method for details>.
Arguments<
< The value of the sleeping state =4 for !4, 2 for !2, and so on>.
8.3.4 System \_Sx states
All s(stem states supported 0( the s(stem must provide a package containing the -W23- value of the
following format in the static -efinition ;lock. The s(stem states, known as !I!*, are referenced in the
namespace as BC!IBC!* and for clarit( the short !x names are used unless specificall( referring to the
named BC!x o0#ect. 5or each !x state, there is a defined s(stem 0ehavior.
Ta!le .-++ S)ste% State Package
<)te
Length
<)te
3ffset 5escription
4 Dalue for 'M4aCCNT.!1'CTS' register to enter this s(stem state.
4 4 Dalue for 'M40CCNT.!1'CTS' register to enter this s(stem state. To enter an(
given state, 2!'M must write the 'M4aCCNT.!1'CTS' register 0efore the
'M40CCNT.!1'CTS' register.
2 2 3eserved
!tates !4I!" represent some s(stem sleeping state. The ! state is the s(stem working state. Transition into
the ! state from some other s(stem state =such as sleeping> is automatic, and, 0( virtue that instructions
are 0eing e/ecuted, 2!'M assumes the s(stem to 0e in the ! state. Transition into an( s(stem sleeping
state is onl( accomplished 0( the operating software directing the hardware to enter the appropriate state,
and the operating software can onl( do this within the re:uirements defined in the 'ower 3esource and
;usF-evice 'ackage o0#ects.
All run&time s(stem state transitions =for e/ample, to and from the ! state>, e/cept !" and !*, are done
similarl( such that the code se:uence to do this is the following<
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/[
[ #ntel &rchitecture SetSleepin,State e-ample
[/
X60!:
SetS12temSleepin, (
#! X60!: !ewState
)
PR0)%SS0R_)0!<%R< )onte-tK
X60!: PowerSe8eunceK
B006%&! 5lu2h)ache2K
XS"0R< Slp<1pK
// Re0u1re" en1ron2ent3 %-ecutin, on the 212tem boot
// proce22or. &ll other proce22or2 2topped. #nterrupt2
// di2abled. &ll Power Re2ource2 (and device2) are in
// corre2pondin, device 2tate to 2upport !ewState.
// :et h/w attribute2 for thi2 212tem 2tate
5lu2h)ache2L Sleep<1peM!ewStateN.5lu2h)acheK
Slp<1p L Sleep<1peM!ewStateN.Slp<1p V S6P_<SP_;&SAK
_a2m
lea ea-$ 02Re2ume)onte-t
pu2h ea- K Build real mode handler the re2ume
pu2h off2et 2pG( K conte-t$ with eip L 2pG(
call SaveProce22orState
mov ea-$ Re2ume@ector K 2et firmware]2 re2ume vector
mov Mea-N$ off2et 02Real;odeRe2ume)ode
mov ed-$ P;4a_S<S K;a+e 2ure wa+e 2tatu2 i2 clear
mov a-$ W&A_S<S K (cleared b1 a22ertin, the bit
out d-$ a- K in the 2tatu2 re,i2ter)
mov ed-$ P;4b_S<S K
out d-$ a- K
and ea-$ not S6P_<SP_;&SA
or ea-$ Slp<1p K 2et S6P_<SP
or a-$ S6P_%! K 2et S6P_%!
cmp 5lu2h)ache2$ (
9C 2hort 2p4( K #f needed$ en2ure no dirt1 data in
call 5lu2hProce22or)ache2 K the cache2 while 2leepin,
2p4(> mov ed-$ P;4a_S6P_<SP K ,et addre22 for P;4a_S6P_<SP
out d-$ a- K 2tart h/w 2e8uencin,
mov ed-$ P;4b_S6P_<SP K ,et addre22 for P;4b_S6P_<SP
out d-$ a- K 2tart h/w 2e8uencin,
mov ed-$ P;4a_S<S K ,et addre22 for P;4-_S<S
mov ec-$ P;4b_S<S
2p3(> in a-$ d- K wait for W&A 2tatu2
-ch, ed-$ ec-
te2t a-$ W&A_S<S
9C 2hort 2p3(
2pG(>
/
// Done..
[Re2ume@ector L !X66K
return (K
/
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8.3.4.1
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8.3.4.1
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36 Advanced Configuration and 'ower %nterface !pecification
System \_S0 State (Working)
While the s(stem is in the ! state, it is in the s(stem working state. The 0ehavior of this state is defined as<
The processors are in the C, C4, C2, or C3 states. The processor&comple/ conte/t is maintained
and instructions are e/ecuted as defined 0( an( of these processor states.
-(namic 3AM conte/t is maintained and is readFwrite 0( the processors.
-evices states are individuall( managed 0( the operating software and can 0e in an( device state
=-, -4, -2, or -3>.
'ower 3esources are in a state compati0le with the current device states.
Transition into the ! state from some s(stem sleeping state is automatic, and 0( virtue that instructions are
0eing e/ecuted 2!'M, assumes the s(stem to 0e in the ! state.
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8.3.4.2
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System \_S1 State (Sleeping with Processor Context Maintained)
While the s(stem is in the !4 sleeping state, its 0ehavior is the following<
The processors are not e/ecuting instructions. The processor&comple/ conte/t is maintained.
-(namic 3AM conte/t is maintained.
'ower 3esources are in a state compati0le with the s(stem !4 state. All 'ower 3esources that
suppl( a !(stem&1evel reference of ! are in the 255 state.
-evices states are compati0le with the current 'ower 3esource states. 2nl( devices that solel(
reference 'ower 3esources that are in the 2N state for a given device state can 0e in that device state.
%n all other cases, the device is in the -3 =off> state
4
.
-evices that are ena0led to wake the s(stem and that can do so from their current device state can
initiate a hardware event that transitions the s(stem state to !. This transition causes the processor to
continue e/ecution where it left off.
To transition into the !4 state, the 2!'M must flush all processor caches.
4
2r it is at least assumed to 0e in the -3 state 0( its device driver. 5or e/ample, if the device doesnMt
e/plicitl( descri0e how it can sta( in some state non&off state while the s(stem is in a sleeping state, the
operating software must assume that the device can lose its power and state.
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8.3.4.3
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System \_S2 State
The !2 sleeping state is logicall( lower than the !4 state and is assumed to conserve more power. The
0ehavior of this state is defined as<
The processors are not e/ecuting instructions. The processor&comple/ conte/t is not maintained.
-(namic 3AM conte/t is maintained.
'ower 3esources are in a state compati0le with the s(stem !2 state. All 'ower 3esources that
suppl( a !(stem&1evel reference of ! or !4 are in the 255 state.
-evices states are compati0le with the current 'ower 3esource states. 2nl( devices that solel(
reference 'ower 3esources that are in the 2N state for a given device state can 0e in that device state.
%n all other cases, the device is in the -3 =off> state.
-evices that are ena0led to wake the s(stem and that can do so from their current device state can
initiate a hardware event that transitions the s(stem state to !. This transition causes the processor to
0egin e/ecution at its 0oot location. The ;%2! performs initialiHation of core functions as needed to
e/it an !2 state and passes control to the firmware resume vector. !ee section 49.3.2, J;%2!
%nitialiHation of Memor(,L for more details on ;%2! initialiHation.
;ecause the processor conte/t can 0e lost while in the !2 state, the transition to the !2 state re:uires that
the operating software flush all dirt( cache to d(namic 3AM =-3AM>.
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8.3.4.4
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8.3.4.4
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System \_S3 State
The !3 state is logicall( lower than the !2 state and is assumed to conserve more power. The 0ehavior of
this state is defined as follows<
The processors are not e/ecuting instructions. The processor&comple/ conte/t is not maintained.
-(namic 3AM conte/t is maintained.
'ower 3esources are in a state compati0le with the s(stem !3 state. All 'ower 3esources that
suppl( a !(stem&1evel reference of !, !4, or !2 are in the 255 state.
-evices states are compati0le with the current 'ower 3esource states. 2nl( devices that solel(
reference 'ower 3esources that are in the 2N state for a given device state can 0e in that device state.
%n all other cases, the device is in the -3 =off> state.
-evices that are ena0led to wake the s(stem and that can do so from their current device state can
initiate a hardware event that transitions the s(stem state to !. This transition causes the processor to
0egin e/ecution at its 0oot location. The ;%2! performs initialiHation of core functions as necessar( to
e/it an !3 state and passes control to the firmware resume vector. !ee section 49.3.2, J;%2!
%nitialiHation of Memor(,L for more details on ;%2! initialiHation.
5rom the software viewpoint, this state is functionall( the same as the !2 state. The operational difference
can 0e that some 'ower 3esources that could 0e left 2N to 0e in the !2 state might not 0e availa0le to the
!3 state. As such, additional devices ma( need to 0e in a logicall( lower -, -4, -2, or -3 state for !3
than !2. !imilarl(, some device wake events can function in !2 0ut not !3.
;ecause the processor conte/t can 0e lost while in the !3 state, the transition to the !3 state re:uires that
the operating software flush all dirt( cache to -3AM.
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8.3.4.5
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System \_S4 State
While the s(stem is in this state, it is in the s(stem !" sleeping state. The state is logicall( lower than the !3
state and is assumed to conserve more power. The 0ehavior of this state is defined as follows<
The processors are not e/ecuting instructions. The processor&comple/ conte/t is not maintained.
-3AM conte/t is not maintained.
'ower 3esources are in a state compati0le with the s(stem !" state. All 'ower 3esources that
suppl( a !(stem&1evel reference of !, !4, !2, or !3 are in the 255 state.
-evices states are compati0le with the current 'ower 3esource states. %n other words, all devices
are in the -3 state when the s(stem state is !".
-evices that are ena0led to wake the s(stem and that can do so from their !" device state can
initiate a hardware event that transitions the s(stem state to !. This transition causes the processor to
0egin e/ecution at its 0oot location.
After 2!'M has e/ecuted the C'T! control method and has put the entire s(stem state into main memor(,
there are two wa(s that 2!'M ma( handle the ne/t phase of the !" state transitionK saving and restoring
main memor(. The first wa( is to use the operating s(stemMs drivers to access the disks and file s(stem
structures to save a cop( of memor( to disk and then initiate the hardware !" se:uence 0( setting the
!1'C.N register 0it. When the s(stem wakes, the firmware performs a normal 0oot process and transfers
control to the 2! via the firmwareCwakingCvector loader. The 2! then restores the s(stemMs memor( and
resumes e/ecution.
The alternate method for entering the !" state is to utiliHe the ;%2! via the !";%2! transition. The ;%2!
uses firmware to save a cop( of memor( to disk and then initiates the hardware !" se:uence. When the
s(stem wakes, the firmware restores memor( from disk and wakes 2!'M 0( transferring control to the
5AC! waking vector.
The !";%2! transition is optional, 0ut an( s(stem that supports this mechanism must support entering the
!" state via the direct 2! mechanism. Thus the preferred mechanism for !" support is the direct 2!
mechanism as it provides 0roader platform support. The alternate !";%2! transition provides a wa( to
achieve !" support on operating s(stems that do not have support for the direct method.
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8.3.4.6
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8.3.4.6
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System \_S5 State (Soft Of)
The !* state is similar to the !" state e/cept that 2!'M does not save an( conte/t. The s(stem is in the
soft off state and re:uires a complete 0oot when awakened =;%2! and 2!>. !oftware uses a different state
value to distinguish 0etween this state and the !" state to allow for initial 0oot operations within the ;%2!
to distinguish whether or not the 0oot is going to wake from a saved memor( image. 2!'M does not
disa0le wake events 0efore setting the !1'C.N 0it when entering the !* s(stem state. This provides
support for remote management initiatives 0( ena0ling 3emote !tart capa0ilit(. An AC'%&compliant 2!
must provide an end user accessi0le mechanism for disa0ling all wake devices, with the e/ception of the
s(stem power 0utton, from a single point in the user interface.
8.3.5 _SWS (System Wake Source)
This o0#ect provides a means for 2!'M to definitivel( determine the source of an event that caused the
s(stem to enter the ! state. $eneral&purpose event and fi/ed&feature hardware registers containing wake
event sources information are insufficient for this purpose as the source event information ma( not 0e
availa0le after transitions to the ! state from all other s(stem states =!4&!*>. To determine the source event
that caused the s(stem to transition to the ! state, 2!'M will evaluate the C!W! o0#ect, when it e/ists,
under the BC$'. scope =for all fi/ed&feature general&purpose events from the $'. ;locks>, under the BC!;
scope =for fi/ed&feature hardware events>, and within the scope of a $'. ;lock device =for $'. events
from this device>. C!W! o0#ects ma( e/ist in an( or all of these locations as necessar( for the platform to
determine the source event that caused the s(stem to transition to the ! state.
To ena0le 2!'M to determine the source of the ! state transition via the C!W! o0#ect, hardware or
firmware should detect and save the event that caused the transition so that it can 0e returned during C!W!
o0#ect evaluation. The single wake source for the s(stem ma( 0e latched in hardware during the transition
so that no false wake events can 0e returned 0( C!W!. An implementation that does not use hardware to
latch a single wake source for the s(stem and instead uses firmware to save the wake source must do so as
:uickl( as possi0le after the wakeup event occurs, so that C!W! does not return values that correspond to
events that occurred after the sleep&to&wake transition. !uch an implementation must also take care to
ensure that events that occur su0se:uent to the wakeup source 0eing saved do not overwrite the original
wakeup source. The source event data returned 0( C!W! must 0e determined for each transition into the !
state. The value returned 0( C!W! must also 0e persistent during the s(stemMs residenc( in the ! state as
2!'M ma( evaluate C!W! multiple times. %n this case, the platform must return the same source event
information for each invocation.
Arguments<
None
3esult Code
#ourceEent< DWord)on2t
Where<
#ourceEent is the inde/ of the $'. input that caused the s(stem to transition to the ! state if
2!'M evaluates C!W! under the BC$'. scope.
#ourceEent is the inde/ of the $'. input that caused the s(stem to transition to the ! state if
2!'M evaluates C!W! within the scope of a $'. ;lock device. %n this case the inde/ is relative
to the $'. 0lock device, and is not uni:ue s(stem&wide.
#ourceEent is the inde/ in the 'M4 !tatus register that caused the s(stem to transition to the !
state if 2!'M evaluates C!W! under the BC!; scope .
#ourceEent has all 0its set =3nes> if the event that caused the s(stem to transition to the ! state
cannot 0e determined when 2!'M evaluates C!W! under an( of the three scopes listed a0ove.
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After evaluating an C!W! o0#ect within the BC$'. scope or within the scope of a $'. 0lock device,
2!'M will invoke the CW// control method corresponding to the $'. inde/ returned 0( C!W! if it e/ists.
This allows the platform to further determine source event if the $'. is shared among multiple devices.
!ee !ection *.+.2.2." for details.
8.3.6 \_TTS (Transition To State)
The CTT! control method is e/ecuted 0( the 2!'M at the 0eginning of the sleep transition process for !4,
!2, !3, !", and orderl( !* shutdown. 2!'M will invoke CTT! 0efore it has notified an( native mode
device drivers of the sleep state transition. The sleeping state value =5or e/ample, 4, 2, 3, " or * for the !*
soft&off state> is passed to the CTT! control method.
The CTT! control method is also e/ecuted 0( the 2!'M at the end of an( sleep transition process when the
s(stem transitions to ! from !4, !2, !3, or !". 2!'M will invoke CTT! after it has notified an( native
mode device drivers of the end of the sleep state transition. The working state value => is passed to the
CTT! control method.
%f 2!'M a0orts the sleep transition process, 2!'M will still run CTT! for an ! transition to indicate the
2!'M has returned to the ! state. The platform must assume that if 2!'M invokes the CTT! control
method for an !4, !2, !3, or !" transition, that 2!'M will invoke CTT! control method for an !
transition 0efore returning to the ! state.
The platform must not make an( assumptions a0out the state of the machine when CTT! is called. 5or
e/ample, operation region accesses that re:uire devices to 0e configured and ena0led ma( not succeed, as
these devices ma( 0e in a non&decoding state due to plug and pla( or power management operations.
Arguments<
< The value of the sleeping state =4 for !4, 2 for !2, and so on>
8.3.7 \_WAK (System Wake)
After the s(stem wakes from a sleeping state, it will invoke the BCWAE method and pass the sleeping state
value that has ended. This operation occurs as(nchronousl( with other driver notifications in the s(stem
and is not the first action to 0e taken when the s(stem wakes. The AM1 code for this control method issues
device, thermal, and other notifications to ensure that 2!'M checks the state of devices, thermal Hones, and
so on, that could not 0e maintained during the s(stem sleeping state. 5or e/ample, if the s(stem cannot
determine whether a device was inserted or removed from a 0us while in the !2 state, the CWAE method
would issue a de2icec1ec3 t(pe of notification for that 0us when issued with the sleeping state value of 2
=for more information a0out t(pes of notifications, see section +.+.3, J-evice 20#ect NotificationsL>. Notice
that a device check notification from the BC!; node will cause 2!'M to re&enumerate the entire tree
44
.
@ardware is not o0ligated to track the state needed to suppl( the resulting statusK however, this method
must return status concerning the last sleep operation initiated 0( 2!'M. The result codes can 0e used to
provide additional information to 2!'M or user.
Arguments<
The value of the sleeping state =4 for !4, 2 for !2, and so on>.
3esult Code =2 -W23- package><
!tatus ;it field of defined conditions that occurred during sleep.
/ Wake was signaled and was successful
/4 Wake was signaled 0ut failed due to lack of power.
/2 Wake was signaled 0ut failed due to thermal condition.
2ther 3eserved
44
2nl( 0uses that support hardware&defined enumeration methods are done automaticall( at run&time. This
would include AC'%&enumerated devices.
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"" Advanced Configuration and 'ower %nterface !pecification
'!! %f non&Hero, the effective !&state the power suppl( reall( entered.
This value is used to detect when the targeted !&state was not entered 0ecause of too much current
0eing drawn from the power suppl(. 5or e/ample, this might occur when some active deviceMs current
consumption pushes the s(stemMs power re:uirements over the low power suppl( mark, thus
preventing the lower power mode from 0eing entered as desired.
8.4 OSPM usage of _GTS, _PTS, _TTS, _WAK, and _BFS
2!'M will invoke C$T!, C'T!, CTT!, CWAE, and C;5! in the following order<
4.2!'M decides =through a polic( scheme> to place the s(stem into a sleeping state.
2.CTT!=!/> is run, where !/ is the desired sleep state to enter.
3. 2!'M notifies all native device drivers of the sleep state transition
".C'T! is run
*.2!'M readies s(stem for the sleep state transition
+.C$T! is run
9.2!'M writes the sleep vector and the s(stem enters the specified !/ sleep state.
8.!(stem Wakes up
6.C;5! is run
4.2!'M readies s(stem for the return from the sleep state transition
44.CWAE is run
42. 2!'M notifies all native device drivers of the return from the sleep state transition
43.CTT!=> is run to indicate the return to the ! state.
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6igure .-+ :orking @ Sleeping State o!Cect evaluation flow
9 Processor Power and Performance State Confguration and Control
This section descri0es the configuration and control of the processorMs power and performance states. The
ma#or controls over the processors are<
'rocessor power states< C, C4, C2, C3, N Cn
'rocessor clock throttling
'rocessor performance states< ', '4, N 'n
These controls are used in com0ination 0( 2!'M to achieve the desired 0alance of the following
sometimes conflicting goals<
'erformance
'ower consumption and 0atter( life
Thermal re:uirements
Noise&level re:uirements
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"+ Advanced Configuration and 'ower %nterface !pecification
;ecause the goals interact with each other, the operating software needs to implement a polic( as to when
and where tradeoffs 0etween the goals are to 0e made
42
. 5or e/ample, the operating software would
determine when the audi0le noise of the fan is undesira0le and would trade off that re:uirement for lower
thermal re:uirements, which can lead to lower processing performance. .ach processor configuration and
control interface is discussed in the following sections along with how controls interacts with the various
goals.
9.1 Processor Power States
AC'% defines the power state of s(stem processors while in the $ working state
43
as 0eing either active
=e/ecuting> or sleeping =not e/ecuting>. 'rocessor power states include are designated C, C4, C2, C3, N
Cn. The C power state is an active power state where the C', e/ecutes instructions. The C4 through Cn
power states are processor sleeping states where the processor consumes less power and dissipates less heat
than leaving the processor in the C state. While in a sleeping state, the processor does not e/ecute an(
instructions. .ach processor sleeping state has a latenc( associated with entering and e/iting that
corresponds to the power savings. %n general, the longer the entr(Fe/it latenc(, the greater the power
savings when in the state. To conserve power, 2!'M places the processor into one of its supported sleeping
states when idle. While in the C state, AC'% allows the performance of the processor to 0e altered through
a defined JthrottlingL process and through transitions into multiple performance states ='&states>. A diagram
of processor power states is provided 0elow.
Interr(pt
Interr(pt
!+T
P>+D+5
T!T>&@<3
an"
DTA<val(e
T!T>&@<0
Perfor%ance
State P' Throttling
C3 C5 C-
P>+D+-
ARB>DIS<3
Interr(pt or
B*Access
,0
.or/ing
C0
42
A thermal warning leaves room for operating s(stem tradeoffs to occur =to start the fan or to reduce
performance>, 0ut a critical thermal alert does not occur.
43
Notice that these C', states map into the $ working state. The state of the C', is undefined in the $3
sleeping state, the Cx states onl( appl( to the $ state.
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6igure /-+ Processor Power States
AC'% defines logic on a per&C', 0asis that 2!'M uses to transition 0etween the different processor power
states. This logic is optional, and is descri0ed through the 5A-T ta0le and processor o0#ects =contained in
the hierarchical namespace>. The fields and flags within the 5A-T ta0le descri0e the s(mmetrical features
of the hardware, and the processor o0#ect contains the location for the particular C',Ms clock logic
=descri0ed 0( the 'C;1E register 0lock and CC!T o0#ects>.
The 'C1D12 and 'C1D13 registers provide optional support for placing the s(stem processors into the C2
or C3 states. The 'C1D12 register is used to se:uence the selected processor into the C2 state, and the
'C1D13 register is used to se:uence the selected processor into the C3 state. Additional support for the C3
state is provided through the 0us master status and ar0iter disa0le 0its =;MC!T! in the 'M4C!T! register
and A3;C-%! in the 'M2CCNT register>. !(stem software reads the 'C1D12 or 'C1D13 registers to enter
the C2 or C3 power state. The @ardware must put the processor into the proper clock state precisel( on the
read operation to the appropriate 'C1D1/ register. The platform ma( alternativel( define interfaces
allowing 2!'M to enter C&states using the CC!T o0#ect, which is defined in !ection 8.".2.4, JCC!T =C
!tates>L.
'rocessor power state support is s(mmetric when presented via the 5A-T and 'C;1E interfacesK 2!'M
assumes all processors in a s(stem support the same power states. %f processors have non&s(mmetric power
state support, then the ;%2! will choose and use the lowest common power states supported 0( all the
processors in the s(stem through the 5A-T ta0le. 5or e/ample, if the C', processor supports all power
states up to and including the C3 state, 0ut the C',4 processor onl( supports the C4 power state, then
2!'M will onl( place idle processors into the C4 power state =C', will never 0e put into the C2 or C3
power states>. Notice that the C4 power state must 0e supported. The C2 and C3 power states are optional
=see the '32CCC4 flag in the 5A-T ta0le description in section *.2.+, J!(stem -escription Ta0le
@eaderL>.
The following sections descri0e processor power states in detail.
9.1.1 Processor Power State C0
While the processor is in the C power state, it e/ecutes instructions. While in the C power state, 2!'M
can generate a polic( to run the processor at less than ma/imum performance. The clock throttling
mechanism provides 2!'M with the functionalit( to perform this task in addition to thermal control. The
mechanism allows 2!'M to program a value into a register that reduces the processorMs performance to a
percentage of ma/imum performance.
dut, width
dut, 9alue
cloc: on time
cloc: off time
P%C&T
dut, offset dut, width
dut, 9alue
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"8 Advanced Configuration and 'ower %nterface !pecification
6igure /-& Throttling 1xa%ple
The 5A-T contains the dut( offset and dut( width values. The dut( offset value determines the offset
within the 'CCNT register of the dut( value. The dut( width value determines the num0er of 0its used 0(
the dut( value =which determines the granularit( of the throttling logic>. The performance of the processor
0( the clock logic can 0e e/pressed with the following e:uation<
X [ Performance
d'tysetting
d'tywidt1
=
2
4X
1Juation + 5ut) C)cle 1Juation
Nominal performance is defined as Jclose as possi0le, 0ut not 0elow the indicated performance level.L
2!'M will use the dut( offset and dut( width to determine how to access the dut( setting field. 2!'M will
then program the dut( setting 0ased on the thermal condition and desired power of the processor o0#ect.
2!'M calculates the nominal performance of the processor using the e:uation e/pressed in .:uation 4.
Notice that a d'tysetting of Hero is reserved.
5or e/ample, the clock logic could use the stop grant c(cle to emulate a divided processor clock fre:uenc(
on an %A processor =through the use of the !T'C1EY signal>. This signal internall( stops the processorMs
clock when asserted 12W. To implement logic that provides eight levels of clock control, the !T'C1EY
pin could 0e asserted as follows =to emulate the different fre:uenc( settings><
1 / Reser9ed 6alue
!
"
(
>
;
K
<
1 ! " ( > ; K <
"(tysetting
D(ty .i"th 1--bits2
S
T
P
C
+
K
B
S
i
g
n
a
l
CP* Cloc: Running
CP* Cloc: Stopped
6igure /-# 1xa%ple Control for the STPCLES
To start the throttling logic 2!'M sets the desired dut( setting and then sets the T@TC.N 0it @%$@. To
change the dut( setting, 2!'M will first reset the T@TC.N 0it 12W, then write another value to the dut(
setting field while preserving the other unused fields of this register, and then set the T@TC.N 0it @%$@
again.
The e/ample logic model is shown 0elow<
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// dut, width
T7T-%'TA
P%C&T4x
P%-6-(
Read
P%-6-"
Read
T7T%$&
P%C&T4>
Cloc: -ogic
S,stem
Ar0iter
ARB%'IS
PM"%C&T
BM%STS
PM!x%STS4>
BM%R-'
PM!x%C&T4!
6igure /-( ACPI Clock Logic >3ne per Processor?
%mplementation of the AC'% processor power state controls minimall( re:uires the support a single C',
sleeping state =C4>. All of the C', power states occur in the $F! s(stem stateK the( have no meaning
when the s(stem transitions into the sleeping state=!4&!">. AC'% defines the attri0utes =semantics> of the
different C', states =defines four of them>. %t is up to the platform implementation to map an appropriate
low&power C', state to the defined AC'% C', state.
AC'% clock control is supported through the optional processor register 0lock ='C;1E>. AC'% re:uires that
there 0e a uni:ue processor register 0lock for each C', in the s(stem. Additionall(, AC'% re:uires that the
clock logic for multiprocessor s(stems 0e s(mmetrical when using the 'C;1E and 5A-T interfacesK if the
' processor supports the C4, C2, and C3 states, 0ut '4 onl( supports the C4 state, then 2!'M will limit
all processors to enter the C4 state when idle.
The following sections define the different AC'% C', sleeping states.
9.1.2 Processor Power State C1
All processors must support this power state. This state is supported through a native instruction of the
processor =@1T for %A 32&0it processors>, and assumes no hardware support is needed from the chipset. The
hardware latenc( of this state must 0e low enough that 2!'M does not consider the latenc( aspect of the
state when deciding whether to use it. Aside from putting the processor in a power state, this state has no
other software&visi0le effects. %n the C4 power state, the processor is a0le to maintain the conte/t of the
s(stem caches.
The hardware can e/it this state for an( reason, 0ut must alwa(s e/it this state when an interrupt is to 0e
presented to the processor.
9.1.3 Processor Power State C2
This processor power state is optionall( supported 0( the s(stem. %f present, the state offers improved
power savings over the C4 state and is entered 0( using the 'C1D12 command register for the local
processor or an alternative mechanism as indicated 0( the CC!T o0#ect. The worst&case hardware latenc(
for this state is declared in the 5A-T and 2!'M can use this information to determine when the C4 state
should 0e used instead of the C2 state. Aside from putting the processor in a power state, this state has no
other software&visi0le effects. 2!'M assumes the C2 power state has lower power and higher e/it latenc(
than the C4 power state.
The C2 power state is an optional AC'% clock state that needs chipset hardware support. This clock logic
consists of an interface that can 0e manipulated to cause the processor comple/ to precisel( transition into a
C2 power state. %n a C2 power state, the processor is assumed capa0le of keeping its caches coherentK for
e/ample, 0us master and multiprocessor activit( can take place without corrupting cache conte/t.
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The C2 state puts the processor into a low&power state optimiHed around multiprocessor and 0us master
s(stems. 2!'M will cause an idle processor comple/ to enter a C2 state if there are 0us masters or Multiple
processor activit( =which will prevent 2!'M from placing the processor comple/ into the C3 state>. The
processor comple/ is a0le to snoop 0us master or multiprocessor C', accesses to memor( while in the C2
state.
The hardware can e/it this state for an( reason, 0ut must alwa(s e/it this state whenever an interrupt is to
0e presented to the processor.
9.1.4 Processor Power State C3
This processor power state is optionall( supported 0( the s(stem. %f present, the state offers improved
power savings over the C4 and C2 state and is entered 0( using the 'C1D13 command register for the local
processor or an alternative mechanism as indicated 0( the CC!T o0#ect. The worst&case hardware latenc(
for this state is declared in the 5A-T, and 2!'M can use this information to determine when the C4 or C2
state should 0e used instead of the C3 state. While in the C3 state, the processorMs caches maintain state 0ut
the processor is not re:uired to snoop 0us master or multiprocessor C', accesses to memor(.
The hardware can e/it this state for an( reason, 0ut must alwa(s e/it this state when an interrupt is to 0e
presented to the processor or when ;MC31- is set and a 0us master is attempting to gain access to
memor(.
2!'M is responsi0le for ensuring that the caches maintain coherenc(. %n a uniprocessor environment, this
can 0e done 0( using the 'M2CCNT.A3;C-%! 0us master ar0itration disa0le register to ensure 0us master
c(cles do not occur while in the C3 state. %n a multiprocessor environment, the processorsM caches can 0e
flushed and invalidated such that no d(namic information remains in the caches 0efore entering the C3
state.
There are two mechanisms for supporting the C3 power state<
@aving 2!'M flush and invalidate the caches prior to entering the C3 state.
'roviding hardware mechanisms to prevent masters from writing to memor( =uniprocessor&onl(
support>.
%n the first case, 2!'M will flush the s(stem caches prior to entering the C3 state. As there is normall(
much latenc( associated with flushing processor caches, 2!'M is likel( to onl( support this in
multiprocessor platforms for idle processors. 5lushing of the cache is accomplished through one of the
defined AC'% mechanisms =descri0ed 0elow in section 8.2, J5lushing CachesL>.
%n uniprocessor&onl( platforms that provide the needed hardware functionalit( =defined in this section>,
2!'M will attempt to place the platform into a mode that will prevent s(stem 0us masters from writing
into memor( while the processor is in the C3 state. This is accomplished 0( disa0ling 0us masters prior to
entering a C3 power state. ,pon a 0us master re:uesting an access, the C', will awaken from the C3 state
and re&ena0le 0us master accesses.
2!'M uses the ;MC!T! 0it to determine the power state to enter when considering a transition to or from
the C2FC3 power state. The ;MC!T! is an optional 0it that indicates when 0us masters are active. 2!'M
uses this 0it to determine the polic( 0etween the C2 and C3 power states< a lot of 0us master activit(
demotes the C', power state to the C2 =or C4 if C2 is not supported>, no 0us master activit( promotes the
C', power state to the C3 power state. 2!'M keeps a running histor( of the ;MC!T! 0it to determine
C', power state polic(.
The last hardware feature used in the C3 power state is the ;MC31- 0it. This 0it determines if the Cx
power state was e/ited as a result of 0us master re:uests. %f set, then the Cx power state was e/ited upon a
re:uest from a 0us master. %f reset, the power state was not e/ited upon 0us master re:uests. %n the C3 state,
0us master re:uests need to transition the C', 0ack to the C state =as the s(stem is capa0le of maintaining
cache coherenc(>, 0ut such a transition is not needed for the C2 state. 2!'M can optionall( set this 0it
when using a C3 power state, and clear it when using a C4 or C2 power state.
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9.1.5 Additional Processor Power States
AC'% introduced optional processor power states 0e(ond C3 starting in AC'% 2.. These power states,
C"N Cn, are conve(ed to 2!'M through the CC!T o0#ect defined in section 8.".2.4, JCC!T =C&!tates>.L
These additional power states are characteriHed 0( e:uivalent operational semantics to the C4 through C3
power states, as defined in the previous sections, 0ut with different entr(Fe/it latencies and power savings.
!ee section 8.".2.4, JCC!T =C&!tates>,L for more information.
9.2 Flushing Caches
To support the C3 power state without using the A3;C-%! feature, the hardware must provide functionalit(
to flush and invalidate the processorsM caches =for an %A processor, this would 0e the W;%ND- instruction>.
To support the !4, !2 or !3 sleeping states, the hardware must provide functionalit( to flush the platform
caches. 5lushing of caches is supported 0( one of the following mechanisms<
'rocessor instruction to write 0ack and invalidate s(stem caches =W;%ND- instruction for %A
processors>.
'rocessor instruction to write 0ack 0ut not invalidate s(stem caches =W;%ND- instruction for %A
processors and some chipsets with partial supportK that is, the( donMt invalidate the caches>.
The AC'% specification e/pects all platforms to support the local C', instruction for flushing s(stem
caches =with support in 0oth the C', and chipset>, and provides some limited J0est effortL support for
s(stems that donMt currentl( meet this capa0ilit(. The method used 0( the platform is indicated through the
appropriate 5A-T fields and flags indicated in this section.
AC'% specifies parameters in the 5A-T that descri0e the s(stemMs cache capa0ilities. %f the platform
properl( supports the processorMs write 0ack and invalidate instruction =W;%ND- for %A processors>, then
this support is indicated to 2!'M 0( setting the W;%ND- flag in the 5A-T.
%f the platform supports neither of the first two flushing options, then 2!'M can attempt to manuall( flush
the cache if it meets the following criteria<
A cache&ena0led se:uential read of contiguous ph(sical memor( of not more than 2 M; will flush
the platform caches.
There are two additional 5A-T fields needed to support manual flushing of the caches<
51,!@C!%?., t(picall( twice the siHe of the largest cache in the s(stem.
51,!@C!T3%-., t(picall( the smallest cache line siHe in the s(stem.
9.3 Power, Performance, and Throttling State Dependencies
Cost and comple/it( trade&off considerations have driven into the platform control dependencies 0etween
logical processors when entering power, performance, and throttling states. These dependencies e/ist in
various forms in multi&processor, multi&threaded processor, and multi&core processor&0ased platforms.
These dependencies ma( also 0e hierarchical. 5or e/ample, a multi&processor s(stem consisting of
processors containing multiple cores containing multiple threads ma( have various dependencies as a result
of the hardware implementation.
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"42 Advanced Configuration and 'ower %nterface !pecification
,nless 2!'M is aware of the dependenc( 0etween the logical processors, it might lead to scenarios where
one logical processor is implicitl( transitioned to a power, performance, or throttling state when it is
unwarranted, leading to incorrect F non&optimal s(stem 0ehavior. $iven knowledge of the dependencies,
2!'M can coordinate the transitions 0etween logical processors, choosing to initiate the transition when
doing so does not lead to incorrect or non&optimal s(stem 0ehavior. This 2!'M coordination is referred to
as !oftware =!W> Coordination. Alternatel(, it might 0e possi0le for the underl(ing hardware to coordinate
the state transition re:uests on multiple logical processors, causing the processors to transition to the target
state when the transition is guaranteed to not lead to incorrect or non&optimal s(stem 0ehavior. This
scenario is referred to as @ardware =@W> coordination. When hardware coordinates transitions, 2!'M
continues to initiate state transitions as it would if there were no dependencies. @owever, in this case it is
re:uired that hardware provide 2!'M with a means to determine actual state residenc( so that correct F
optimal control polic( can 0e realiHed.
'latforms containing logical processors with cross&processor dependencies in the power, performance, or
throttling state control areas use AC'% defined interfaces to group logical processors into what is referred to
as a dependenc( domain. The Coordination T(pe characteristic for a domain specifies whether 2!'M or
underl(ing hardware is responsi0le for the coordination. When 2!'M coordinates, the platform ma(
re:uire that 2!'M transition A11 =/5C> or ANS 2N. =/5-> of the processors 0elonging to the domain
into a particular target state. 2!'M ma( choose at its discretion to perform coordination even though the
underl(ing hardware supports hardware coordination. %n this case, 2!'M must transition all logical
processors in the dependenc( domain to the particular target state.
There are no dependencies implied 0etween a processorMs C&states, '&states or T&states. @ence, for e/ample
it is possi0le to use the same dependenc( domain num0er for specif(ing dependencies 0etween '&states
among one set of processors and C&states among another set of processors without an( dependencies 0eing
implied 0etween the '&!tate transitions on a processor in the first set and C&state transitions on a processor
in the second set.
9.4 Declaring Processors
.ach processor in the s(stem must 0e declared in the AC'% namespace in either the BC!; or BC'3 scope 0ut
not 0oth. -eclaration of processor in the BC'3 scope is re:uired for platforms desiring compati0ilit( with
AC'% 4.&0ased 2!'M implementations. 'rocessors are declared either via the A!1 Processor statement
or the A!1 5evice statement. A Processor definition declares a processor o0#ect that provides processor
configuration information and points to the processor register 0lock ='C;1E>. A 5evice definition for a
processor is declared using the AC'%9 hardware identifier =@%->. %n this case, processor configuration
information is provided e/clusivel( 0( o0#ects in the processor deviceMs o0#ect list.
When the platform uses the A'%C interrupt model, 2!'M associates processors declared in the namespace
with entries in the MA-T. 'rior to AC'% 3., this was accomplished using the processor o0#ectMs
'rocessor%- and the AC'% 'rocessor %- fields in MA-T entries. ,%- fields have 0een added to MA-T
entries in AC'% 3.. ;( e/panding processor declaration using 5evice definitions, ,%- o0#ect values under
a processor device can now 0e used to associate processor devices with entries in the MA-T. This removes
the previous 2*+ processor declaration limit.
'rocessor&specific o0#ects ma( 0e included in the processor o0#ectMs optional o0#ect list or declared within
the processor deviceMs scope. These o0#ects serve multiple purposes including providing alternative
definitions for the registers descri0ed 0( the processor register 0lock ='C;1E> and processor performance
state control. 2ther AC'%&defined device&related o0#ects are also allowed in the processor o0#ectMs o0#ect
list or under the processor deviceMs scope =for e/ample, the uni:ue identifier o0#ect C,%->.
With device&like characteristics attri0uted to processors, it is implied that a processor device driver will 0e
loaded 0( 2!'M to, at a minimum, process device notifications. 2!'M will enumerate processors in the
s(stem using the AC'% Namespace, processor&specific native identification instructions, and optionall( the
C@%- method.
2!'M will ignore definitions of AC'%&defined o0#ects in an o0#ect list of a processor o0#ect declared under
the BC'3 namespace.
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5or more information on the declaration of the processor o0#ect, see section 49.*.63, J'rocessor =-eclare
'rocessor>.L 'rocessor&specific o0#ects are descri0ed in the following sections.
9.4.1 _PDC (Processor Driver Capabilities)
This optional o0#ect is a method that is used 0( 2!'M to communicate to the platform the level of
processor power management support provided 0( 2!'M. This o0#ect is a child o0#ect of the processor.
2!'M evaluates C'-C prior to evaluating an( other processor power management o0#ects returning
configuration information.
The C'-C o0#ect provides 2!'M a mechanism to conve( to the platform the capa0ilities supported 0(
2!'M for processor power management. This allows the platform to modif( the AC'% namespace o0#ects
returning configuration information for processor power management 0ased on the level of support
provided 0( 2!'M. ,sing this method provides a mechanism for 2.Ms to provide support for new
technologies on legac( 2!es, while also allowing 2!'M to leverage new technologies on platforms
capa0le of supporting them. This method is evaluated once during processor device initialiHation, and will
not 0e re&evaluated during resume from a sleep state transition. The platform must preserve state
information across !4&!3 sleep state transitions.
S)ntax
_PD) (PDCBuffer)LB !ull
Argu%ents
PDCBuffer
-WordConst ;uffer =3evision%-, Count. Capa0ilities-W23-4.G.Capa0ilities-W23-n>
Re1s1onID
The revision %- of the Capa41l1t1esD56RD format.
Count
The num0er of Capa41l1t1esD56RD values in the 0uffer.
Capa41lt1esD56RD78n
Capa0ilities -Words, where each 0it defines capa0ilities and features supported 0( 2!'M for
processor configuration and power management as specified 0( the C', manufacturer.
The use of C'-C is deprecated in AC'% 3. in favor of C2!C. 5or 0ackwards compati0ilit(, C'-C ma( 0e
implemented using C2!C as follows<
;ethod(_PD)$4)
!ame(_)S<$ Pac+a,e()
!ame(_)S<$ Pac+a,e()
!ame(_)S<$ Pac+a,e()
Re,i2ter(55i-ed"W$ ($ ($ ()
Re,i2ter(55i-ed"W$ ($ ($ ()
/) //%nd of _P<) 0b9ect
/ // %nd of 0b9ect 6i2t
1=AMPL1
This is an e/ample usage of the C'TC o0#ect using the values defined in AC'% 4.. This is an illustrative
e/ample to demonstrate the mechanism with well&known values.
Proce22or (
\_SB.)PX($ // Proce22or !ame
4$ // &)P# Proce22or number
(-43($ // PB6A 212tem #0 addre22
I ) // PB6A 6en
//0b9ect 6i2t
!ame(_P<)$ // F3 bit wide #0 2paceEba2ed re,i2ter at the ?P_B6AB addre22
Re2ource<emplate()
Pac+a,e()
(-I.$ // 5re8uenc1 Percenta,e (4((^$ <hrottlin, 055 2tate)
(-($ // Power
(-($ // <ran2ition 6atenc1
(-T$ // )ontrol <"<_%!>( <"<6_D<S>444
(-($ // Statu2
/
Pac+a,e()
(-G=$ // 5re8uenc1 Percenta,e (=T.G^)
(-($ // Power
(-($ // <ran2ition 6atenc1
(-5$ // )ontrol <"<_%!>4 <"<6_D<S>444
(-($ // Statu2
/
Pac+a,e()
(-.B$ // 5re8uenc1 Percenta,e (TG^)
(-($ // Power
(-($ // <ran2ition 6atenc1
(-%$ // )ontrol <"<_%!>4 <"<6_D<S>44(
(-($ // Statu2
/
/)
!ame (_<SD$ Pac+a,e()
#f (\_SB.&))
Pac+a,e()
(-I.$ // 5re8uenc1 Percenta,e (4((^$ <hrottlin, 055 2tate)
(-($ // Power
(-($ // <ran2ition 6atenc1
(-T$ // )ontrol <"<_%!>( <"<6_D<S>444
(-($ // Statu2
/
Pac+a,e()
(-G=$ // 5re8uenc1 Percenta,e (=T.G^)
(-($ // Power
(-($ // <ran2ition 6atenc1
(-5$ // )ontrol <"<_%!>4 <"<6_D<S>444
(-($ // Statu2
/_
Pac+a,e()
(-.B$ // 5re8uenc1 Percenta,e (TG^)
(-($ // Power
(-($ // <ran2ition 6atenc1
(-%$ // )ontrol <"<_%!>4 <"<6_D<S>44(
(-($ // Statu2
/
/)
!ame (_<SD$ Pac+a,e()
#f (\_SB.&))
Pac+a,e()IG($ 34G(($ G(($ F(($ (-(($ (-(=/$ // Performance State Cero (P()
Pac+a,e()I(($ 4.H(($ G(($ F(($ (-(4$ (-(G/$ // Performance State one (P4)
Pac+a,e()G(($ =3(($ G(($ F(($ (-(3$ (-(I/ // Performance State two (P3)
/) // %nd of _PSS ob9ect
;ethod (_PP)$ () // Performance Pre2ent )apabilitie2 method
#f (\_SB.D0)A)
Pac+a,e()IG($ 34G(($ G(($ F(($ (-(($ (-(=/$ // Performance State Cero (P()
Pac+a,e()I(($ 4.H(($ G(($ F(($ (-(4$ (-(G/$ // Performance State one (P4)
Pac+a,e()G(($ =3(($ G(($ F(($ (-(3$ (-(I/ // Performance State two (P3)
/) // %nd of _PSS ob9ect
;ethod (_PP)$ () // Performance Pre2ent )apabilitie2 method
Pac+a,e()IG($ 34G(($ G(($ F(($ (-(($ (-(=/$ // Performance State Cero (P()
Pac+a,e()I(($ 4.H(($ G(($ F(($ (-(4$ (-(G/$ // Performance State one (P4)
Pac+a,e()G(($ =3(($ G(($ F(($ (-(3$ (-(I/ // Performance State two (P3)
/) // %nd of _PSS ob9ect
;ethod (_PP)$ () // Performance Pre2ent )apabilitie2 method
Return(:<5()
/
!ame(:<5($ Buffer((-4c)
(-(F$ (-(($ (-(($ (-(($ (-(($ (-a($ (-ef$ (-(F$ (-(($ (-(($ (-(($ (-(($
(-a($ (-ef$ (-(($ (-4($ (-(($ (-(($ (-(($ (-a($ (-cI$ (-(($ (-(($ (-(($
(-(($ (-(($ (-a($ (-H4
/
10.9.2 IDE Controller Device
Most device drivers can save and restore the registers of their device. 5or %-. controllers and drives, this is
not true 0ecause there are several drive settings for which ATA does not provide mechanisms to read.
5urther, there is no industr( standard for setting timing information for %-. controllers. ;ecause of this,
AC'% interface mechanisms are necessar( to provide the operating s(stem information a0out the current
settings for the drive and channel, and for setting the timing for the channel.
2!'M and the %-. driver will follow these steps when powering off the %-. su0s(stem<
4. The %-. driver will call the C$TM control method to get the current transfer timing settings for
the %-. channel. This includes information a0out -MA and '%2 modes.
2. The %-. driver will call the standard 2! services to power down the drives and channel.
3. As a result, 2!'M will e/ecute the appropriate C'!3 methods and turn off unneeded power
resources.
To power on the %-. su0s(stem, 2!'M and the %-. driver will follow these steps<
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4. The %-. driver will call the standard 2! services to turn on the drives and channel.
2. As a result, 2!'M will e/ecute the appropriate C'! methods and turn on re:uired power
resources.
3. The %-. driver will call the C!TM control method passing in transfer timing settings for the
channel, as well as the ATA drive %- 0lock for each drive on the channel. The C!TM control
method will configure the %-. channel 0ased on this information.
". 5or each drive on the %-. channel, the %-. driver will run the C$T5 to determine the ATA
commands re:uired to reinitialiHe each drive to 0oot up defaults.
*. The %-. driver will finish initialiHing the drives 0( sending these ATA commands to the drives,
possi0l( modif(ing or adding commands to suit the features supported 0( the operating s(stem.
The following shows the namespace for these o0#ects<
\_SB // S12tem bu2
P)#( // P)# bu2
#D%4 // 5ir2t #D% channel
_&DR // #ndicate2 addre22 of the channel on the P)# bu2
_:<; // )ontrol method to ,et current #D% channel 2ettin,2
_S<; // )ontrol method to 2et current #D% channel 2ettin,2
_PR( // Power re2ource2 needed for D( power 2tate
DR@4 // Drive (
_&DR // #ndicate2 addre22 of ma2ter #D% device
_:<5 // )ontrol method to ,et ta2+ file
DR@3 // Drive 4
_ _&DR // #ndicate2 addre22 of 2lave #D% device
_ _:<5 // )ontrol method to ,et ta2+ file
#D%3 // Second #D% channel
_&DR // #ndicate2 addre22 of the channel on the P)# bu2
_:<; // )ontrol method to ,et current #D% channel 2ettin,2
_S<; // )ontrol method to 2et current #D% channel 2ettin,2
_ _PR( //Power re2ource2 needed for D( power 2tate
DR@4 // Drive (
_&DR // #ndicate2 addre22 of ma2ter #D% device
_:<5 // )ontrol method to ,et ta2+ file
DR@3 // Drive 4
_&DR // #ndicate2 addre22 of 2lave #D% device
_:<5 // )ontrol method to ,et ta2+ file
The se:uential order of operations is as follows<
Powering down<
Call C$TM.
'ower down drive =calls C'!3 method and turns off power planes>.
Powering up<
'ower up drive =calls C'! method if present and turns on power planes>.
Call C!TM passing info from C$TM =possi0l( modified>, with %- data from
each drive.
%nitialiHe the channel.
Ma( modif( the results of C$T5.
5or each drive<
Call C$T5.
./ecute task file =possi0l( modified>.
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"*8 Advanced Configuration and 'ower %nterface !pecification
10.9.2.1
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IDE Controller-specifc Objects
10.9.2.1.1 _GTM (Get Timing Mode)
This Control Method returns the current settings for the %-. channel.
This control method is listed under each channel device o0#ect.
Arguments<
None
3esult Code<
A 0uffer with the current settings for the %-. channel<
Buffer ()
P#0 Speed ( //DW0RD
D;& Speed ( //DW0RD
P#0 Speed 4 //DW0RD
D;& Speed 4 //DW0RD
5la,2 //DW0RD
/
Ta!le ,-- D;TM Method "esult Codes
6ield 6or%at 5escription
'%2 !peed -W23- The '%2 0us&c(cle timing for drive in nanoseconds. /55555555
indicates that this mode is not supported 0( the channel. %f the chipset
cannot set timing parameters independentl( for each drive, this field
represents the timing for 0oth drives.
-MA !peed -W23- The -MA 0us&c(cle for drive timing in nanoseconds. %f ;it of the
5lags register is set, this -MA timing is for ,ltra-MA mode,
otherwise the timing is for multi&word -MA mode. /55555555
indicates that this mode is not supported 0( the channel. %f the chipset
cannot set timing parameters independentl( for each drive, this field
represents the timing for 0oth drives.
'%2 !peed 4 -W23- The '%2 0us&c(cle timing for drive 4 in nanoseconds. /55555555
indicates that this mode is not supported 0( the channel. %f the chipset
cannot set timing parameters independentl( for each drive, this field
must 0e /55555555.
-MA !peed 4 -W23- The -MA 0us&c(cle timing for drive 4 in nanoseconds. %f ;it of the
5lags register is set, this -MA timing is for ,ltra-MA mode,
otherwise the timing is for multi&word -MA mode. /55555555
indicates that this mode is not supported 0( the channel. %f the chipset
cannot set timing parameters independentl( for each drive, this field
must 0e /55555555.
5lags -W23- Mode flags
;itVW< 4 indicates using ,ltra-MA on drive
;itV4W< 4 indicates %2Channel3ead( is used on drive
;itV2W< 4 indicates using ,ltra-MA on drive 4
;itV3W< 4 indicates %2Channel3ead( is used on drive 4
;itV"W< 4 indicates chipset can set timing independentl( for each drive
;itsV*&34W< reserved =must 0e >
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"+ Advanced Configuration and 'ower %nterface !pecification
10.9.2.1.2 _STM (Set Timing Mode)
This Control Method sets the %-. channelMs transfer timings to the setting re:uested. The AM1 code is
re:uired to convert and set the nanoseconds timing to the appropriate transfer mode settings for the %-.
controller. C!TM ma( also make ad#ustments so that C$T5 control methods return the correct commands
for the current channel settings.
This control method takes three arguments< Channel timing information =as descri0ed in Ta0le 6&+>, and the
ATA drive %- 0lock for each drive on the channel. The channel timing information is not guaranteed to 0e
the same values as returned 0( C$TMK the 2! ma( tune these values as needed.
The ATA drive %- 0lock is the raw data returned 0( the %dentif( -rive, ATA command, which has the
command code Jech.L The C!TM control method is responsi0le for correcting for drives that misreport
their timing information.
Arguments<
Arg ;uffer Channel timing information =formatted as descri0ed in Ta0le 6&+>
Arg4 ;uffer ATA drive %-. 0lock for drive
Arg2 ;uffer ATA drive %-. 0lock for drive 4
3esult Code<
None
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10.9.3 Serial ATA (SATA) Controller Device
10.9.3.1
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"+2 Advanced Configuration and 'ower %nterface !pecification
Defnitions
H<A M @ost ;us Adapter
0ative SATA aware I 3efers to s(stem software =;%2!, option 32M, operating s(stem, etc> that
comprehends a particular !ATA @;A implementation and understands its programming interface
and power management 0ehavior.
0on-native SATA aware & 3efers to s(stem software =;%2!, option 32M, operating s(stem, etc>
that does not comprehend a particular !ATA @;A implementation and does not understand its
programming interface or power management 0ehavior. T(picall(, non&native !ATA aware
software will use a !ATA @;AMs emulation interface =e.g. task file registers> to control the @;A
and access its devices.
1%ulation %ode I 2ptional mode supported 0( a !ATA @;A. Allows non&native !ATA aware
software to access !ATA devices via traditional task file registers.
0ative %ode I 2ptional mode supported 0( a !ATA @;A. Allows native !ATA aware software to
access !ATA devices via registers that are specific to the @;A.
H)!rid 5evice M 3efers to a !ATA @;A that implements 0oth an emulation and a native
programming interface.
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10.9.3.2
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"+" Advanced Configuration and 'ower %nterface !pecification
Overview
A !ATA @;A differs from an %-. controller in a num0er of wa(s. 5irst, it can save its complete device
conte/t. !econd, it replaces %-. channels, which ma( support up to 2 attached devices, with ports, which
support onl( a single attached device, unless a port multiplier is present. !ee the !ATA spec
=http<FFwww.serialata.orgFcollateralFinde/.shtml> for more information. 5inall(, !ATA does not re:uire
timing information from the platform, allowing a simplification in how !ATA controllers are represented in
AC'%. =C$TM and C!TM are replaced 0( the simpler C!-- method.>
All ports, even those attached off a port multiplier, are represented as children directl( under the !ATA
controller device. This is practical 0ecause the !ATA specification does not allow a port multiplier to 0e
attached to a port multiplier. .ach portMs CA-3 indicates to which root port the( are connected, as well as
the port multiplier location, if applica0le. =!ee Ta0le +&2 for CA-3 format.>
!ince this specification onl( covers the configuration of mother0oard devices, it is also the case that the
control methods defined in this section cannot 0e used to send taskfiles to devices attached via either an
add&in !ATA @;A, or attached via a mother0oard !ATA @;A, if used with a port multiplier that is not also
on the mother0oard.
The following shows an e/ample !ATA namespace<
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\_SB E S12tem bu2
P)#( E P)# bu2
S&<& E S&<& )ontroller device
_ &DR E #ndicate2 addre22 of the controller on the P)# bu2
_ PR( E Power re2ource2 needed for D( power 2tate
PR<( E Port ( device
_&DR E #ndicate2 ph12ical port and port multiplier topolo,1
_SDD E #dentif1 information for drive attached to thi2 port
_:<5 E )ontrol method to ,et ta2+ file
PR<n E Port n device
_&DR E #ndicate2 ph12ical port and port multiplier topolo,1
_SDD E #dentif1 information for drive attached to thi2 port
_:<5 E )ontrol method to ,et ta2+ file
10.9.3.3
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"++ Advanced Configuration and 'ower %nterface !pecification
SATA controller-specifc control methods
%n order to ensure proper interaction 0etween 2!'M, the firmware, and devices attached to the !ATA
controller, it is a re:uirement that 2!'M e/ecute the C!-- and C$T5 control methods when certain events
occur. 2!'MMs response to events must 0e as follows<
C3M"1S1T' Initial 3S load' device insertion' H<A 5# to 5$ transition' as)nchronous loss of signalH
4. 2!'M sends %-.NT%5S -.D%C. or %-.NT%5S 'ACE.T -.D%C. command to the attached device.
2. 2! e/ecutes C!--. C!-- control method re:uires 4 argument that consists of the data 0lock received
from an attached device as a result of a host issued %-.NT%5S -.D%C. or %-.NT%5S 'ACE.T
-.D%C. command.
3. After the C!-- method completes, the 2! e/ecutes the C$T5 method. ,sing the task file information
provided 0( C$T5, the 2! then sends the C$T5 taskfiles to the attached device.
5evice re%oval and H<A 5$ to 5# transitionH
4. No 2!'M action re:uired.
10.9.3.3.1 _SDD (Set Device Data)
This optional o0#ect is a control method that conve(s to the platform the t(pe of device connected to the
port. The C!-- o0#ect ma( e/ist under a !ATA port device o0#ect. The platform t(picall( uses the
information conve(ed 0( the C!-- o0#ect to construct the values returned 0( the C$T5 o0#ect.
2!'M conve(s to the platform the ATA drive %- 0lock, which is the raw data returned 0( the %dentif(
='acket> -evice, ATA command =command code Jech.L>. 'lease see the ATAFATA'%&+ specification for
more details.
Arguments<
Arg ;uffer ATA drive identif( 0lock, contents descri0ed 0( the ATA specification
3esult Code<
None
10.10 Floppy Controller Device Objects
10.10.1 _FDE (Floppy Disk Enumerate)
.numerating devices attached to a flopp( disk controller is a time&consuming function. %n order to speed up
the process of flopp( enumeration, AC'% defines an optional enumeration o0#ect that is defined directl(
under the device o0#ect for the flopp( disk controller. %t returns a 0uffer of five 32&0it values. The first four
values are ;oolean values indicating the presence or a0sence of the four flopp( drives that are potentiall(
attached to the controller. A non&Hero value indicates that the flopp( device is present. The fifth value
returned indicates the presence or a0sence of a tape controller. -efinitions of the tape presence value can 0e
found in Ta0le 6&9.
Arguments<
None
3esult Code<
A 0uffer containing values that indicate the presence or a0sence of flopp( devices.
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Buffer ()
5lopp1 ( // Boolean DW0RD
5lopp1 4 // Boolean DW0RD
5lopp1 3 // Boolean DW0RD
5lopp1 F // Boolean DW0RD
<ape // See table below
/
Ta!le ,-. Tape Presence
7alue 5escription
,nknown if device is present
4 -evice is present
2 -evice is never present
)2 3eserved
10.10.2 _FDI (Floppy Disk Information)
This o0#ect returns information a0out a flopp( disk drive. This information is the same as that returned 0(
the %NT 43 5unction 8@ on %A&'Cs.
3esult Code<
Pac+a,e
Drive !umber //BS<%
Device <1pe //BS<%
;a-imum )1linder !umber //W0RD
;a-imum Sector !umber //W0RD
;a-imum "ead !umber //W0RD
di2+_2pecif1_4 //BS<%
di2+_2pecif1_3 //BS<%
di2+_motor_wait //BS<%
di2+_2ector_2iC //BS<%
di2+_eot //BS<%
di2+_rw_,ap //BS<%
di2+_dtl //BS<%
di2+_formt_,ap //BS<%
di2+_fill //BS<%
di2+_head_2ttl //BS<%
di2+_motor_2trt //BS<%
/
Ta!le ,-/ ACPI 6lopp) 5rive Infor%ation
6ield 6or%at 5efinition
-rive Num0er ;ST. As reported 0( C%NT 43 5unction 8@
-evice T(pe ;ST. As reported 0( C%NT 43 5unction 8@
Ma/imum C(linder Num0er W23- As reported 0( C%NT 43 5unction 8@
Ma/imum !ector Num0er W23- As reported 0( C%NT 43 5unction 8@
Ma/imum @ead Num0er W23- As reported 0( C%NT 43 5unction 8@
-iskCspecif(C4 ;ST. As reported in .!<-4 from %NT 43 5unction 8@
-iskCspecif(C2 ;ST. As reported in .!<-4 from %NT 43 5unction 8@
-iskCmotorCwait ;ST. As reported in .!<-4 from %NT 43 5unction 8@
-iskCsectorCsiH ;ST. As reported in .!<-4 from %NT 43 5unction 8@
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"+8 Advanced Configuration and 'ower %nterface !pecification
6ield 6or%at 5efinition
-iskCeot ;ST. As reported in .!<-4 from %NT 43 5unction 8@
-iskCrwCgap ;ST. As reported in .!<-4 from %NT 43 5unction 8@
-iskCdtl ;ST. As reported in .!<-4 from %NT 43 5unction 8@
-iskCformtCgap ;ST. As reported in .!<-4 from %NT 43 5unction 8@
-iskCfill ;ST. As reported in .!<-4 from %NT 43 5unction 8@
-iskCheadCsttl ;ST. As reported in .!<-4 from %NT 43 5unction 8@
-iskCmotorCstrt ;ST. As reported in .!<-4 from %NT 43 5unction 8@
10.10.3 _FDM (Floppy Disk Drive Mode)
This control method switches the mode =33'MF3+3'M> of all flopp( disk drives attached to this
controller. %f this control method is implemented, the platform must reset the mode of all drives to 33'M
mode after a -x to - transition of the controller.
Arguments<
I !et the mode of all drives to 33'M mode.
4 I !et the mode of all drives to 3+3'M mode.
3esult Code<
None
10.11 GPE Block Device
The $'. ;lock device is an optional device that allows a s(stem designer to descri0e $'. 0locks 0e(ond
the two that are descri0ed in the 5A-T. Control methods associated with the $'. pins of $'. 0lock
devices e/ist as children of the $'. ;lock device, not within the BC$'. namespace.
A $'. ;lock device consumes %F2 or memor( address space, as specified 0( its C'3! or CC3! child
o0#ects. The interrupt vector used 0( the $'. 0lock does not need to 0e the same as the !C%C%NT field. The
interrupt used 0( the $'. 0lock device is specified in the CC3! and C'3! methods associated with the
$'. 0lock.
A $'. ;lock device must have a C@%- or a CC%- of JAC'%+.L
0oteH A s(stem designer must descri0e the $'. 0lock necessar( to 0ootstrap the s(stem in the 5A-T as a
$'.F$'.4 0lock. $'. ;lock devices cannot 0e used to implement these $'. inputs.
To represent the $'. 0lock associated with the 5A-T, the s(stem designer needs onl( to include the
AC'%+ device in the tree, and not have an( CC3!, C'3!, C!3!, or other $'.&specific methods
associated with that 0lock. An( 0lock that does not represent the $'. 0lock of the 5A-T must contain the
C1//, C.//, CW//, CC3!, C'3!, or C!3! methods re:uired to useFprogram that 0lock. 2!'M assumes the
first AC'%+ device without a CC3! is the $'. device that is associated with the 5A-T.
// &S6 e-ample of root :P% bloc+
Device(\_SB.P)#(.:P%()
!ame(_"#D$*&)P#(((I*)
!ame(_X#D$4)
/
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ "+6
// &S6 e-ample of a nonEroot :P% bloc+
Device(\_SB.P)#(.:P%4)
!ame(_"#D$ *&)P#(((I*)
!ame(_X#D$ 3)
!ame(_)RS$ Buffer ()
#0(Decode4I$ 5)(($ 5)(F$ .$ .$)
#RJ( 6evel$ &ctive"i,h$ Shared$) G /
/)
;ethod(_6(3) Y /
;ethod(_%(T) Y /
;ethod(_W(.) Y /
Notice that it is legal to replace the %F2 descriptors with Memor( descriptors if the register is memor(
mapped.
%f the s(stem must run an( $'.s to 0ootstrap the s(stem =for e/ample, when .m0edded Controller events
are re:uired>, the associated 0lock of $'.s must 0e descri0ed in the 5A-T. This register 0lock is not
relocata0le and will alwa(s 0e availa0le for the life of the operating s(stem 0oot.
The $'. 0lock associated with the AC'%+ device can 0e stopped, e#ected, reprogrammed, and so on.
The s(stem can also have multiple such $'. 0locks.
10.11.1 Matching Control Methods for General-Purpose Events in a GPE
Block Device
When a $'. -evice raises an interrupt, 2!'M e/ecutes a corresponding control method =as descri0ed in
section *.+.2.2.3, JGueuing the Matching Control Method for ./ecutionL>. These control methods =of the
form C1//, C.//, and CW//> for $'. -evices are not within the BC$'. namespace. The( are children of
the $'. ;lock device.
5or e/ample<
Device(:P%G)
!ame(_"#D$ '&)P#(((I*)
;ethod(_6(3) Y /
;ethod(_%(T) Y /
;ethod(_W(.) Y /
/
10.12 Module Device
This optional device is a container o0#ect that acts as a 0us node in a namespace. %t ma( contain child
o0#ects that are devices or 0uses. The module device is declared using the AC'%" hardware identifier
=@%->.
%f the module device contains a CC3! o0#ect, the J0usL descri0ed 0( this o0#ect is assumed to have these
resources availa0le for consumption 0( its child devices. %f a CC3! o0#ect is present, an( resources not
produced in the module deviceMs CC3! o0#ect ma( not 0e allocated to child devices.
'roviding a CC3! o0#ect is undesira0le in some module devices. 5or e/ample, consider a module device
used to descri0e an add&in 0oard containing multiple host 0ridges without an( shared resource decoding
logic. %n this case the resource ranges availa0le to the host 0ridges are not controlled 0( an( entit( residing
on the add&in 0oard, impl(ing that a CC3! o0#ect in the associated module device would not descri0e an(
real feature of the underl(ing hardware.
To account for cases like this, the s(stem designer ma( optionall( omit the module deviceMs CC3! o0#ect. %f
no CC3! o0#ect is present, 2!'M will assume that the module device is a simple container o0#ect that does
not produce the resources consumed 0( its child devices. %n this case, 2!'M will assign resources to the
child devices as if the( were direct children of the module deviceUs parent o0#ect.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
"9 Advanced Configuration and 'ower %nterface !pecification
5or an e/ample with a module device CC3! o0#ect present, consider a Module -evice containing three
child memor( devices. %f the CC3! o0#ect for the Module -evice contains memor( from 2 $; through +
$;, then the child memor( devices ma( onl( 0e assigned addresses within this range.
./ample<
Device (\_SB.!0D()
!ame (_"#D$ P&)P#(((.P) // ;odule device
!ame (_X#D$ ()
!ame (_PRS$ Re2ource<emplate()
Word#0 (
Re2ourceProducer$
;in5i-ed$ // _;#5
;a-5i-ed$$$ // _;&5
(-(((($ // _:R&
(-(((($ // _;#!
(-T555$ // _;&R
(-($ // _<R&
(-=((() // _6%!
DWord;emor1 (
Re2ourceProducer$$ // 5or ;ain ;emor1 D P)#
;in!ot5i-ed$ // _;#5
;a-!ot5i-ed$ // _;&5
)acheable$ // _;%;
ReadWrite$ // _RW
(-(5555555$ // _:R&
(-.((((((($ // _;#!
(-T5555555$ // _;&R
(-($ // _<R&
(-(((((((() // _6%!
/)
;ethod (_SRS$ 4) ... /
;ethod (_)RS$ () ... /
Device (;%;() // ;ain ;emor1 (3GI;B module)
!ame (_"#D$ %#S&#D(PP!P()=(P))
!ame (_X#D$ ()
;ethod (_S<&$ () // #f memor1 not pre2ent EEB Return((-(()
// %l2e if memor1 i2 di2abled EEB Return((-(D)
// %l2e EEB Return((-(5)
/
!ame (_PRS$ Re2ource<emplate ()
DWord;emor1 ($$$$
)acheable$ // _;%;
ReadWrite$ // _RW
(-(5555555$ // _:R&
(-.((((((($ // _;#!
(-T5555555$ // _;&R
(-($ // _<R&
(-4((((((() // _6%!
/)
;ethod (_)RS$ () ... /
;ethod (_SRS$ 4) ... /
;ethod (_D#S$ () ... /
/
Device (;%;4) // ;ain ;emor1 (G43;B module)
!ame (_"#D$ %#S&#D(PP!P()=(P))
!ame (_X#D$ 4)
;ethod (_S<&$ () // #f memor1 not pre2ent EEB Return((-(()
// %l2e if memor1 i2 di2abled EEB Return((-(D)
// %l2e EEB Return((-(5)
/
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ "94
!ame (_PRS$ Re2ource<emplate ()
DWord;emor1 ($$$$
)acheable$ // _;%;
ReadWrite$ // _RW
(-45555555$ // _:R&
(-.((((((($ // _;#!
(-T5555555$ // _;&R
(-($ // _<R&
(-3((((((() // _6%!
/)
;ethod (_)RS$ () ... /
;ethod (_SRS$ 4) ... /
;ethod (_D#S$ () ... /
/
Device (P)#() // P)# Root Brid,e
!ame (_"#D$ %#S&#D(PP!P(&(FP))
!ame (_X#D$ ()
!ame (_BB!$ (-(()
!ame (_PRS$ Re2ource<emplate ()
WordBu2!umber (
Re2ourceProducer$
;in5i-ed$ // _;#5
;a-5i-ed$$ // _;&5
(-(($ // _:R&
(-(($ // _;#!
(-T5$ // _;&R
(-($ // _<R&
(-=() // _6%!
Word#0 (
Re2ourceProducer$
;in5i-ed$ // _;#5
;a-5i-ed$$$ // _;&5
(-(((($ // _:R&
(-(((($ // _;#!
(-()5T$ // _;&R
(-($ // _<R&
(-()5=) // _6%!
Word#0 (
Re2ourceProducer$
;in5i-ed$ // _;#5
;a-5i-ed$$$ // _;&5
(-(((($ // _:R&
(-(D(($ // _;#!
(-T555$ // _;&R
(-($ // _<R&
(-TF(() // _6%!
DWord;emor1 (
Re2ourceProducer$$
;in!ot5i-ed$ // _;#5
;a-!ot5i-ed$ // _;&5
!on)acheable$ // _;%;
ReadWrite$ // _RW
(-(5555555$ // _:R&
(-.((((((($ // _;#!
(-T5555555$ // _;&R
(-($ // _<R&
(-(((((((() // _6%!
/)
;ethod (_)RS$ () ... /
;ethod (_SRS$ 4) ... /
/
/
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
"92 Advanced Configuration and 'ower %nterface !pecification
10.13 Memory Devices
Memor( devices allow a platform designer to optionall( descri0e the d(namic properties of memor(. %f a
platform cannot have memor( added or removed while the s(stem is active, then memor( devices are not
necessar(. Memor( devices ma( descri0e e/actl( the same ph(sical memor( that the !(stem Address Map
interfaces descri0e =see section 4*, J!(stem Address Map %nterfacesL>. The( do not descri0e how that
memor( is, or has 0een, used. %f a region of ph(sical memor( is marked in the !(stem Address Map
interface as Address3ange3eserved or Address3angeND! and it is also descri0ed in a memor( device, then
it is the responsi0ilit( of the 2! to guarantee that the memor( device is never disa0led.
%t is not necessar( to descri0e all memor( in the s(stem with memor( devices if there is some memor( in
the s(stem that is static in nature. %f, for instance, the memor( that is used for the first 4+ M; of s(stem
3AM cannot 0e e#ected, inserted, or disa0led, that memor( ma( onl( 0e represented 0( the !(stem Address
Map interfaces. ;ut if memor( can 0e e#ected, inserted, or disa0led, it must 0e represented 0( a memor(
device.
10.13.1 Address Decoding
Memor( devices must provide a CC3! o0#ect that descri0es the ph(sical address space that the memor(
decodes. %f the memor( can decode alternative ranges in ph(sical address space, the devices ma( also
provide C'3!, C!3! and C-%! o0#ects. 2ther device o0#ects ma( also appl( if the device can 0e e#ected.
10.13.2 Example: Memory Device
Scope (\_SB)
Device (;%;()
!ame (_"#D$ %#S&#D ('P!P()=(*))
!ame (_)RS$ Re2ource<emplate ()
Jword;emor1
Re2ource)on2umer$
$
;in5i-ed$
;a-5i-ed$
)acheable$
ReadWrite$
(-5555555$
(-4((((((($
(-F((((((($
($
$$)
/
/
/
10.14 _UPC (USB Port Capabilities)
This optional o0#ect is a method that allows the platform to communicate to the operating s(stem, certain
,!; port capa0ilities that are not provided for through current ,!; host 0us adaptor specifications =e.g.
,@C%, 2@C% and .@C%>. %f implemented 0( the platform, this o0#ect will 0e present for each ,!; port
=child> on a given ,!; host 0us adaptorK operating s(stem software can e/amine these characteristics at
0oot time in order to gain knowledge a0out the s(stemMs ,!; topolog(, availa0le ,!; ports, etc. This
method is applica0le to ,!; root hu0 ports as well as ports that are implemented through integrated ,!;
hu0s.
S)ntax
_XP) LB XP)Pac+a,e
"eturn 7alue
$PCPac%a&e< Pac+a,e =PortIsConnecta!le' PortConnectorT)pe' "eserved$' "eserved+>
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ "93
Where<
PortIsConnecta4le< B1te)on2t
%f this value is non&Hero =/55>, then the port is connecta0le. %f this value is Hero =/>, then
the port is not connecta0le.
Note< The definition of a Uconnecta0leU port is dependent upon the implementation of the ,!;
port within a particular platform. 5or e/ample,
%f a ,!; port is user visi0le
=as indicated 0( the C'1- o0#ect> and connecta0le, then
an end user can freel( connect and disconnect ,!; devices to the ,!; port.
%f a ,!; port is not user visi0le and is connecta0le, then an end user cannot freel(
connect and disconnect ,!; devices to the ,!; port. A ,!; device that is directl(
dhard&wiredd to a ,!; port is an e/ample of a ,!; port that is not user visi0le and
is connecta0le.
%f a ,!; port is not user visi0le and is not connecta0le, then the ,!; port is
ph(sicall( implemented 0( the ,!; host controller, 0ut is not 0eing used 0( the
platform and therefore cannot 0e accessed 0( an end user.
%t is illegal for a ,!; port to 0e specified as visi0le and not connecta0le.
PortConnector9:pe< B1te)on2t
This field is used to specif( the host connector t(pe. %t is ignored 0( 2!'M if the port is
not user visi0le<
/< T)pe TAU connector
/4< Mini-A< connector
/2< 1xpressCard
/3 & /5.< "eserved
/55< Proprietar) connector
Resere"*< -word)on2t
This value is reserved for future use and must 0e Hero.
Resere"7< -word)on2t
This value is reserved for future use and must 0e Hero.
1=AMPL1
The following is an e/ample of a port characteristics o0#ect implemented for a ,!; host controllerMs root
hu0 where<
3 'orts are implementedK 'ort 4 is not user visi0leFnot connecta0le and 'orts 2 and 3 are user
visi0le and connecta0le.
'ort 2 is located on the 0ack panel
'ort 3 has an integrated 2 port hu0. Note that 0ecause this port hosts an integrated hu0, it is
therefore not shara0le with another host controller =e.g. %f the integrated hu0 is a ,!;2. hu0, the
port can never 0e shared with a ,!;4.4 companion controller>.
The ports availa0le through the em0edded hu0 are located on the front panel and are ad#acent to
one another.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
"9" Advanced Configuration and 'ower %nterface !pecification
//
// Root hub device for thi2 ho2t controller. <hi2 controller implement2 F root hub port2.
//
Device( R"XB)
!ame( _&DR$ (-(((((((() // root "XB alwa12 ha2 a value of (
// Root hub$ port 4
Device( PR<4)
// &ddre22 ob9ect for port 4. <hi2 value mu2t be 4
!ame( _&DR$ (-(((((((4)
// XSB port capabilitie2 ob9ect. <hi2 ob9ect return2 the 212tem
// 2pecific XSB port confi,uration information for port number 4
// Because t>1s port 1s not connecta4le 1t 1s assu2e" to 4e not 1s14le.
?? 9>erefore a _P;D "escr1ptor 1s not re0u1re".
!ame( _XP)$ Pac+a,e()
(-(($ // Port i2 not connectable
(-55$ // )onnector t1pe (!/& for nonEvi2ible port2)
(-(((((((($ // Re2erved ( W mu2t be Cero
(-((((((((/) // Re2erved 4 W mu2t be Cero
/ // Device( PR<4)
//
// Root "ub$ Port 3
//
Device( PR<3)
// &ddre22 ob9ect for port 3. <hi2 value mu2t be 3
!ame(_&DR$ (-(((((((3)
!ame( _XP)$ Pac+a,e()
(-55$ // Port i2 connectable
(-(($ // )onnector t1pe W <1pe `&]
(-(((((((($ // Re2erved ( W mu2t be Cero
(-((((((((/) // Re2erved 4 W mu2t be Cero
// provide ph12ical port location info
!ame( _P6D$ Buffer( (-4()
(-((((((=4$ // Revi2ion 4$ #,nore color
// )olor (i,nored)$ width and hei,ht not
(-(((((((($ // re8uired a2 thi2 i2 a 2tandard XSB `&] t1pe
// connector
(-(((((cIH$ // X2er vi2ible$ Bac+ panel$ @ertical
// )enter$ 2hape L vert. rectan,le
(-(((((((F/) // e9ectable$ re8uire2 0PS; e9ect a22i2tance
/ // Device( PR<3)
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ "9*
//
// Root "ub$ Port F
//
Device( PR<F)
// &ddre22 ob9ect for port F. <hi2 value mu2t be F
!ame(_&DR$ (-(((((((F)
// Because t>1s port 1s not connecta4le 1t 1s assu2e" to 4e not 1s14le.
?? 9>erefore a _P;D "escr1ptor 1s not re0u1re".
!ame( _XP)$ Pac+a,e()
(-(($ // Port i2 not connectable
(-55$ // )onnector t1pe (!/& for nonEvi2ible port2)
(-(((((((($ // Re2erved ( W mu2t be Cero
(-((((((((/) // Re2erved 4 E mu2t be Cero
// Declare the inte,rated hub ob9ect
Device( #"XB)
// &ddre22 ob9ect for the hub. <hi2 value mu2t be (
!ame(_&DR$ (-(((((((()
// #nte,rated hub$ port 4
Device( PR<4)
// &ddre22 ob9ect for the port. Becau2e the port i2 implemented on
// inte,rated hub port Q4$ thi2 value mu2t be 4
!ame( _&DR$ (-(((((((4)
// XSB port characteri2tic2 ob9ect. <hi2 ob9ect return2 the 212tem
// 2pecific XSB port confi,uration information for inte,rated hub port
// number 4
!ame( _XP)$ Pac+a,e()
(-55$ // Port i2 connectable
(-(($ // )onnector t1pe W <1pe `&]
(-(((((((($ // Re2erved ( W mu2t be Cero
(-((((((((/) // Re2erved 4 W mu2t be Cero
// provide ph12ical port location info
!ame( _P6D$ Buffer( (-4()
(-((((((=4$ // Revi2ion 4$ #,nore color
// )olor (i,nored)$ width and hei,ht not
(-(((((((($ // re8uired a2 thi2 i2 a 2tandard XSB `&] t1pe
// connector
(-((((4(a4$ // X2er vi2ible$ front panel$ @ertical
// lower$ horC. 6eft$ 2hape L horC. rectan,le
(-(((((((F/) // e9ectable$ re8uire2 0PS; e9ect a22i2tance
/ // Device( PR<4)
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
"9+ Advanced Configuration and 'ower %nterface !pecification
//
// #nte,rated hub$ port 3
//
Device( PR<3)
// &ddre22 ob9ect for the port. Becau2e the port i2 implemented on
// inte,rated hub port Q3$ thi2 value mu2t be 3
!ame( _&DR$ (-(((((((3)
// XSB port characteri2tic2 ob9ect. <hi2 ob9ect return2 the 212tem
// 2pecific XSB port confi,uration information for inte,rated hub port
// number 3
!ame( _XP)$ Pac+a,e()
(-55$ // Port i2 connectable
(-(($ // )onnector t1pe W <1pe `&]
(-(((((((($ // Re2erved ( W mu2t be Cero
(-((((((((/) // Re2erved 4 W mu2t be Cero
!ame( _P6D$ Buffer( (-4()
(-((((((=4$ // Revi2ion 4$ #,nore color
// )olor (i,nored)$ width and hei,ht not
(-(((((((($ // re8uired a2 thi2 i2 a 2tandard XSB `&] t1pe
// connector
(-((((43a4$ // X2er vi2ible$ front panel$ @ertical
// lower$ horC. ri,ht$ 2hape L horC. rectan,le
(-(((((((F/) // e9ectable$ re8uire2 0PS; e9ect a22i2tance
/ // Device( PR<3)
/ // Device( #"XB)
/ // Device( PR<F)
/ // Device( R"XB)
10.14.1 USB 2.0 Host Controllers and _UPC and _PLD
'latforms implementing ,!;2. host controllers that consist of one or more ,!;4.4 compliant companion
controllers =e.g. ,@C% or 2@C%> must implement a C,'C and a C'1- o0#ect for each port ,!; port that
can 0e routed 0etween the .@C% host controller and its associated companion controller. This is re:uired
0ecause a ,!; 'ort Capa0ilities o0#ect implemented for a port that is a child of an .@C% host controller
ma( not 0e availa0le if the 2!'M disa0les the parent host controller. 5or e/ample, if root port 4 on an
.@C% host controller is routa0le to root port 4 on its companion controller, then the namespace must
provide a C,'C and a C'1- o0#ect under each host controllerMs associated port 4 child o0#ect.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ "99
1=AMPL1
Scope( \_SB)
@
Device(P)#()
@
// "o2t controller (%")#)
Device( XSB()
// P)# deviceQ/5unctionQ for thi2 "). %ncoded a2 2pecified in the &)P#
// 2pecification
!ame(_&DR$ (-1111CCCC)
// Root hub device for thi2 ") Q4.
Device(R"XB)
!ame(_&DR$ (-(((((((() // mu2t be Cero for XSB root hub
// Root hub$ port 4
Device(PR<4)
!ame(_&DR$ (-(((((((4)
// XSB port confi,uration ob9ect. <hi2 ob9ect return2 the 212tem
// 2pecific XSB port confi,uration information for port number 4
// Aust 2atc> t>e _$PC "eclarat1on for $#B7.RB$B.PR97 as 1t 1s t>1s
// >ost controllerCs co2pan1on
!ame( _XP)$ Pac+a,e()
(-55$ // Port i2 connectable
(-(($ // )onnector t1pe W <1pe `&]
(-(((((((($ // Re2erved ( W mu2t be Cero
(-((((((((/) // Re2erved 4 W mu2t be Cero
// provide ph12ical port location info for port 4
// Aust 2atc> t>e _$PC "eclarat1on for $#B7.RB$B.PR97 as 1t 1s t>1s
// >ost controllerCs co2pan1on
!ame( _P6D$ Buffer( (-4()
(-((((((=4$ // Revi2ion 4$ #,nore color
// )olor (i,nored)$ width and hei,ht not
(-(((((((($ // re8uired a2 thi2 i2 a 2tandard XSB `&] t1pe
// connector
(-((((4(a4$ // X2er vi2ible$ front panel$ @ertical
// lower$ horC. 6eft$ 2hape L horC. rectan,le
(-(((((((F/) // e9ectable$ re8uire2 0PS; e9ect a22i2tance
/ // Device( PR<4)
//
// Define other port2$ control method2$ etc
Y
Y
/ // Device( R"XB)
/ // Device( XSB()
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
"98 Advanced Configuration and 'ower %nterface !pecification
// )ompanion "o2t controller (0")# or X")#)
Device( XSB4)
// P)# deviceQ/5unctionQ for thi2 "). %ncoded a2 2pecified in the &)P#
// 2pecification
!ame(_&DR$ (-1111CCCC)
// Root hub device for thi2 ") Q4.
Device(R"XB)
!ame(_&DR$ (-(((((((() // mu2t be Cero for XSB root hub
// Root hub$ port 4
Device(PR<4)
!ame(_&DR$ (-(((((((4)
// XSB port confi,uration ob9ect. <hi2 ob9ect return2 the 212tem
// 2pecific XSB port confi,uration information for port number 4
// Aust 2atc> t>e _$PC "eclarat1on for $#B*.RB$B.PR97 as t>1s >ost
// controller 1s a co2pan1on to t>e EBCI >ost controller
// provide ph12ical port location info for port 4
!ame( _XP)$ Pac+a,e()
(-55$ // Port i2 connectable
(-(($ // )onnector t1pe W <1pe `&]
(-(((((((($ // Re2erved ( W mu2t be Cero
(-((((((((/) // Re2erved 4 W mu2t be Cero
?? Aust 2atc> t>e _P;D "eclarat1on for $#B*.RB$B.PR97 as t>1s >ost
?? controller 1s a co2pan1on to t>e EBCI >ost controller
!ame( _P6D$ Buffer( (-4()
(-((((((=4$ // Revi2ion 4$ #,nore color
// )olor (i,nored)$ width and hei,ht not
(-(((((((($ // re8uired a2 thi2 i2 a 2tandard XSB `&] t1pe
// connector
(-((((4(a4$ // X2er vi2ible$ front panel$ @ertical
// lower$ horC. 6eft$ 2hape L horC. rectan,le
(-(((((((F/) // e9ectable$ re8uire2 0PS; e9ect a22i2tance
/ // Device( PR<4)
//
// Define other port2$ control method2$ etc
Y
Y
/ // Device( R"XB)
/ // Device( XSB4)
/ // Device( P)#()
/ // Scope( _\SB)
10.15 Device Object Name Collision
-evices containing 0oth C@%- and CC%- ma( have device specific control methods pertaining to 0oth the
device %- in the C@%- and the device %- in the CC%-. These device specific control methods are defined 0(
the device owner =a standard 0od( or a vendor or a group of vendor partners>. !ince these o0#ect names are
not controlled 0( a central authorit(, there is a likelihood that the names of o0#ects will conflict 0etween
two defining parties. The C-!M o0#ect descri0ed in the ne/t section solves this conflict.
10.15.1 _DSM (Device Specifc Method)
This optional o0#ect is a control method that ena0les devices to provide device specific control functions
that are consumed 0( the device driver.
Arguments<
Arg =;uffer>< BBID
Arg4 =%nteger>< $e2ision ID
Arg2 =%nteger>< &'nction Index
Arg3 ='ackage>< Arg'ments
BBID I ,niversal ,ni:ue %dentifier =4+ ;(te ;uffer>
$e2ision ID I the functionMs revision. This revision is specific to the ,,%-.
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&'nction Index I 3epresents a specific function whose meaning is specific to the ,,%- and 3evision %-.
5unction indices should start with 4. 5unction num0er Hero is a :uer( function =see the special return code
defined 0elow>.
Arg'ments I a package containing the parameters for the function specified 0( the BBID, $e2ision ID and
&'nction Index. !uccessive revisions of &'nction Arg'ments must 0e 0ackward compati0le with earlier
revisions. !ee section 6, JAC'% -evices and -evice !pecific 20#ectsL, for an( C-!M definitions for AC'%
devices. New ,,%-s ma( also 0e created 0( 2.Ms and %@Ds for custom devices and other interface or
device governing 0odies =e.g. the 'C% !%$>, as long as the ,,%- is different from other pu0lished ,,%-s.
2nl( the issuer of a ,,%- can authoriHe a new &'nction Index, $e2ision ID or &'nction Arg'ment for that
,,%-.
3esult Code<
Return If Function Index is zero, the return is a 0uffer, with one 0it for each function inde/, starting
with Hero. ;it indicates support for at least one function for the specified ,,%- and 3evision %-. %f set to
Hero, no functions are supported for the specified ,,%- and 3evision %-. %f set to one, at least one function
is supported. 5or all other 0its in the 0uffer, a 0it is set to Hero to indicate if the function inde/ is not
supported for the specific ,,%- and 3evision %-. %f the 0it representing a particular function inde/ would
lie outside of the 0uffer, it should 0e assumed to 0e =that is, not supported>.
%f &'nction index is non&Hero, the return is any data object. The type and meaning of the returned data
object depends on the UUID and Revision ID.
I%ple%entation 0ote
!ince the purpose of the C-!M method is to avoid the name space collision, the implementation of this
method shall not use an( other method or data o0#ect which is not defined in this specification unless its
driver and usage is completel( under the control of the platform vendor.
./ample<
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// _DS; W Device Specific ;ethod
//
// &r,(> XX#D Xni8ue function identifier
// &r,4> #nte,er Revi2ion 6evel
// &r,3> #nte,er 5unction #nde- (( L Return Supported 5unction2)
// &r,F> Pac+a,e Parameter2
5unction(_DS;$#nt0b9$Buffer0b9/$Buffer0b9$ #nt0b9$ #nt0b9$ Pac+a,e0b9/)
//
// Switch ba2ed on which uni8ue function identifier wa2 pa22ed in
//
2witch(&r,()
//
// 5ir2t function identifier
//
ca2e(<oXX#D('=HFf((aIEII(cE.H.eEbcfdEF(.Ff.fbITc(*))
2witch(&r,3)
//
// 5unction (> Return 2upported function2$ ba2ed on revi2ion
//
ca2e(()
2witch(&r,4)
//
// 5unction (> Return 2upported function2 (there i2 onl1 one revi2ion)
//
if (6%8ual(&r,3$7ero))
return (Buffer() (-F/) // onl1 one function 2upported
//
// 5unction 4
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//
if (6%8ual(&r,3$0ne))
Y function 4 code Y
Return(Xnicode('te-t*))
/
//
// 5unction 3D> Runtime %rror
//
el2e
Brea+PointK
/
/
//
// #f not one of the function identifier2 we reco,niCe$ then return a buffer
// with bit ( 2et to ( indicatin, no function2 2upported.
//
return(Buffer()(/)
/
10.16 PC/AT RTC/CMOS Devices
Most computers contain an 3TC device which also contains 0atter(&0acked 3AM represented as a linear
arra( of 0(tes. There is a standard mechanism for accessing the first +" 0(tes of non&volatile 3AM in
devices that are compati0le with the Motorola 3TCFCM2! device that was in the %;M 'CFAT. Newer
devices usuall( contain at least 428 0(tes of 0atter(&0acked 3AM. New 'N' %-s were assigned for these
devices.
Certain 0(tes within the 0atter(&0acked 3AM have pre&defined values. %n particular, the time, date, month,
(ear, centur(, alarm time and 3TC periodic interrupt are read&onl(.
10.16.1 PC/AT-compatible RTC/CMOS Devices (PNP0B00)
The standard 'CFAT&compati0le 3TCFCM2! device is denoted 0( the 'n' %- 'N';. %f an AC'%
platform uses a device that is compati0le with this device, it ma( descri0e this in its AC'% namespace. A!1
ma( then read and write this as a linear +"&0(te arra(. %f 'N'; is used, A!1 and AC'% operating
s(stems ma( not assume that an( e/tensions to the CM2! e/ist.
0oteH This means that the C.NT,3S field in the 5i/ed AC'% -escription Ta0le ma( onl( contain values
0etween and +3.
This is an e/ample of how this device could 0e descri0ed<
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Device (R<)()
!ame(_"#D$ %#S&#D(PP!P(B((P))
!ame (_5#R$ Pac+a,e(4)
%#S&#D(PP!P(B((P) /
)
!ame(_)RS$ Re2ource<emplate()
#0(Decode4I$ (-T($ (-T($ (-4$ (-3)
/
0perationRe,ion();S4$ );0S$ ($ (-.()
5ield();S4$ B1te&cc$ !o6oc+$ Pre2erve)
&cce22&2(B1te&cc$ ()$
);(($ =$
$3GI$
);(4$ =$
);(3$ 4I$
$ 34I$
);(F$ =
/
10.16.2 Intel PIIX4-compatible RTC/CMOS Devices (PNP0B01)
The %ntel '%%A" contains an 3TCFCM2! device that is compati0le with the one in the 'CFAT. ;ut it
contains 2*+ 0(tes of non&volatile 3AM. The first +" 0(tes are accessed via the same mechanism as the +"
0(tes in the 'CFAT. The upper 462 0(tes are accessed through an interface that is onl( used on %ntel chips.
=!ee 82394A; 'C%&T2&%!A F %-.AC.1.3AT23 ='%%A"> for details.>
An( platform containing this device or one that is compati0le with it ma( use the 'N' %- 'N';4. This
will allow an AC'%&compati0le 2! to recogniHe the 3TCFCM2! device as using the programming interface
of the '%%A". Thus, the arra( of 0(tes that A!1 can read and write with this device is 2*+ 0(tes long.
0oteH This also means that the C.NT,3S field in the 5i/ed AC'% -escription Ta0le ma( contain values
0etween and 2**.
This is an e/ample of how this device could 0e descri0ed<
Device (R<)()
!ame(_"#D$ %#S&#D(PP!P(B(4P))
!ame (_5#R$ Pac+a,e(4)
%#S&#D(PP!P(B(4P) /
)
!ame(_)RS$ Re2ource<emplate()
#0(Decode4I$ (-T($ (-T($ (-4$ (-3)
#0(Decode4I$ (-T3$ (-T3$ (-4$ (-3)
/
0perationRe,ion();S4$ );0S$ ($ (-4(()
5ield();S4$ B1te&cc$ !o6oc+$ Pre2erve)
&cce22&2(B1te&cc$ ()$
);(($ =$
$3GI$
);(4$ =$
);(3$ 4I$
$ 33.$
);(F$ =$
$ 4=.$
)%!<$ =
/
10.16.3 Dallas Semiconductor-compatible RTC/CMOS Devices (PNP0B02)
-allas !emiconductor 3TCFCM2! devices are compati0le with the one in the 'CFAT, 0ut the( contain 2*+
0(tes of non&volatile 3AM or more. The first +" 0(tes are accessed via the same mechanism as the +" 0(tes
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in the 'CFAT. The upper 0(tes are accessed through an interface that is onl( used on -allas !emiconductor
chips.
An( platform containing this device or one that is compati0le with it ma( use the 'N' %- 'N';2. This
will allow an AC'%&compati0le 2! to recogniHe the 3TCFCM2! device as using the -allas !emiconductor
programming interface. Thus, the arra( of 0(tes that A!1 can read and write with this device is 2*+ 0(tes
long.
-escription of these devices is similar to the '%%A" e/ample a0ove, and the C.NT,3S field of the 5A-T
ma( also contain values 0etween and 2**.
10.17 Control Method User Presence Detection Device
The following section illustrates the operation and definition of the Control Method ,ser 'resence
-etection =,'-> device.
The user presence detection device can optionall( support power management o0#ects =e.g. C'!, C'!3> to
allow the 2! to manage the deviceMs power consumption.
The 'lug and 'la( %- of an AC'% control method user presence detection device is AC'%6.
Ta!le ,-,H Control Method 2ser Presence 5etection 5evice
3!Cect 5escription
C,'- The current user presence detection reading. V3e:uiredW
C,'' ,ser presence detection polling fre:uenc( in tenths of seconds. V2ptionalW
10.17.1 _UPD (User Presence Detect)
This control method returns the user presence detection reading, indicating whether or not the user is
currentl( present from the perspective of this sensor. Three states are currentl( defined for ,'- sensor
readings< absent, present, and 'n3nown, represented 0( the values /, /4, and /55 respectivel(. The
unknown state is used to conve( that the sensor is currentl( una0le to determine user presence due to some
environmental or other transient factor. All other values are reserved.
Arguments<
None
3esult Code<
/< Absent# A user is not currentl( detected 0( this sensor.
/4< Present# A user is currentl( detected 0( this sensor.
/55< Bn3nown< The sensor is currentl( una0le to determine if a user is present or a0sent.
10.17.2 _UPP (User Presence Polling)
This optional o0#ect evaluates to a recommended polling fre:uenc( =in tenths of seconds> for this user
presence sensor. A value of Hero I or the a0sence of this o0#ect when other ,'- o0#ects are defined I
indicates that the 2! does not need to poll the sensor in order to detect meaningful changes in user presence
=the hardware is capa0le of generating as(nchronous notifications>.
The use of polling is allowed 0ut strongl( discouraged 0( this specification. 2.Ms should design s(stems
that as(nchronousl( notif( 2!'M whenever a meaningful change in user presence occursPrelieving the
2! of the overhead associated with polling.
This value is specified as tenths of seconds. 5or e/ample, a value of 4 would 0e used to indicate a 4
second polling fre:uenc(. As this is a recommended value, 2!'M will consider other factors when
determining the actual polling fre:uenc( to use.
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Arguments<
None
3esult Code<
?ero< 'olling 0( the 2! is not re:uired.
All other values< The recommended polling fre:uenc(, in tenths of seconds.
10.17.3 User Presence Sensor Events
To communicate changes in user presence to 2!'M, AM1 code should issue a Not1f:(ud_device$
(-=() whenever a change in user presence has occurred. The 2! receives this notification and calls the
C,'- control method to determine the current user presence status.
,'- notifications should 0e generated whenever a transition occurs 0etween one of the user presence states
=a0sent, present, or unknown> I 0ut at a level of granularit( that provides an appropriate response without
overl( ta/ing the s(stem with unnecessar( interrupts.
10.18 I/O APIC Device
This optional device descri0es a discrete %F2 A'%C device that is not 0us enumerated =e.g., as a 'C% device>.
-escri0ing such a device in the AC'% name space is onl( necessar( if hot plug of this device is supported.
%f hot plug of this device is not supported, an MA-T %F2 A'%C =section *.2.44.+,L%F2 A'%CL> entr( or %F2
!A'%C =section *.2.44.42, J%F2 !A'%C !tructureL> entr( is sufficient to descri0e this device.
An %F2 A'%C device is an %F2 unit that complies with either of the A'%C interrupt models supported 0(
AC'%. These interrupt models are descri0ed !ection *.2.44.+,L%F2 A'%CL and !ection *.2.44.42,L%F2
!A'%C !tructureL. %f the device is an %F2 unit that complies with the A'%C interrupt model, it is declared
using the AC'%A identifier. %f this device is an %F2 unit that complies with the !A'%C interrupt model,
it is declared using the AC'%; identifier. %f this device complies with 0oth the A'%C and !A'%C
interrupt models =%F2/A'%C>, it is declared using the AC'%6 identifier.
An %F2 A'%C device declared using an( of the a0ove identifiers must contain a C$!; o0#ect as defined in
!ection +.2.*, JC$!; =$lo0al !(stem %nterrupt ;ase>L to report its $lo0al !(stem %nterrupt ;ase. %t must
also contain a CC3! o0#ect that reports the 0ase address of the %F2 A'%C device. The CC3! o0#ect is
re:uired to contain onl( one resource, a memor( resource pointing to the %F2 A'%C register 0ase.
Note< 0ecause the CC3! and C$!; methods provide sufficient information, it is not necessar( to provide
CMAT under an %F2 A'%C device.
5or an %F2 A'%C device that is descri0ed 0oth in the MA-T and in the name space, the 0ase address
descri0ed in the MA-T entr( must 0e the same as the 0ase address in the %2 A'%C device CC3! at 0oot
time. 2!'M must use the information from the MA-T until such a time as the CC3! and C$!; methods
in the name space device can 0e processed. At this point 2!'M must ignore the MA-T entr(.
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11 Power Source Devices
This section specifies the 0atter( and AC adapter device o0#ects 2!'M uses to manage power resources.
A 0atter( device is re:uired to either have a !mart ;atter( su0s(stem or a Control Method ;atter( interface
as descri0ed in this section. 2!'M is re:uired to 0e a0le to connect and manage a 0atter( on either of these
interfaces. This section descri0es these interfaces.
%n the case of a compati0le AC'% !mart ;atter( Ta0le, the -efinition ;lock needs to include a ;usF-evice
package for the !M;&@C. This will install an 2!&specific driver for the !M;us, which in turn will locate
the components of the !mart ;atter( su0s(stem. %n addition to the 0atter( or 0atteries, the !mart ;atter(
su0s(stem includes a charger and a manager device to handle su0s(stems with multiple 0atteries.
The !mart ;atter( !(stem Manager is one implementation of a manager device that is capa0le of
ar0itrating among the availa0le power sources =AC power and 0atteries> for a s(stem. %t provides a superset
of the !mart ;atter( !elector functionalit(, such as safel( responding to power events =AC versus 0atter(
power>, inserting and removing 0atteries and notif(ing the 2! of all such changes. Additionall(, the !mart
;atter( !(stem Manager is capa0le of handling configurations including simultaneous charging and
discharging of multiple 0atteries. ,nlike the !mart ;atter( !elector that shares responsi0ilit( for
configuring the 0atter( s(stem with 2!'M, the !mart ;atter( !(stem Manager alone controls the safe
configuration of the 0atter( s(stem and simpl( issues status changes to 2!'M when the configuration
changes. !mart ;atter( !(stem Manager is the recommended solution for handling multiple&0atter(
s(stems.
11.1 Smart Battery Subsystems
The !mart ;atter( su0s(stem is defined 0( the<
!(stem Management ;us !pecification =!M;!>
!mart ;atter( -ata !pecification =!;-!>
!mart ;atter( Charger !pecification =!;C!>
!mart ;atter( !(stem Manager !pecification =!;!M>
!mart ;atter( !elector !pecification =!;!!>
An AC'%&compati0le !mart ;atter( su0s(stem consists of<
An !M;&@C =C', to !M;&@C> interface
At least one !mart ;atter(
A !mart ;atter( Charger
.ither a !mart ;atter( !(stem Manager or a !mart ;atter( !elector if more than one !mart
;atter( is supported
%n such a su0s(stem, a standard wa( of communicating with a !mart ;atter( and !mart ;atter( Charger is
through the !M;us ph(sical protocols. The !mart ;atter( !(stem Manager or !mart ;atter( !elector
provides event notification =0atter( insertionFremoval, and so on> and charger !M;us routing capa0ilit( for
an( !mart ;atter( su0s(stem. A t(pical !mart ;atter( su0s(stem is illustrated 0elow<
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SMBus
7ost
Controller
)1x@+
SBS
Charger
1x=
SBS
S,stem
Manager
1xA
SBS
Batter,1
1xB
SBS
Batter,!
1xB
SBS
Batter,"
1xB
SBS
Batter,(
1xB
SMBus
SMBus
SMBus
SMBus
SMBus
SMBus
7ost
Interface
6igure +$-+ T)pical S%art <atter) Su!s)ste% >S<S?
!M;us defines a fi/ed 9&0it slave address per device. This means that all 0atteries in the s(stem have the
same address =defined to 0e /;>. The slave addresses associated with !mart ;atter( su0s(stem
components are shown in the following ta0le.
Ta!le +$-+ 1xa%ple SM<us 5evice Slave Addresses
SM<us 5evice 5escription SM<us Slave Address >A$-A-?
!M;us @ost !lave %nterface /8
!mart ;atter( ChargerFCharger !elector or Charger !(stem Manager /6
!mart ;atter( !(stem Manager or !mart ;atter( !elector /A
!mart ;atter( /;
.ach !M;us device has up to 2*+ registers that are addressed through the !M;us protocolMs Command
value. !M;us devices are addressed 0( providing the slave address with the desired registerMs Command
value. .ach !M;us register can have non&linear registersK that is, command register 4 can have a 32&0(te
string, while command register 2 can have a 0(te, and command register 3 can have a word.
The !M;us host slave interface provides a standard mechanism for the host C', to generate !M;us
protocol commands that are re:uired to communicate with !M;us devices =in other words, the !mart
;atter( components>. AC'% defines such an !M;&@C that resides in em0edded controller address spaceK
however, an 2! can support an( !M;&@C that has a native !M;&@C device driver.
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The !mart ;atter( !(stem Manager provides a standard programming model to control multiple
!mart ;atteries in a !mart ;atter( su0s(stem. A !mart ;atter( !(stem Manager provides the following
t(pes of 0atter( management functions<
.vent notification for 0atter( insertion and removal
.vent notification for AC power connected or disconnected
!tatus of which !mart ;atter( is communicating with the !M;&@C
!tatus of which !mart ;atter(=s> are powering the s(stem
!tatus of which !mart ;atter(=s> are connected to the charger
!tatus of which !mart ;atteries are present in the s(stem
.vent notification when the !mart ;atter( !(stem Manager switches from one power source to
another
@ardware&switching to an alternate !mart ;atter( when the !mart ;atter( suppl(ing power runs
low
@ardware switching 0etween 0atter(&powered and AC&powered powered operation
The !mart ;atter( !(stem Manager function can reside in a standalone !M;us slave device =!mart ;atter(
!(stem Manager that responds to the /A slave address>, ma( 0e present within a smart charger device
=!mart ;atter( Charger that responds to the /6 slave address>, or ma( 0e com0ined within the em0edded
controller =that responds to the /A slave address>. %f 0oth a !mart ;atter( Charger and a standalone !mart
;atter( !(stem Manager are present in the same !mart ;atter( su0s(stem, then the driver assumes that the
standalone !mart ;atter( !(stem Manager is wired to the 0atteries.
The !mart ;atter( charger is an !M;us device that provides a standard programming model to control the
charging of !mart ;atteries present in a !mart ;atter( su0s(stem. 5or single 0atter( s(stems, the !mart
;atter( Charger is also responsi0le for notif(ing the s(stem of the 0atter( and AC status.
The !mart ;atter( provides intelligent chemistr(&independent power to the s(stem. The !mart ;atter( is
capa0le of informing the !mart ;atter( charger of its charging re:uirements =which provides chemistr(
independence> and providing 0atter( status and alarm features needed for platform 0atter( management.
11.1.1 ACPI Smart Battery Status Change Notifcation Requirements
The !mart ;atter( !(stem Manager, the !mart ;atter( !elector, and the !mart ;atter( Charger each have
an optional mechanism for notif(ing the s(stem that the 0atter( configuration or AC status has changed.
AC'% re:uires that this interrupt mechanism 0e through the !M;us Alarm Notif( mechanism.
5or s(stems using an em0edded controller as the !M;us host, a 0atter( s(stem device issues a status
change notification 0( either mastering the !M;us to send the notification directl( to the !M;us host, or
0( emulating it in the em0edded controller. %n either case, the process is the same. After the notification is
received or emulated, the em0edded controller asserts an !C%. The source of the !C% is identified 0( a $'.
that indicates the !C% was caused 0( the em0edded controller. The em0edded controllerMs status register
alarm 0it is set, indicating that the !M;us host received an alarm message. The Alarm Address 3egister
contains the address of the !M;us device that originated the alarm and the Alarm -ata 3egisters contain
the contents of that deviceMs status register.
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*" Advanced Configuration and 'ower %nterface !pecification
11.1.1.1
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%nde/ *"4
Smart Battery Charger
This re:uires a !mart ;atter( Charger, on a 0atter( or AC status change, to generate an !M;us Alarm
Notif(. The contents of the !mart ;atter( ChargerMs Charger!tatus=> command register =/43> is placed in
the em0edded controllerMs Alarm -ata 3egisters, the !mart ;atter( ChargerMs slave address
4"
=/6> is
placed in the em0edded controllerMs Alarm Address 3egister and the .CMs !tatus 3egisterMs Alarm 0it is set.
The em0edded controller then asserts an !C%.
4"
Notice that the 4. !M;us protocol specification is am0iguous a0out the definition of the Jslave addressL
written into the command field of the host controller. %n this case, the slave address is actuall( the
com0ination of the 9&0it slave address and the Write protocol 0it. Therefore, 0it of the initiating deviceMs
slave address is aligned to 0it 4 of the host controllerMs slave command register, 0it 4 of the slave address is
aligned to 0it 2 of the controllerMs slave command register, and so on.
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*"2 Advanced Configuration and 'ower %nterface !pecification
11.1.1.2
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%nde/ *"3
Smart Battery Charger with optional System Manager or Selector
A !mart ;atter( Charger that contains the optional !(stem Manager or !elector function =as indicated 0(
the Charger!pec%nfo=> command register, /44, 0it "> is re:uired to generate an !M;us Alarm Notif( on a
0atter( or AC status change. The content of the !mart ;atter( Charger with an optional !(stem Manager,
the ;atter(!(stem!tate=> command register =/24> =or in the case of an optional !elector, the
!elector!tate=> =/4> >, is placed in the .CMs Alarm -ata 3egisters, the !mart ;atter( ChargerMs slave
address =/6> is placed in the em0edded controllerMs Alarm Address 3egister, and the em0edded
controllerMs !tatus 3egisterMs Alarm 0it is set. The em0edded controller then asserts an !C%.
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*"" Advanced Configuration and 'ower %nterface !pecification
11.1.1.3
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Smart Battery System Manager
The !mart ;atter( !(stem Manager is re:uired to generate an !M;us Alarm Notif( on a 0atter( or AC
status change. The content of the !mart ;atter( !(stem ManagerMs ;atter(!(stem!tate=> command register
=/4> is placed in the .CMs Alarm -ata 3egisters, the !mart ;atter( !(stem ManagerMs slave address
=/A> is placed in the .CMs Alarm Address 3egister, and the em0edded controllerMs !tatus 3egisterMs
Alarm 0it is set. The em0edded controller then asserts an !C%.
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*"+ Advanced Configuration and 'ower %nterface !pecification
11.1.1.4
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%nde/ *"9
Smart Battery Selector
The re:uirements for the !mart ;atter( !elector are the same as the re:uirements for the !mart ;atter(
!(stem Manager, with the e/ception that the contents of the !elector!tate=> command register =/4> are
used instead of ;atter(!(stem!tate=>. The !mart ;atter( !elector is a su0set of the !mart ;atter( !(stem
Manager and does not have the added support for simultaneous chargeFdischarge of multiple 0atteries. The
!(stem Manager is the preferred implementation.
11.1.2 Smart Battery Objects
The !mart ;atter( su0s(stem re:uires a num0er of o0#ects to define its interface. These are summariHed
0elow<
Ta!le +$-& S%art <atter) 3!Cects
3!Cect 5escription
C@%- This is the hardware %- named o0#ect that contains a string. 5or !mart ;atter( su0s(stems, this
o0#ect returns the value of JAC'%2.L This identifies the !mart ;atter( su0s(stem to the
!mart ;atter( driver.
C!;! This is the !mart ;atter( named o0#ect that contains a -W23-. This named o0#ect returns the
configuration of the !mart ;atter( su0s(stem and is encoded as follows<
I Ma/imum of one !mart ;atter( and no !mart ;atter( !(stem Manager or !mart ;atter(
!elector.
4 I Ma/imum of one !mart ;atter( and a !mart ;atter( !(stem Manager or !mart ;atter(
!elector.
2 I Ma/imum of two !mart ;atteries and a !mart ;atter( !(stem Manager or !mart ;atter(
!elector.
3 I Ma/imum of three !mart ;atteries and a !mart ;atter( !(stem Manager or !mart ;atter(
!elector.
" I Ma/imum of four !mart ;atteries and a !mart ;atter( !(stem Manager or !mart ;atter(
!elector.
The ma/imum num0er of 0atteries is for the s(stem. Therefore, if the platform is capa0le of
supporting four 0atteries, 0ut onl( two are normall( present in the s(stem, then this field should
return ". Notice that a value of indicates a ma/imum support of one 0atter( and there is no
!mart ;atter( !(stem Manager or !mart ;atter( !elector present in the s(stem.
11.1.3 Smart Battery Subsystem Control Methods
As the !M;us is not an enumera0le 0us, all devices on the 0us must 0e declared in the AC'% name space.
As the !mart ;atter( driver understands !mart ;atter(, !mart ;atter( Charger, and !mart ;atter( !(stem
Manager or !mart ;atter( !electorK onl( a single device needs to 0e declared per !mart ;atter( su0s(stem.
The driver gets information a0out the su0s(stem through the hardware %- =which defines a !mart ;atter(
su0s(stem> and the num0er of !mart ;atteries supported on this su0s(stem =C!;! named o0#ect>. The
AC'% !mart ;atter( ta0le indicates the energ( levels of the platform at which the s(stem should warn the
user and then enter a sleeping state. The !mart ;atter( driver then reflects these as threshold alarms for the
!mart ;atteries.
The C!;! control method returns the configuration of the !mart ;atter( su0s(stem. This named o0#ect
returns a -W23- value with a num0er from to ". %f the num0er of 0atteries is greater than , then the
!mart ;atter( driver assumes that a !mart ;atter( !(stem Manager or !mart ;atter( !elector is present. %f
, then the !mart ;atter( driver assumes a single !mart ;atter( and neither a !mart ;atter( !(stem
Manager nor !mart ;atter( !elector is present.
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*"8 Advanced Configuration and 'ower %nterface !pecification
A !mart ;atter( device declaration in the AC'% name space re:uires the C$1E o0#ect if potentiall(
contentious accesses to device resources are performed 0( non&2! code. !ee section +.*.9, JC$1E =$lo0al
1ock>,L for details a0out the C$1E o0#ect.
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11.1.3.1
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** Advanced Configuration and 'ower %nterface !pecification
Example: Single Smart Battery Subsystem
This section illustrates how to define a !mart ;atter( su0s(stem containing a single !mart ;atter( and
charger. The platform implementation is illustrated 0elow<
$m0edded
Controller
Ports2 1xK"3 1xKK
Off set2 1x@1
Luer,2 1x(1
SMBus
7ost
Controller
)1x@+
SBS
Charger
1x=
SBS
Batter,
1xB
SMBus
7ost
Interface
6igure +$-& Single S%art <atter) Su!s)ste%
%n this e/ample, the platform is using an !M;&@C that resides within the em0edded controller and meets
the AC'% standard for an em0edded controller interface and !M;&@C interface. The em0edded controller
interface sits at s(stem %F2 port addresses /+2 and /++. The !M;&@C is at 0ase address /8 within
em0edded controller address space =as defined 0( the AC'% em0edded controller specification> and
responds to events on :uer( value /3.
%n this e/ample the !mart ;atter( su0s(stem onl( supports a single !mart ;atter(. The A!1 code for
descri0ing this interface is shown 0elow<
Device (%)()
!ame (_"#D$ %#S&#D(PP!P()(HP))
!ame (_)RS$
Re2ource<emplate () // port (-I3 and (-II
#0 (Decode4I$ (-I3$ (-I3$ ($ 4)$
#0 (Decode4I$ (-II$ (-II$ ($ 4)
/
)
!ame (_:P%$ ()
Device (S;B()
!ame (_"#D$ P&)P#(((4P) // Smart Batter1 "o2t )ontroller
!ame (_%)$ (-=(F() // %) off2et ((-=()$ Juer1 ((-F()
Device (SBS() // Smart Batter1 Sub212tem
!ame (_"#D$ P&)P#(((3P) // Smart Batter1 Sub212tem #D
!ame(_SBS$ (-4) // #ndicate2 2upport for one batter1
/ // end of SBS(
/ // end of S;B(
/ // end of %)
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11.1.3.2
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**2 Advanced Configuration and 'ower %nterface !pecification
Multiple Smart Battery Subsystem: Example
This section illustrates how to define a !mart ;atter( su0s(stem that contains three !mart ;atteries, a
!mart ;atter( !(stem Manager, and a !mart ;atter( Charger. The platform implementation is illustrated
0elow<
&%be""e" Controller
Ports2 1x!113 1x!1!
Offset2 1x=1
Luer,2 1x(!
SMBus
7ost
Controller
)1x@+
SBS
Charger
1x=
SBS
S,stem
Manager
1xA
SBS
Batter,1
1xB
SBS
Batter,!
1xB
SBS
Batter,"
1xB
6irtual
SMBus
6irtual
SMBus
SMBus
SMBus
SMBus
7ost
Interface
6igure +$-# S%art <atter) Su!s)ste%
%n this e/ample, the platform is using an !M;&@C that resides within the em0edded controller and meets
the AC'% standard for an em0edded controller interface and !M;&@C interface. The em0edded controller
interface sits at s(stem %F2 port addresses /4 and /44. The !M;&@C resides at 0ase address /6
within em0edded controller address space =as defined 0( the AC'% em0edded controller specification> and
responds to events on :uer( value /34.
%n this e/ample the !mart ;atter( su0s(stem supports three !mart ;atteries. The !mart ;atter( Charger
and !mart ;atter( !(stem Manager reside within the em0edded controller, meet the !mart ;atter( !(stem
Manager and !mart ;atter( Charger interface specification, and respond to their 9&0it addresses =/A and
/6 respectivel(>. The A!1 code for descri0ing this interface is shown 0elow<
Device (%)4)
!ame (_"#D$ %#S&#D(PP!P()(HP))
!ame (_)RS$
Re2ource<emplate () // port (-4(( and (-4(4
#0(Decode4I$ (-4(($ (-4(($ ($ 3)
/
)
!ame (_:P%$ 4)
Device (S;B4)
!ame (_"#D$ P&)P#(((4P) // Smart Batter1 "o2t )ontroller
!ame (_%)$ (-H(F4) // %) off2et ((-H()$ Juer1 ((-F4)
Device (SBS4) // Smart Batter1 Sub212tem
!ame (_"#D$ P&)P#(((3P) // Smart Batter1 Sub212tem #D
!ame (_SBS$ (-F) // #ndicate2 2upport for three batterie2
/ // end of SBS4
/ // end of S;B4
/ // end of %)
11.2 Control Method Batteries
The following section illustrates the operation and definition of the Control Method ;atter(.
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11.2.1 Battery Events
The AM1 code handling an !C% for a 0atter( event notifies the s(stem of which 0atter(Ms status ma( have
changed. The 2! uses the C;!T control method to determine the current status of the 0atteries and what
action, if an(, should 0e taken =for more information a0out the C;!T control method, see section 4.2.2,
J;atter( Control MethodsL>. The t(pical action is to notif( applications monitoring the 0atter( status to
provide the user with an up&to&date displa( of the s(stem 0atter( state. ;ut in some cases, the action ma(
involve generating an alert or even forcing a s(stem into a sleeping state. %n an( case, an( changes in
0atter( status should generate an !C% in a timel( manner to keep the s(stem power state ,% consistent with
the actual state of the s(stem 0atter( =or 0atteries>.
,nlike most other devices, when a 0atter( is inserted or removed from the s(stem, the device itself =the
0atter( 0a(> is still considered to 0e present in the s(stem. 5or most s(stems, the C!TA for this device will
alwa(s return a value with 0its &3 set and will toggle 0it " to indicate the actual presence of a 0atter( =see
section +.3.9, JC!TA V!tatusWL>. When this insertion or removal occurs, the AM1 code handler for this
event should issue a 0otif)=batteryFde2ice, /84> to indicate that the static 0atter( information has
changed. 5or s(stems that have 0atter( slots in a docking station or 0atteries that cannot 0e surprise&
removed, it ma( 0e 0eneficial or necessar( to indicate that the entire device has 0een removed. %n this case,
the standard methods and notifications descri0ed in section +.3, J-evice %nsertion, 3emoval, and !tatus
20#ects,L should 0e used.
When the present state of the 0atter( has changed or when the trip point set 0( the C;T' control method is
reached or crossed, the hardware will assert a general purpose event. The AM1 code handler for this event
issues a 0otif)=batteryFde2ice, /8> on the 0atter( device. This notification is also sent when the !tatus
5lags returned from C;M- change.
%n the case where the remaining 0atter( capacit( 0ecomes criticall( low, the AM1 code handler issues a
0otif)=batteryFde2ice, /8> and reports the 0atter( critical flag in the C;!T o0#ect. The 2! performs an
emergenc( shutdown. 5or a full description of the critical 0atter( state, see section 3.6.", J1ow ;atter(
1evels.L
!ometimes the value to 0e returned from C;!T or C;%5 will 0e temporaril( unknown. %n this case, the
method ma( return the value /55555555 as a placeholder. When the value 0ecomes known, the
appropriate notification =/8 for C;!T or /84 for ;%5> should 0e issued, in like manner to an( other
change in the data returned 0( these methods. This will cause 2!'M to re&evaluate the methodPo0taining
the correct data value.
When one or more of the status flags returned 0( the C;M- control method change, AM1 code issues a
0otif)=batteryFde2ice, /82> on the 0atter( device unless this change occurs during a call to C;MC and the
value of the status flags in C;M- match the value passed in to C;MC. %f the value of the status 0its cannot
0e set to reflect the action re:uested 0( the e/ecuting C;MC, the AM1 code will issue this notification.
5or e/ample, calling C;MC with 0it set to initiate a cali0ration c(cle while AC power is not availa0le
will cause AM1 to issue a 0otif)=batteryFde2ice, /82>.
11.2.2 Battery Control Methods
The Control Method ;atter( is a 0atter( with an AM1 code interface 0etween the 0atter( and the host 'C.
The 0atter( interface is completel( accessed 0( AM1 code control methods, allowing the 2.M to use an(
t(pe of 0atter( and an( kind of communication interface supported 0( AC'%. 2!'M re:uires accurate
0atter( data to perform optimal power management polic( and to provide the end user with a meaningful
estimation of remaining 0atter( life. As such, control methods that return 0atter( information should
calculate this information rather than return hard coded data.
A Control Method ;atter( is descri0ed as a device o0#ect. .ach device o0#ect supporting the Control
Method ;atter( interface contains the following additional control methods. When there are two or more
0atteries in the s(stem, each 0atter( will have an independent device o0#ect in the name space.
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**" Advanced Configuration and 'ower %nterface !pecification
Ta!le +$-# <atter) Control Methods
3!Cect 5escription
C;%5 3eturns static information a0out a 0atter( =in other words, model num0er, serial num0er, design
voltage, and so on>.
C2!C 2!'M Capa0ilities conve(ance for 0atteries.
C;!T 3eturns the current 0atter( status =in other words, d(namic information a0out the 0atter(, such
as whether the 0atter( is currentl( charging or discharging, an estimate of the remaining 0atter(
capacit(, and so on>.
C;T' !ets the ;atter( Trip point, which generates an !C% when 0atter(capacit( reaches the specified
point.
C'C1 1ist of pointers to the device o0#ects representing devices powered 0( the 0atter(.
C!TA 3eturns general status of the 0atter( =for a description of the C!TA control method, see section
+.3.9, JC!TA =!tatusWL>.
C;TM 3eturns estimated runtime at the present average rate of drain, or the runtime at a specified
rate.
C;M- 3eturns 0atter( information related to 0atter( recali0ration and charging control.
C;MC Control cali0ration and charging
A Control Method ;atter( device declaration in the AC'% name space re:uires the C$1E o0#ect if
potentiall( contentious accesses to device resources are performed 0( non&2! code. !ee section +.*.9,
JC$1E =$lo0al 1ock>,L for details a0out the C$1E o0#ect.
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11.2.2.1
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**+ Advanced Configuration and 'ower %nterface !pecification
_BIF (Battery Information)
This o0#ect returns the static portion of the Control Method ;atter( information. This information remains
constant until the 0atter( is changed.
Arguments<
None
3esult Code<
Pac+a,e
// &S)##7 i2 &S)## character 2trin, terminated with a (-((.
Power Xnit //DW0RD
De2i,n )apacit1 //DW0RD
6a2t 5ull )har,e )apacit1 //DW0RD
Batter1 <echnolo,1 //DW0RD
De2i,n @olta,e //DW0RD
De2i,n )apacit1 of Warnin, //DW0RD
De2i,n )apacit1 of 6ow //DW0RD
Batter1 )apacit1 :ranularit1 4 //DW0RD
Batter1 )apacit1 :ranularit1 3 //DW0RD
;odel !umber //&S)##7
Serial !umber //&S)##7
Batter1 <1pe //&S)##7
0%; #nformation //&S)##7
/
Ta!le +$-( D<I6 Method "esult Codes
6ield 6or%at 5escription
'ower ,nit -W23- %ndicates the units used 0( the 0atter( to report its capacit( and
chargeFdischarge rate information to the 2!.
/ I Capacit( information is reported in VmWhW and
chargeFdischarge rate information in VmWW.
/4 I Capacit( information is reported in VmAhW and
chargeFdischarge rate information in VmAW.
-esign Capacit( -W23- ;atter(Ms design capacit(. -esign Capacit( is the nominal capacit( of a
new 0atter(. The Design Capacity value is e/pressed as power VmWhW or
current VmAhW depending on the Power Bnit value.
/ I /95555555 =in VmWhW or VmAhW >
/55555555 I ,nknown design capacit(
1ast 5ull Charge
Capacit(
-W23- 'redicted 0atter( capacit( when full( charged. The ,ast &'ll C1arge
Capacity value is e/pressed as power =mWh> or current =mAh>
depending on the Power Bnit value.
/h I /95555555 =in VmWhW or VmAhW >
/55555555 I ,nknown last full charge capacit(
;atter(
Technolog(
-W23- / I 'rimar( =for e/ample, non&rechargea0le>
/4 I !econdar( =for e/ample, rechargea0le>
-esign Doltage -W23- Nominal voltage of a new 0atter(.
/ I /95555555 in VmDW
/55555555 I ,nknown design voltage
-esign capacit( of
Warning
-W23- 2.M&designed 0atter( warning capacit(. !ee section 3.6.", J1ow
;atter( 1evels.L
/ I /95555555 in VmWhW or VmAhW
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%nde/ **9
6ield 6or%at 5escription
-esign Capacit(
of 1ow
-W23- 2.M&designed low 0atter( capacit(. !ee section 3.6.", J1ow ;atter(
1evels.L
/ I /95555555 in VmWhW or VmAhW
;atter( Capacit(
$ranularit( 4
-W23- ;atter( capacit( granularit( 0etween low and warning in VmAhW or
VmWhW. That is, this is the smallest increment in capacit( that the 0atter(
is capa0le of measuring. !ee note 0elow for more details
;atter( Capacit(
$ranularit( 2
-W23- ;atter( capacit( granularit( 0etween warning and 5ull in VmAhW or
VmWhW. That is, this is the smallest increment in capacit( that the 0atter(
is capa0le of measuring. This ma( 0e a different value than ;atter(
Capacit( $ranularit( 4 to accommodate s(stems where the granularit(
accurac( ma( change depending on the 0atter( level. !ee note 0elow for
more details.
Model Num0er A!C%%? 2.M&specific Control Method ;atter( model num0er
!erial Num0er A!C%%? 2.M&specific Control Method ;atter( serial num0er
;atter( T(pe A!C%%? The 2.M&specific Control Method ;atter( t(pe
2.M %nformation A!C%%? 2.M&specific information for the 0atter( that the
,% uses to displa( the 2.M information a0out the ;atter(. %f the 2.M
does not support this information, this should 0e reserved as /.
0otesH
A secondar(&t(pe 0atter( should report the corresponding capacit( =e/cept for ,nknown>.
2n a multiple&0atter( s(stem, all 0atteries in the s(stem should return the same granularit(.
2perating s(stems prefer these control methods to report data in terms of power =watts>.
2n a multiple&0atter( s(stem, all 0atteries in the s(stem must use the same power unit.
The definition of 0atter( capacit( granularit( has 0een clarified. 5or 2!'M to determine if
s(stems support the clarified definition of 0atter( capacit( granularit(, 2!'M ma( evaluate an
C2!C method at the 0atter( scope to indicate support for this capa0ilit(, and for the platform to
indicate if it supports these e/tended capa0ilities.
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**8 Advanced Configuration and 'ower %nterface !pecification
11.2.2.2
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%nde/ **6
_OSC Defnition for Control Method Battery
C2!C for control method 0atter( is uni:uel( identified 0( the ,,%-< f+/fc./!-$f+A-(,./-!.,#-
A#f/##a+d#A!
The 3evision 4 capa0ilities descri0ed under this C2!C are defined in Ta0le 4&*.
Ta!le +$-A Control Method <atter) D3SC Capa!ilities 5:3"5& <it 5efinitions
Capa!ilities
5:3"5&
!its
Interpretation
& 2! does not support revised 0atter( granularit( definition.
4 & 2! supports revised 0atter( granularit( definition.
4 & 2! does not support specif(ing wake on low 0atter( user preference.
4 & 2! supports specif(ing wake on low 0atter( user preference, !ee section 6.4.3,
JC;1T ;atter( 1evel Threshold> for more information.
2&34 3eserved
;its defined in Capa0ilities -W23-2 provide information regarding 2! supported features. Contents in
-W23-2 are passed one&wa(K the 2! will disregard the corresponding 0its of -W23-2 in the 3eturn
Code.
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*+ Advanced Configuration and 'ower %nterface !pecification
11.2.2.3
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%nde/ *+4
_BST (Battery Status)
This o0#ect returns the present 0atter( status. Whenever the )attery State value changes, the s(stem will
generate an !C% to notif( the 2!.
Arguments<
None
3esult Code<
Pac+a,e
Batter1 State //DW0RD
Batter1 Pre2ent Rate //DW0RD
Batter1 Remainin, )apacit1 //DW0RD
Batter1 Pre2ent @olta,e //DW0RD
/
Ta!le +$-- D<ST Method "esult Codes
6ield 6or%at 5escription
;atter(
!tate
-W23- ;it values. Notice that the C1arging 0it and the Disc1arging 0it are mutuall(
e/clusive and must not 0oth 0e set at the same time. .ven in critical state,
hardware should report the corresponding chargingFdischarging state.
;it I 4 indicates the 0atter( is discharging.
;it4 I 4 indicates the 0atter( is charging.
;it2 I 4 indicates the 0atter( is in the critical energ( state =see section 3.6.",
J1ow ;atter( 1evelsL>. This does not mean 0atter( failure.
;atter(
'resent
3ate
-W23- 3eturns the power or current 0eing supplied or accepted through the 0atter(Ms
terminals =direction depends on the )attery State value>. The )attery Present
$ate value is e/pressed as power VmWhW or current VmAhW depending on the
Power Bnit value.
;atteries that are rechargea0le and are in the discharging state are re:uired to
return a valid )attery Present $ate value.
/ I /95555555 in VmWW or VmAW
/55555555 I ,nknown rate
;atter(
3emaining
Capacit(
-W23- 3eturns the estimated remaining 0atter( capacit(. The )attery $emaining
Capacity value is e/pressed as power VmWhW or current VmAhW depending on
the Power Bnit value.
;atteries that are rechargea0le are re:uired to return a valid )attery
$emaining Capacity value.
/ I /95555555 in VmWhW or VmAhW
/55555555 I ,nknown capacit(
;atter(
'resent
Doltage
-W23- 3eturns the voltage across the 0atter(Ms terminals.
;atteries that are rechargea0le must report )attery Present Aoltage.
/ I /95555555 in VmDW
/55555555 I ,nknown voltage
0oteH 2nl( a primar( 0atter( can report unknown voltage.
Notice that when the 0atter( is a primar( 0atter( =a non&rechargea0le 0atter( such as an Alkaline&
Manganese 0atter(> and cannot provide accurate information a0out the 0atter( to use in the calculation of
the remaining 0atter( life, the Control Method ;atter( can report the percentage directl( to 2!. %t does so
0( reporting the 1ast 5ull Charged Capacit( \4 and ;atter('resent3ate\/55555555. This means that
;atter( 3emaining Capacit( directl( reports the 0atter(Ms remaining capacit( VXW as a value in the range
through 4 as follows<
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*+2 Advanced Configuration and 'ower %nterface !pecification
Re%aining Battery Percentage9:; <
Battery Re%aining Capacity 9<0 E 300;
+ast 6(ll Charge" Capacity 9<300;
= 300
Re%aining Battery +ife 9h; <
Battery Re%aining Capacity 9%Ah$%.h;
Battery Present Rate 9<0'66666666;
< (n/no#n
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ *+3
11.2.2.4
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*+" Advanced Configuration and 'ower %nterface !pecification
_BTP (Battery Trip Point)
This o0#ect is used to set a trip point to generate an !C% whenever the )attery $emaining Capacity reaches
or crosses the value specified in the C;T' o0#ect. !pecificall(, if )attery $emaining Capacity is less than
the last argument passed to C;T', a notification must 0e issued when the value of )attery $emaining
Capacity rises to 0e greater than or e:ual to this trip&point value. !imilarl(, if )attery $emaining Capacity
is greater than the last argument passed to C;T', a notification must 0e issued when the value of )attery
$emaining Capacity falls to 0e less than or e:ual to this trip&point value. The last argument passed to C;T'
will 0e kept 0( the s(stem.
%f the 0atter( does not support this function, the C;T' control method is not located in the name space. %n
this case, the 2! must poll the )attery $emaining Capacity value.
Arguments<
1evel at which to set the trip point<
/4 I /95555555 =in units of mWh or mAh, depending on the Power Bnits value>
/ I Clear the trip point
3esult Code<
None
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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11.2.2.5
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*++ Advanced Configuration and 'ower %nterface !pecification
_BTM (Battery Time)
This optional o0#ect returns the estimated runtime of the 0atter( while it is discharging.
Arguments<
3ate at which the 0atter( is e/pected to discharge<
/ I indicates that the 0atter( will continue discharging at the current rate. The rate
should 0e 0ased on the average rate of drain, not the current rate of drain.
/4 I /95555555 I the rate =in mA or mW>.
3esult Code<
/ I !pecified rate is too large for 0atteries to suppl(. %f the argument was /,
C;TM should onl( return / if the 0atter( is critical.
/4 I /5555555. I .stimated runtime in seconds.
/55555555 I 3untime is unknown.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ *+9
11.2.2.6
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*+8 Advanced Configuration and 'ower %nterface !pecification
_BMD (Battery Maintenance Data)
This optional o0#ect returns information a0out the 0atter(Ms capa0ilities and current state in relation to
0atter( cali0ration and charger control features. %f the C;MC o0#ect =defined 0elow> is present under a
0atter( device, this o0#ect must also 0e present. Whenever the Stat's &lags value changes, AM1 code will
issue a 0otif)=batteryFde2ice, /82>. %n addition, AM1 will issue a 0otif)=batteryFde2ice, /82> if
evaluating C;MC did not result in causing the Stat's &lags to 0e set as indicated in that argument to
C;MC. AM1 is not re:uired to issue 0otif)=batteryFde2ice, /82> if the Stat's &lags change while
evaluating C;MC unless the change does not correspond to the argument passed to C;MC..
Arguments<
None
3esult Code<
Pac+a,e Statu2 5la,2 //DW0RD
)apabilit1 5la,2 //DW0RD
Recalibrate )ount //DW0RD
Juic+ Recalibrate <ime //DW0RD
Slow Recalibrate <ime //DW0RD/
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ *+6
Ta!le +$-. D<M5 Method "esult Codes
6ield 6or%at 5escription
!tatus
5lags
-W23- ;it values. ;it is mutuall( e/clusive with ;it4 and ;it2. %f the charger is
0eing manuall( controlled, there cannot 0e an AM1 controlled cali0ration
c(cle.
;it I 4 indicates the 0atter( is running an AM1 controlled cali0ration c(cle
;it4 I 4 indicates that charging has 0een disa0led.
;it2 I 4 indicates the 0atter( is configured to discharge while AC power is
availa0le.
;it3 I 4 indicates that the 0atter( should 0e recali0rated.
;it" I 4 indicates that the 2! should put the s(stem into stand0( to speed
charging during a cali0ration c(cle. This is optional =0ased on user
preference> if J!low 3ecali0rate TimeL is not e:ual to /.
;it* I ;it34 I reserved.
Capa0ilit(
5lags
-W23- ;it values that descri0e the capa0ilities of the 0atter( s(stem. These 0its allows
a 0atter( s(stem with more limited capa0ilities to still 0e cali0rated 0( 2!'M.
;it I 4 indicates that an AM1 controlled cali0ration c(cle is supported.
;it4 I 4 indicates that disa0ling the charger is supported.
;it2 I 4 indicates that discharging while running on AC is supported.
;it3 I 4 indicates that calling C;MC for one 0atter( will affect the state of all
0atteries in the s(stem. This is for 0atter( s(stems that cannot control
0atteries individuall(.
;it" I 4 indicates that cali0ration should 0e done 0( first full( charging the
0atter( and then discharging it. Not setting this 0it will indicate that
cali0ration can 0e done 0( simpl( discharging the 0atter(.
;it" I ;it34 I reserved.
3ecali0rate
Count
-W23- This is used 0( 0atter( s(stems that canMt detect when cali0ration is re:uired,
0ut wish to recommend that the 0atter( should 0e cali0rated after a certain
num0er of c(cles. Counting the num0er of c(cles and partial c(cles is done 0(
the 2!.
/ I 2nl( cali0rate when !tatus 5lag 0it 3 is set.
/ I /55555555 I cali0rate 0atter( after detecting this man(
0atter( c(cles.
Guick
3ecali0rate
Time
-W23- 3eturns the estimated time it will take to cali0rate the 0atter( if the s(stem is
put into stand0( whenever Stat's &lags ;it" is set. While the AM1 controlled
cali0ration c(cle is in progress, this returns the remaining time in the
cali0ration c(cle.
/ I indicates that stand0( while cali0rating the 0atter( is not
supported. The s(stem should remain in ! until cali0ration is
completed.
/4 I /5555555. I estimated recali0ration time in seconds.
/55555555 I indicates that the estimated time to recali0rate the 0atter( is
unknown.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*9 Advanced Configuration and 'ower %nterface !pecification
6ield 6or%at 5escription
!low
3ecali0rate
Time
-W23- 3eturns the estimated time it will take to cali0rate the 0atter( if Stat's &lag
;it" is ignored. While the AM1 controlled cali0ration c(cle is in progress, this
returns the remaining time in the cali0ration c(cle.
/ I indicates that 0atter( cali0ration ma( not 0e successful if
Stat's &lags ;it" is ignored.
/4 I /5555555. I estimated recali0ration time in seconds.
/55555555 I indicates that the estimated time to recali0rate the 0atter( is
unknown.
!ee section 3.6.*, J;atter( Cali0rationL for an overview of ;atter( Cali0ration.
The Capability &lags and $ecalibration Co'nt are used to indicate what functions are controlled 0( AM1
and what functions are controlled 0( 2!'M as descri0ed in section 3.6.*, J;atter( Cali0rationL. %f the
s(stem does not implement an AM1 controlled cali0ration c(cle =0it >, it ma( indicate using 0it 4 and 0it 2
that the 2! can control a generic cali0ration c(cle without prompting the user to remove the power cord.
$ecalibration Co'nt ma( 0e used to indicate that the ;%2! cannot determine when cali0ration should 0e
preformed so 0it 3 of the Stat's &lags will never 0e set. %n that case, 2!'M will attempt to count the
num0er of c(cles.
;it3 is used 0( s(stems that do not have individual control over the 0atteries and can onl( perform
cali0ration on all 0atteries in the s(stem at once. 2n such a s(stem, if one 0atter( re:uests cali0ration and
another 0atter( does not, the 2! ma( suggest that the user remove the 0atter( that doesnMt need cali0ration,
0efore initiating the cali0ration c(cle. When this 0it is set, reading the 3ecali0rate Time from either 0atter(
should give the time to recali0rate all 0atteries present in the s(stem.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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11.2.2.7
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*92 Advanced Configuration and 'ower %nterface !pecification
_BMC (Battery Maintenance Control)
This o0#ect is used to initiate cali0ration c(cles or to control the charger and whether or not a 0atter( is
powering the s(stem. This o0#ect is onl( present under a 0atter( device if the C;M- Capabilities &lags
have 0it , 4, or 2 set.
Arguments<
5lags indicating which features to ena0le<
;it I !et to initiate an AM1 controlled cali0ration c(cle. Clear to end the cali0ration c(cle.
;it4 I !et to disa0le charging. Clear to ena0le charging.
;it2 I !et to allow the 0atter( to discharge while AC power is availa0le. Clear to prevent
discharging while AC power is availa0le.
3esult Code<
None
!ee section 3.6.* for an overview of ;atter( Cali0ration.
.valuating this o0#ect with 0it set will initiate an AM1 controlled recali0ration c(cle if C;M- indicates
that this is supported. The cali0ration c(cle is controlled 0( the platform and will t(picall( include
disa0ling the AC adapter and discharging the 0atter(, then charging the 0atter(. While the 0atter( is
charging, the ;%2! should set ;it" of the !tatus flags returned 0( C;M- if it is possi0le to put the s(stem
into stand0( during cali0ration to speed up charging. .valuating this with ;it e:ual to will a0ort the
cali0ration c(cle if one is in process. %f the ;%2! determines that the cali0ration c(cle must 0e a0orted =for
e/ample AC power is lost>, or the cali0ration completes successfull(, the ;%2! will end the c(cle
automaticall(, clear the C;M- Stat's &lag ;it, and send a notif( /82. While the cali0ration c(cle is in
process, the 0atter( will report data normall(, so the 2! must disa0le 0atter( alarms.
;it4 and ;it2 ma( not 0e used in con#unction with the AM1 controlled cali0ration c(cle. @aving ;it set
will override ;it4 and ;it2. ;it4 will prevent the 0atter( from charging even though AC power is
connected. ;it2 will allow the s(stem to draw its power from the 0atter( even though AC power is
availa0le. When the 0atter( is no longer capa0le of delivering current, this setting is automaticall( cleared,
and the s(stem will continue running off AC power without interruption. %n addition, if AC power is lost
this 0it will 0e cleared. When AC power comes 0ack, the 2! must set the 0it again if the user wants to
continue discharging. When the s(stem clears this 0it automaticall(, it will result in a change in the Stat's
&lags returned 0( C;M-. This will cause a notif( /82. ;it4 is onl( cleared automaticall( if an AM1
controlled cali0ration c(cle is initiated.
When a 0atter( is discharging 0ecause ;it2 is set, the C'!3 method of the AC adapter device will report
that AC is offline 0ecause the s(stem is not running off of the AC adapter. %f the 0atteries are controlled
individuall( =;it3 of the C;M- Capabilities &lags>, setting either 0atter( to discharge will cause C'!3 to
report AC offline. %f more than one 0atter( in the s(stem has ;it2 set to discharge the 0atter(, it is up to the
s(stem to decide which 0atter( to discharge, so onl( on a s(stem that discharges the 0atteries one at a time,
a 0atter( with ;it2 set ma( not 0e discharging if another 0atter( in the s(stem is 0eing discharged.
%f ;atteries are not controlled individuall(, calling C;MC will initiate cali0ration, disa0le charge, andFor
allow discharge on all 0atteries in the s(stem. The state of these 0atteries will 0e reflected in the C;M-
Stat's &lags for all 0atteries.
11.3 AC Adapters and Power Source Objects
The 'ower !ource o0#ects descri0e the power source used to run the s(stem.
Ta!le +$-/ Power Source Control Methods
3!Cect 5escription
C'!3 3eturns present power source device.
C'C1 1ist of pointers to powered devices.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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11.3.1 _PSR (Power Source)
3eturns the current power source devices. ,sed for the AC adapter and is located under the AC adapter
o0#ect in name space. ,sed to determine if s(stem is running off the AC adapter. This will report that the
s(stem is not running on the AC adapter if an( of the 0atteries in the s(stem is 0eing forced to discharge
through C;MC.
Arguments<
None
3esult Code<
/ I 2ff&line
/4 I 2n&line
11.3.2 _PCL (Power Consumer List)
This o0#ect evaluates to a list of pointers, each pointing to a device or a 0us powered 0( the power source
device. 'ointing to a 0us indicates that all devices under the 0us are powered 0( the power source device.
11.4 Example: Power Source Name Space
The AC'% name space for a computer with an AC adapter and two 0atteries associated with a docking
station that has an AC adapter and a 0atter( is shown in 5igure 4&".
Root
S,stem Bus
AC Adapter!
G%SB
A'P! d
BAT! d Batter, !
Status of the BAT! O0Iect %STA
Batter,! Information %BI.
Batter,! Status %BST
%PSR
BAT" d
Batter, "
Status of the BAT" O0Iect %STA
Batter," Information %BI.
Batter," Trip Point %BTP
PCI1
'OC# d
A'P" d
%PSR
Power Source T,pe
Power Source T,pe
%BTP Batter,! Trip Point
Power Class -ist %PC-
%BST Batter," Status
%PC-
Power Class -ist
Power Class -ist %PC-
Power Class -ist %PC-
Plug and Pla, I' for the BAT! %7I'
Plug and Pla, I' for the BAT" %7I'
AC Adapter "
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*9" Advanced Configuration and 'ower %nterface !pecification
6igure +$-( Power Source 0a%e Space 1xa%ple that Includes a 5ocking Station
12
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ *9*
13 Thermal Management
This section descri0es the AC'% thermal model and specifies the AC'% Namespace o0#ects 2!'M uses for
thermal management of the platform.
13.1 Thermal Control
AC'% defines interfaces that allow 2!'M to 0e proactive in its s(stem cooling policies. With 2!'M in
control of the operating environment, cooling decisions can 0e made 0ased on the s(stemMs application
load, the userMs preference towards performance or energ( conservation, and thermal heuristics. $raceful
shutdown of devices or the entire s(stem at critical heat levels 0ecomes possi0le as well. The following
sections descri0e the AC'% thermal model and the AC'% Namespace o0#ects availa0le to 2!'M to appl(
platform thermal management polic(.
The AC'% thermal model is 0ased around conceptual platform regions called t1ermal <ones that ph(sicall(
contain devices, thermal sensors, and cooling controls. $enerall( speaking, the entire platform is one large
thermal Hone, 0ut the platform can 0e partitioned into several AC'% thermal Hones if necessar( to ena0le
optimal thermal management.
AC'% Thermal Hones are a logical collection of interfaces to temperature sensors, trip points, thermal
propert( information, and thermal controls. Thermal Hone interfaces appl( either thermal Hone wide or to
specific devices, including processors, contained within the thermal Hone. AC'% defines namespace o0#ects
that provide the thermal Hone&wide interfaces in section 44.3, JThermal 20#ectsL. A su0set of these o0#ects
ma( also 0e defined under devices. 2! implementations compati0le with the AC'% 3. thermal model,
interface with these o0#ects 0ut also support 2! native device driver interfaces that perform similar
functions at the device level. This allows the integration of devices with em0edded thermal sensors and
controls, perhaps not accessi0le 0( AM1, to participate in the AC'% thermal model through their inclusion
in the AC'% thermal Hone. 2!'M is responsi0le for appl(ing an appropriate thermal polic( when a thermal
Hone contains 0oth thermal o0#ects and native 2! device driver interfaces for thermal control.
!ome devices in a thermal Hone ma( 0e comparativel( large producers of thermal load in relation to other
devices in the thermal Hone. -evices ma( also have var(ing degrees of thermal sensitivit(. 5or e/ample,
some devices ma( tolerate operation at a significantl( higher temperature than other devices. As such, the
platform can provide 2!'M with information a0out the platformMs device topolog( and the resulting
influence of one deviceMs thermal load generation on another device. This information must 0e
comprehended 0( 2!'M for it to achieve optimal thermal management through the application of cooling
controls.
AC'% e/pects all temperatures to 0e represented in tenths of degrees. This resolution is deemed sufficient to
ena0le 2!'M to perform ro0ust platform thermal management.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*9+ Advanced Configuration and 'ower %nterface !pecification
6igure ++-+ ACPI Ther%al Ione
13.1.1 Active, Passive, and Critical Policies
There are three cooling policies that 2!'M uses to control the thermal state of the hardware. The policies
are acti2e. passi2e and critical!
Active Cooling. 2!'M takes a direct action such as turning on a fan. Appl(ing active cooling
controls t(picall( consume power and produce some amount of noise, 0ut are a0le to cool a
thermal Hone without limiting s(stem performance. Active cooling temperature trip points declare
the temperature thresholds 2!'M uses to decide when to start or stop different active cooling
devices.
Passive Cooling. 2!'M reduces the power consumption of devices to reduce the temperature of a
thermal Hone, such as slowing =throttling> the processor clock. Appl(ing passive cooling controls
t(picall( produces no user¬icea0le noise. 'assive cooling temperature trip points specif( the
temperature thresholds where 2!'M will start or stop passive cooling.
Critical Trip Points. These are threshold temperatures at which 2!'M performs an orderl(, 0ut
critical, shutdown of a device or the entire s(stem. The C@2T o0#ect declares the critical
temperature at which 2!'M ma( choose to transition the s(stem into the !" sleeping state, if
supported, The CC3T o0#ect declares the critical temperature at which 2!'M must perform a
critical shutdown.
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When a thermal Hone appears in the AC'% Namespace or when a new device 0ecomes a mem0er of a
thermal Hone, 2!'M retrieves the temperature thresholds =trip points> at which it e/ecutes a cooling polic(.
When 2!'M receives a temperature change notification, it evaluates the thermal HoneMs temperature
interfaces to retrieve current temperature values. 2!'M compares the current temperature values against
the temperature thresholds. %f an( temperature is greater than or e:ual to a corresponding active trip point
then 2!'M will turn on the associated active cooling device=s>. %f an( temperature is greater than or e:ual
to a corresponding passive trip point then 2!'M will perform passive cooling. %f the CTM' o0#ect returns a
value greater than or e:ual to the value returned 0( the C@2T o0#ect then 2!'M ma( choose to transition
the s(stem into the !" sleeping state, if supported. %f the CTM' o0#ect returns a value greater than or e:ual
to the value returned 0( the CC3T o0#ect then 2!'M must shut the s(stem down. .m0edded @ot and
Critical trip points ma( also 0e e/posed 0( individual devices within a thermal Hone. ,pon passing of these
trip points, 2!'M must decide whether to shut down the device or the entire s(stem 0ased upon device
criticalit( to s(stem operation. 2!'M must also evaluate the thermal HoneMs temperature interfaces when
an( thermal Hone appears in the namespace =for e/ample, during s(stem initialiHation> and must initiate a
cooling polic( as warranted independent of receipt of a temperature change notification. This allows 2!'M
to cool s(stems containing a thermal Hone whose temperature has alread( e/ceeded temperature thresholds
at initialiHation time.
An optimall( designed s(stem that uses several thresholds can notif( 2!'M of thermal increase or
decrease 0( raising an event ever( several degrees. This ena0les 2!'M to anticipate thermal trends and
incorporate heuristics to 0etter manage the s(stemMs temperature.
To implement a preference towards performance or energ( conservation, 2!'M can re:uest that the
platform change the priorit( of active cooling =performance> versus passive cooling =energ(
conservationFsilence> 0( evaluating the C!C' =!et Cooling 'olic(> o0#ect for the thermal Hone or a
corresponding 2!&specific interface to individual devices within a thermal Hone.
13.1.2 Dynamically Changing Cooling Temperature Trip Points
The platform or its devices can change the active and passive cooling temperature trip points and notif(
2!'M to reevaluate the trip point interfaces to esta0lish the new polic( threshold settings. The following
are the primar( uses for this t(pe of thermal notification<
When 2!'M changes the platformMs cooling polic( from one cooling mode to another.
When a swappa0le 0a( device is inserted or removed. A swappa0le 0a( is a slot that can
accommodate several different devices that have identical form factors, such as a C-&32M drive,
disk drive, and so on. Man( mo0ile 'Cs have this concept alread( in place.
After the crossing of an active or passive trip point is signaled to implement h(steresis.
%n each situation, 2!'M must 0e notified to re&evaluate the thermal HoneMs trip points via the AM1 code
e/ecution of a 0otif)=t1ermalF<one, /84> statement or via an 2! specific interface invoked 0( device
drivers for Hone devices participating in the thermal model.
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*98 Advanced Configuration and 'ower %nterface !pecification
13.1.2.1
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OSPM Change of Cooling Policy
When 2!'M changes the platformMs cooling polic( from one cooling mode to the other, the following
occurs<
4. 2!'M notifies the platform of the new cooling mode 0( running the !et Cooling 'olic( =C!C'>
control method in all thermal Hones and invoking the 2!&specific !et Cooling 'olic( interface to all
participating devices in each thermal Hone.
2. Thresholds are updated in the hardware and 2!'M is notified of the change.
3. 2!'M re&evaluates the active and passive cooling temperature trip points for the Hone and all devices
in the Hone to o0tain the new temperature thresholds.
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*8 Advanced Configuration and 'ower %nterface !pecification
13.1.2.2
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Resetting Cooling Temperatures to Adjust to Bay Device Insertion or
Removal
The platform can ad#ust the thermal Hone temperature to accommodate the ma/imum operating temperature
of a 0a( device as necessar(. 5or e/ample<
4. @ardware detects that a device was inserted into or removed from the 0a(, updates the temperature
thresholds, and then notifies 2!'M of the thermal polic( change and device insertion events.
2. 2!'M re&enumerates the devices and re&evaluates the active and passive cooling temperature trip
points.
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*82 Advanced Configuration and 'ower %nterface !pecification
13.1.2.3
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Resetting Cooling Temperatures to Implement Hysteresis
An 2.M can 0uild h(steresis into platform thermal design 0( d(namicall( resetting cooling temperature
thresholds. 5or e/ample<
4. When the temperature increases to the designated threshold, 2!'M will turn on the associated active
cooling device or perform passive cooling.
2. The platform resets the threshold value to a lower temperature =to implement h(steresis> and notifies
2!'M of the change. ;ecause of this new threshold value, the fan will 0e turned off at a lower
temperature than when it was turned on =therefore implementing a negative h(steresis>.
3. When the temperature hits the lower threshold value, 2!'M will turn off the associated active cooling
device or cease passive cooling. The hardware will reset CACx to its original value and notif( 2!'M
that the trip points have once again 0een altered.
13.1.3 Detecting Temperature Changes
The a0ilit( of the platform and its devices to as(nchronousl( notif( an AC'%&compati0le 2! of meaningful
changes in the thermal HoneMs temperature is a highl( desira0le capa0ilit( that relieves 2!'M from
implementing a poll&0ased polic( and generall( results in a much more responsive and optimal thermal
polic( implementation. .ach notification instructs 2!'M to evaluate whether a trip point has 0een crossed
and allows 2!'M to anticipate temperature trends for the thermal Hone.
%t is recogniHed that much of the hardware used to implement thermal Hone functionalit( toda( is not
capa0le of generating AC'%&visi0le notifications =!C%s> or onl( can do so with wide granularit( =for
e/ample, onl( when the temperature crosses the critical threshold>. %n these environments, 2!'M must poll
the thermal HoneMs temperature periodicall( to implement an effective polic(.
While AC'% specifies a mechanism that ena0les 2!'M to poll thermal Hone temperature, platform reliance
on thermal Hone polling is strongl( discouraged 0( this specification. 2.Ms should design s(stems that
as(nchronousl( notif( 2!'M whenever a meaningful change in the HoneMs temperature occurs I relieving
2!'M of the overhead associated with polling. %n some cases, em0edded controller firmware can
overcome limitations of e/isting thermal sensor capa0ilities to provide the desired as(nchronous
notification.
Notice that the CT?' =thermal Hone polling> o0#ect is used to indicate whether a thermal Hone must 0e
polled 0( 2!'M, and if so, a recommended polling fre:uenc(. !ee section 43.3.48, JCT?',L for more
information.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*8" Advanced Configuration and 'ower %nterface !pecification
13.1.3.1
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ *8*
Temperature Change Notifcations
Thermal Hone&wide temperature sensor hardware that supports as(nchronous temperature change
notifications does so using an !C%. The AM1 code that responds to this !C% must e/ecute a
0otif)=t1ermalF<one, /8> statement to inform 2!'M that a meaningful change in temperature has
occurred. Alternativel(, devices with em0edded temperature sensors ma( signal their associated device
drivers and the drivers ma( use an 2!&specific interface to signal 2!'MMs thermal polic( driver. A device
driver ma( also invoke a device specific control method that e/ecutes a 0otif)=t1ermalF<one, /8>
statement. When 2!'M receives this thermal notification, it will evaluate the thermal HoneMs temperature
interfaces to evaluate the current temperature values. 2!'M will then compare the values to the
corresponding cooling polic( trip point values =either Hone&wide or device&specific>. %f the temperature has
crossed over an( of the polic( thresholds, then 2!'M will activel( or passivel( cool =or stop cooling> the
s(stem, or shut the s(stem down entirel(.
;oth the num0er and granularit( of thermal Hone trip points are 2.M&specific. @owever, it is important to
notice that since 2!'M can use heuristic knowledge to help cool the s(stem, the more events 2!'M
receives the 0etter understanding it will have of the s(stemMs thermal characteristic.
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Temperature Change
$9ents )SCIs+
%CRT2 Critical shutdown threshold
%AC12 .an high speed threshold
%AC!2 .an low speed threshold
%PS62 Passi9e cooling threshold
6igure ++-& Ther%al 1vents
5or e/ample, the simple thermal Hone illustrated a0ove includes hardware that will generate a temperature
change notification using a * Celsius granularit(. All thresholds =C'!D, CAC4, CAC, and CC3T> e/ist
within the monitored range and fall on * 0oundaries. This granularit( is appropriate for this s(stem as it
provides sufficient opportunit( for 2!'M to detect when a threshold is crossed as well as to understand the
thermal HoneMs 0asic characteristics =temperature trends>.
0oteH The AC'% specification defines Eelvin as the standard unit for a0solute temperature values. All
thermal Hone o0#ects must report temperatures in Eelvin when reporting a0solute temperature values. All
figures and e/amples in this section of the specification use Celsius for reasons of clarit(. AC'% allows
Eelvin to 0e declared in precision of 4F4
th
of a degree =for e/ample, 34.*>. Eelvin is e/pressed as FE \
T/C Z 293.2.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*8+ Advanced Configuration and 'ower %nterface !pecification
13.1.3.2
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13.1.3.2
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*88 Advanced Configuration and 'ower %nterface !pecification
Polling
Temperature sensor hardware that is incapa0le of generating thermal change events, or that can do so for
onl( a few thresholds should inform 2!'M to implement a poll&0ased polic(. 2!'M does this to ensure
that temperature changes across threshold 0oundaries are alwa(s detecta0le.
'olling can 0e done in con#unction with hardware notifications. 5or e/ample, thermal Hone hardware that
onl( supports a single threshold might 0e configured to use this threshold as the critical temperature trip
point. Assuming that hardware monitors the temperature at a finer granularit( than 2!'M would, this
environment has the 0enefit of 0eing more responsive when the s(stem is overheating.
A thermal Hone advertises the need to 0e polled 0( 2!'M via the CT?' o0#ect. The a0sence of this control
method informs 2!'M to implement polling using an 2!&provided default fre:uenc(. !ee section 43.3.48,
JCT?',L for more information.
13.1.4 Active Cooling
Active cooling devices t(picall( consume power and produce some amount of noise when ena0led. These
devices attempt to cool a thermal Hone through the removal of heat rather than limiting the performance of
a device to address an adverse thermal condition.
The active cooling interfaces in con#unction with the active cooling lists allow the platform to use an active
device that offers var(ing degrees of cooling capa0ilit( or multiple cooling devices. The active cooling
temperature trip points designate the temperature where Active cooling is engaged or disengaged
=depending upon the direction in which the temperature is changing>. 5or thermal Hone&wide active cooling
controls, the CA1x o0#ect evaluates to a list of devices that activel( cool the Hone. 5or e/ample<
%f a standard single&speed fan is the Active cooling device, then CAC evaluates to the temperature
where active cooling is engaged and the fan is listed in CA1.
%f the Hone uses two independentl( controlled single&speed fans to regulate the temperature, then
CAC will evaluate to the ma/imum cooling temperature using two fans, and CAC4 will evaluate
to the standard cooling temperature using one fan.
%f a Hone has a single fan with a low speed and a high speed, the CAC will evaluate to the
temperature associated with running the fan at high&speed, and CAC4 will evaluate to the
temperature associated with running the fan at low speed. CA1 and CA14 will 0oth point to
different device o0#ects associated with the same ph(sical fan, 0ut control the fan at different
speeds.
5or A!1 coding e/amples that illustrate these points, see sections 44.*, JThermal ?one %nterface
3e:uirements,L and 44.+, JThermal ?one ./amples.L
13.1.5 Passive Cooling
'assive cooling controls are a0le to cool a thermal Hone without creating noise and without consuming
additional power =actuall( saving power>, 0ut do so 0( decreasing the performance of the devices in the
Hone .
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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13.1.5.1
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*6 Advanced Configuration and 'ower %nterface !pecification
Processor Clock Throttling
The processor passive cooling threshold =C'!D> in con#unction with the processor list =C'!1> allows the
platform to indicate the temperature at which a passive control, for e/ample clock throttling, will 0e applied
to the processor=s> residing in a given thermal Hone. ,nlike other cooling policies, during passive cooling
of processors 2!'M ma( take the initiative to activel( monitor the temperature in order to cool the
platform.
2n an AC'%&compati0le platform that properl( implements C', throttling, the temperature transitions will
0e similar to the following figure, in a coola0le environment, running a coola0le workload<
C
P
*
P
e
r
f
o
r
m
a
n
c
e
Time
T
e
m
p
e
r
a
t
u
r
e
P
%TSP )Sampling period+
!11M
;1M
T
t
T
n / !
T
n
6igure ++-# Te%perature and CP2 Perfor%ance 7ersus Ti%e
The following e:uation should 0e used 0( 2!'M to assess the optimum C', performance change
necessar( to lower the thermal HoneMs temperature<
1Juation S+< ' VXW \ CTC4 [ = Tn & Tn&4 > Z CTC2 [ =Tn & Tt>
Where<
Tn \ current temperature
Tt \ target temperature =C'!D>
The two coefficients CTC4 and CTC2 and the sampling period CT!' are hardware&dependent constants the
2.M must suppl( to 2!'M =for more information, see section 44.3, JThermal 20#ectsL>. The CT!' o0#ect
contains a time interval that 2!'M uses to poll the hardware to sample the temperature. Whenever the time
value returned 0( CT!' has elapsed, 2!'M will evaluate CTM' to sample the current temperature =shown
as Tn in the a0ove e:uation>. Then 2!'M will use the sampled temperature and the passive cooling
temperature trip point =C'!D> =which is the target temperature Tt> to evaluate the e:uation for '. The
granularit( of ' is determined 0( the C', dut( width of the s(stem.
0ote< .:uation Y4 has an implied formula.
1Juation S&< 'n \ 'n&4 Z @WV& ' W where X T\ 'n T\ 4X
5or .:uation Y2, whenever 'n&4 Z ' lies outside the range &4X, then 'n will 0e truncated to &4X.
5or hardware that cannot assume all possi0le values of 'n 0etween and 4X, a hardware&specific
mapping function @W is used.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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%n addition, the hardware mapping function in .:uation Y2 should 0e interpreted as follows<
5or a0solute temperatures<
4. %f the right hand side of .:uation Y4 is negative, @WV 'W is rounded to the ne/t availa0le higher
setting of fre:uenc(.
2. %f the right hand side of .:uation Y4 is positive, @WV'W is rounded to the ne/t availa0le lower setting
of fre:uenc(.
5or relative temperatures<
4. %f the right hand side of .:uation Y4 is positive, @WV 'W is rounded to the ne/t availa0le higher
setting of fre:uenc(.
2. %f the right hand side of .:uation Y4 is negative, @WV'W is rounded to the ne/t availa0le lower setting
of fre:uenc(.
The calculated 'n 0ecomes 'n&4 during the ne/t sampling period.
5or more information a0out C', throttling, see section 8.4.4, 'rocessor 'ower !tate C.L A detailed
e/planation of this thermal feed0ack e:uation is 0e(ond the scope of this specification.
13.1.6 Critical Shutdown
When the thermal Hone&wide temperature sensor value reaches the threshold indicated 0( CC3T, 2!'M
must immediatel( shut the s(stem down. The s(stem must disa0le the power either after the temperature
reaches some hardware&determined level a0ove CC3T or after a predetermined time has passed. ;efore
disa0ling power, platform designers should incorporate some time that allows 2!'M to run its critical
shutdown operation. There is no re:uirement for a minimum shutdown operation window that commences
immediatel( after the temperature reaches CC3T. This is 0ecause<
Temperature might rise rapidl( in some s(stems and slowl( on others, depending on casing design
and environmental factors.
!hutdown can take several minutes on a server and onl( a few seconds on a hand&held device.
;ecause of this indistinct discrepanc( and the fact that a critical heat situation is a remarka0l( rare
occurrence, AC'% does not specif( a target window for a safe shutdown. %t is entirel( up to the 2.M to
0uild in a safe 0uffer that it sees fit for the target platform.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*62 Advanced Configuration and 'ower %nterface !pecification
13.2 Cooling Preferences
A ro0ust 2!'M implementation provides the means for the end user to conve( a preference =or a level of
preference> for either performance or energ( conservation to 2!'M. Allowing the end user to choose this
preference is most critical to mo0ile s(stem users where ma/imiHing s(stem run&time on a 0atter( charge
often has higher priorit( over realiHing ma/imum s(stem performance. 5or e/ample, if a user is taking
notes on her 'C in a :uiet environment, such as a li0rar( or a corporate meeting, she ma( want the s(stem
to emphasiHe passive cooling so that the s(stem operates :uietl(, even at the cost of s(stem performance.
A user preference towards performance corresponds to the Active cooling mode while a userMs preference
towards energ( conservation or :uiet corresponds to the 'assive cooling mode. AC'% defines an interface to
conve( the cooling mode to the platform. Active cooling can 0e performed with minimal 2!'M thermal
polic( intervention. 5or e/ample, the platform indicates through thermal Hone parameters that crossing a
thermal trip point re:uires a fan to 0e turned on. 'assive cooling re:uires 2!'M thermal polic( to
manipulate device interfaces that reduce performance to reduce thermal Hone temperature.
.ither cooling mode will 0e activated onl( when the thermal condition re:uires it. When the thermal Hone
is at an optimal temperature level where it does not warrant an( cooling, 0oth modes result in a s(stem
operating at its ma/imum potential with all fans turned off.
Thermal Hones supporting the !et Cooling 'olic( interface allow the user to switch the s(stemMs cooling
mode emphasis. !ee section 43.3.9, JC!C',L for more information.
Acti9e Cooling Thresholds )%ACx+ Passi9e Cooling Threshold )%PS6+
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6igure ++-( Active and Passive Threshold 7alues
As illustrated in 5igure 44&", the platform must conve( the value for each threshold to instruct 2!'M to
initiate the cooling policies at the desired target temperatures. The platform can emphasiHe active or passive
cooling modes 0( assigning different threshold values. $enerall(, if CAC/ is set lower than C'!D, then the
s(stem emphasiHes active cooling. Conversel(, if C'!D is set lower than CAC/, then the emphasis is placed
on passive cooling.
5or e/ample, a thermal Hone that includes a processor and one single&speed fan ma( use C'!D to indicate
the temperature value at which 2!'M would ena0le passive cooling and CAC to indicate the temperature
at which the fan would 0e turned on. %f the value of C'!D is less than CAC then the s(stem will favor
passive cooling =for e/ample, C', clock throttling>. 2n the other hand, if CAC is less than C'!D the
s(stem will favor active cooling =in other words, using the fan>. !ee 5igure 44&* 0elow.
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%CRT
%PS6
%AC1
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Active Cooling
Preference
%CRT
%AC1
%PS6
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Passive Cooling
Preference
6igure ++-A Cooling Preferences
The e/ample on the left ena0les active cooling =for e/ample, turn on a fan> when 2!'M detects the
temperature has risen a0ove *. %f for some reason the fan does not reduce the s(stem temperature, then at
9* 2!'M will initiate passive cooling =for e/ample, C', throttling> while still running the fan. %f the
temperature continues to clim0, 2!'M will :uickl( shut the s(stem down when the temperature reaches
6C. The e/ample on the right is similar 0ut the CAC and C'!D threshold values have 0een swapped to
emphasiHe passive cooling.
The AC'% thermal model allows fle/i0ilit( in the thermal Hone design. An 2.M that needs a less ela0orate
thermal implementation ma( consider using onl( a single threshold =for e/ample, CC3T>. Comple/ thermal
implementations can 0e modeled using multiple active cooling thresholds and devices, or through the use
of additional thermal Hones.
13.2.1 Evaluating Thermal Device Lists
The 0otif)=t1ermalF<one, /82> statement is used to inform 2!'M that a change has 0een made to the
thermal Hone device lists. This thermal event instructs 2!'M to re&evaluate the CA1/, C'!1, and CT?-
o0#ects.
5or e/ample, a s(stem that supports the d(namic insertions of processors might issue this notification to
inform 2!'M of changes to C'!1 following the insertion or removal of a processor. 2!'M would re&
evaluate all thermal device lists and ad#ust its polic( accordingl(.
Notice that this notification can 0e used with the 0otif)=t1ermalF<one, /84> statement to inform 2!'M to
0oth re&evaluate all device lists and all thresholds.
Alternativel(, devices ma( include the CT?M =Thermal ?one Mem0er> o0#ect their device scope to conve(
their thermal Hone association to 2!'M. !ection 44.3.49, JCT?M =Thermal ?one Mem0er>L, for more
information.
13.2.2 Evaluating Device Thermal Relationship Information
The 0otif)=t1ermalF<one, /83> statement is used to inform 2!'M that a change has 0een made to the
thermal influence information. This thermal event instructs 2!'M to re&evaluate the CT3T o0#ect. The
thermal influence 0etween devices ma( change when active cooling moves air across device packages as
compared to when onl( passive cooling controls are applied.
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*6" Advanced Configuration and 'ower %nterface !pecification
13.3 Thermal Objects
20#ects related to thermal management are listed in Ta0le 44&44
Ta!le ++-+ Ther%al 3!Cects
3!Cect 5escription
CACx 3eturns active cooling polic( threshold values in tenths of degrees.
CA1x 1ist of active cooling device o0#ects.
CC3T 3eturns critical trip point in tenths of degrees where 2!'M must perform a critical shutdown.
C@2T 3eturns critical trip point in tenths of degrees where 2!'M ma( choose to transition the s(stem
into !".
C'!1 1ist of processor device o0#ects for clock throttling.
C'!D 3eturns the passive cooling polic( threshold value in tenths of degrees.
C3TD Conve(s whether temperatures are e/pressed in terms of a0solute or relative values.
C!C' !ets platform cooling polic( =active or passive>.
CTC4 Thermal constant for passive cooling.
CTC2 Thermal constant for passive cooling.
CTM' 3eturns the thermal HoneMs current temperature in tenths of degrees.
CT'T Conve(s the temperature of a devices internal temperature sensor to the platform when a
temperature trip point is crossed.
CT3T Ta0le of values that conve( the Thermal 3elationship 0etween devices
CT!' Thermal sampling period for 'assive cooling in tenths of seconds.
CT!T Conve(s the minimum separation for a devicesM programma0le temperature trip points.
CT?- 1ist of devices whose temperature is measured 0( this thermal Hone.
CT?M 3eturns the thermal Hone for which a device is a mem0er.
CT?' Thermal Hone polling fre:uenc( in tenths of seconds.
With the e/ception of CT'T, CT!T, and the CT?M o0#ects, the o0#ects descri0ed in the following sections
ma( e/ist under a thermal Hone. -evices with em0edded thermal sensors and controls ma( contain static
cooling temperature trip points or d(namic cooling temperature trip points that must 0e programmed 0( the
deviceMs driver. %n this case, thermal o0#ects defined under a device serve to conve( the platform specific
values for these settings to the devices driver.
13.3.1 _ACx (Active Cooling)
This optional o0#ect, if present under a thermal Hone, returns the temperature trip point at which 2!'M
must start or stop Active cooling, where x is a value 0etween and 6 that designates multiple active cooling
levels of the thermal Hone. %f the Active cooling device has one cooling level =that is, JonL> then that
cooling level must 0e defined as CAC. %f the cooling device has two levels of capa0ilit(, such as a high fan
speed and a low fan speed, then the( must 0e defined as CAC and CAC4 respectivel(. The smaller the
value of x, the greater the cooling strength CACx represents. %n the a0ove e/ample, CAC represents the
greater level of cooling =the faster fan speed> and CAC4 represents the lesser level of cooling =the slower
fan speed>. 5or ever( CACx method, there must 0e a matching CA1x o0#ect.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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%f this o0#ect it present under a device, the deviceMs driver evaluates this o0#ect to determine the deviceMs
corresponding active cooling temperature trip point. This value ma( then 0e used 0( the deviceMs driver to
program an internal device temperature sensor trip point. When this o0#ect is present under a device, either
the device must contain a native 2! device driver interface supporting a corresponding active cooling
control or there must 0e a matching CA1/ o0#ect under the thermal Hone of which the device is a mem0er.
Arguments<
None
3esult Code<
Active cooling temperature threshold in tenths of degrees.
The result code is an integer value that represents tenths of degrees. 5or e/ample, 3.E is represented 0(
the integer 3.
13.3.2 _ALx (Active List)
This o0#ect is defined under a thermal Hone and evaluates to a list of Active cooling devices to 0e turned on
when the corresponding CACx temperature threshold is e/ceeded. 5or e/ample, these devices could 0e
fans.
Arguments<
None
3esult Code<
A package consisting of references to all active cooling devices that should 0e engaged when the
associated active cooling threshold =CAC/> is e/ceeded.
13.3.3 _CRT (Critical Temperature)
This o0#ect, when defined under a thermal Hone, returns the critical temperature at which 2!'M must
shutdown the s(stem. %f this o0#ect it present under a device, the deviceMs driver evaluates this o0#ect to
determine the deviceMs critical cooling temperature trip point. This value ma( then 0e used 0( the deviceMs
driver to program an internal device temperature sensor trip point.
Arguments<
None
3esult Code<
Critical temperature threshold in tenths of degrees.
The result is an integer value that represents tenths of degrees. 5or e/ample, 3.E is represented 0( the
integer 3.
13.3.4 _HOT (Hot Temperature)
This o0#ect, when defined under a thermal Hone, returns the critical temperature at which 2!'M ma(
choose to transition the s(stem into the !" sleeping state. The platform vendor should define C@2T to 0e
far enough 0elow CC3T so as to allow 2!'M enough time to transition the s(stem into the !" sleeping
state. While dependent on the amount of installed memor(, on t(pical platforms 2!'M implementations
can transition the s(stem into the !" sleeping state in tens of seconds. %f this o0#ect it present under a
device, the deviceMs driver evaluates this o0#ect to determine the deviceMs hot cooling temperature trip point.
This value ma( then 0e used 0( the deviceMs driver to program an internal device temperature sensor trip
point.
Arguments<
None
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*6+ Advanced Configuration and 'ower %nterface !pecification
3esult Code<
Critical temperature threshold in tenths of degrees.
The result is an integer value that represents tenths of degrees. 5or e/ample, 3.E is represented 0( the
integer 3.
13.3.5 _PSL (Passive List)
This o0#ect is defined under a thermal Hone and evaluates to a list of processor o0#ects to 0e used for
passive cooling.
Arguments<
None
3esult Code<
A package consisting of references to all processor o0#ects that will 0e used for passive cooling when
the HoneMs passive cooling threshold =C'!D> is e/ceeded.
13.3.6 _PSV (Passive)
This optional o0#ect, if present under a thermal Hone, evaluates to the temperature at which 2!'M must
activate passive cooling polic(.
%f this o0#ect it present under a device, the deviceMs driver evaluates this o0#ect to determine the deviceMs
corresponding passive cooling temperature trip point. This value ma( then 0e used 0( the deviceMs driver to
program an internal device temperature sensor trip point. When this o0#ect is present under a device, the
device must contain a native 2! device driver interface supporting a passive cooling control.
Arguments<
None
3esult Code<
'assive cooling temperature threshold in tenths of degrees.
The result code is an integer value that represents tenths of degrees. 5or e/ample, 3. Eelvin is
represented 0( 3.
13.3.7 _RTV (Relative Temperature Values)
This optional o0#ect ma( 0e present under a device or a thermal Hone and is evaluated 0( 2!'M to
determine whether the values returned 0( temperature trip point and current operating temperature
interfaces under the corresponding device or thermal Hone represent a0solute or relative temperature values.
%f the C3TD o0#ect is not present or is present and evaluates to Hero then 2!'M assumes that all values
returned 0( temperature trip point and current operating temperature interfaces under the device or thermal
Hone represent a0solute temperature values e/pressed in tenths of degrees Eelvin.
%f the C3TD o0#ect is present and evaluates to a non Hero value then all values returned 0( temperature trip
point and current operating temperature interfaces under the corresponding device or thermal Hone
represent temperature values relative to a Hero point that is defined as the ma/imum value of the deviceMs or
thermal HoneMs critical cooling temperature trip point. %n this case, temperature trip point and current
operating temperature interfaces return values in units that are tenths of degrees !elow the Hero point.
2!'M evaluates the C3TD o0#ect 0efore evaluating an( other temperature trip point or current operating
temperature interfaces.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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Arguments<
None
3esult Code<
%nteger indicating whether values returned 0( temperature trip point and current operating temperature
interfaces represent a0solute of relative temperature values.
13.3.8 _SCP (Set Cooling Policy)
This optional o0#ect is a control method that 2!'M invokes to set the platformMs cooling mode polic(
setting. The platform ma( use the evaluation of C!C' to reassign CACx and C'!D temperature trip points
according to the mode or limits conve(ed 0( 2!'M. 2!'M will automaticall( evaluate CACx and C'!D
o0#ects after e/ecuting C!C'. This o0#ect ma( e/ist under a thermal Hone or a device.
Arguments<
Arg =%nteger>< (ode
Arg4 =%nteger>< Aco'stic ,imit
Arg2 =%nteger>< Power ,imit
Where<
(ode I \ Active, 4 \ 'assive
Aco'stic ,imit I !pecifies the ma/imum accepta0le acoustic level that active cooling devices ma(
generate. Dalues are 4 to * where 4 means no acoustic tolerance and * means ma/imum acoustic tolerance.
Power ,imit I !pecifies the ma/imum accepta0le power level that active cooling devices ma( consume.
Dalues are from 4 to * where 4 means no power ma( 0e used to cool and * means ma/imum power ma( 0e
used to cool.
3esult Code<
None
./ample<
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
*68 Advanced Configuration and 'ower %nterface !pecification
// 5an )ontrol i2 defined a2 follow2>
// Speed 4 (5an i2 0ff)> &cou2tic 6imit 4$ Power 6imit 4$ ?L I.)
// Speed 3> &cou2tic 6imit 3$ Power 6imit 3$ IG) E T.)
// Speed F> &cou2tic 6imit F$ Power 6imit F$ TG) E =.)
// Speed .> &cou2tic 6imit .$ Power 6imit .$ =G) E H.)
// Speed G> &cou2tic 6imit G$ Power 6imit G$ BL HG)
// _S)P !otifie2 the platform the current coolin, mode.
// &r,( L ;ode
// ( E &ctive coolin,
// 4 E Pa22ive coolin,
// &r,4 L &cou2tic 6imit
// 4 L !o acou2tic tolerance
// ...
// G L ma-imum acou2tic tolerance
// &r,3 L Power 6imit
// 4 L !o power ma1 be u2ed to cool
// ...
// G L ma-imum power ma1 be u2ed to cool
;ethod(_S)P$F$SerialiCed)
Store(I($PS@<)
/
%l2e
Store(HT$PS@<)
/
#f ()ondRef0f (_0S#$6ocal())
%-ternal(\_SB.P)#(.#S&(.%)($ Device0b9)
Scope(\_SB.P)#(.#S&(.%)()
%-ternal(\_SB.)PX($ Device0b9)
Scope(\_SB.)PX()
//
// &dd the ob9ect2 re8uired for F.( e-tended thermal 2upport
//
// )reate a re,ion and field2 for thermal 2upportK the platform
// fill2 in the value2 and trap2 on write2 to enable h12tere2i2.
// <he 0peration Re,ion location i2 invalid
0perationRe,ion()P(($ S12tem;emor1$ (-(((((((($ (-=)
5ield()P(($ B1te&cc$ 6oc+$ Pre2erve)
S)P$ 4$ // thermal polic1 (pa22ive/active)
R<@$ 4$ // ab2olute or relative temperature
$ I$ // re2erved
&)($ 4I$ // active coolin, temp
PS@$ 4I$ // pa22ive coolin, temp
)R<$ 4I$ // critical temp
<P<$ 4I$ // <emp trip point cro22ed
<S<$ = // <emp 2en2or thre2hold
/
;ethod(_<7;$ () Return(\_SB.P)#(.#S&(.<7() / // thermal Cone member
// Some thermal Cone method2 are now located under the
// thermal device participatin, in the F.( thermal model.
// <he2e method2 provide device 2pecific thermal information
;ethod(_S)P$ 4) Store (&r,($ \_SB.)PX(.S)P) / // 2et coolin, mode
;ethod(_R<@) Return (\_SB.)PX(.R<@) / // ab2olute or relative temp
;ethod(_&)() Return (\_SB.)PX(.&)() / // active coolin, (fan) temp
;ethod(_PS@) Return (\_SB.)PX(.PS@) / // pa22ive coolin, temp
;ethod(_)R<) Return (\_SB.)PX(.)R<) / // critical temp
!ame(_<)4$ .) // thermal con2tant 4 (#!@&6#D)
!ame(_<)3$ F) // thermal con2tant 3 (#!@&6#D)
;ethod(_<P<$ 4) Store (&r,($ \_SB.)PX(.<P<)/ // trip point temp
;ethod(_<S<) Return (\_SB.)PX(.<S<) / // temp 2en2or thre2hold
/ // end of )PX( 2cope
/ // end of SSD<
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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//
// )PX( F.( <hermal ;odel SSD<
//
DefinitionBloc+ (
P)PX4SSD<.amlP$
PSSD<P$
(-(4$
PPmRefP$
P)PX4P$
(-F(((
)
%-ternal(\_SB.)PX4$ Device0b9)
Scope(\_SB.)PX4)
//
// &dd the ob9ect2 re8uired for F.( e-tended thermal 2upport
//
// )reate a re,ion and field2 for thermal 2upportK the platform
// fill2 in the value2 and trap2 on write2 to enable h12tere2i2.
// <he 0peration Re,ion location i2 invalid
0perationRe,ion()P(4$ S12tem#0$ (-(((((((=$ (-=)
5ield()P(4$ B1te&cc$ 6oc+$ Pre2erve)
S)P$ 4$ // thermal polic1 (pa22ive/active)
R<@$ 4$ // ab2olute or relative temperature
$ I$ // re2erved
&)($ 4I$ // active coolin, temp
PS@$ 4I$ // pa22ive coolin, temp
)R<$ 4I$ // critical temp
<P<$ 4I$ // <emp trip point cro22ed
<S<$ = // <emp 2en2or thre2hold
/
;ethod(_<7;$ () Return(\_SB.P)#(.#S&(.<7() / // thermal Cone member
// Some thermal Cone method2 are now located under the
// thermal device participatin, in the F.( thermal model.
// <he2e method2 provide device 2pecific thermal information
;ethod(_S)P$ 4) Store (&r,($ \_SB.)PX4.S)P) / // 2et coolin, mode
;ethod(_R<@) Return (\_SB.)PX4.R<@) / // ab2olute or relative temp
;ethod(_&)() Return (\_SB.)PX4.&)() / // active coolin, (fan) temp
;ethod(_PS@) Return (\_SB.)PX4.PS@) / // pa22ive coolin, temp
;ethod(_)R<) Return (\_SB.)PX4.)R<) / // critical temp
!ame(_<)4$ .) // thermal con2tant 4 (#!@&6#D)
!ame(_<)3$ F) // thermal con2tant 3 (#!@&6#D)
;ethod(_<P<$ 4) Store (&r,($ \_SB.)PX4.<P<)/ // trip point temp
;ethod(_<S<) Return (\_SB.)PX4.<S<) / // temp 2en2or thre2hold
/ // end of )PX4 2cope
/ // end of SSD<
14 ACPI Embedded Controller Interface Specifcation
AC'% defines a standard hardware and software communications interface 0etween an 2! driver and an
em0edded controller. This allows an( 2! to provide a standard driver that can directl( communicate with
an em0edded controller in the s(stem, thus allowing other drivers within the s(stem to communicate with
and use the resources of s(stem em0edded controllers. This in turn ena0les the 2.M to provide platform
features that the 2! 2!'M and applications can take advantage of.
AC'% also defines a standard hardware and software communications interface 0etween an 2! driver and
an .m0edded Controller&0ased !M;&@C =.C&!M;&@C>.
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+42 Advanced Configuration and 'ower %nterface !pecification
The AC'% standard supports multiple em0edded controllers in a s(stem, each with its own resources. .ach
em0edded controller has a flat 0(te&addressa0le %F2 space, currentl( defined as 2*+ 0(tes. 5eatures
implemented in the em0edded controller have an event J:uer(L mechanism that allows feature hardware
implemented 0( the em0edded controller to gain the attention of an 2! driver or A!1FAM1 code handler.
The interface has 0een specified to work on the most popular em0edded controllers on the market toda(,
onl( re:uiring changes in the wa( the em0edded controller is JwiredL to the host interface.
Two interfaces are specified<
A private interface, e/clusivel( owned 0( the em0edded controller driver.
A shared interface, used 0( the em0edded controller driver and some other driver.
This interface is separate from the traditional 'C ke(0oard controller. !ome 2.Ms might choose to
implement the AC'% .m0edded Controller %nterface =.C%> within the same em0edded controller as the
ke(0oard controller function, 0ut the .C% re:uires its own uni:ue host resources =interrupt event and access
registers>.
This interface does support sharing the .C% with an inter&environment interface =such as !M%> and relies on
the AC'%&defined J$lo0al 1ockL protocol. 5or information a0out the $lo0al 1ock interface, see section
*.2.4.4, J$lo0al 1ock.L ;oth the shared and private .C interfaces are descri0ed in the following sections.
The .C% has 0een designed such that a platform can use it in either the legac( or AC'% modes with minimal
changes 0etween the two operating environments. This is to encourage standardiHation for this interface to
ena0le faster development of platforms as well as opening up features within these controllers to higher
levels of software.
14.1 Embedded Controller Interface Description
.m0edded controllers are the general class of microcontrollers used to support 2.M&specific
implementations. The AC'% specification supports em0edded controllers in an( platform design, as long as
the microcontroller conforms to one of the models descri0ed in this section. The em0edded controller is a
uni:ue feature in that it can perform comple/ low&level functions through a simple interface to the host
microprocessor=s>.
Although there is a large variet( of microcontrollers in the market toda(, the most commonl( used
em0edded controllers include a host interface that connects the em0edded controller to the host data 0us,
allowing 0i&directional communications. A 0i&directional interrupt scheme reduces the host processor
latenc( in communicating with the em0edded controller.
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Currentl(, the most common host interface architecture incorporated into microcontrollers is modeled after
the standard %A&'C architecture ke(0oard controller. This ke(0oard controller is accessed at /+ and /+"
in s(stem %F2 space. 'ort /+ is termed the data register, and allows 0i&directional data transfers to and
from the host and em0edded controller. 'ort /+" is termed the commandFstatus registerK it returns port
status information upon a read, and generates a command se:uence to the em0edded controller upon a
write. This same class of controllers also includes a second decode range that shares the same properties as
the ke(0oard interface 0( having a commandFstatus register and a data register. The following diagram
graphicall( depicts this interface.
$C STAT*S
R$5IST$R
$C O*TP*T
B*..$R
$C I&P*T
B*..$R
I&T$R.AC$
ARBITRATIO&
CO'$
SMI
I&T$R.AC$
CO'$
SCI
I&T$R.AC$
CO'$
COMMA&' RIT$ )SMI/SCI+
'ATARIT$ )SMI/SCI+
'ATA R$A' )SMI/SCI+
STAT*S R$A' )SMI/SCI+
$C%SCI%$&
$C%SMI%$&
$C%SMI%STS
$C%SCI%STS
$C%SMI
$C%SCI
I/O
MAI&
.IRMAR$
6igure +&-+ Shared Interface
The diagram a0ove depicts the general register model supported 0( the AC'% .m0edded Controller
%nterface.
The first method uses an em0edded controller interface shared 0etween 2!'M and the s(stem management
code, which re:uires the $lo0al 1ock semaphore overhead to ar0itrate ownership. The second method is a
dedicated em0edded controller decode range for sole use 0( 2!'M driver. The following diagram
illustrates the em0edded controller architecture that includes a dedicated AC'% interface.
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SCI
I&T$R.AC$
CO'$
I/O
$C%SCI%$&
$C%SCI%STS
$C%SCI
SCI STAT*S
R$5IST$R
SCI O*TP*T
B*..$R
SCI I&P*T
B*..$R
COMMA&' RIT$ )SCI+
'ATARIT$ )SCI+
'ATAR$A' )SCI+
STAT*S R$A' )SCI+
SMI STAT*S
R$5IST$R
SMI O*TP*T
B*..$R
SMI I&P*T
B*..$R
SMI
I&T$R.AC$
CO'$
COMMA&' RIT$ )SMI+
'ATARIT$ )SMI+
'ATAR$A' )SMI+
STAT*S R$A' )SMI+
$C%SMI%$&
$C%SMI%STS
$C%SMI
MAI&
.IRMAR$
6igure +&-& Private Interface
The private interface allows 2!'M to communicate with the em0edded controller without the additional
software overhead associated with using the $lo0al 1ock. !everal common s(stem configurations can
provide the additional em0edded controller interfaces<
Non&shared em0edded controller. This will 0e the most common case where there is no need for
the s(stem management handler to communicate with the em0edded controller when the s(stem
transitions to AC'% mode. 2!'M processes all normal t(pes of s(stem management events, and the
s(stem management handler does not need to take an( actions.
%ntegrated ke(0oard controller and em0edded controller. This provides three host interfaces as
descri0ed earlier 0( including the standard ke(0oard controller in an e/isting component =chip set, %F2
controller> and adding a discrete, standard em0edded controller with two interfaces for s(stem
management activities.
!tandard ke(0oard controller and em0edded controller. This provides three host interfaces 0(
providing a ke(0oard controller as a distinct component, and two host interfaces are provided in the
em0edded controller for s(stem management activities.
Two em0edded controllers. This provides up to four host interfaces 0( using two em0edded
controllersK one controller for s(stem management activities providing up to two host interfaces, and
one controller for ke(0oard controller functions providing up to two host interfaces.
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.m0edded controller and no ke(0oard controller. 5uture platforms might provide ke(0oard
functionalit( through an entirel( different mechanism, which would allow for two host interfaces in an
em0edded controller for s(stem management activities.
To handle the general em0edded controller interface =as opposed to a dedicated interface> model, a method
is availa0le to make the em0edded controller a sharea0le resource 0etween multiple tasks running under the
operating s(stemMs control and the s(stem management interrupt handler. This method, as descri0ed in this
section, re:uires several changes<
Additional e/ternal hardware
.m0edded controller firmware changes
!(stem management interrupt handler firmware changes
2perating software changes
Access to the shared em0edded controller interface re:uires additional software to ar0itrate 0etween the
operating s(stemMs use of the interface and the s(stem management handlerMs use of the interface. This is
done using the $lo0al 1ock as descri0ed in section *.2.4.4, J$lo0al 1ock.L
This interface sharing protocol also re:uires em0edded controller firmware changes, in order to ensure that
collisions do not occur at the interface. A collision could occur if a 0(te is placed in the s(stem output
0uffer and an interrupt is then generated. There is a small window of time when the incorrect recipient
could receive the data. This pro0lem is resolved 0( ensuring that the firmware in the em0edded controller
does not place an( data in the output 0uffer until it is re:uested 0( 2!'M or the s(stem management
handler.
More detailed algorithms and descriptions are provided in the following sections.
14.2 Embedded Controller Register Descriptions
The em0edded controller contains three registers at two address locations< .CC!C and .CC-ATA. The
.CC!C, or .m0edded Controller !tatusFCommand register, acts as two registers< a status register for reads
to this port and a command register for writes to this port. The .CC-ATA =.m0edded Controller -ata
register> acts as a port for transferring data 0etween the host C', and the em0edded controller.
14.2.1 Embedded Controller Status, EC_SC (R)
This is a read&onl( register that indicates the current status of the em0edded controller interface.
<it. <it- <itA <it( <it# <it& <it+ <it$
I;0 SMID17T SCID17T <2"ST CM5 I;0 I<6 3<6
Where<
%$N< %gnored
!M%C.DT< 4 I %ndicates !M% event is pending =re:uesting !M% :uer(>.
I No !M% events are pending.
!C%C.DT< 4 I %ndicates !C% event is pending =re:uesting !C% :uer(>.
I No !C% events are pending.
;,3!T< 4 I Controller is in 0urst mode for polled command processing.
I Controller is in normal mode for interrupt&driven command processing.
CM-< 4 I ;(te in data register is a command 0(te =onl( used 0( controller>.
I ;(te in data register is a data 0(te =onl( used 0( controller>.
%;5< 4 I %nput 0uffer is full =data read( for em0edded controller>.
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+4+ Advanced Configuration and 'ower %nterface !pecification
I %nput 0uffer is empt(.
2;5< 4 I 2utput 0uffer is full =data read( for host>.
I 2utput 0uffer is empt(.
The 2utput ;uffer 5ull =2;5> flag is set when the em0edded controller has written a 0(te of data into the
command or data port 0ut the host has not (et read it. After the host reads the status 0(te and sees the 2;5
flag set, the host reads the data port to get the 0(te of data that the em0edded controller has written. After
the host reads the data 0(te, the 2;5 flag is cleared automaticall( 0( hardware. This signals the em0edded
controller that the data has 0een read 0( the host and the em0edded controller is free to write more data to
the host.
The %nput ;uffer 5ull =%;5> flag is set when the host has written a 0(te of data to the command or data port,
0ut the em0edded controller has not (et read it. After the em0edded controller reads the status 0(te and sees
the %;5 flag set, the em0edded controller reads the data port to get the 0(te of data that the host has written.
After the em0edded controller reads the data 0(te, the %;5 flag is automaticall( cleared 0( hardware. This
is the signal to the host that the data has 0een read 0( the em0edded controller and that the host is free to
write more data to the em0edded controller.
The !C% event =!C%C.DT> flag is set when the em0edded controller has detected an internal event that
re:uires the operating s(stemMs attention. The em0edded controller sets this 0it in the status register, and
generates an !C% to 2!'M. 2!'M needs this 0it to differentiate command&complete !C%s from notification
!C%s. 2!'M uses the :uer( command to re:uest the cause of the !C%C.DT and take action. 5or more
information, see section 43.3, J.m0edded Controller Command !et.L>
The !M% event =!M%C.DT> flag is set when the em0edded controller has detected an internal event that
re:uires the s(stem management interrupt handlerMs attention. The em0edded controller sets this 0it in the
status register 0efore generating an !M%.
The ;urst =;,3!T> flag indicates that the em0edded controller has received the 0urst ena0le command
from the host, has halted normal processing, and is waiting for a series of commands to 0e sent from the
host. This allows 2!'M or s(stem management handler to :uickl( read and write several 0(tes of data at a
time without the overhead of !C%s 0etween the commands.
14.2.2 Embedded Controller Command, EC_SC (W)
This is a write&onl( register that allows commands to 0e issued to the em0edded controller. Writes to this
port are latched in the input data register and the input 0uffer full flag is set in the status register. Writes to
this location also cause the command 0it to 0e set in the status register. This allows the em0edded controller
to differentiate the start of a command se:uence from a data 0(te write operation.
14.2.3 Embedded Controller Data, EC_DATA (R/W)
This is a readFwrite register that allows additional command 0(tes to 0e issued to the em0edded controller,
and allows 2!'M to read data returned 0( the em0edded controller. Writes to this port 0( the host are
latched in the input data register, and the input 0uffer full flag is set in the status register. 3eads from this
register return data from the output data register and clear the output 0uffer full flag in the status register.
14.3 Embedded Controller Command Set
The em0edded controller command set allows 2!'M to communicate with the em0edded controllers.
AC'% defines the commands and their 0(te encodings for use with the em0edded controller that are shown
in the following ta0le.
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Ta!le +&-+ 1%!edded Controller Co%%ands
1%!edded Controller Co%%and Co%%and <)te 1ncoding
3ead .m0edded Controller =3-C.C> /8
Write .m0edded Controller =W3C.C> /84
;urst .na0le .m0edded Controller =;.C.C> /82
;urst -isa0le .m0edded Controller =;-C.C> /83
Guer( .m0edded Controller =G3C.C> /8"
14.3.1 Read Embedded Controller, RD_EC (0x80)
This command 0(te allows 2!'M to read a 0(te in the address space of the em0edded controller. This
command 0(te is reserved for e/clusive use 0( 2!'M, and it indicates to the em0edded controller to
generate !C%s in response to related transactions =that is, %;5\ or 2;5\4 in the .C !tatus 3egister>,
rather than !M%s. This command consists of a command 0(te written to the .m0edded Controller
Command register =.CC!C>, followed 0( an address 0(te written to the .m0edded Controller -ata register
=.CC-ATA>. The em0edded controller then returns the 0(te at the addressed location. The data is read at
the data port after the 2;5 flag is set.
14.3.2 Write Embedded Controller, WR_EC (0x81)
This command 0(te allows 2!'M to write a 0(te in the address space of the em0edded controller. This
command 0(te is reserved for e/clusive use 0( 2!'M, and it indicates to the em0edded controller to
generate !C%s in response to related transactions =that is, %;5\ or 2;5\4 in the .C !tatus 3egister>,
rather than !M%s. This command allows 2!'M to write a 0(te in the address space of the em0edded
controller. %t consists of a command 0(te written to the .m0edded Controller Command register =.CC!C>,
followed 0( an address 0(te written to the .m0edded Controller -ata register =.CC-ATA>, followed 0( a
data 0(te written to the .m0edded Controller -ata 3egister =.CC-ATA>K this is the data 0(te written at the
addressed location.
14.3.3 Burst Enable Embedded Controller, BE_EC (0x82)
This command 0(te allows 2!'M to re:uest dedicated attention from the em0edded controller and =e/cept
for critical events> prevents the em0edded controller from doing tasks other than receiving command and
data from the host processor =either the s(stem management interrupt handler or 2!'M>. This command is
an optimiHation that allows the host processor to issue several commands 0ack to 0ack, in order to reduce
latenc( at the em0edded controller interface. When the controller is in the 0urst mode, it should transition
to the 0urst disa0le state if the host does not issue a command within the following guidelines<
5irst Access I " microseconds
!u0se:uent Accesses I * microseconds each
Total ;urst Time I 4 millisecond
%n addition, the em0edded controller can disengage the 0urst mode at an( time to process a critical event. %f
the em0edded controller disa0les 0urst mode for an( reason other than the 0urst disa0le command, it should
generate an !C% to 2!'M to indicate the change.
While in 0urst mode, the em0edded controller follows these guidelines for 2!'M driver<
!C%s are generated as normal, including %;5\ and 2;5\4.
Accesses should 0e responded to within * microseconds.
;urst mode is entered in the following manner<
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+48 Advanced Configuration and 'ower %nterface !pecification
2!'M driver writes the ;urst .na0le .m0edded Controller, ;.C.C =/82> command 0(te and then the
.m0edded Controller will prepare to enter the ;urst mode. This includes processing an( routine activities
such that it should 0e a0le to remain dedicated to 2!'M interface for e 4 microsecond.
The .m0edded Controller sets the ;urst 0it of the .m0edded Controller !tatus 3egister, puts the ;urst
Acknowledge 0(te =/6> into the !C% output 0uffer, sets the 2;5 0it, and generates an !C% to signal
2!'M that it is in ;urst mode.
;urst mode is e/ited the following manner<
2!'M driver writes the ;urst -isa0le .m0edded Controller, ;-C.C =/83> command 0(te and then the
.m0edded Controller will e/it ;urst mode 0( clearing the ;urst 0it in the .m0edded Controller !tatus
register and generating an !C% signal =due to %;5\>.
The .m0edded Controller clears the ;urst 0it of the .m0edded Controller !tatus 3egister.
14.3.4 Burst Disable Embedded Controller, BD_EC (0x83)
This command 0(te releases the em0edded controller from a previous 0urst ena0le command and allows it
to resume normal processing. This command is sent 0( 2!'M or s(stem management interrupt handler
after it has completed its entire :ueued command se:uence to the em0edded controller.
14.3.5 Query Embedded Controller, QR_EC (0x84)
2!'M driver sends this command when the !C%C.DT flag in the .CC!C register is set. When the
em0edded controller has detected a s(stem event that must 0e communicated to 2!'M, it first sets the
!C%C.DT flag in the .CC!C register, generates an !C%, and then waits for 2!'M to send the :uer(
=G3C.C> command. 2!'M detects the em0edded controller !C%, sees the !C%C.DT flag set, and sends the
:uer( command to the em0edded controller. ,pon receipt of the G3C.C command 0(te, the em0edded
controller places a notification 0(te with a value 0etween &2**, indicating the cause of the notification.
The notification 0(te indicates which interrupt handler operation should 0e e/ecuted 0( 2!'M to process
the em0edded controller !C%. The :uer( value of Hero is reserved for a spurious :uer( result and indicates
Jno outstanding event.L
14.4 SMBus Host Controller Notifcation Header (Optional), OS_SMB_EVT
This :uer( command notification header is the special return code that indicates events with an !M;us
controller implemented within an em0edded controller. These events include<
Command completion
Command error
Alarm reception
The actual notification value is declared in the .C&!M;&@C device o0#ect in the AC'% Namespace.
14.5 Embedded Controller Firmware
The em0edded controller firmware must o0e( the following rules in order to 0e AC'%&compati0le<
SMI Processing. Although it is not e/plicitl( stated in the command specification section, a shared
em0edded controller interface has a separate command set for communicating with each environment
it plans to support. %n other words, the em0edded controller knows which environment is generating
the command re:uest, as well as which environment is to 0e notified upon event detection, and can
then generate the correct interrupts and notification values. This implies that a s(stem management
handler uses commands that parallel the functionalit( of all the commands for AC'% including :uer(,
read, write, and an( other implemented specific commands.
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SCI@SMI Task Kueuing. %f the s(stem design is sharing the interface 0etween 0oth a s(stem
management interrupt handler and 2!'M, the em0edded controller should alwa(s 0e prepared to
:ueue a notification if it receives a command. The em0edded controller onl( sets the appropriate event
flag in the status =.CC!C> register if the controller has detected an event that should 0e communicated
to the 2! or s(stem management handler. The em0edded controller must 0e a0le to field commands
from either environment without loss of the notification event. At some later time, the 2! or s(stem
management handler issues a :uer( command to the em0edded controller to re:uest the cause of the
notification event.
0otification Manage%ent. The use of the em0edded controller means using the :uer( =G3C.C>
command to notif( 2!'M of s(stem events re:uiring action. %f the em0edded controller is shared with
the operating s(stem, the !M% handler uses the !M%C.DT flag and an !M% :uer( command =not
defined in this document> to receive the event notifications. The em0edded controller doesnMt place
event notifications into the output 0uffer of a shared interface unless it receives a :uer( command from
2!'M or the s(stem management interrupt handler.
14.6 Interrupt Model
The .C %nterrupt Model uses pulsed interrupts to speed the clearing process. The %nterrupt is firmware
generated using an .C general&purpose output and has the waveform shown in 5igure 42&3. The em0edded
controller !C% is alwa(s wired directl( to a $'. input, and 2!'M driver treats this as an edge event =the
.C !C% $'. cannot 0e shared>.
T
7O-'
Interrupt detected
Interrupt ser9iced
and cleared
6igure +&-# 1C Interrupt :avefor%
14.6.1 Event Interrupt Model
The em0edded controller must generate !C%s for the events listed in the following ta0le.
Ta!le +&-& 1vents for :hich 1%!edded Controller Must ;enerate SCIs
1vent 5escription
%;5\ !ignals that the em0edded controller has read the last command or data from the
input 0uffer and the host is free to send more data.
2;5\4 !ignals that the em0edded controller has written a 0(te of data into the output
0uffer and the host is free to read the returned data.
!C%C.DT\4 !ignals that the em0edded controller has detected an event that re:uires 2!
attention. 2!'M should issue a :uer( =G3C.C> command to find the cause of the
event.
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14.6.2 Command Interrupt Model
The em0edded controller must generate !C%s for commands as follows<
"ead Command =3 ;(tes>
;(te Y4 =Command 0(te @eader> %nterrupt on %;5\
;(te Y2 =Address 0(te to read> No %nterrupt
;(te Y3 =-ata read to host> %nterrupt on 2;5\4
:rite Command =3 ;(tes>
;(te Y4 =Command 0(te @eader> %nterrupt on %;5\
;(te Y2 =Address 0(te to write> %nterrupt on %;5\
;(te Y3 =-ata to read > %nterrupt on %;5\
Kuer) Command =2 ;(tes>
;(te Y4 =Command 0(te @eader> No %nterrupt
;(te Y2 =Guer( value to host> %nterrupt on 2;5\4
<urst 1na!le Command =2 ;(tes>
;(te Y4 =Command 0(te @eader> No %nterrupt
;(te Y2 =;urst acknowledge 0(te> %nterrupt on 2;5\4
<urst 5isa!le Command =4 ;(te>
;(te Y4 =Command 0(te @eader> %nterrupt on %;5\
14.7 Embedded Controller Interfacing Algorithms
To initiate communications with the em0edded controller, 2!'M or s(stem management handler ac:uires
ownership of the interface. This ownership is ac:uired through the use of the $lo0al 1ock =descri0ed in
section *.2.4.4, J$lo0al 1ockL>, or is owned 0( default 0( 2!'M as a non&shared resource =and the
$lo0al 1ock is not re:uired for accessi0ilit(>.
After ownership is ac:uired, the protocol alwa(s consists of the passing of a command 0(te. The command
0(te will indicate the t(pe of action to 0e taken. 5ollowing the command 0(te, Hero or more data 0(tes can
0e e/changed in either direction. The data 0(tes are defined according to the command 0(te that is
transferred.
The em0edded controller also has two status 0its that indicate whether the registers have 0een read. This is
used to ensure that the host or em0edded controller has received data from the em0edded controller or host.
When the host writes data to the command or data register of the em0edded controller, the input 0uffer flag
=%;5> in the status register is set within 4 microsecond. When the em0edded controller reads this data from
the input 0uffer, the input 0uffer flag is reset. When the em0edded controller writes data into the output
0uffer, the output 0uffer flag =2;5> in the status register is set. When the host processor reads this data
from the output 0uffer, the output 0uffer flag is reset.
14.8 Embedded Controller Description Information
Certain aspects of the em0edded controllerMs operation have 2.M&defina0le values associated with them.
The following is a list of values that are defined in the software la(ers of the AC'% specification<
!tatus flag indicating whether the interface re:uires the use of the $lo0al 1ock.
;it position of em0edded controller interrupt in general&purpose status register.
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-ecode address for commandFstatus register.
-ecode address for data register.
;ase address and :uer( value of an( .C&!M;us controller.
5or implementation details of the a0ove listed information, see sections 42.44, J-efining an .m0edded
Controller -evice in AC'% Namespace,L and 42.42, J-efining an .C !M;us @ost Controller in AC'%
Namespace.L
An em0edded controller will re:uire the inclusion of the $1E method in its AC'% namespace if potentiall(
contentious accesses to device resources are performed 0( non&2! code. !ee section +.*.9, JC$1E =$lo0al
1ock>L for details a0out the C$1E method.
14.9 SMBus Host Controller Interface via Embedded Controller
This section specifies a standard interface that an AC'%&compati0le 2! can use to communicate with
em0edded controller&0ased !M;us host controllers =.C&!M;&@C>. This interface allows the host
processor =under control of 2!'M> to manage devices on the !M;us. T(pical devices residing on the
!M;us include !mart ;atteries, !mart ;atter( Chargers, contrastF0acklight control, and temperature
sensors.
The .C&!M;&@C interface consists of a 0lock of registers that reside in em0edded controller space. These
registers are used 0( software to initiate !M;us transactions and receive !M;us notifications. ;( using a
well&defined register set, 2! software can 0e written to operate with an( vendorMs em0edded controller
hardware.
Certain !M;us segments have special re:uirements that the host controller filters certain !M;us
commands =for e/ample, to prevent an errant application or virus from potentiall( damaging the 0atter(
su0s(stem>. This is most easil( accomplished 0( implementing the host interface controller through an
em0edded controllerPas em0edded controller can easil( filter out potentiall( pro0lematic commands.
Notice that an .C&!M;&@C interface will re:uire the inclusion of the $1E method in its AC'% namespace
if potentiall( contentious accesses to device resources are performed 0( non&2! code. !ee section +.*.9,
JC$1E =$lo0al 1ock>L for details on using the C$1E method.
14.9.1 Register Description
The .C&!M;us host interface is a flat arra( of registers that are arranged se:uentiall( in the em0edded
controller address space.
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14.9.1.1
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Status Register, SMB_STS
This register indicates general status on the !M;us. This includes !M;&@C command completion status,
alarm received status, and error detection status =the error codes are defined later in this section>. This
register is cleared to Heroes =e/cept for the A13M 0it> whenever a new command is issued using a write to
the protocol =!M;C'3TC1> register. This register is alwa(s written with the error code 0efore clearing the
protocol register. The !M;&@C :uer( event =that is, an !M;&@C interrupt> is raised after the clearing of
the protocol register.
0oteH 2!'M must ensure the A13M 0it is cleared after it has 0een serviced 0( writing OM to the
!M;C!T! register.
<it. <it- <itA <it( <it# <it& <it+ <it$
5301 AL"M "1S STAT2S
Where<
-2N.< %ndicates the last command has completed and no error.
A13M< %ndicates an !M;us alarm message has 0een received.
3.!< 3eserved
!TAT,!< %ndicates !M;us communication status for one of the reasons listed in the following
ta0le.
Ta!le +&-# SM<us Status Codes
Status
Code 0a%e 5escription
h !M;us 2E %ndicates the transaction has 0een successfull( completed.
9h !M;us ,nknown 5ailure %ndicates failure 0ecause of an unknown !M;us error.
4h !M;us -evice Address
Not Acknowledged
%ndicates the transaction failed 0ecause the slave device address was
not acknowledged.
44h !M;us -evice .rror
-etected
%ndicates the transaction failed 0ecause the slave device signaled an
error condition.
42h !M;us -evice Command
Access -enied
%ndicates the transaction failed 0ecause the !M;us host does not
allow the specific command for the device 0eing addressed. 5or
e/ample, the !M;us host might not allow a caller to ad#ust the !mart
;atter( ChargerMs output.
43h !M;us ,nknown .rror %ndicates the transaction failed 0ecause the !M;us host encountered
an unknown error.
49h !M;us -evice Access
-enied
%ndicates the transaction failed 0ecause the !M;us host does not
allow access to the device addressed. 5or e/ample, the !M;us host
might not allow a caller to directl( communicate with an !M;us
device that controls the s(stemMs power planes.
48h !M;us Timeout %ndicates the transaction failed 0ecause the !M;us host detected a
timeout on the 0us.
46h !M;us @ost ,nsupported
'rotocol
%ndicates the transaction failed 0ecause the !M;us host does not
support the re:uested protocol.
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Status
Code 0a%e 5escription
4Ah !M;us ;us( %ndicates that the transaction failed 0ecause the !M;us host reports
that the !M;us is presentl( 0us( with some other transaction. 5or
e/ample, the !mart ;atter( might 0e sending charging information to
the !mart ;atter( Charger.
45h !M;us '.C =C3C&8>
.rror
%ndicates that a 'acket .rror Checking ='.C> error occurred during
the last transaction.
All other error codes are reserved.
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14.9.1.2
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Protocol Register, SMB_PRTCL
This register determines the t(pe of !M;us transaction generated on the !M;us. %n addition to indicating
the protocol t(pe to the !M;&@C, a write to this register initiates the transaction on the !M;us. Notice that
0it 9 of the protocol value is used to indicate whether packet error checking should 0e emplo(ed. A value of
4 =one> in this 0it indicates that '.C format should 0e used for the specified protocol, and a value of
=Hero> indicates the standard =non&'.C> format should 0e used.
<it. <it- <itA <it( <it# <it& <it+ <it$
P1C P"3T3C3L
Where<
'32T2C21< / I Controller Not %n ,se
/4 I 3eserved
/2 I Write Guick Command
/3 I 3ead Guick Command
/" I !end ;(te
/* I 3eceive ;(te
/+ I Write ;(te
/9 I 3ead ;(te
/8 I Write Word
/6 I 3ead Word
/A I Write ;lock
/; I 3ead ;lock
/C I 'rocess Call
/- I ;lock Write&;lock 3ead 'rocess Call
5or e/ample, the protocol value of /6 would 0e used to communicate to a device that supported the
standard read word protocol. %f this device also supported packet error checking for this protocol, a value of
/86 =read word wit1 P*C> could optionall( 0e used. !ee the !M;us specification for more information on
packet error checking.
When 2!'M initiates a new command such as write to the !M;C'3TC1 register, the !M;us controller
first updates the !M;C!T! register and then clears the !M;C'3TC1 register. After the !M;C'3TC1
register is cleared, the host controller :uer( value is raised.
All other protocol values are reserved.
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14.9.1.3
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Address Register, SMB_ADDR
This register contains the 9&0it address to 0e generated on the !M;us. This is the first 0(te to 0e sent on the
!M;us for all of the different protocols.
<it. <it- <itA <it( <it# <it& <it+ <it$
A55"1SS >A-HA$? "1S
Where<
3.!< 3eserved
A--3.!!< 9&0it !M;us address. This address is not Hero aligned =in other words, it is onl( a 9&
0it address =A+<A> that is aligned from 0it 4&9>.
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14.9.1.4
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Command Register, SMB_CMD
This register contains the command 0(te that will 0e sent to the target device on the !M;us and is used for
the following protocols< send 0(te, write 0(te, write word, read 0(te, read word, process call, 0lock read
and 0lock write. %t is not used for the :uick commands or the receive 0(te protocol, and as such, its value is
a JdonMt careL for those commands.
<it. <it- <itA <it( <it# <it& <it+ <it$
C3MMA05
Where<
C2MMAN-< Command 0(te to 0e sent to !M;us device.
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14.9.1.5
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Data Register Array, SMB_DATA[i], i=0-31
This 0ank of registers contains the remaining 0(tes to 0e sent or received in an( of the different protocols
that can 0e run on the !M;us. The !M;C-ATAViW registers are defined on a per&protocol 0asis and, as
such, provide efficient use of register space.
<it. <it- <itA <it( <it# <it& <it+ <it$
5ATA
Where<
-ATA< 2ne 0(te of data to 0e sent or received =depending upon protocol>.
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14.9.1.6
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Block Count Register, SMB_BCNT
This register contains the num0er of 0(tes of data present in the !M;C-ATAViW registers preceding an(
write 0lock and following an( read 0lock transaction. The data siHe is defined on a per protocol 0asis.
<it. <it- <itA <it( <it# <it& <it+ <it$
"1S <C0T
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14.9.1.7
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Alarm Address Register, SMB_ALRM_ADDR
This register contains the address of an alarm message received 0( the host controller, at slave address /8,
from the !M;us master that initiated the alarm. The address indicates the slave address of the device on the
!M;us that initiated the alarm message. The status of the alarm message is contained in the
!M;CA13MC-ATA/ registers. 2nce an alarm message has 0een received, the !M;&@C will not receive
additional alarm messages until the A13M status 0it is cleared.
<it. <it- <itA <it( <it# <it& <it+ <it$
A55"1SS >A-HA$? "1S
Where<
3.!< 3eserved
A--3.!!< !lave address =A+<A> of the !M;us device that initiated the !M;us alarm message.
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14.9.1.8
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14.9.1.8
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Alarm Data Registers, SMB_ALRM_DATA[0], SMB_ALRM_DATA[1]
These registers contain the two data 0(tes of an alarm message received 0( the host controller, at slave
address /8, from the !M;us master that initiated the alarm. These data 0(tes indicate the specific reason
for the alarm message, such that 2!'M can take actions. 2nce an alarm message has 0een received, the
!M;&@C will not receive additional alarm messages until the A13M status 0it is cleared.
<it. <it- <itA <it( <it# <it& <it+ <it$
5ATA >5.H5$?
Where<
-ATA< -ata 0(te received in alarm message.
The alarm address and alarm data registers are not read 0( 2!'M until the alarm status 0it is set. 2!'M
driver then reads the 3 0(tes, and clears the alarm status 0it to indicate that the alarm registers are now
availa0le for the ne/t event.
14.9.2 Protocol Description
This section descri0es how to initiate the different protocols on the !M;us through the interface descri0ed
in section 43.6.4, J3egister -escriptions.L The registers should all 0e written with the appropriate values
0efore writing the protocol value that starts the !M;us transaction. All transactions can 0e completed in
one pass.
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14.9.2.1
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Write Quick
5ata SentH
!M;CA--3< Address of !M;us device.
!M;C'3TC1< Write /2 to initiate the write :uick protocol.
5ata "eturnedH
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
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14.9.2.2
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Read Quick
5ata SentH
!M;CA--3< Address of !M;us device.
!M;C'3TC1< Write /3 to initiate the read :uick protocol.
5ata "eturnedH
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
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14.9.2.3
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14.9.2.3
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Send Byte
5ata SentH
!M;CA--3< Address of !M;us device.
!M;CCM-< Command 0(te to 0e sent.
!M;C'3TC1< Write /" to initiate the send 0(te protocol, or /8" to initiate the send 0(te
protocol with '.C.
5ata "eturnedH
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
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14.9.2.4
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Receive Byte
5ata SentH
!M;CA--3< Address of !M;us device.
!M;C'3TC1< Write /* to initiate the receive 0(te protocol, or /8* to initiate the receive 0(te
protocol with '.C.
5ata "eturnedH
!M;C-ATAVW< -ata 0(te received.
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
14.9.2.5
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Write Byte
5ata SentH
!M;CA--3< Address of !M;us device.
!M;CCM-< Command 0(te to 0e sent.
!M;C-ATAVW< -ata 0(te to 0e sent.
!M;C'3TC1< Write /+ to initiate the write 0(te protocol, or /8+ to initiate the write 0(te
protocol with '.C.
5ata "eturnedH
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
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14.9.2.6
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14.9.2.6
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Read Byte
5ata SentH
!M;CA--3< Address of !M;us device.
!M;CCM-< Command 0(te to 0e sent.
!M;C'3TC1< Write /9 to initiate the read 0(te protocol, or /89 to initiate the read 0(te
protocol with '.C.
5ata "eturnedH
!M;C-ATAVW< -ata 0(te received.
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
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14.9.2.7
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Write Word
5ata SentH
!M;CA--3< Address of !M;us device.
!M;CCM-< Command 0(te to 0e sent.
!M;C-ATAVW< 1ow data 0(te to 0e sent.
!M;C-ATAV4W< @igh data 0(te to 0e sent.
!M;C'3TC1< Write /8 to initiate the write word protocol, or /88 to initiate the write word
protocol with '.C.
5ata "eturnedH
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
14.9.2.8
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Read Word
5ata SentH
!M;CA--3< Address of !M;us device.
!M;CCM-< Command 0(te to 0e sent.
!M;C'3TC1< Write /6 to initiate the read word protocol, or /86 to initiate the read word
protocol with '.C.
5ata "eturnedH
!M;C-ATAVW< 1ow data 0(te received.
!M;C-ATAV4W< @igh data 0(te received.
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
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14.9.2.9
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14.9.2.9
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Write Block
5ata SentH
!M;CA--3< Address of !M;us device.
!M;CCM-< Command 0(te to 0e sent.
!M;C-ATAV&34W< -ata 0(tes to write =4&32>.
!M;C;CNT< Num0er of data 0(tes =4&32> to 0e sent.
!M;C'3TC1< Write /A to initiate the write 0lock protocol, or /8A to initiate the write 0lock
protocol with '.C.
5ata "eturnedH
!M;C'3TC1< / to indicate command completion.
!M;C!T!< !tatus code for transaction.
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14.9.2.10
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Read Block
5ata SentH
!M;CA--3< Address of !M;us device.
!M;CCM-< Command 0(te to 0e sent.
!M;C'3TC1< Write /; to initiate the read 0lock protocol, or /8; to initiate the read 0lock
protocol with '.C.
5ata "eturnedH
!M;C;CNT< Num0er of data 0(tes =4&32> received.
!M;C-ATAV&34W< -ata 0(tes received =4&32>.
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
14.9.2.11
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Process Call
5ata SentH
!M;CA--3< Address of !M;us device.
!M;CCM-< Command 0(te to 0e sent.
!M;C-ATAVW< 1ow data 0(te to 0e sent.
!M;C-ATAV4W< @igh data 0(te to 0e sent.
!M;C'3TC1< Write /C to initiate the process call protocol, or /8C to initiate the process call
protocol with '.C.
5ata "eturnedH
!M;C-ATAVW< 1ow data 0(te received.
!M;C-ATAV4W< @igh data 0(te received.
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
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14.9.2.12
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Block Write-Block Read Process Call
5ata SentH
!M;CA--3< Address of !M;us device.
!M;CCM-< Command 0(te to 0e sent.
!M;C-ATAV&34W< -ata 0(tes to write =4&34>.
!M;C;CNT< Num0er of data 0(tes =4&34> to 0e sent.
!M;C'3TC1< Write /- to initiate the write 0lock&read 0lock process call protocol, or /8- to
initiate the write 0lock&read 0lock process call protocol with '.C.
5ata "eturnedH
!M;C;CNT< Num0er of data 0(tes =4&34> received.
!M;C-ATAV&34W< -ata 0(tes received =4&34>.
!M;C!T!< !tatus code for transaction.
!M;C'3TC1< / to indicate command completion.
0oteH The following restrictions appl(< The aggregate data length of the write and read 0locks must not
e/ceed 32 0(tes and each 0lock =write and read> must contain at least 4 0(te of data.
14.9.3 SMBus Register Set
The register set for the !M;&@C has the following format. All registers are 8 0it.
Ta!le +&-( SM< 1C Interface
L3CATI30 "1;IST1" 0AM1 51SC"IPTI30
;A!.Z !M;C'3TC1 'rotocol register
;A!.Z4 !M;C!T! !tatus register
;A!.Z2 !M;CA--3 Address register
;A!.Z3 !M;CCM- Command register
;A!.Z" !M;C-ATAVW -ata register Hero
;A!.Z* !M;C-ATAV4W -ata register one
;A!.Z+ !M;C-ATAV2W -ata register two
;A!.Z9 !M;C-ATAV3W -ata register three
;A!.Z8 !M;C-ATAV"W -ata register four
;A!.Z6 !M;C-ATAV*W -ata register five
;A!.Z4 !M;C-ATAV+W -ata register si/
;A!.Z44 !M;C-ATAV9W -ata register seven
;A!.Z42 !M;C-ATAV8W -ata register eight
;A!.Z43 !M;C-ATAV6W -ata register nine
;A!.Z4" !M;C-ATAV4W -ata register ten
;A!.Z4* !M;C-ATAV44W -ata register eleven
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++" Advanced Configuration and 'ower %nterface !pecification
Ta!le +&-( SM< 1C Interface (continued)
;A!.Z4+ !M;C-ATAV42W -ata register twelve
;A!.Z49 !M;C-ATAV43W -ata register thirteen
;A!.Z48 !M;C-ATAV4"W -ata register fourteen
;A!.Z46 !M;C-ATAV4*W -ata register fifteen
;A!.Z2 !M;C-ATAV4+W -ata register si/teen
;A!.Z24 !M;C-ATAV49W -ata register seventeen
;A!.Z22 !M;C-ATAV48W -ata register eighteen
;A!.Z23 !M;C-ATAV46W -ata register nineteen
;A!.Z2" !M;C-ATAV2W -ata register twent(
;A!.Z2* !M;C-ATAV24W -ata register twent(&one
;A!.Z2+ !M;C-ATAV22W -ata register twent(&two
;A!.Z29 !M;C-ATAV23W -ata register twent(&three
;A!.Z28 !M;C-ATAV2"W -ata register twent(&four
;A!.Z26 !M;C-ATAV2*W -ata register twent(&five
;A!.Z3 !M;C-ATAV2+W -ata register twent(&si/
;A!.Z34 !M;C-ATAV29W -ata register twent(&seven
;A!.Z32 !M;C-ATAV28W -ata register twent(&eight
;A!.Z33 !M;C-ATAV26W -ata register twent(&nine
;A!.Z3" !M;C-ATAV3W -ata register thirt(
;A!.Z3* !M;C-ATAV34W -ata register thirt(&one
;A!.Z3+ !M;C;CNT ;lock Count 3egister
;A!.Z39 !M;CA13MCA--3 Alarm address
;A!.Z38 !M;CA13MC-ATAVW Alarm data register Hero
;A!.Z36 !M;CA13MC-ATAV4W Alarm data register one
14.10 SMBus Devices
The em0edded controller interface provides the s(stem with a standard method to access devices on the
!M;us. %t does not define the data andFor access protocol=s> used 0( an( particular !M;us device. 5urther,
the em0edded controller can =and pro0a0l( will> serve as a gatekeeper to prevent accidental or malicious
access to devices on the !M;us.
!ome !M;us devices are defined 0( their address and a specification that descri0es the data and the
protocol used to access that data. 5or e/ample, the !mart ;atter( !(stem devices are defined 0( a series of
specifications including<
!mart ;atter( -ata specification
!mart ;atter( Charger specification
!mart ;atter( !elector specification
!mart ;atter( !(stem Manager specification
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%nde/ ++*
The em0edded controller can also 0e used to emulate =in part or totall(> an( !M;us device.
14.10.1 SMBus Device Access Restrictions
%n some cases, the em0edded controller interface will not allow access to a particular !M;us device. !ome
!M;us devices can and do communicate directl( 0etween themselves. ,ne/pected accesses can interfere
with their normal operation and cause unpredicta0le results.
14.10.2 SMBus Device Command Access Restriction
There are cases where part of an !M;us deviceMs commands are pu0lic while others are private. ./traneous
attempts to access these commands might cause interference with the !M;us deviceMs normal operation.
The !mart ;atter( and the !mart ;atter( Charger are good e/amples of devices that should not have their
entire command set e/posed. The !mart ;atter( commands the !mart ;atter( Charger to suppl( a specific
charging voltage and charging current. Attempts 0( an(one to alter these values can cause damage to the
0atter( or the mo0ile s(stem. To protect the s(stemMs integrit(, the em0edded controller interface can
restrict access to these commands 0( returning one of the following error codes< -evice Command Access
-enied =/42> or -evice Access -enied =/49>.
14.11 Defning an Embedded Controller Device in ACPI Namespace
An em0edded controller device is created using the named device o0#ect. The em0edded controllerMs device
o0#ect re:uires the following elements<
Ta!le +&-A 1%!edded Controller 5evice 3!Cect Control Methods
3!Cect 5escription
CC3! Named o0#ect that returns the .m0edded ControllerMs current resource settings. .m0edded
Controllers are considered static resourcesK hence onl( return their defined resources. The
em0edded controller resides onl( in s(stem %F2 or memor( space. The first address region
returned is the data port, and the second address region returned is the statusFcommand port for
the em0edded controller. C3! is a standard device configuration control method defined in
section +.2.4, JCC3! =Current 3esource !ettings>.L
C@%- Named o0#ect that provides the .m0edded ControllerMs 'lug and 'la( identifier. This value is
set to 'N'C6. C@%- is a standard device configuration control method defined in section
+.4.", JC@%- =@ardware %->.L
C$'. Named 20#ect that evaluates to either an integer or a package. %f C$'. evaluates to an integer,
the value is the 0it assignment of the !C% interrupt within the $'./C!T! register of a $'.
0lock descri0ed in the 5A-T that the em0edded controller will trigger.
%f C$'. evaluates to a package, then that package contains two elements. The first is an o0#ect
reference to the $'. ;lock device that contains the $'. register that will 0e triggered 0( the
em0edded controller. The second element is numeric =integer> that specifies the 0it assignment
of the !C% interrupt within the $'./C!T! register of the $'. ;lock device referenced 0( the
first element in the package. This control method is specific to the em0edded controller.
14.11.1 Example: EC Defnition ASL Code
./ample A!1 code that defines an em0edded controller device is shown 0elow<
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+++ Advanced Configuration and 'ower %nterface !pecification
Device(%)()
// PnP #D
!ame(_"#D$ %#S&#D('P!P()(H*))
// Return2 the ')urrent Re2ource2* of %)
!ame(_)RS$
Re2ource<emplate() // port (-I3 and (-II
#0(Decode4I$ (-I3$ (-I3$ ($ 4)$
#0(Decode4I$ (-II$ (-II$ ($ 4)
/
)
// Define that the %) S)# i2 bit ( of the :P_S<S re,i2ter
!ame(_:P%$ ()
0perationRe,ion(%)0R$ %mbedded)ontrol$ ($ (-55)
5ield(%)0R$ B1te&cc$ 6oc+$ Pre2erve)
// 5ield definition2 ,o here
/
/
14.12 Defning an EC SMBus Host Controller in ACPI Namespace
An .C&!M;&@C device is defined using the named device o0#ect. The .C&!M;& @CMs device o0#ect
re:uires the following elements<
Ta!le +&-- 1C SM<us HC 5evice 3!Cects
3!Cect 5escription
C@%- Named o0#ect that provides the .C&!M;& @CMs 'lug and 'la( identifier. This value is 0e set to
AC'%4. C@%- is a standard device configuration control method defined in section +.4.",
JC@%- =@ardware %->.L
C.C Named o0#ect that evaluates to a W23- that defines the !M;us attri0utes needed 0( the
!M;us driver. C.C is the .m0edded Controller 2ffset Guer( Control Method. The most
significant 0(te is the address offset in em0edded controller space of the !M;us controllerK the
least significant 0(te is the :uer( value for all !M;us events.
14.12.1 Example: EC SMBus Host Controller ASL-Code
./ample A!1 code that defines an !M;&@C from within an em0edded controller device is shown 0elow<
Device(%)()
!ame(_"#D$ %#S&#D(PP!P()(HP))
!ame(_)RS$ Re2ource<emplate()
#0(Decode4I$ (-I3$ (-I3$ ($ 4)$ // Statu2 port
#0(Decode4I$ (-II$ (-II$ ($ 4) // command port
/)
!ame(_:P%$ ()
Device (S;B()
// S#7% L SiCe (number of b1te2) of the bloc+ data read from 56D4Y
// D&<& L Bloc+ data read from 56D4Y
/
/[ Write the bloc+ `<%S<] to the device u2in, command value 3 [/
Store('<%S<*$ D&<&) // Save '<%S<* into the data buffer
Store(.$ S#7%) // 6en,th of valid data in the data buffer
Store(BX55$ 56D3) // #nvo+e a Write Word tran2action
%n this e/ample, three field elements =51-, 51-4, and 51-2> are defined to represent the virtual registers
for command values , 4, and 2. Access to an( of the field elements will cause an !M;us transaction to
occur to the device. 3eading 51-4 results in a 3ead ;lock with a command value of 4, and writing to
51-2 results in a Write ;lock with command value 2.
15.7.6 Word Process Call (SMBProcessCall)
The !M;us 'rocess Call protocol =!M;'rocessCall> transfers 2 0(tes of data 0i&directionall( =performs a
Write Word followed 0( a 3ead Word as an atomic transaction>. This protocol uses a command value to
reference up to 2*+ word&siHed virtual registers.
The following A!1 code illustrates how a device supporting the 'rocess Call protocol should 0e accessed<
0perationRe,ion(S;BD$ S;Bu2$ (-.3(($ (-4(() // S;Bu2 device at 2lave addre22 (-.3
5ield(S;BD$ Buffer&cc$ !o6oc+$ Pre2erve)
StartDependent5n (4$ 4)
!ame (<emp$**)
Store (&r,($ <emp) // could have u2ed &r,4
Return (SiCe0f ()oncatenate (Parm4$ <emp)))
/
This declaration is e:uivalent to<
;ethod (%R&;$ 3$ !otSerialiCed$ ($ #nt0b9$ Strin,0b9$ #nt0b9$Strin,0b9//)
Y
/
19.5.50 If (Conditional Execution)
S)ntax
If 'Predicate( )<erm6i2t/
Argu%ents
Predicate is evaluated as an %nteger.
5escription
%f the Predicate is non&Hero, the term list of the If term is e/ecuted.
1xa%ple
The following e/amples all check for 0it 3 in Local$ 0eing set, and clear it if set.
// e-ample 4
#f (&nd (6ocal($ .))
R0r (6ocal($ .$ 6ocal()
/
// e-ample 3
Store (.$ 6ocal3)
#f (&nd (6ocal($ 6ocal3))
R0r (6ocal($ 6ocal3$ 6ocal()
/
19.5.51 Include (Include Additional ASL File)
S)ntax
Inclu"e 'FilePat")a#e(
Argu%ents
&ilePat1name is a !tring-ata data t(pe that contains the full 2! file s(stem path.
5escription
%nclude another file that contains A!1 terms to 0e inserted in the current file of A!1 terms. The file must
contain elements that are grammaticall( correct in the current scope.
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1xa%ple
#nclude (Pdataob9.a2lP)
19.5.52 Increment (Integer Increment)
S)ntax
Incre2ent '+ddend( LB #nte,er
Argu%ents
Addend is evaluated as an %nteger.
5escription
Add one to the Addend and place the result 0ack in Addend. .:uivalent to Add >Addend, 4, Addend?.
2verflow conditions are ignored and the result of an overflow is Hero.
19.5.53 Index (Indexed Reference To Member Object)
S)ntax
In"e= 'Source% $ndex% !estination( LB 0b9ectReference
Argu%ents
So'rce is evaluated to a 0uffer, string, or package data t(pe. Index is evaluated to an integer. The reference
to the nth o0#ect =where n \ Index> within So'rce is optionall( stored as a reference into Destination!
5escription
When So'rce evaluates to a ;uffer, %nde/ returns a reference to a ;uffer 5ield containing the nth 0(te in the
0uffer. When So'rce evaluates to a !tring, %nde/ returns a reference to a ;uffer 5ield containing the nth
character in the string. When So'rce evaluates to a 'ackage, %nde/ returns a reference to the nth o0#ect in
the package.
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968 Advanced Configuration and 'ower %nterface !pecification
19.5.53.1
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Index with Packages
The following e/ample A!1 code shows a wa( to use the Index term to store into a local varia0le the si/th
element of the first package of a set of nested packages<
!ame (#0(D$ Pac+a,e ()
Pac+a,e ()
(-(4$ (-(F5=$ (-(F5=$ (-(4$ (-(=$ (-(4$ (-3G$ (-55$ (-5%$ (-(($ (-((
/$
Pac+a,e ()
(-(4$ (-(35=$ (-(35=$ (-(4$ (-(=$ (-(4$ (-3G$ (-55$ (-B%$ (-(($ (-((
/$
Pac+a,e ()
(-(4$ (-(F%=$ (-(F%=$ (-(4$ (-(=$ (-(4$ (-3G$ (-55$ (-5&$ (-(($ (-((
/$
Pac+a,e ()
-(4$ (-(3%=$ (-(3%=$ (-(4$ (-(=$ (-(4$ (-3G$ (-55$ (-B&$ (-(($ (-((
/$
Pac+a,e()
(-(4$ (-(4(($ (-(F5=$ (-(=$ (-(=$ (-(3$ (-3G$ (-3($ (-T5$ (-(($ (-(($
/
/)
// :et the Ith element of the fir2t pac+a,e
Store (DeRef0f (#nde- (DeRef0f (#nde- (#0(D$ ())$ G))$ 6ocal()
0oteH 5e"ef3f is necessar( in the first operand of the Store operator in order to get the actual o0#ect,
rather than #ust a reference to the o0#ect. %f 5e"ef3f were not used, then 1ocal would contain an o0#ect
reference to the si/th element in the first package rather than the num0er 4.
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8 Advanced Configuration and 'ower %nterface !pecification
19.5.53.2
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Index with Bufers
The following e/ample A!1 code shows a wa( to store into the third 0(te of a 0uffer<
!ame (BX55$ Buffer () (-(4$ (-(3$ (-(F$ (-(.$ (-(G/)
// Store (-GG into the third b1te of the buffer
Store ((-GG$ #nde- (BX55$ 3))
The Index operator returns a reference to an 8&0it ;uffer 5ield =similar to that created using
Create<)te6ield>.
%f So'rce is evaluated to a 0uffer data t(pe, the =b:ect$eference refers to the 0(te at Index within So'rce. %f
So'rce is evaluated to a 0uffer data t(pe, a Store operation will onl( change the 0(te at Index within
So'rce.
The following e/ample A!1 code shows the results of a series of Store operations<
!ame (SR)B$ Buffer () (-4($ (-3($ (-F($ (-.(/)
!ame (BX55$ Buffer () (-4$ (-3$ (-F$ (-./)
The following will store /98 into the 3
rd
0(te of the destination 0uffer<
Store ((-43F.GIT=$ #nde- (BX55$ 3))
The following will store /4 into the 2
nd
0(te of the destination 0uffer<
Store (SR)B$ #nde- (BX55$ 4))
The following will store /"4 =an OAM> into the "
th
0(te of the destination 0uffer<
Store ('&B)D%5:"*$ #nde- (BX55$ F))
Co%pati!ilit) 0oteH 5irst introduced in AC'% 2.. %n AC'% 4., the 0ehavior of storing data larger than 8&
0its into a 0uffer using %nde/ was undefined.
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82 Advanced Configuration and 'ower %nterface !pecification
19.5.53.3
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Index with Strings
The following e/ample A!1 code shows a wa( to store into the 3
rd
character in a string<
!ame (S<R$ '&B)D%5:"#ZA6*)
// Store `"] ((-.=) into the third character to the 2trin,
Store ('"*$ #nde- (S<R$ 3))
The Index operator returns a reference to an 8&0it ;uffer 5ield =similar to that created using
Create<)te6ield>.
Co%pati!ilit) 0oteH 5irst introduced in AC'% 2..
19.5.54 IndexField (Declare Index/Data Fields)
S)ntax
In"e=D1el" '$ndex)a#e% !ata)a#e% +ccessTye% Loc,Rule% -dateRule(
)5ieldXnit6i2t/
Argu%ents
Index;ame and Data;ame refer to field unit o0#ects. AccessType, ,oc3$'le, Bpdate$'le, and &ield,ist are
the same format as the 6ield term.
5escription
Creates a series of named data o0#ects whose data values are fields within a larger o0#ect accessed 0( an
inde/Fdata&st(le reference to Index;ame and Data;ame.
This encoding is used to define named data o0#ects whose data values are fields within an inde/Fdata
register pair. This provides a simple wa( to declare register varia0les that occur 0ehind a t(pical inde/ and
data register pair.
Accessing the contents of an inde/ed field data o0#ect will automaticall( occur through the Data;ame
o0#ect 0( using an Index;ame o0#ect aligned on an AccessType 0oundar(, with s(nchroniHation occurring
on the operation region that contains the inde/ data varia0le, and on the $lo0al 1ock if specified 0(
,oc3$'le.
1xa%ple
The following is a 0lock of A!1 sample code using Index6ield#
Creates an inde/Fdata register in s(stem %F2 space made up of 8&0it registers.
Creates a 5.T field within the inde/ed range.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8" Advanced Configuration and 'ower %nterface !pecification
;ethod (%R4)
// Define a 3GIEb1te operational re,ion in S12tem#0 2pace
// and name it :#0(
0perationRe,ion (:#0($ 4$ (-43G$ (-4(()
// )reate a field named Pre2erve 2tructured a2 a 2e8uence
// of inde- and data b1te2
5ield (:#0($ B1te&cc$ !o6oc+$ Write&27ero2)
#DR($ =$
D&<($ =$
.
.
.
/
// )reate an #nde-5ield within #DR( V D&<( which ha2
// 5%<2 in the fir2t two bit2 of inde-ed off2et ($
// and another 3 5%<2 in the hi,h bit on inde-ed
// 35 and the low bit of inde-ed off2et F(
#nde-5ield (#DR($ D&<($ B1te&cc$ !o6oc+$ Pre2erve)
5%<($ 4$
5%<4$ 4$
0ff2et ((-3f)$ // 2+ip to b1te off2et 3f
$ T$ // 2+ip another T bit2
5%<F$ 4$
5%<.$ 4
/
// )lear 5%<F (inde- 35$ bit T)
Store (7ero$ 5%<F)
/ // %nd %R4
19.5.55 Interrupt (Interrupt Resource Descriptor Macro)
S)ntax
Interrupt 'Resource-sage% 0dgeLevel% +ctiveLevel% S"ared%
ResourceSource$ndex% ResourceSource% !escritor)a#e( )#nterrupt6i2t/ LB
Buffer
Argu%ents
$eso'rceBsage descri0es whether the device consumes the specified interrupt ="esourceConsu%er> or
produces it for use 0( a child device ="esourceProducer>. %f nothing is specified, then 3esourceConsumer
is assumed.
*dge,e2el descri0es whether the interrupt is edge triggered =1dge> or level triggered =Level>. The field
Descriptor;ame. C@. is automaticall( created to refer to this portion of the resource descriptor, where O4M
is .dge and OM is 1evel.
Acti2e,e2el descri0es whether the interrupt is active&high =ActiveHigh> or active&low =ActiveLow>. The
field Descriptor;ame. C11 is automaticall( created to refer to this portion of the resource descriptor, where
O4M is Active@igh and OM is Active1ow.
S1ared descri0es whether the interrupt can 0e shared with other devices =Shared> or not =1xclusive>. The
field Descriptor;ame. C!@3 is automaticall( created to refer to this portion of the resource descriptor,
where O4M is !hared and OM is ./clusive. %f nothing is specified, then ./clusive is assumed.
$eso'rceSo'rceIndex evaluates to an integer 0etween / and /55 and descri0es the resource source
inde/. %f it is not specified, then it is not generated.
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%nde/ 8*
$eso'rceSo'rce evaluates to a string which uni:uel( identifies the resource source. %f it is not specified, it
is not generated.
Descriptor;ame evaluates to a name string which refers to the entire resource descriptor.
Interr'pt,ist evaluates to Hero or more comma&delimited 32&0it interrupt num0ers. The field
JDescriptor;ame. C%NTL is automaticall( created to refer to this portion of the resource descriptor.
5escription
The Interrupt macro evaluates to a 0uffer which contains an interrupt resource descriptor. The format of
the interrupt resource descriptor can 0e found in J./tended %nterrupt -escriptor L =page 3+2>. The macro is
designed to 0e used inside of a 3esourceTemplate =page 826>.
19.5.56 IO (IO Resource Descriptor Macro)
S)ntax
I6 '!ecode$ +ddressMin$ +ddressMax$ +ddress+lign#ent$ RangeLengt"$
!escritor)a#e( LB Buffer
Argu%ent
Decode descri0es whether the %F2 range uses 4&0it decode =5ecode+$> or 4+&0it decode =5ecode+->. The
field Descriptor;ame. C-.C is automaticall( created to refer to this portion of the resource descriptor,
where O4M is 5ecode+- and OM is 5ecode+$.
Address(in evaluates to a 4+&0it integer that specifies the minimum accepta0le starting address for the %F2
range. %t must 0e an even multiple of AddressAlignment. The field Descriptor;ame.CM%N is automaticall(
created to refer to this portion of the resource descriptor.
Address(ax evaluates to a 4+&0it integer that specifies the ma/imum accepta0le starting address for the %F2
range. %t must 0e an even multiple of AddressAlignment. The field Descriptor;ame.CMAA is automaticall(
created to refer to this portion of the resource descriptor.
AddressAlignment evaluates to an 8&0it integer that specifies the alignment granularit( for the %F2 address
assigned. The field Descriptor;ame. CA1N is automaticall( created to refer to this portion of the resource
descriptor.
$ange,engt1 evaluates to an 8&0it integer that specifies the num0er of 0(tes in the %F2 range. The field
Descriptor;ame. C1.N is automaticall( crated to refer to this portion of the resource descriptor.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
5escription
The I3 macro evaluates to a 0uffer which contains an %2 resource descriptor. The format of the %2
descriptor can 0e found in J%F2 'ort -escriptorL =page 326>. The macro is designed to 0e used inside of a
3esourceTemplate =page 826>.
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8+ Advanced Configuration and 'ower %nterface !pecification
19.5.57 IRQ (Interrupt Resource Descriptor Macro)
S)ntax
IRQ '0dgeLevel% +ctiveLevel% S"ared% !escritor)a#e( )#nterrupt6i2t/ LB
Buffer
Argu%ents
*dge,e2el descri0es whether the interrupt is edge triggered =1dge> or level triggered =Level>. The field
Descriptor;ame. C@. is automaticall( created to refer to this portion of the resource descriptor, where O4M
is 1dge and ActiveHigh and OM is Level and ActiveLow.
Acti2e,e2el descri0es whether the interrupt is active&high =ActiveHigh> or active&low =ActiveLow>. The
field Descriptor;ame. C11 is automaticall( created to refer to this portion of the resource descriptor, where
O4M is 1dge and ActiveHigh and OM is Level and ActiveLow.
S1ared descri0es whether the interrupt can 0e shared with other devices =Shared> or not =1xclusive>. The
field Descriptor;ame. C!@3 is automaticall( created to refer to this portion of the resource descriptor,
where O4M is Shared and OM is 1xclusive. %f nothing is specified, then 1xclusive is assumed.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
Interr'pt,ist is an optional list of comma&separated 8&0it integer constants. .ach integer represents an
interrupt num0er.
5escription
The I"K macro evaluates to a 0uffer which contains an %3G resource descriptor. The format of the %3G
descriptor can 0e found in J%3G -escriptorL =page 324>. The macro produces the two&0(te form of the
descriptor. The macro is designed to 0e used inside of a 3esourceTemplate =page 826>.
19.5.58 IRQNoFlags (Interrupt Resource Descriptor Macro)
S)ntax
IRQNoDla&s '!escritor)a#e( )$nterrutList/ LB Buffer
Argu%ents
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
Interr'pt,ist is an optional list of comma&separated 8&0it integer constants. .ach integer represents an
interrupt num0er.
5escription
The I"K0o6lags macro evaluates to a 0uffer which contains an active&high, edge&triggered %3G resource
descriptor. The format of the %3G descriptor can 0e found in %3G -escriptor =page 324>. The macro
produces the two&0(te form of the descriptor. The macro is designed to 0e used inside of a
3esourceTemplate =page 826>.
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19.5.59 LAnd (Logical And)
S)ntax
;An" 'Source&% Source2( LB Boolean
Argu%ents
So'rce1 and so'rce" are evaluated as integers.
5escription
%f 0oth values are non&Hero, True is returned< otherwise, 5alse is returned.
19.5.60 LEqual (Logical Equal)
S)ntax
;E0ual 'Source&% Source2( LB Boolean
Argu%ents
So'rce1 and So'rce" must each evaluate to an integer, a string, or a 0uffer. The data t(pe of So'rce1
dictates the re:uired t(pe of So'rce". So'rce" is implicitl( converted if necessar( to match the t(pe of
So'rce1.
5escription
%f the values are e:ual, True is returnedK otherwise, 5alse is returned. 5or integers, a numeric compare is
performed. 5or strings and 0uffers, True is returned onl( if 0oth lengths are the same and the result of a
0(te&wise compare indicates e/act e:ualit(.
19.5.61 LGreater (Logical Greater)
S)ntax
;+reater 'Source&% Source2( LB Boolean
Argu%ents
So'rce1 and So'rce" must each evaluate to an integer, a string, or a 0uffer. The data t(pe of So'rce1
dictates the re:uired t(pe of So'rce". So'rce" is implicitl( converted if necessar( to match the t(pe of
So'rce1.
5escription
%f So'rce1 is greater than So'rce". True is returnedK otherwise, 5alse is returned. 5or integers, a numeric
comparison is performed. 5or strings and 0uffers, a le/icographic comparison is performed. True is
returned if a 0(te&wise =unsigned> compare discovers at least one 0(te in So'rce1 that is numericall(
greater than the corresponding 0(te in So'rce". 6alse is returned if at least one 0(te in So'rce1 is
numericall( less than the corresponding 0(te in So'rce". %n the case of 0(te&wise e:ualit(, True is returned
if the length of So'rce1 is greater than So'rce", 6alse is returned if the length of So'rce1 is less than or
e:ual to So'rce".
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19.5.62 LGreaterEqual (Logical Greater Than Or Equal)
S)ntax
;+reaterE0ual 'Source&% Source2( LB Boolean
Argu%ents
So'rce1 and So'rce" must each evaluate to an integer, a string, or a 0uffer. The data t(pe of So'rce1
dictates the re:uired t(pe of So'rce". So'rce" is implicitl( converted if necessar( to match the t(pe of
So'rce1.
5escription
%f So'rce1 is greater than or e:ual to So'rce". True is returnedK otherwise, 5alse is returned. .:uivalent to
6!ot(66e22()). !ee the description of the 11ess operator.
19.5.63 LLess (Logical Less)
S)ntax
;;ess 'Source&% Source2( LB Boolean
Argu%ents
So'rce1 and So'rce" must each evaluate to an integer, a string, or a 0uffer. The data t(pe of So'rce1
dictates the re:uired t(pe of So'rce". So'rce" is implicitl( converted if necessar( to match the t(pe of
So'rce1.
5escription
%f So'rce1 is less than So'rce". True is returnedK otherwise, 5alse is returned. 5or integers, a numeric
comparison is performed. 5or strings and 0uffers, a le/icographic comparison is performed. True is
returned if a 0(te&wise =unsigned> compare discovers at least one 0(te in So'rce1 that is numericall( less
than the corresponding 0(te in So'rce". 6alse is returned if at least one 0(te in So'rce1 is numericall(
greater than the corresponding 0(te in So'rce". %n the case of 0(te&wise e:ualit(, True is returned if the
length of So'rce1 is less than So'rce", 6alse is returned if the length of So'rce1 is greater than or e:ual to
So'rce".
19.5.64 LLessEqual (Logical Less Than Or Equal)
S)ntax
;;essE0ual 'Source&% Source2( LB Boolean
Argu%ents
So'rce1 and So'rce" must each evaluate to an integer, a string, or a 0uffer. The data t(pe of So'rce1
dictates the re:uired t(pe of So'rce". So'rce" is implicitl( converted if necessar( to match the t(pe of
So'rce1.
5escription
%f So'rce1 is less than or e:ual to So'rce". True is returnedK otherwise 5alse is returned. .:uivalent to
6!ot(6:reater()). !ee the description of the 1$reater operator.
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19.5.65 LNot (Logical Not)
S)ntax
;Not 'Source( LB Boolean
Argu%ents
So'rce1 is evaluated as an integer.
5escription
%f the value is Hero True is returnedK otherwise, 5alse is returned.
19.5.66 LNotEqual (Logical Not Equal) )
S)ntax
;NotE0ual 'Source&% Source2( LB Boolean
Argu%ents
So'rce1 and So'rce" must each evaluate to an integer, a string, or a 0uffer. The data t(pe of So'rce1
dictates the re:uired t(pe of So'rce". So'rce" is implicitl( converted if necessar( to match the t(pe of
So'rce1.
5escription
%f So'rce1 is not e:ual to So'rce", True is returnedK otherwise 5alse is returned. .:uivalent to
6!ot(6%8ual()).!ee the description of the 1.:ual operator.
19.5.67 Load (Load Defnition Block)
S)ntax
;oa" '*./ect% !!B6andle(
Argu%ents
The =b:ect parameter can either refer to an operation region field or an operation region directl(. %f the
o0#ect is an operation region, the operation region must 0e in !(stemMemor( space. The -efinition ;lock
should contain an AC'% -.!C3%'T%2NC@.A-.3 of t(pe !!-T. The -efinition ;lock must 0e totall(
contained within the supplied operation region or operation region field. 2!'M reads this ta0le into
memor(, the checksum is verified, and then it is loaded into the AC'% namespace. The DD)%andle
parameter is the handle to the -efinition ;lock that can 0e used to unload the -efinition ;lock at a future
time.
5escription
'erforms a run&time load of a -efinition ;lock.
The 2! can also check the 2.M Ta0le %- and 3evision %- against a data0ase for a newer revision
-efinition ;lock of the same 2.M Ta0le %- and load it instead.
The default namespace location to load the -efinition ;lock is relative to the current namespace. The new
-efinition ;lock can override this 0( specif(ing a0solute names or 0( ad#usting the namespace location
using the Scope operator.
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84 Advanced Configuration and 'ower %nterface !pecification
1oading a -efinition ;lock is a s(nchronous operation. ,pon completion of the operation, the -efinition
;lock has 0een loaded. The control methods defined in the -efinition ;lock are not e/ecuted during load
time.
19.5.68 LoadTable (Load Defnition Block From XSDT)
S)ntax
;oa"9a4le 'SignatureString% *0M$!String% *0MTa.le$!String% RootPat"String%
Para#eterPat"String% Para#eter!ata( LB DDB"andle
Argu%ents
The A!-T is searched for a ta0le where the !ignature field matches Signat'reString, the 2.M %- field
matches =*(IDString. and the 2.M Ta0le %- matches =*(TableIDString. All comparisons are case
sensitive. %f the Signat'reString is greater than four characters, the =*(IDString is greater than si/
characters, or the =*(TableID is greater than eight characters, a run&time error is generated. The 2! can
also check the 2.M Ta0le %- and 3evision %- against a data0ase for a newer revision -efinition ;lock of
the same 2.M Ta0le %- and load it instead.
The $ootPat1String specifies the root of the -efinition ;lock. %t is evaluated using normal scoping rules,
assuming that the scope of the LoadTa!le instruction is the current scope. The new -efinition ;lock can
override this 0( specif(ing a0solute names or 0( ad#usting the namespace location using the Scope
operator. %f $ootPat1String is not specified, JBL is assumed
%f ParameterPat1String and ParameterData are specified, the data o0#ect specified 0( ParameterData is
stored into the o0#ect specified 0( ParameterPat1String after the ta0le has 0een added into the namespace.
%f the first character of ParameterPat1String is a 0ackslash =OBM> or caret =O^M> character, then the path of the
o0#ect is ParameterPat1String. 2therwise, it is $ootPat1String.ParameterPat1String. %f the specified
o0#ect does not e/ist, a run&time error is generated.
The handle of the loaded ta0le is returned. %f no ta0le matches the specified signature, then is returned.
5escription
'erforms a run&time load of a -efinition ;lock from the A!-T. An( ta0le referenced 0( LoadTa!le must
0e in memor( marked 0( Address3ange3eserved or Address3angeND!.
1oading a -efinition ;lock is a s(nchronous operation. ,pon completion of the operation, the -efinition
;lock has 0een loaded. The control methods defined in the -efinition ;lock are not e/ecuted during load
time.
1xa%ple
Store (6oad<able ('0%;4*$ *;S0%;*$ *<&B6%4*$ *\\_SB.P)#(*$*;SD*$
Pac+a,e () ($*\\_SB.P)#(*/)$ 6ocal()
This operation would search through the 3!-T or A!-T for a ta0le with the signature J2.M4,L the 2.M
%- of JMS2.M,L and the ta0le %- of JTA;1.4.L %f not found, it would store Iero in 1ocal. 2therwise, it
will store a package containing and JBBC!;.'C%L into the varia0le at BC!;.'C%.MS-.
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19.5.69 Localx (Method Local Data Objects)
S)ntax
;ocal* U ;ocal7 U ;ocal. U ;ocalK U ;ocalL U ;ocalM U ;ocalN U ;ocalG
5escription
,p to 8 local o0#ects can 0e referenced in a control method. 2n entr( to a control method, these o0#ects are
uninitialiHed and cannot 0e used until some value or reference is stored into the o0#ect. 2nce initialiHed,
these o0#ects are preserved in the scope of e/ecution for that control method.
19.5.70 LOr (Logical Or)
S)ntax
;6r 'Source&% Source2( LB Boolean
Argu%ents
So'rce1 and So'rce" are evaluated as integers.
5escription
%f either value is non&Hero, True is returnedK otherwise, 5alse is returned.
19.5.71 Match (Find Object Match)
S)ntax
Aatc> 'Searc"Pac,age% *&% Matc"*./ect&% *2% Matc"*./ect2% Start$ndex( LB
6nes U #nte,er
Argu%ents
Searc1Pac3age is evaluated to a package o0#ect and is treated as a one&dimension arra(. =p1 and =p" are
match operators. (atc1=b:ect1 and (atc1=b:ect" are the o0#ects to 0e matched. StartIndex is the starting
inde/ within the Searc1Pac3age.
5escription
A comparison is performed for each element of the package, starting with the inde/ value indicated 0(
StartIndex = is the first element>. %f the element of Searc1Pac3age 0eing compared against is called PMiN'
then the comparison is<
If 'P;i= *& Matc"*./ect&( an" 'P;i= *2 Matc"*./ect2( t>en Aatc> OP i is returned.
%f the comparison succeeds, the inde/ of the element that succeeded is returnedK otherwise, the constant
o0#ect 301S is returned.
=p1 and =p" have the values and meanings listed in the Ta0le 49&46.
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842 Advanced Configuration and 'ower %nterface !pecification
Ta!le +.-+, Match Ter% 3perator Meanings
3perator 1ncoding Macro
T3,. I A donMt care, alwa(s returns T3,. MT3
.G I 3eturns T3,. if 'ViW \\ Match20#ect 4 M.G
1. I 3eturns T3,. if 'ViW T\ Match20#ect 2 M1.
1T I 3eturns T3,. if 'ViW T Match20#ect 3 M1T
$. I 3eturns T3,. if 'ViW )\ Match20#ect " M$.
$T I 3eturns T3,. if 'ViW ) Match20#ect * M$T
1xa%ple
5ollowing are some e/ample uses of Match<
!ame (P4$
Pac+a,e () 4H=4$ 4H=F$ 4H=G$ 4H=T$ 4H=H$ 4HH($ 4HH4$ 4HHF$ 4HHG$ 4HHT$ 4HHH$ 3((4/
)
// match 4HHF LL P4MiN
;atch (P4$ ;%J$ 4HHF$ ;<R$ ($ () // EB T$ 2ince P4MTN LL 4HHF
// match 4H=. LL P4MiN
;atch (P4$ ;%J$ 4H=.$ ;<R$ ($ () // EB 0!%S (not found)
// match P4MiN B 4H=. and P4MiN ?L 3(((
;atch (P4$ ;:<$ 4H=.$ ;6%$ 3((($ () // EB 3$ 2ince P4M3NB4H=. and P4M3N?L3(((
// match P4MiN B 4H=. and P4MiN ?L 3((($ 2tartin, with F
rd
element
;atch (P4$ ;:<$ 4H=.$ ;6%$ 3((($ F) // EB F$ fir2t match at or pa2t Start
19.5.72 Memory24 (Memory Resource Descriptor Macro)
S)ntax
Ae2or:.L 'Read+nd4rite$ +ddressMini#u#$ +ddressMaxi#u#$ +ddress+lign#ent$
RangeLengt"$ !escritor)a#e(
Argu%ents
$eadAndJrite specifies whether or not the memor( region is read&onl( ="ead3nl)> or readFwrite
="ead:rite>. %f nothing is specified, then 3eadWrite is assumed. The 4&0it field Descriptor;ame.C3W is
automaticall( created to refer to this portion of the resource descriptor, where O4M is 3eadWrite and OM is
3ead2nl(.
Address(inim'm evaluates to a 4+&0it integer that specifies 0its V8<23W of the lowest possi0le 0ase address
of the memor( range. All other 0its are assumed to 0e Hero. The value must 0e an even multiple of
AddressAlignment. The 4+&0it field Descriptor;ame.CM%N is automaticall( created to refer to this portion
of the resource descriptor.
Address(axim'm evaluates to a 4+&0it integer that specifies 0its V8<23W of the highest possi0le 0ase address
of the memor( range. All other 0its are assumed to 0e Hero. The value must 0e an even multiple of
AddressAlignment. The 4+&0it field Descriptor;ame.CMAA is automaticall( created to refer to this portion
of the resource descriptor.
AddressAlignment evaluates to a 4+&0it integer that specifies 0its V8<23W of the re:uired alignment for the
memor( range. All other 0its are assumed to 0e Hero. The address selected must 0e an even multiple of this
value. The 4+&0it field Descriptor;ame. CA1N is automaticall( created to refer to this portion of the
resource descriptor.
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$ange,engt1 evaluates to a 4+&0it integer that specifies the total num0er of 0(tes decoded in the memor(
range. The 4+&0it field Descriptor;ame. C1.N is automaticall( created to refer to this portion of the
resource descriptor.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
5escription
The Me%or)&( macro evaluates to a 0uffer which contains an 2"&0it memor( descriptor. The format of the
2"&0it memor( descriptor can 0e found in J2"&;it Memor( 3ange -escriptor L =page 338>. The macro is
designed to 0e used inside of a 3esourceTemplate =page 826>.
N2T.< The use of Me%or)&( is deprecated and should not 0e used in new designs.
19.5.73 Memory32 (Memory Resource Descriptor Macro)
S)ntax
Ae2or:K. 'Read+nd4rite$ +ddressMini#u#$ +ddressMaxi#u#$ +ddress+lign#ent$
RangeLengt"$ !escritor)a#e(
Argu%ents
$eadAndJrite specifies whether or not the memor( region is read&onl( ="ead3nl)> or readFwrite
="ead:rite>. %f nothing is specified, then 3eadWrite is assumed. The 4&0it field Descriptor;ame.C3W is
automaticall( created to refer to this portion of the resource descriptor, where O4M is 3eadWrite and OM is
3ead2nl(.
Address(inim'm evaluates to a 32&0it integer that specifies the lowest possi0le 0ase address of the memor(
range. The value must 0e an even multiple of AddressAlignment. The 32&0it field Descriptor;ame.CM%N is
automaticall( created to refer to this portion of the resource descriptor.
Address(axim'm evaluates to a 32&0it integer that specifies the highest possi0le 0ase address of the
memor( range. The value must 0e an even multiple of AddressAlignment. The 32&0it field
Descriptor;ame.CMAA is automaticall( created to refer to this portion of the resource descriptor.
AddressAlignment evaluates to a 32&0it integer that specifies the re:uired alignment for the memor( range.
The address selected must 0e an even multiple of this value. The 32&0it field Descriptor;ame. CA1N is
automaticall( created to refer to this portion of the resource descriptor.
$ange,engt1 evaluates to a 32&0it integer that specifies the total num0er of 0(tes decoded in the memor(
range. The 32&0it field Descriptor;ame. C1.N is automaticall( created to refer to this portion of the
resource descriptor.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
5escription
The Me%or)#& macro evaluates to a 0uffer which contains a 32&0it memor( descriptor, which descri0es a
memor( range with a minimum, a ma/imum and an alignment. The format of the 32&0it memor( descriptor
can 0e found in J32&;it Memor( 3ange -escriptor L =page 3"2>. The macro is designed to 0e used inside
of a 3esourceTemplate =page 826>.
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19.5.74 Memory32Fixed (Memory Resource Descriptor Macro)
S)ntax
Ae2or:K.D1=e" 'Read+nd4rite$ +ddressBase$ RangeLengt"$ !escritor)a#e(
Argu%ents
$eadAndJrite specifies whether or not the memor( region is read&onl( ="ead3nl)> or readFwrite
="ead:rite>. %f nothing is specified, then 3eadWrite is assumed. The 4&0it field Descriptor;ame.C3W is
automaticall( created to refer to this portion of the resource descriptor, where O4M is 3eadWrite and OM is
3ead2nl(.
Address)ase evaluates to a 32&0it integer that specifies the 0ase address of the memor( range. The 32&0it
field Descriptor;ame. C;A! is automaticall( created to refer to this portion of the resource descriptor.
$ange,engt1 evaluates to a 32&0it integer that specifies the total num0er of 0(tes decoded in the memor(
range. The 32&0it field Descriptor;ame. C1.N is automaticall( created to refer to this portion of the
resource descriptor.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
5escription
The Me%or)#&6ixed macro evaluates to a 0uffer which contains a 32&0it memor( descriptor, which
descri0es a fi/ed range of memor( addresses. The format of the fi/ed 32&0it memor( descriptor can 0e
found in 32&;it 5i/ed Memor( 3ange -escriptor =page 3"*>. The macro is designed to 0e used inside of a
3esourceTemplate =page 826>.
19.5.75 Method (Declare Control Method)
S)ntax
Aet>o" 'Met"od)a#e% )u#+rgs% Seriali3eRule% SyncLevel% ReturnTye%
Para#eterTyes( )<erm6i2t/
Argu%ents
Creates a new control method of name (et1od;ame! (et1od;ame is evaluated as a Namestring data t(pe.
;'mArgs is evaluated as an integer data t(pe.
$et'rnType is optional and specifies the t(pe of the o0#ect returned 0( the method. %f the method does not
return an o0#ect, then nothing is specified or 2nknown3!C is specified. To specif( a single return t(pe,
simpl( use the =b:ectTypeLeyword =e.g. Int3!C, Package3!C, etc.>. To specif( multiple possi0le return
t(pes, enclose the comma&separated =b:ectTypeLeywords with curl( 0rackets. 5or e/ample< )Int64R$
Buffer64R/.
ParameterTypes is an optional package containing comma&separated t(pe or t(pes of each of the
parameters. 5or each parameter t(pe, there is either a single t(pe ke(word or a package containing a
comma&separated lists of =b:ectTypeLeyword. %f specified, then the num0er of t(pes must match ;'mArgs.
5escription
-eclares a named package containing a series of o0#ect references that collectivel( represent a control
method, which is a procedure that can 0e invoked to perform computation. Method opens a name scope.
!(stem software e/ecutes a control method 0( referencing the o0#ects in the package in order. 5or more
information on method e/ecution, see section *.*.2, JControl Method ./ecution.L
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The current namespace location used during name creation is ad#usted to 0e the current location on the
namespace tree. An( names created within this scope are J0elowL the name of this package. The current
namespace location is assigned to the method package, and all namespace references that occur during
control method e/ecution for this package are relative to that location.
%f a method is declared as SerialiBed, an implicit mute/ associated with the method o0#ect is ac:uired at the
specified Sync,e2el. %f no Sync,e2el is specified, Sync,e2el 5 is assumed. The serialiHe rule can 0e used to
prevent reentering of a method. This is especiall( useful if the method creates namespace o0#ects. Without
the serialiHe rule, the reentering of a method will fail when it attempts to create the same namespace o0#ect.
Also notice that all namespace o0#ects created 0( a method have temporar( lifetime. When method
e/ecution e/its, the created o0#ects will 0e destro(ed.
1xa%ple
The following 0lock of A!1 sample code shows a use of Method for defining a control method that turns
on a power resource.
;ethod (_0!)
Store (0ne$ :#0.#D%P) // a22ert power
Sleep (4() // wait 4(m2
Store (0ne$ :#0.#D%R) // deEa22ert re2etQ
Stall (4() // wait 4(u2
Store (7ero$ :#0.#D%#) // deEa22ert i2olation
/
19.5.76 Mid (Extract Portion of Bufer or String)
S)ntax
A1" 'Source% $ndex% Lengt"% Result( LB Buffer or Strin,
Argu%ents
So'rce is evaluated as either a ;uffer or !tring. Index and ,engt1 are evaluated as %ntegers.
5escription
%f So'rce is a 0uffer, then ,engt1 0(tes, starting with the Indexth 0(te =Hero&0ased> are optionall( copied
into $es'lt. %f Index is greater than or e:ual to the length of the 0uffer, then the result is an empt( 0uffer.
2therwise, if Index E ,engt1 is greater than or e:ual to the length of the 0uffer, then onl( 0(tes up to an
including the last 0(te are included in the result.
%f So'rce is a string, then ,engt1 characters, starting with the Indexth character =Hero&0ased> are optionall(
copied into $es'lt. %f Index is greater than or e:ual to the length of the 0uffer, then the result is an empt(
string. 2therwise, if Index E ,engt1 is greater than or e:ual to the length of the string, then onl( 0(tes up to
an including the last character are included in the result.
19.5.77 Mod (Integer Modulo)
S)ntax
Ao" '!ividend% !ivisor% Result( LB #nte,er
Argu%ents
Di2idend and Di2isor are evaluated as %ntegers.
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5escription
The Di2idend is divided 0( Di2isor, and then the resulting remainder is optionall( stored into $es'lt. %f
Di2isor evaluates to Hero, a fatal e/ception is generated.
19.5.78 Multiply (Integer Multiply)
S)ntax
Ault1pl: 'Multilicand% Multilier% Result( LB #nte,er
Argu%ents
('ltiplicand and ('ltiplier are evaluated as %ntegers.
5escription
The ('ltiplicand is multiplied 0( ('ltiplier and the result is optionall( stored into $es'lt! 2verflow
conditions are ignored and results are undefined.
19.5.79 Mutex (Declare Synchronization/Mutex Object)
S)ntax
Aute= 'Mutex)a#e% SyncLevel(
Argu%ents
Creates a data mute/ s(nchroniHation o0#ect named ('tex;ame, with level from to 4* specified 0(
Sync,e2el.
5escription
A s(nchroniHation o0#ect provides a control method with a mechanism for waiting for certain events. To
prevent deadlocks, wherever more than one s(nchroniHation o0#ect must 0e owned, the s(nchroniHation
o0#ects must alwa(s 0e released in the order opposite the order in which the( were ac:uired. The Sync,e2el
parameter declares the logical nesting level of the s(nchroniHation o0#ect. All AcJuire terms must refer to a
s(nchroniHation o0#ect with an e:ual or greater Sync,e2el to current level, and all "elease terms must refer
to a s(nchroniHation o0#ect with e:ual or lower Sync,e2el to the current level.
Mute/ s(nchroniHation provides the means for mutuall( e/clusive ownership. 2wnership is ac:uired using
an AcJuire term and is released using a "elease term. 2wnership of a Mute/ must 0e relin:uished 0efore
completion of an( invocation. 5or e/ample, the top&level control method cannot e/it while still holding
ownership of a Mute/. Ac:uiring ownership of a Mute/ can 0e nested.
The !(nc1evel of a thread 0efore ac:uiring an( mute/es is Hero. The !(nc1evel of the $lo0al 1ock =BC$1>
is Hero.
19.5.80 Name (Declare Named Object)
S)ntax
Na2e '*./ect)a#e% *./ect(
Argu%ents
Creates a new o0#ect named =b:ect;ame! Attaches =b:ect to =b:ect;ame in the $lo0al AC'% namespace.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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5escription
Creates =b:ect;ame in the namespace, which references the =b:ect.
1xa%ple
The following e/ample creates the name 'TTA in the root of the namespace that references a package.
!ame (\P<<R$ // Port to Port <ran2late <able
Pac+a,e () Pac+a,e () (-.F$ (-GH/$ Pac+a,e) (-H($ (-55//
)
The following e/ample creates the name CNT in the root of the namespace that references an integer data
o0#ect with the value *.
!ame (\)!<$ G)
19.5.81 NAnd (Integer Bitwise Nand)
S)ntax
NAn" 'Source&% Source2$ Result( LB #nte,er
Argu%ents
So'rce1 and So'rce" are evaluated as %ntegers.
5escription
A 0itwise 0A05 is performed and the result is optionall( stored in $es'lt!
19.5.82 NoOp Code (No Operation)
S)ntax
No6p
5escription
This operation has no effect.
19.5.83 NOr (Integer Bitwise Nor)
S)ntax
N6r 'Source&% Source2% Result( LB #nte,er
Argu%ents
So'rce1 and So'rce" are evaluated as %ntegers.
5escription
A 0itwise 03" is performed and the result is optionall( stored in $es'lt!
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
848 Advanced Configuration and 'ower %nterface !pecification
19.5.84 Not (Integer Bitwise Not)
S)ntax
Not 'Source% Result( LB #nte,er
Argu%ents
So'rce is evaluated as an integer data t(pe.
5escription
A 0itwise 03T is performed and the result is optionall( stored in $es'lt.
19.5.85 Notify (Notify Object of Event)
S)ntax
Not1f: '*./ect% )otification1alue(
Argu%ents
Notifies the 2! that the ;otificationAal'e for the =b:ect has occurred. =b:ect must 0e a reference to a
device, processor, or thermal Hone o0#ect.
5escription
=b:ect t(pe determines the notification values. 5or e/ample, the notification values for a thermal Hone
o0#ect are different from the notification values used for a device o0#ect. ,ndefined notification values are
treated as reserved and are ignored 0( the 2!.
5or lists of defined Notification values, see section +.+.3, J-evice 20#ect Notifications.L
19.5.86 ObjectType (Get Object Type)
S)ntax
64Rect9:pe '*./ect( LB #nte,er
Argu%ents
=b:ect is an( valid o0#ect.
5escription
The e/ecution result of this operation is an integer that has the numeric value of the o0#ect t(pe for =b:ect.
The o0#ect t(pe codes are listed in Ta0le 49&2. Notice that if this operation is performed on an o0#ect
reference such as one produced 0( the Alias' Index' or "ef3f statements, the o0#ect t(pe of the 0ase o0#ect
is returned. 5or t(peless o0#ects such as predefined scope names =in other words, GDS<, GD;P1, etc.>, the
t(pe value =2ninitialiBed> is returned.
Ta!le +.-&$ 7alues "eturned <) the 3!CectT)pe 3perator
7alue Meaning
,ninitialiHed
4 %nteger
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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7alue Meaning
2 !tring
3 ;uffer
" 'ackage
* 5ield ,nit
+ -evice
9 .vent
8 Method
6 Mute/
4 2peration 3egion
44 'ower 3esource
42 'rocessor
43 Thermal ?one
4" ;uffer 5ield
4* --; @andle
4+ -e0ug 20#ect
)4+ 3eserved
19.5.87 One (Constant One Object)
S)ntax
6ne
5escription
The constant 3ne o0#ect is an o0#ect of t(pe %nteger that will alwa(s read the 1!; as set and all other 0its
as clear =that is, the value of 4>. Writes to this o0#ect are not allowed.
19.5.88 Ones (Constant Ones Object)
S)ntax
6nes
5escription
The constant 3nes o0#ect is an o0#ect of t(pe %nteger that will alwa(s read as all 0its set. Writes to this
o0#ect are not allowed.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
82 Advanced Configuration and 'ower %nterface !pecification
19.5.89 OperationRegion (Declare Operation Region)
S)ntax
6perat1onRe&1on 'Region)a#e% RegionSace% *ffset% Lengt"(
Argu%ents
-eclares an operation region named $egion;ame. =ffset is the offset within the selected $egionSpace at
which the region starts =0(te&granular>, and ,engt1 is the length of the region in 0(tes.
5escription
An 2peration 3egion is a t(pe of data o0#ect where read or write operations to the data o0#ect are
performed in some hardware space. 5or e/ample, the -efinition ;lock can define an 2peration 3egion
within a 0us, or s(stem %F2 space. An( reads or writes to the named o0#ect will result in accesses to the %F2
space.
2peration regions are regions in some space that contain hardware registers for excl'si2e use 0( AC'%
control methods. %n general, no hardware register =at least 0(te&granular> within the operation region
accessed 0( an AC'% control method can 0e shared with an( accesses from an( other source, with the
e/ception of using the $lo0al 1ock to share a region with the firmware. The entire 2peration 3egion can
0e allocated for e/clusive use to the AC'% su0s(stem in the host 2!.
2peration 3egions that are defined within the scope of a method are the e/ception to this rule. These
2peration 3egions are known as J-(namicL since the 2! has no idea that the( e/ist or what registers the(
use until the control method is e/ecuted. ,sing a -(namic !(stem%2 or !(stemMemor( 2peration 3egion
is not recommended since the 2! cannot g'arantee e/clusive access. All other t(pes of 2peration 3egions
ma( 0e -(namic.
2peration 3egions have Jvirtual contentL and are onl( accessi0le via 6ield o0#ects 2peration 3egion
o0#ects ma( 0e defined down to actual 0it controls using 6ield data o0#ect definitions. The actual 0it
content of a 6ield is comprised of 0its from within a larger <uffer that are normaliHed for that field =in
other words, shifted down and masked to the proper length>, and as such the data t(pe of a 6ield is <uffer.
Therefore fields that are 32 0its or less in siHe ma( 0e read and stored as %ntegers.
An 2peration 3egion o0#ect implicitl( supports Mute/ s(nchroniHation. ,pdates to the o0#ect, or a 6ield
data o0#ect for the region' will automaticall( s(nchroniHe on the 2peration 3egion o0#ectK however, a
control method ma( also e/plicitl( s(nchroniHe to a region to prevent other accesses to the region =from
other control methods>. Notice that according to the control method e/ecution model, control method
e/ecution is non&preemptive. ;ecause of this, e/plicit s(nchroniHation to an 2peration 3egion needs to 0e
done onl( in cases where a control method 0locks or (ields e/ecution and where the t(pe of register usage
re:uires such s(nchroniHation.
There are seven predefined 2peration 3egion t(pes specified in AC'%<
!(stemMemor(
4 !(stem%2
2 'C%CConfig
3 .m0eddedControl
" !M;us
* CM2!
+ 'C%;A3Target
%n addition, 2.Ms ma( define 2peration 3egions t(pes $x/$ to $x66.
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1xa%ple
The following e/ample A!1 code shows the use of 3peration"egion com0ined with 6ield to descri0e
%-. and 4 controlled through general %F2 space, using one 5.T.
0perationRe,ion (:#0$ S12tem#0$ (-43G$ (-4)
5ield (:#0$ B1te&cc$ !o6oc+$ Pre2erve)
#D%#$ 4$ // #D%#S0_%! E i2olation buffer
#D%P$ 4$ // #D%_PWR_%! E power
#D%R$ 4 // #D%RS<Q_%! E re2etQ
/
19.5.90 Or (Integer Bitwise Or)
S)ntax
6r 'Source&% Source2% Result( LB #nte,er
Argu%ents
So'rce1 and So'rce" are evaluated as %ntegers.
5escription
A 0itwise 3" is performed and the result is optionall( stored in $es'lt!
19.5.91 Package (Declare Package Object)
S)ntax
Pac%a&e ')u#0le#ents( )Pac+a,e6i2t/ LB Pac+a,e
Argu%ents
;'m*lements is evaluated as an integer data t(pe. Pac3age,ist is an initialiHer list of o0#ects.
5escription
-eclares an unnamed aggregation of data items, constants, andFor references to control methods. The siHe
of the package is ;'m*lements. Pac3age,ist contains the list data items, constants, andFor control method
references used to initialiHe the package.
%f ;'m*lements is a0sent, it is set to match the num0er of elements in the 'ackage1ist. %f ;'m*lements is
present and greater than the num0er of elements in the 'ackage1ist, the default entr( of t(pe ,ninitialiHed
=see 3!CectT)pe> is used to initialiHe the package elements 0e(ond those initialiHed from the 'ackage1ist.
.valuating an undefined element will (ield an error, 0ut elements can 0e assigned values to make them
defined. %t is an error for ;'m*lements to 0e less than the num0er of elements in the 'ackage1ist. %t is an
error for ;'m*lements to e/ceed 2**.
There are two t(pes of package elements in the 'ackage1ist< data o0#ects and references to control
methods.
0oteH %f non&method code&package o0#ects are implemented in an A!1 compiler, evaluations of these
o0#ects are performed within the scope of the invoking method, and are performed when the containing
definition 0lock is loaded. This means that the targets of all stores, loads, and references to the locals,
arguments, or constant terms are in the same name scope as the invoking method.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
822 Advanced Configuration and 'ower %nterface !pecification
1xa%ples
./ample 4< Note
Pac+a,e ()
F$
H$
'&)P# 4.( )0;P6#&!<*$
Pac+a,e ()
')hec+SumLB*$
Pac+a,e () T$ H/
/$
(
/
./ample 2< This e/ample defines and initialiHes a two&dimensional arra(.
Pac+a,e ()
Pac+a,e () 44$ 43$ 4F/$
Pac+a,e () 34$ 33$ 3F/
/
./ample 3< This e/ample is a legal encoding, 0ut of no apparent use.
Pac+a,e () /
./ample "< This encoding allocates space for ten things to 0e defined later =see the 0a%e and Index term
definitions>.
Pac+a,e (4() /
0oteH The a0ilit( to create varia0le&siHed packages was first introduced in AC'% 2.. AC'% 4. onl(
allowed fi/ed&siHe packages with up to 2** elements.
19.5.92 PowerResource (Declare Power Resource)
S)ntax
Po<erResource 'Resource)a#e% Syste#Level% Resource*rder( )0b9ect6i2t/
Argu%ents
-eclares a power resource named $eso'rce;ame. Power"esource opens a name scope.
5escription
5or a definition of the Power"esource term, see section 9.4, J-eclaring a 'ower 3esource 20#ect.L
19.5.93 Processor (Declare Processor)
S)ntax
Processor 'Processor)a#e% Processor$!% PBloc,+ddress% P.loc,Lengt"(
)0b9ect6i2t/
Argu%ents
-eclares a named processor o0#ect named Processor;ame. Processor opens a name scope. .ach processor
is re:uired to have a uni:ue ProcessorID value that is uni:ue from an( other ProcessorID value.
5or each processor in the s(stem, the AC'% ;%2! declares one processor o0#ect in the namespace an(where
within the BC!; scope. 5or compati0ilit( with operating s(stems implementing AC'% 4., the processor
o0#ect ma( also 0e declared under the BC'3 scope. An AC'%&compati0le namespace ma( define 'rocessor
o0#ects in either the BC!; or BC'3 scope 0ut not 0oth.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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P)loc3Address provides the s(stem %F2 address for the processors register 0lock. .ach processor can
suppl( a different such address. P)loc3,engt1 is the length of the processor register 0lock, in 0(tes and is
either =for no 'C;1E> or +. With one e/ception, all processors are re:uired to have the same
P)loc3,engt1! The e/ception is that the 0oot processor can have a non&Hero P)loc3,engt1 when all other
processors have a Hero P)loc3,engt1! %t is valid for ever( processor to have a ';lock1ength of .
5escription
The following 0lock of A!1 sample code shows a use of the Processor term.
Proce22or (
\_PR.)PX($ // !ame2pace name
4$
(-43($ // PBl+ 212tem #0 addre22
I // PBl+6en
) 0b9ect6i2t/
The 20#ect1ist is an optional list that ma( contain an ar0itrar( num0er of A!1 20#ects. 'rocessor&specific
o0#ects that ma( 0e included in the 20#ect1ist include C'TC, CC!T, C'CT, C'!!, C''C, C'!-, CT!-,
CC!-, C'-C, CT'C, CT!!, and C2!C. These processor&specific o0#ects can onl( 0e specified when the
processor o0#ect is declared within the BC!; scope. 5or a full definition of these o0#ects, see section 8,
J'rocessor 'ower and 'erformance !tate Configuration and Control.L
19.5.94 QWordIO (QWord IO Resource Descriptor Macro)
S)ntax
Q5or"I6 'Resource-sage$ $sMinFixed$ $sMaxFixed$ !ecode$ $S+Ranges$
+ddress:ranularity% +ddressMini#u#% +ddressMaxi#u#$ +ddressTranslation$
RangeLengt"$ ResourceSource$ndex% ResourceSource% !escritor)a#e%
TranslationTye% Translation!ensity(
Argu%ents
$eso'rceBsage specifies whether the %F2 range is consumed 0( this device ="esourceConsu%er> or
passed on to child devices ="esourceProducer>. %f nothing is specified, then 3esourceConsumer is
assumed.
Is(in&ixed specifies whether the minimum address of this %F2 range is fi/ed =Min6ixed> or can 0e
changed =Min0ot6ixed>. %f nothing is specified, then MinNot5i/ed is assumed. The 4&0it field
Descriptor;ame. CM%5 is automaticall( created to refer to this portion of the resource descriptor, where O4M
is Min5i/ed and OM is MinNot5i/ed.
Is(ax&ixed specifies whether the ma/imum address of this %F2 range is fi/ed =Max6ixed> or can 0e
changed =Max0ot6ixed>. %f nothing is specified, then Ma/Not5i/ed is assumed. The 4&0it field
Descriptor;ame! CMA5 is automaticall( created to refer to this portion of the resource descriptor, where
O4M is Ma/5i/ed and OM is Ma/Not5i/ed.
Decode specifies whether or not the device decodes the %F2 range using positive =Pos5ecode> or
su0tractive =Su!5ecode> decode. %f nothing is specifies, then 'os-ecode is assumed. The 4&0it field
Descriptor;ame. C-.C is automaticall( created to refer to this portion of the resource descriptor, where O4M
is !u0-ecode and OM is 'os-ecode.
ISA$anges specifies whether the %F2 ranges specifies are limited to valid %!A %F2 ranges =ISA3nl)>, valid
non&%!A %F2 ranges =0onISA3nl)> or encompass the whole range without limitation =1ntire"ange>. The
2&0it field Descriptor;ame.C3N$ is automaticall( created to refer to this portion of the resource descriptor,
where O4M is Non%!A2nl(, O2M is %!A2nl( and OM is .ntire3ange.
Address4ran'larity evaluates to a +"&0it integer that specifies the power&of&two 0oundar( =& 4> on which
the %F2 range must 0e aligned. The +"&0it field Descriptor;ame. C$3A is automaticall( created to refer to
this portion of the resource descriptor.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
82" Advanced Configuration and 'ower %nterface !pecification
Address(inim'm evaluates to a +"&0it integer that specifies the lowest possi0le 0ase address of the %F2
range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is O4M. 5or
0ridge devices which translate addresses, this is the address on the secondar( 0us. The +"&0it field
Descriptor;ame.CM%N is automaticall( created to refer to this portion of the resource descriptor.
Address(axim'm evaluates to a +"&0it integer that specifies the highest possi0le 0ase address of the %F2
range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is O4M. 5or
0ridge devices which translate addresses, this is the address on the secondar( 0us. The +"&0it field
Descriptor;ame.CMAA is automaticall( created to refer to this portion of the resource descriptor.
AddressTranslation evaluates to a +"&0it integer that specifies the offset to 0e added to a secondar( 0us %F2
address which results in the corresponding primar( 0us %F2 address. 5or all non&0ridge devices or 0ridges
which do not perform translation, this must 0e OM. The +"&0it field Descriptor;ame.CT3A is automaticall(
created to refer to this portion of the resource descriptor.
$ange,engt1 evaluates to a +"&0it integer that specifies the total num0er of 0(tes decoded in the %F2 range.
The +"&0it field Descriptor;ame. C1.N is automaticall( created to refer to this portion of the resource
descriptor.
$eso'rceSo'rceIndex is an optional argument which evaluates to an 8&0it integer that specifies the resource
descriptor within the o0#ect specified 0( $eso'rceSo'rce.
$eso'rceSo'rce is an optional argument which evaluates to a string containing the path of a device which
produces the pool of resources from which this %F2 range is allocated.
TranslationType is an optional argument that specifies whether the resource t(pe on the secondar( side of
the 0us is different =T)peTranslation> from that on the primar( side of the 0us or the same =T)peStatic>. %f
T(peTranslation is specified, then the secondar( side of the 0us is Memor(. %f T(pe!tatic is specified, then
the secondar( side of the 0us is %F2. %f nothing is specified, then T(pe!tatic is assumed. The 4&0it field
Descriptor;ame. CTT' is automaticall( created to refer to this portion of the resource descriptor, where O4M
is T(peTranslation and OM is T(pe!tatic. !ee CTT' =page 3+> for more information
TranslationDensity is an optional argument that specifies whether or not the translation from the primar( to
secondar( 0us is sparse =SparseTranslation> or dense =5enseTranslation>. %t is onl( used when
TranslationType is T)peTranslation. %f nothing is specified, then -enseTranslation is assumed. The 4&0it
field Descriptor;ame. CT3! is automaticall( created to refer to this portion of the resource descriptor,
where O4M is !parseTranslation and OM is -enseTranslation. !ee CT3! =page 3*6> for more information.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
5escription
The K:ordI3 macro evaluates to a 0uffer which contains a +"&0it %F2 resource descriptor, which
descri0es a range of %F2 addresses. The format of the +"&0it %F2 resource descriptor can 0e found in GWord
Address !pace -escriptor =page 3"9>. The macro is designed to 0e used inside of a 3esourceTemplate
=page 826>.
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19.5.95 QWordMemory (QWord Memory Resource Descriptor Macro)
S)ntax
Q5or"Ae2or: 'Resource-sage% !ecode% $sMinFixed% $sMaxFixed% Cac"ea.le%
Read+nd4rite% +ddress:ranularity% +ddressMini#u#% +ddressMaxi#u#%
+ddressTranslation% RangeLengt"% ResourceSource$ndex% ResourceSource%
!escritor)a#e% Me#oryTye% TranslationTye(
Argu%ents
$eso'rceBsage specifies whether the Memor( range is consumed 0( this device ="esourceConsu%er> or
passed on to child devices ="esourceProducer>. %f nothing is specified, then 3esourceConsumer is
assumed.
Decode specifies whether or not the device decodes the Memor( range using positive =Pos5ecode> or
su0tractive =Su!5ecode> decode. %f nothing is specifies, then 'os-ecode is assumed. The 4&0it field
Descriptor;ame. C-.C is automaticall( created to refer to this portion of the resource descriptor, where O4M
is !u0-ecode and OM is 'os-ecode.
Is(in&ixed specifies whether the minimum address of this Memor( range is fi/ed =Min6ixed> or can 0e
changed =Min0ot6ixed>. %f nothing is specified, then MinNot5i/ed is assumed. The 4&0it field
Descriptor;ame. CM%5 is automaticall( created to refer to this portion of the resource descriptor, where O4M
is Min5i/ed and OM is MinNot5i/ed.
Is(ax&ixed specifies whether the ma/imum address of this Memor( range is fi/ed =Max6ixed> or can 0e
changed =Max0ot6ixed>. %f nothing is specified, then Ma/Not5i/ed is assumed. The 4&0it field
Descriptor;ame! CMA5 is automaticall( created to refer to this portion of the resource descriptor, where
O4M is Ma/5i/ed and OM is Ma/Not5i/ed.
Cac1eable specifies whether or not the memor( region is cachea0le =Cachea!le>, cachea0le and write&
com0ining =:riteCo%!ining>, cachea0le and prefetcha0le =Prefetcha!le> or uncachea0le
=0onCachea!le>. %f nothing is specified, then NonCachea0le is assumed. The 2&0it field Descriptor;ame.
CM.M is automaticall( created to refer to this portion of the resource descriptor, where O4M is Cachea0le,
O2M is WriteCom0ining, O3M is 'refetcha0le and OM is NonCachea0le.
$eadAndJrite specifies whether or not the memor( region is read&onl( ="ead3nl)> or readFwrite
="ead:rite>. %f nothing is specified, then 3eadWrite is assumed. The 4&0it field Descriptor;ame.C3W is
automaticall( created to refer to this portion of the resource descriptor, where O4M is 3eadWrite and OM is
3ead2nl(.
Address4ran'larity evaluates to a +"&0it integer that specifies the power&of&two 0oundar( =& 4> on which
the Memor( range must 0e aligned. The +"&0it field Descriptor;ame. C$3A is automaticall( created to
refer to this portion of the resource descriptor.
Address(inim'm evaluates to a +"&0it integer that specifies the lowest possi0le 0ase address of the
Memor( range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is
O4M. 5or 0ridge devices which translate addresses, this is the address on the secondar( 0us. The +"&0it field
Descriptor;ame.CM%N is automaticall( created to refer to this portion of the resource descriptor.
Address(axim'm evaluates to a +"&0it integer that specifies the highest possi0le 0ase address of the
Memor( range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is
O4M. 5or 0ridge devices which translate addresses, this is the address on the secondar( 0us. The +"&0it field
Descriptor;ame.CMAA is automaticall( created to refer to this portion of the resource descriptor.
AddressTranslation evaluates to a +"&0it integer that specifies the offset to 0e added to a secondar( 0us %F2
address which results in the corresponding primar( 0us %F2 address. 5or all non&0ridge devices or 0ridges
which do not perform translation, this must 0e OM. The +"&0it field Descriptor;ame.CT3A is automaticall(
created to refer to this portion of the resource descriptor.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
82+ Advanced Configuration and 'ower %nterface !pecification
$ange,engt1 evaluates to a +"&0it integer that specifies the total num0er of 0(tes decoded in the Memor(
range. The +"&0it field Descriptor;ame. C1.N is automaticall( created to refer to this portion of the
resource descriptor.
$eso'rceSo'rceIndex is an optional argument which evaluates to an 8&0it integer that specifies the resource
descriptor within the o0#ect specified 0( $eso'rceSo'rce.
$eso'rceSo'rce is an optional argument which evaluates to a string containing the path of a device which
produces the pool of resources from which this Memor( range is allocated.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
(emoryType is an optional argument that specifies the memor( usage. The memor( can 0e marked as
normal =Address"angeMe%or)>, used as AC'% ND! space =Address"ange07S>, used as AC'%
reclaima0le space =Address"angeACPI> or as s(stem reserved =Address"ange"eserved>. %f nothing is
specified, then Address3angeMemor( is assumed. The 2&0it field Descriptor;ame. CMT' is automaticall(
created in order to refer to this portion of the resource descriptor, where OM is Address3angeMemor(, O4M is
Address3ange3eserved, O2M is Address3angeAC'% and O3M is Address3angeND!.
TranslationType is an optional argument that specifies whether the resource t(pe on the secondar( side of
the 0us is different =T)peTranslation> from that on the primar( side of the 0us or the same =T)peStatic>. %f
T(peTranslation is specified, then the secondar( side of the 0us is %F2. %f T(pe!tatic is specified, then the
secondar( side of the 0us is %F2. %f nothing is specified, then T(pe!tatic is assumed. The 4&0it field
Descriptor;ame. CTT' is automaticall( created to refer to this portion of the resource descriptor, where O4M
is T(peTranslation and OM is T(pe!tatic. !ee CTT' =page 3+> for more information.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
5escription
The K:ordMe%or) macro evaluates to a 0uffer which contains a +"&0it memor( resource descriptor,
which descri0es a range of memor( addresses. The format of the +"&0it memor( resource descriptor can 0e
found in JGWord Address !pace -escriptor L =page 3"9>. The macro is designed to 0e used inside of a
3esourceTemplate =page 826>.
19.5.96 QWordSpace (QWord Space Resource Descriptor Macro)
S)ntax
Q5or"#pace 'ResourceTye% Resource-sage% !ecode% $sMinFixed% $sMaxFixed%
TyeSecificFlags% +ddress:ranularity% +ddressMini#u#% +ddressMaxi#u#%
+ddressTranslation% RangeLengt"% ResourceSource$ndex% ResourceSource%
!escritor)a#e(
Argu%ents
$eso'rceType evaluates to an 8&0it integer that specifies the t(pe of this resource. Accepta0le values are
/C through /55.
$eso'rceBsage specifies whether the Memor( range is consumed 0( this device ="esourceConsu%er> or
passed on to child devices ="esourceProducer>. %f nothing is specified, then 3esourceConsumer is
assumed.
Decode specifies whether or not the device decodes the Memor( range using positive =Pos5ecode> or
su0tractive =Su!5ecode> decode. %f nothing is specifies, then 'os-ecode is assumed. The 4&0it field
Descriptor;ame. C-.C is automaticall( created to refer to this portion of the resource descriptor, where O4M
is !u0-ecode and OM is 'os-ecode.
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Is(in&ixed specifies whether the minimum address of this Memor( range is fi/ed =Min6ixed> or can 0e
changed =Min0ot6ixed>. %f nothing is specified, then MinNot5i/ed is assumed. The 4&0it field
Descriptor;ame. CM%5 is automaticall( created to refer to this portion of the resource descriptor, where O4M
is Min5i/ed and OM is MinNot5i/ed.
Is(ax&ixed specifies whether the ma/imum address of this Memor( range is fi/ed =Max6ixed> or can 0e
changed =Max0ot6ixed>. %f nothing is specified, then Ma/Not5i/ed is assumed. The 4&0it field
Descriptor;ame! CMA5 is automaticall( created to refer to this portion of the resource descriptor, where
O4M is Ma/5i/ed and OM is Ma/Not5i/ed.
TypeSpecific&lags evaluates to an 8&0it integer. The flags are specific to the $eso'rceType.
Address4ran'larity evaluates to a +"&0it integer that specifies the power&of&two 0oundar( =& 4> on which
the Memor( range must 0e aligned. The +"&0it field Descriptor;ame. C$3A is automaticall( created to
refer to this portion of the resource descriptor.
Address(inim'm evaluates to a +"&0it integer that specifies the lowest possi0le 0ase address of the
Memor( range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is
O4M. 5or 0ridge devices which translate addresses, this is the address on the secondar( 0us. The +"&0it field
Descriptor;ame.CM%N is automaticall( created to refer to this portion of the resource descriptor.
Address(axim'm evaluates to a +"&0it integer that specifies the highest possi0le 0ase address of the
Memor( range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is
O4M. 5or 0ridge devices which translate addresses, this is the address on the secondar( 0us. The +"&0it field
Descriptor;ame.CMAA is automaticall( created to refer to this portion of the resource descriptor.
AddressTranslation evaluates to a +"&0it integer that specifies the offset to 0e added to a secondar( 0us %F2
address which results in the corresponding primar( 0us %F2 address. 5or all non&0ridge devices or 0ridges
which do not perform translation, this must 0e OM. The +"&0it field Descriptor;ame.CT3A is automaticall(
created to refer to this portion of the resource descriptor.
$ange,engt1 evaluates to a +"&0it integer that specifies the total num0er of 0(tes decoded in the Memor(
range. The +"&0it field Descriptor;ame. C1.N is automaticall( created to refer to this portion of the
resource descriptor.
$eso'rceSo'rceIndex is an optional argument which evaluates to an 8&0it integer that specifies the resource
descriptor within the o0#ect specified 0( $eso'rceSo'rce.
$eso'rceSo'rce is an optional argument which evaluates to a string containing the path of a device which
produces the pool of resources from which this Memor( range is allocated.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
5escription
The K:ordSpace macro evaluates to a 0uffer which contains a +"&0it Address !pace resource descriptor,
which descri0es a range of addresses. The format of the +"&0it Address!pace descriptor can 0e found in
JGWord Address !pace -escriptor L =page 3"9>. The macro is designed to 0e used inside of a
3esourceTemplate =page 826>.
19.5.97 RefOf (Create Object Reference)
S)ntax
Ref6f '*./ect( LB 0b9ectReference
Argu%ents
=b:ect can 0e an( o0#ect t(pe =for e/ample, a package, a device o0#ect, and so on>.
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828 Advanced Configuration and 'ower %nterface !pecification
5escription
3eturns an o0#ect reference to =b:ect. %f the =b:ect does not e/ist, the result of a "ef3f operation is fatal.
,se the Cond"ef3f term in cases where the =b:ect might not e/ist.
The primar( purpose of "ef3f>? is to allow an o0#ect to 0e passed to a method as an argument to the
method without the o0#ect 0eing evaluated at the time the method was loaded.
19.5.98 Register (Generic Register Resource Descriptor Macro)
S)ntax
Re&1ster '+ddressSace?eyword$ RegisterBit4idt"$ RegisterBit*ffset$
Register+ddress% +ccessSi3e(
Argu%ents
AddressSpaceLeyword specifies the address space where the register e/ists. The register can e/ist in %F2
space =S)ste%I3>, memor( =S)ste%Me%or)>, 'C% configuration space =PCIDConfig>, em0edded
controller space =1%!eddedControl>, !M;us =SM<us> or fi/ed&feature hardware =66ixedH:>. The 8&0it
field Descriptor;ame. CA!% is automaticall( created in order to refer to this portion of the resource
descriptor. !ee CA!% =page 3+*> for more information, including a list of valid values and their meanings.
$egister)itJidt1 evaluates to an 8&0it integer that specifies the num0er of 0its in the register. The 8&0it field
Descriptor;ame. C3;W is automaticall( created in order to refer to this portion of the resource descriptor.
!ee C3;W =page 3+*> for more information.
$egister)it=ffset evaluates to an 8&0it integer that specifies the offset in 0its from the start of the register
indicated 0( $egisterAddress. The 8&0it field Descriptor;ame. C3;2 is automaticall( created in order to
refer to this portion of the resource descriptor. !ee C3;2 =page 3+*> for more information.
$egisterAddress evaluates to a +"&0it integer that specifies the register address. The +"&0it field
Descriptor;ame. CA-3 is automaticall( created in order to refer to this portion of the resource descriptor.
!ee CA-3 =page 3+*> for more information.
AccessSi<e evaluates to an 8&0it integer that specifies the siHe of data values used when accessing the
address space as follows<
&,ndefined =legac(>
4&;(te access
2&Word access
3&-word access
"&Gword access
The 8&0it field Descriptor;ame. CA!? is automaticall( created in order to refer to this portion of the
resource descriptor. !ee CA!?=page 3+*> for more information. 5or 0ackwards compati0ilit(, the AccesSi<e
parameter is optional when invoking the 3egister macro. %f the AccessSi<e parameter is not supplied then
the AccessSi<e field will 0e set to Hero. %n this case, 2!'M will assume the access siHe.
5escription
The "egister macro evaluates to a 0uffer which contains a generic register resource descriptor. The format
of the generic register resource descriptor can 0e found in J$eneric 3egister -escriptor L =page 3+*>. The
macro is designed to 0e used inside of a 3esourceTemplate =page 826>.
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19.5.99 Release (Release a Mutex Synchronization Object)
S)ntax
Release 'Sync*./ect(
Argu%ents
Sync1=b:ect must 0e a mute/ s(nchroniHation o0#ect.
5escription
%f the mute/ o0#ect is owned 0( the current invocation, ownership for the Mute/ is released once. %t is fatal
to release ownership on a Mute/ unless it is currentl( owned. A Mute/ must 0e totall( released 0efore an
invocation completes.
19.5.100 Reset (Reset an Event Synchronization Object)
S)ntax
Reset 'Sync*./ect(
Argu%ents
Sync1=b:ect must 0e an .vent s(nchroniHation o0#ect.
5escription
This operator is used to reset an event s(nchroniHation o0#ect to a non&signaled state. !ee also the Wait and
!ignal function operator definitions.
19.5.101 ResourceTemplate (Resource To Bufer Conversion Macro)
S)ntax
Resource9e2plate '( )ResourceMacroList/ LB Buffer
5escription
5or a full definition of the 3esourceTemplateTerm macro, see J A!1 3esource TemplatesL =page 9"+>
19.5.102 Return (Return from Method Execution)
S)ntax
Return '(
Return '+rg(
Argu%ents
Arg can 0e an( valid o0#ect or reference.
5escription
3eturns control to the invoking control method, optionall( returning a cop( of the o0#ect named in Arg.
0ote< in the a0sence of an e/plicit "eturn >? statement, an implicit return is created, and the return value to
the caller is undefined.
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19.5.103 Revision (Constant Revision Object)
S)ntax
Re1s1on
5escription
The constant "evision o0#ect is an o0#ect of t(pe %nteger that will alwa(s read as the revision of the AM1
interpreter.
19.5.104 Scope (Open Named Scope)
S)ntax
#cope 'Location( )0b9ect6i2t/
Argu%ents
2pens and assigns a 0ase namespace scope to a collection of o0#ects. All o0#ect names defined within the
scope act relative to ,ocation. Notice that ,ocation does not have to 0e 0elow the surrounding scope, 0ut
can refer to an( location within the namespace. The Scope term itself does not create o0#ects, 0ut onl(
locates o0#ects in the namespaceK the located o0#ects are created 0( other A!1 terms.
5escription
The o0#ect referred to 0( ,ocation must alread( e/ist in the namespace and 0e one of the following o0#ect
t(pes that has a namespace scope associated with it<
'redefined scope such as< G =root>, GDS<, G;P1, GDP", GDTI, etc.
-evice
'rocessor
Thermal ?one
'ower 3esource
The Scope term alters the current namespace location to the e/isting ,ocation! This causes the defined
o0#ects within =b:ect,ist to occur relative to this new location in the namespace.
The following e/ample A!1 code places the defined o0#ects in the AC'% namespace as shown<
Scope (\P)#()
!ame (R$ F)
Scope (\)
;ethod (RJ) Return (()/
/
!ame (\S$ .)
/
places the defined o0#ects in the AC'% namespace as shown<
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\P)#(.R
\RJ
\S
19.5.105 ShiftLeft (Integer Shift Left)
S)ntax
#>1ft;eft 'Source% S"iftCount$ Result( LB #nte,er
Argu%ents
So'rce and S1iftCo'nt are evaluated as %ntegers.
5escription
So'rce is shifted left with the least significant 0it Heroed S1iftCo'nt times. The result is optionall( stored
into $es'lt!
19.5.106 ShiftRight (Integer Shift Right)
S)ntax
#>1ftR1&>t 'Source% S"iftCount$ Result( LB #nte,er
Argu%ents
So'rce and S1iftCo'nt are evaluated as %ntegers.
5escription
So'rce is shifted right with the most significant 0it Heroed S1iftCo'nt times. The result is optionall( stored
into $es'lt!
19.5.107 Signal (Signal a Synchronization Event)
S)ntax
#1&nal 'Sync*./ect(
Argu%ents
Sync1=b:ect must 0e an .vent s(nchroniHation o0#ect.
5escription
The .vent o0#ect is signaled once, allowing one invocation to ac:uire the event.
19.5.108 SizeOf (Get Data Object Size)
S)ntax
#1Ee6f '*./ect)a#e( LB #nte,er
Argu%ents
=b:ect;ame must 0e a 0uffer, string or package o0#ect.
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832 Advanced Configuration and 'ower %nterface !pecification
5escription
3eturns the siHe of a 0uffer, string, or package data o0#ect.
5or a 0uffer, it returns the siHe in 0(tes of the data. 5or a string, it returns the siHe in 0(tes of the string, not
counting the trailing N,11. 5or a package, it returns the num0er of elements. 5or an o0#ect reference, the
siHe of the referenced o0#ect is returned. 2ther data t(pes cause a fatal run&time error.
19.5.109 Sleep (Milliseconds Sleep)
S)ntax
#leep 'MilliSeconds(
Argu%ents
The Sleep term is used to implement long&term timing re:uirements. ./ecution is dela(ed for at least the
re:uired num0er of milliseconds.
5escription
The implementation of Sleep is to round the re:uest up to the closest sleep time supported 0( the 2! and
relin:uish the processor.
19.5.110 Stall (Stall for a Short Time)
S)ntax
#tall 'MicroSeconds(
Argu%ents
The Stall term is used to implement short&term timing re:uirements. ./ecution is dela(ed for at least the
re:uired num0er of microseconds.
5escription
The implementation of Stall is 2!&specific, 0ut must not relin:uish control of the processor. ;ecause of
this, dela(s longer than 4 microseconds must use Sleep instead of Stall.
19.5.111 StartDependentFn (Start Dependent Function Resource
Descriptor Macro)
S)ntax
#tartDepen"entDn 'Co#ati.ilityPriority$ Perfor#ancePriority( )ResourceList/
Argu%ents
CompatibilityPriority indicates the relative compati0ilit( of the configuration specified 0( $eso'rce,ist
relative to the 'CFAT. \ $ood, 4 \ Accepta0le, 2 \ !u0&optimal.
PerformancePriority indicates the relative performance of the configuration specified 0( $eso'rce,ist
relative to the other configurations. \ $ood, 4 \ Accepta0le, 2 \ !u0&optimal.
$eso'rce,ist is a list of resources descriptors which must 0e selected together for this configuration.
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5escription
The Start5ependent6n macro evaluates to a 0uffer which contains a start dependent function resource
descriptor, which descri0es a group of resources which must 0e selected together. .ach su0se:uent
!tart-ependent5n or !tart-ependent5nNo'ri resource descriptor introduces a new choice of resources for
configuring the device, with the last choice terminated with an .nd-ependent5n resource descriptor. The
format of the start dependent function resource descriptor can 0e found in J!tart -ependent 5unctions
-escriptorL =page 32*>. This macro generates the two&0(te form of the resource descriptor. The macro is
designed to 0e used inside of a 3esourceTemplate =page 826>.
19.5.112 StartDependentFnNoPri (Start Dependent Function Resource
Descriptor Macro)
S)ntax
#tartDepen"entDnNoPr1 '( )ResourceList/
5escription
The Start5ependent6n0oPri macro evaluates to a 0uffer which contains a start dependent function
resource descriptor, which descri0es a group of resources which must 0e selected together. .ach su0se:uent
!tart-ependent5n or !tart-ependent5nNo'ri resource descriptor introduces a new choice of resources for
configuring the device, with the last choice terminated with an .nd-ependent5n resource descriptor. The
format of the start dependent function resource descriptor can 0e found in J!tart -ependent 5unctions
-escriptorL =page 32*>. This macro generates the one&0(te form of the resource descriptor. The macro is
designed to 0e used inside of a 3esourceTemplate =page 826>.
This is similar to !tart-ependent5n =page 832> with 0oth CompatibilityPriority and PerformancePriority
set to 4, 0ut is one 0(te shorter.
19.5.113 Store (Store an Object)
S)ntax
#tore 'Source% !estination( LB DataRef0b9ect
Argu%ents
This operation evaluates So'rce' converts it to the data t(pe of Destination' and writes the result into
Destination! 5or information on automatic data&t(pe conversion, see section 4+.2.2, JA!1 -ata T(pes.L
5escription
!tores to 2peration3egion 5ield data t(pes ma( relin:uish the processor depending on the region t(pe.
All stores =of an( t(pe> to the constant Iero, constant 3ne, or constant 3nes o0#ect are not allowed. !tores
to read&onl( o0#ects are fatal. The e/ecution result of the operation depends on the t(pe of Destination. 5or
an( t(pe other than an operation region field, the e/ecution result is the same as the data written to
Destination! 5or operation region fields with an AccessType of <)teAcc, :ordAcc, 5:ordAcc,
K:ordAcc or An)Acc, the e/ecution result is the same as the data written to Destination as in the normal
case, 0ut when the AccessType is <ufferAcc, the operation region handler ma( modif( the data when it is
written to the Destination so that the e/ecution result contains modified data!
1xa%ple
The following e/ample creates the name CNT that references an integer data o0#ect with the value * and
then stores CNT to 1ocal. After the !tore operation, 1ocal is an integer o0#ect with the value *.
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83" Advanced Configuration and 'ower %nterface !pecification
!ame ()!<$ G)
Store ()!<$ 6ocal()
19.5.114 Subtract (Integer Subtract)
S)ntax
#u4tract 'Minuend% Su.tra"end% Result( LB #nte,er
Argu%ents
(in'end and S'btra1end are evaluated as %ntegers.
5escription
S'btra1end is su0tracted from (in'end. and the result is optionall( stored into $es'lt! ,nderflow
conditions are ignored and the result simpl( loses the most significant 0its.
19.5.115 Switch (Select Code To Execute Based On Expression)
S)ntax
#<1tc> '0xression( )CaseTer#List/
Argu%ents
*xpression is an A!1 e/pression that evaluates to an %nteger, !tring or ;uffer.
5escription
The Switch, Case and 5efault statements help simplif( the creation of conditional and 0ranching code.
The Switch statement transfers control to a statement within the enclosed 0od( of e/ecuta0le A!1 code
%f the Case Aal'e is an %nteger, ;uffer or !tring, then control passes to the statement that matches the value
of Switch >*xpression?. %f the Case value is a 'ackage, then control passes if an( mem0er of the package
matches the Switch =Aal'e> The Switch CaseTerm,ist can include an( num0er of Case instances, 0ut no
two Case Aal'es =or mem0ers of a Aal'e, if Aal'e is a 'ackage> within the same Switch statement can have
the same value.
./ecution of the statement 0od( 0egins at the selected Term1ist and proceeds until the Term1ist end of
0od( or until a <reak or Continue statement transfers control out of the 0od(.
The 5efault statement is e/ecuted if no Case Aal'e matches the value of Switch >expression?. %f the
5efault statement is omitted, and no Case match is found, none of the statements in the Switch 0od( are
e/ecuted. There can 0e at most one 5efault statement. The 5efault statement can appear an(where in the
0od( of the Switch statement.
A Case or 5efault term can onl( appear inside a Switch statement. !witch statements can 0e nested.
Co%pati!ilit) 0oteH The Switch' Case' and 5efault terms were first introduced in AC'% 2.. @owever,
their implementation is 0ackward compati0le with AC'% 4. AM1 interpreters.
1xa%ple
,se of the Switch statement usuall( looks something like this<
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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#<1tc> (e-pre22ion)
)
Case (value)
Statement2 e-ecuted if 6e8ual (e-pre22ion$ value)
/
Case (Pac+a,e () value$ value$ value/)
Statement2 e-ecuted if 6e8ual (e-pre22ion$ an1 value in pac+a,e)
/
Default
Statement2 e-ecuted if e-pre22ion doe2 not e8ual
an1 ca2e con2tantEe-pre22ion
/
/
Co%piler 0oteH The following e/ample demonstrates how the !witch statement should 0e translated into
AC'% 4.&compati0le AM1<
Switch (&dd (&B)D( )$4)
)a2e (4)
Y2tatement24Y
/
)a2e (Pac+a,e () .$G$I/)
Y2tatement23Y
/
Default
Y2tatement2FY
/
/
is translated as<
While (0ne)
Yca2e 2tatement2Y
/
will generate a warning and the following code<
!ame (_<_#$ ()
Store (&B)D ()$ _<_#)
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83+ Advanced Configuration and 'ower %nterface !pecification
To remove the warning, the code should 0e<
Switch (<o#nte,er (&B)D ()))
Yca2e 2tatement2Y
/
19.5.116 ThermalZone (Declare Thermal Zone)
S)ntax
9>er2alZone 'T"er#al7one)a#e( )0b9ect6i2t/
Argu%ents
-eclares a Thermal ?one o0#ect named T1ermalIone;ame. Ther%alIone opens a name scope.
.ach use of a Ther%alIone term declares one thermal Hone in the s(stem. .ach thermal Hone in a s(stem
is re:uired to have a uni:ue T1ermalIone;ame.
5escription
A thermal Hone ma( 0e declared in the namespace an(where within the BC!; scope. 5or compati0ilit( with
operating s(stems implementing AC'% 4., a thermal Hone ma( also 0e declared under the BCT? scope. An
AC'%&compati0le namespace ma( define Thermal ?one o0#ects in either the BC!; or BCT? scope 0ut not
0oth.
5or e/ample A!1 code that uses a Thermal?one statement, see section 42, JThermal Management.L
19.5.117 Timer (Get 64-Bit Timer Value)
S)ntax
912er LB #nte,er
5escription
The timer opcode returns a monotonicall( increasing value that can 0e used 0( AC'% methods to measure
time passing, this ena0les speed optimiHation 0( allowing AM1 code to mark the passage of time
independent of 2! AC'% interpreter implementation.
The Sleep opcode can onl( indicate waiting for longer than the time specified.
The value resulting from this opcode is +"&0its. %t is monotonicall( increasing, 0ut it is not guaranteed that
ever( result will 0e uni:ue, i.e. two su0se:uent instructions ma( return the same value. The onl(
guarantee is that each su0se:uent evaluation will 0e greater&than or e:ual to the previous ones.
The period of this timer is 4 nanoseconds. While the underl(ing hardware ma( not support this
granularit(, the interpreter will do the conversion from the actual timer hardware fre:uenc( into 4
nanosecond units.
,sers of this opcode should realiHe that a value returned onl( represents the time at which the opcode itself
e/ecuted. There is no guarantee that the ne/t opcode in the instruction stream will e/ecute in an( particular
time 0ound.
The 2!'M can implement this using the AC'% Timer and keep track of overrun. 2ther implementations are
possi0le. This provides a0straction awa( from chipset differences
Co%pati!ilit) 0ote< New for AC'% 3.
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19.5.118 ToBCD (Convert Integer to BCD)
S)ntax
9oBCD '1alue% Result( LB #nte,er
Argu%ents
Aal'e is evaluated as an integer
5escription
The To<C5 operator is used to convert Aal'e from a numeric =%nteger> format to a ;C- format and
optionall( store the numeric value into $es'lt.
19.5.119 ToBufer (Convert Data to Bufer)
S)ntax
9oBuffer '!ata% Result( LB Buffer
Argu%ents
Data must 0e an %nteger, !tring, or ;uffer data t(pe.
5escription
Data is converted to 0uffer t(pe and the result is optionall( stored into $es'lt. %f Data was an integer, it is
converted into n 0(tes of 0uffer =where n is " if the definition 0lock has defined integers as 32&0its or 8 if
the definition 0lock has defined integers as +"&0its as indicated 0( the -efinition ;lock ta0le headerMs
3evision field>, taking the least significant 0(te of integer as the first 0(te of 0uffer. %f Data is a 0uffer, no
conversion is performed.
19.5.120 ToDecimalString (Convert Data to Decimal String)
S)ntax
9oDec12al#tr1n& '!ata% Result( LB Strin,
Argu%ents
Data must 0e an %nteger, !tring, or ;uffer data t(pe.
5escription
Data is converted to a decimal string, and the result is optionall( stored into $es'lt. %f Data is alread( a
string, no action is performed. %f Data is a 0uffer, it is converted to a string of decimal values separated 0(
commas. =.ach 0(te of the 0uffer is converted to a single decimal value.>
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19.5.121 ToHexString (Convert Data to Hexadecimal String)
S)ntax
9oBe=#tr1n& '!ata% Result( LB Strin,
Argu%ents
Data must 0e an %nteger, !tring, or ;uffer data t(pe.
5escription
Data is converted to a he/adecimal string, and the result is optionall( stored into $es'lt. %f Data is alread(
a string, no action is performed. %f Data is a 0uffer, it is converted to a string of he/adecimal values
separated 0( commas.
19.5.122 ToInteger (Convert Data to Integer)
S)ntax
9oInte&er '!ata% Result( LB #nte,er
Argu%ents
Data must 0e an %nteger, !tring, or ;uffer data t(pe.
5escription
Data is converted to integer t(pe and the result is optionall( stored into $es'lt. %f Data was a string, it must
0e either a decimal or he/adecimal numeric string =in other words, prefi/ed 0( J/L> and the value must
not e/ceed the ma/imum of an integer value. %f the value is e/ceeding the ma/imum, the result of the
conversion is unpredicta0le. %f Data was a ;uffer, the first 8 0(tes of the 0uffer are converted to an integer,
taking the first 0(te as the least significant 0(te of the integer. %f Data was an integer, no action is
performed.
19.5.123 ToString (Convert Bufer To String)
S)ntax
9o#tr1n& 'Source$ Lengt"$ Result( LB Strin,
Argu%ents
So'rce is evaluated as a 0uffer. ,engt1 is evaluated as an integer data t(pe.
5escription
!tarting with the first 0(te, the contents of the 0uffer are copied into the string until the num0er of
characters specified 0( ,engt1 is reached or a null => character is found! %f ,engt1 is not specified or is
3nes, then the contents of the 0uffer are copied until a null => character is found. %n an( case, a fatal error
will 0e generated if the num0er of characters copied e/ceeds 2 =not including the terminating null>. %f the
source 0uffer has a length of Hero, a Hero length =null terminator onl(> string will 0e created. The result is
copied into the $es'lt.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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19.5.124 ToUUID (Convert String to UUID Macro)
S)ntax
9o$$ID '+sciiString( LB Buffer
Argu%ents
AsciiString is evaluated as a !tring data t(pe.
5escription
This macro will convert an A!C%% string to a 428&0it 0uffer. The string must have the following format<
aa44cc""8eeff8&&>>811RR8%%ll22nnoopp
where aa O pp are one 0(te he/adecimal num0ers, made up of he/adecimal digits. The resulting 0uffer has
the following format<
Ta!le +.-&+ 22I5 <uffer 6or%at
String 2ffset %n ;uffer
aa 3
00 2
cc 4
dd
ee *
ff "
gg 9
hh +
ii 8
## 6
kk 4
ll 44
mm 42
nn 43
oo 4"
pp 4*
Co%pati!ilit) 0ote< New for AC'% 3.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8" Advanced Configuration and 'ower %nterface !pecification
19.5.125 Unicode (String To Unicode Conversion Macro)
S)ntax
$n1co"e 'String( LB Buffer
Argu%ents
This macro will convert a string to a ,nicode =,T5&4+> string contained in a 0uffer. The format of the
,nicode string is 4+ 0its per character, with a 4+&0it null terminator.
19.5.126 Unload (Unload Defnition Block)
S)ntax
$nloa" '6andle(
Argu%ents
%andle is evaluated as a --;@andle data t(pe.
5escription
'erforms a run&time unload of a -efinition ;lock that was loaded using a Load term. 1oading or unloading
a -efinition ;lock is a s(nchronous operation, and no control method e/ecution occurs during the function.
2n completion of the 2nload operation, the -efinition ;lock has 0een unloaded =all the namespace o0#ects
created as a result of the corresponding Load operation will 0e removed from the namespace>.
19.5.127 VendorLong (Long Vendor Resource Descriptor)
S)ntax
Ven"or;on& '!escritor)a#e( )1endorByteList/
Argu%ents
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
Aendor)yte,ist evaluates to a comma&separated list of 8&0it integer constants, where each 0(te is added
ver0atim to the 0od( of the Dendor1ong resource descriptor. A ma/imum of n 0(tes can 0e specified.
,,%- and ,,%- specific descriptor su0t(pe are part of the Aendor)yte,ist.
5escription
The 7endorLong macro evaluates to a 0uffer which contains a vendor&defined resource descriptor. The
format of the long form of the vendor&defined resource descriptor can 0e found in Dendor&-efined
-escriptor =page 3">. The macro is designed to 0e used inside of a 3esourceTemplate =page 826>.
This is similar to Dendor!hort =page 8"4>, e/cept that the num0er of allowed 0(tes in Aendor)yte,ist is
+*,*33 =instead of 9>.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
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19.5.128 VendorShort (Short Vendor Resource Descriptor)
S)ntax
Ven"or#>ort '!escritor)a#e( )1endorByteList/
Argu%ents
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
5escription
The 7endorShort macro evaluates to a 0uffer which contains a vendor&defined resource descriptor. The
format of the short form of the vendor&defined resource descriptor can 0e found in JDendor&-efined
-escriptorL =page 333>. The macro is designed to 0e used inside of a 3esourceTemplate =page 826>.
This is similar to Dendor1ong =page 8">, e/cept that the num0er of allowed 0(tes in Aendor)yte,ist is 9
=instead of +*,*33>.
19.5.129 Wait (Wait for a Synchronization Event)
S)ntax
5a1t 'Sync*./ect% Ti#eout1alue( LB Boolean
Argu%ents
Sync1=b:ect must 0e an event s(nchroniHation o0#ect. Timeo'tAal'e is evaluated as an %nteger. The calling
method 0locks while waiting for the event to 0e signaled.
5escription
The pending signal count is decremented. %f there is no pending signal count, the processor is relin:uished
until a signal count is posted to the .vent or until at least Timeo'tAal'e milliseconds have elapsed.
This operation returns a non&Hero value if a timeout occurred and a signal was not ac:uired. A
Timeo'tAal'e of /5555 indicates that there is no time out and the operation will wait indefinitel(.
19.5.130 While (Conditional Loop)
S)ntax
5>1le 'Predicate( )<erm6i2t/
Argu%ents
Predicate is evaluated as an integer.
5escription
%f the Predicate is non&Hero, the list of terms in Term1ist is e/ecuted. The operation repeats until the
Predicate evaluates to Hero.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8"2 Advanced Configuration and 'ower %nterface !pecification
19.5.131 WordBusNumber (Word Bus Number Resource Descriptor Macro)
S)ntax
5or"BusNu24er 'Resource-sage$ $sMinFixed$ $sMaxFixed$ !ecode$
+ddress:ranularity% +ddressMini#u#% +ddressMaxi#u#$ +ddressTranslation$
RangeLengt"$ ResourceSource$ndex% ResourceSource% !escritor)a#e(
Argu%ents
$eso'rceBsage specifies whether the 0us range is consumed 0( this device ="esourceConsu%er> or
passed on to child devices ="esourceProducer>. %f nothing is specified, then 3esourceConsumer is
assumed.
Is(in&ixed specifies whether the minimum address of this 0us num0er range is fi/ed =Min6ixed> or can 0e
changed =Min0ot6ixed>. %f nothing is specified, then MinNot5i/ed is assumed. The 4&0it field
Descriptor;ame. CM%5 is automaticall( created to refer to this portion of the resource descriptor, where O4M
is Min5i/ed and OM is MinNot5i/ed.
Is(ax&ixed specifies whether the ma/imum address of this 0us num0er range is fi/ed =Max6ixed> or can
0e changed =Max0ot6ixed>. %f nothing is specified, then Ma/Not5i/ed is assumed. The 4&0it field
Descriptor;ame! CMA5 is automaticall( created to refer to this portion of the resource descriptor, where
O4M is Ma/5i/ed and OM is Ma/Not5i/ed.
Decode specifies whether or not the device decodes the 0us num0er range using positive =Pos5ecode> or
su0tractive =Su!5ecode> decode. %f nothing is specifies, then 'os-ecode is assumed. The 4&0it field
Descriptor;ame. C-.C is automaticall( created to refer to this portion of the resource descriptor, where O4M
is !u0-ecode and OM is 'os-ecode.
Address4ran'larity evaluates to a 4+&0it integer that specifies the power&of&two 0oundar( =& 4> on which
the 0us num0er range must 0e aligned. The 4+&0it field Descriptor;ame. C$3A is automaticall( created to
refer to this portion of the resource descriptor.
Address(inim'm evaluates to a 4+&0it integer that specifies the lowest possi0le 0us num0er for the 0us
num0er range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is O4M.
5or 0ridge devices which translate addresses, this is the address on the secondar( 0us. The 4+&0it field
Descriptor;ame.CM%N is automaticall( created to refer to this portion of the resource descriptor.
Address(axim'm evaluates to a 4+&0it integer that specifies the highest possi0le 0us num0er for the 0us
num0er range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is O4M.
5or 0ridge devices which translate addresses, this is the address on the secondar( 0us. The 4+&0it field
Descriptor;ame.CMAA is automaticall( created to refer to this portion of the resource descriptor.
AddressTranslation evaluates to a 4+&0it integer that specifies the offset to 0e added to a secondar( 0us 0us
num0er which results in the corresponding primar( 0us 0us num0er. 5or all non&0ridge devices or 0ridges
which do not perform translation, this must 0e OM. The 4+&0it field Descriptor;ame.CT3A is automaticall(
created to refer to this portion of the resource descriptor.
$ange,engt1 evaluates to a 4+&0it integer that specifies the total num0er of 0us num0ers decoded in the 0us
num0er range. The 4+&0it field Descriptor;ame. C1.N is automaticall( created to refer to this portion of
the resource descriptor.
$eso'rceSo'rceIndex is an optional argument which evaluates to an 8&0it integer that specifies the resource
descriptor within the o0#ect specified 0( $eso'rceSo'rce.
$eso'rceSo'rce is an optional argument which evaluates to a string containing the path of a device which
produces the pool of resources from which this %F2 range is allocated.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8"3
5escription
The :ord<us0u%!er macro evaluates to a 0uffer which contains a 4+&0it 0us&num0er resource
descriptor. The format of the 4+&0it 0us num0er resource descriptor can 0e found in J.rror< 3eference
source not foundL =page .rror< 3eference source not found>. The macro is designed to 0e used inside of a
3esourceTemplate =page 826>.
19.5.132 WordIO (Word IO Resource Descriptor Macro)
S)ntax
5or"I6 'Resource-sage$ $sMinFixed$ $sMaxFixed$ !ecode$ $S+Ranges$
+ddress:ranularity% +ddressMini#u#% +ddressMaxi#u#$ +ddressTranslation$
RangeLengt"$ ResourceSource$ndex% ResourceSource% !escritor)a#e%
TranslationTye% Translation!ensity(
Argu%ents
$eso'rceBsage specifies whether the %F2 range is consumed 0( this device ="esourceConsu%er> or
passed on to child devices ="esourceProducer>. %f nothing is specified, then 3esourceConsumer is
assumed.
Is(in&ixed specifies whether the minimum address of this %F2 range is fi/ed =Min6ixed> or can 0e
changed =Min0ot6ixed>. %f nothing is specified, then MinNot5i/ed is assumed. The 4&0it field
Descriptor;ame. CM%5 is automaticall( created to refer to this portion of the resource descriptor, where O4M
is Min5i/ed and OM is MinNot5i/ed.
Is(ax&ixed specifies whether the ma/imum address of this %F2 range is fi/ed =Max6ixed> or can 0e
changed =Max0ot6ixed>. %f nothing is specified, then Ma/Not5i/ed is assumed. The 4&0it field
Descriptor;ame! CMA5 is automaticall( created to refer to this portion of the resource descriptor, where
O4M is Ma/5i/ed and OM is Ma/Not5i/ed.
Decode specifies whether or not the device decodes the %F2 range using positive =Pos5ecode> or
su0tractive =Su!5ecode> decode. %f nothing is specifies, then 'os-ecode is assumed. The 4&0it field
Descriptor;ame. C-.C is automaticall( created to refer to this portion of the resource descriptor, where O4M
is !u0-ecode and OM is 'os-ecode.
ISA$anges specifies whether the %F2 ranges specifies are limited to valid %!A %F2 ranges =ISA3nl)>, valid
non&%!A %F2 ranges =0onISA3nl)> or encompass the whole range without limitation =1ntire"ange>. The
2&0it field Descriptor;ame.C3N$ is automaticall( created to refer to this portion of the resource descriptor,
where O4M is Non%!A2nl(, O2M is %!A2nl( and OM is .ntire3ange.
Address4ran'larity evaluates to a 4+&0it integer that specifies the power&of&two 0oundar( =& 4> on which
the %F2 range must 0e aligned. The 4+&0it field Descriptor;ame. C$3A is automaticall( created to refer to
this portion of the resource descriptor.
Address(inim'm evaluates to a 4+&0it integer that specifies the lowest possi0le 0ase address of the %F2
range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is O4M. 5or
0ridge devices which translate addresses, this is the address on the secondar( 0us. The 4+&0it field
Descriptor;ame.CM%N is automaticall( created to refer to this portion of the resource descriptor.
Address(axim'm evaluates to a 4+&0it integer that specifies the highest possi0le 0ase address of the %F2
range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is O4M. 5or
0ridge devices which translate addresses, this is the address on the secondar( 0us. The 4+&0it field
Descriptor;ame.CMAA is automaticall( created to refer to this portion of the resource descriptor.
AddressTranslation evaluates to a 4+&0it integer that specifies the offset to 0e added to a secondar( 0us %F2
address which results in the corresponding primar( 0us %F2 address. 5or all non&0ridge devices or 0ridges
which do not perform translation, this must 0e OM. The 4+&0it field Descriptor;ame.CT3A is automaticall(
created to refer to this portion of the resource descriptor.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8"" Advanced Configuration and 'ower %nterface !pecification
$ange,engt1 evaluates to a 4+&0it integer that specifies the total num0er of 0(tes decoded in the %F2 range.
The 4+&0it field Descriptor;ame. C1.N is automaticall( created to refer to this portion of the resource
descriptor.
$eso'rceSo'rceIndex is an optional argument which evaluates to an 8&0it integer that specifies the resource
descriptor within the o0#ect specified 0( $eso'rceSo'rce.
$eso'rceSo'rce is an optional argument which evaluates to a string containing the path of a device which
produces the pool of resources from which this %F2 range is allocated.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
TranslationType is an optional argument that specifies whether the resource t(pe on the secondar( side of
the 0us is different =T)peTranslation> from that on the primar( side of the 0us or the same =T)peStatic>. %f
T(peTranslation is specified, then the secondar( side of the 0us is Memor(. %f T(pe!tatic is specified, then
the secondar( side of the 0us is %F2. %f nothing is specified, then T(pe!tatic is assumed. The 4&0it field
Descriptor;ame. CTT' is automaticall( created to refer to this portion of the resource descriptor, where O4M
is T(peTranslation and OM is T(pe!tatic. !ee CTT' =page 3+> for more information
TranslationDensity is an optional argument that specifies whether or not the translation from the primar( to
secondar( 0us is sparse =SparseTranslation> or dense =5enseTranslation>. %t is onl( used when
TranslationType is T)peTranslation. %f nothing is specified, then -enseTranslation is assumed. The 4&0it
field Descriptor;ame. CT3! is automaticall( created to refer to this portion of the resource descriptor,
where O4M is !parseTranslation and OM is -enseTranslation. !ee CT3! =page 3*6> for more information.
5escription
The :ordI3 macro evaluates to a 0uffer which contains a 4+&0it %F2 range resource descriptor. The format
of the 4+&0it %F2 range resource descriptor can 0e found in J.rror< 3eference source not foundL =page
.rror< 3eference source not found>. The macro is designed to 0e used inside of a 3esourceTemplate =page
826>.
19.5.133 WordSpace (Word Space Resource Descriptor Macro) )
S)ntax
5or"#pace 'ResourceTye% Resource-sage$ !ecode$ $sMinFixed$ $sMaxFixed%
TyeSecificFlags% +ddress:ranularity% +ddressMini#u#% +ddressMaxi#u#$
+ddressTranslation$ RangeLengt"$ ResourceSource$ndex% ResourceSource%
!escritor)a#e(
Argu%ents
$eso'rceType evaluates to an 8&0it integer that specifies the t(pe of this resource. Accepta0le values are
/C through /55.
$eso'rceBsage specifies whether the 0us range is consumed 0( this device ="esourceConsu%er> or
passed on to child devices ="esourceProducer>. %f nothing is specified, then 3esourceConsumer is
assumed.
Decode specifies whether or not the device decodes the 0us num0er range using positive =Pos5ecode> or
su0tractive =Su!5ecode> decode. %f nothing is specifies, then 'os-ecode is assumed. The 4&0it field
Descriptor;ame. C-.C is automaticall( created to refer to this portion of the resource descriptor, where O4M
is !u0-ecode and OM is 'os-ecode.
Is(in&ixed specifies whether the minimum address of this 0us num0er range is fi/ed =Min6ixed> or can 0e
changed =Min0ot6ixed>. %f nothing is specified, then MinNot5i/ed is assumed. The 4&0it field
Descriptor;ame. CM%5 is automaticall( created to refer to this portion of the resource descriptor, where O4M
is Min5i/ed and OM is MinNot5i/ed.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8"*
Is(ax&ixed specifies whether the ma/imum address of this 0us num0er range is fi/ed =Max6ixed> or can
0e changed =Max0ot6ixed>. %f nothing is specified, then Ma/Not5i/ed is assumed. The 4&0it field
Descriptor;ame! CMA5 is automaticall( created to refer to this portion of the resource descriptor, where
O4M is Ma/5i/ed and OM is Ma/Not5i/ed.
TypeSpecific&lags evaluates to an 8&0it integer. The flags are specific to the $eso'rceType.
Address4ran'larity evaluates to a 4+&0it integer that specifies the power&of&two 0oundar( =& 4> on which
the 0us num0er range must 0e aligned. The 4+&0it field Descriptor;ame. C$3A is automaticall( created to
refer to this portion of the resource descriptor.
Address(inim'm evaluates to a 4+&0it integer that specifies the lowest possi0le 0us num0er for the 0us
num0er range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is O4M.
5or 0ridge devices which translate addresses, this is the address on the secondar( 0us. The 4+&0it field
Descriptor;ame.CM%N is automaticall( created to refer to this portion of the resource descriptor.
Address(axim'm evaluates to a 4+&0it integer that specifies the highest possi0le 0us num0er for the 0us
num0er range. The value must have OM in all 0its where the corresponding 0it in Address4ran'larity is O4M.
5or 0ridge devices which translate addresses, this is the address on the secondar( 0us. The 4+&0it field
Descriptor;ame.CMAA is automaticall( created to refer to this portion of the resource descriptor.
AddressTranslation evaluates to a 4+&0it integer that specifies the offset to 0e added to a secondar( 0us 0us
num0er which results in the corresponding primar( 0us 0us num0er. 5or all non&0ridge devices or 0ridges
which do not perform translation, this must 0e OM. The 4+&0it field Descriptor;ame.CT3A is automaticall(
created to refer to this portion of the resource descriptor.
$ange,engt1 evaluates to a 4+&0it integer that specifies the total num0er of 0us num0ers decoded in the 0us
num0er range. The 4+&0it field Descriptor;ame. C1.N is automaticall( created to refer to this portion of
the resource descriptor.
$eso'rceSo'rceIndex is an optional argument which evaluates to an 8&0it integer that specifies the resource
descriptor within the o0#ect specified 0( $eso'rceSo'rce.
$eso'rceSo'rce is an optional argument which evaluates to a string containing the path of a device which
produces the pool of resources from which this %F2 range is allocated.
Descriptor;ame is an optional argument that specifies a name of an o0#ect reference that will 0e created in
the current scope referring to the entire resource descriptor 0uffer.
5escription
The :ordSpace macro evaluates to a 0uffer which contains a 4+&0it Address !pace resource descriptor.
The format of the 4+&0it Address !pace resource descriptor can 0e found in J.rror< 3eference source not
foundL =page .rror< 3eference source not found>. The macro is designed to 0e used inside of a
3esourceTemplate =page 826>.
19.5.134 XOr (Integer Bitwise Xor)
S)ntax
X6r 'Source&% Source2% Result( LB #nte,er
Argu%ents
So'rce1 and So'rce" are evaluated as %ntegers.
5escription
A 0itwise =3" is performed and the result is optionall( stored into $es'lt!
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8"+ Advanced Configuration and 'ower %nterface !pecification
19.5.135 Zero (Constant Zero Object)
S)ntax
Zero
5escription
The constant Iero o0#ect is an o0#ect of t(pe %nteger that will alwa(s read as all 0its clear. Writes to this
o0#ect are not allowed.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8"9
20 ACPI Machine Language (AML) Specifcation
This section formall( defines the AC'% Control Method Machine 1anguage =AM1> language. AM1 is the
AC'% Control Method virtual machine language, machine code for a virtual machine that is supported 0(
an AC'%&compati0le 2!. AC'% control methods can 0e written in AM1, 0ut humans ordinaril( write
control methods in A!1.
AM1 is the language processed 0( the AC'% AM1 interpreter. %t is primaril( a declarative language. %tMs
0est not to think of it as a stream of code, 0ut rather as a set of declarations that the AC'% AM1 interpreter
will compile into the AC'% Namespace at definition 0lock load time. 5or e/ample, notice that -ef;(te
allocates an anon(mous integer varia0le with a 0(te&siHe initial value in AC'% namespace, and passes in an
initial value. The 0(te in the AM1 stream that defines the initial value is not the address of the varia0leMs
storage location.
An 2.M or ;%2! vendor needs to write A!1 and 0e a0le to single&step AM1 for de0ugging. =-e0uggers
and other AC'% control method language tools are e/pected to 0e AM1&level tools, not source&level tools.>
An A!1 translator implementer must understand how to read A!1 and generate AM1. An AM1 interpreter
author must understand how to e/ecute AM1.
AM1 and A!1 are different languages though the( are closel( related.
All AC'%&compati0le operating s(stems must support AM1. A given user can define some ar0itrar( source
language =to replace A!1> and write a tool to translate it to AM1. @owever, the AC'% group will support a
single translator for a single language, A!1.
20.1 Notation Conventions
The notation conventions in the ta0le 0elow help the reader to interpret the AM1 formal grammar.
Ta!le +/-+ AML ;ra%%ar 0otation Conventions
0otation Convention 5escription 1xa%ple
/dd
3efers to a 0(te value e/pressed as
2 he/adecimal digits.
/24
Num0er in 0old.
-enotes the encoding of the AM1
term.
Term \) .valuated T(pe
!hows the resulting t(pe of the
evaluation of Term.
!ingle :uotes =O M> %ndicate constant characters. OAM \) /"4
Term <\ Term Term N
The term to the left of <\ can 0e
e/panded into the se:uence of
terms on the right.
aterm <\ 0term cterm means that aterm can 0e
e/panded into the two&term se:uence of
0term followed 0( cterm.
Term Term Term N
Terms separated from each other
0( spaces form an ordered list.
Angle 0rackets =T ) > ,sed to group items.
Ta 0) h Tc d) means either
a 0 or c d.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8"8 Advanced Configuration and 'ower %nterface !pecification
0otation Convention 5escription 1xa%ple
;ar s(m0ol = h > !eparates alternatives.
aterm <\ 0term h Vcterm dtermW means the
following constructs are possi0le<
0term
cterm dterm
aterm <\ V0term h ctermW dterm means the
following constructs are possi0le<
0term dterm
cterm dterm
-ash character = & > %ndicates a range.
4&6 means a single digit in the range 4 to 6
inclusive.
'arenthesiHed term
following another term.
The parenthesiHed term is the
repeat count of the previous term.
aterm=3> means aterm aterm aterm.
0term=n> means n num0er of 0terms.
20.2 AML Grammar Defnition
This section defines the 0(te values that make up an AM1 0(te stream.
The AM1 encoding can 0e categoriHed in the following groups<
Ta0le and Ta0le @eader encoding
Name o0#ects encoding
-ata o0#ects encoding
'ackage length encoding
Term o0#ects encoding
Miscellaneous o0#ects encoding
20.2.1 Table and Table Header Encoding
&;6)ode >L DefBloc+"dr <erm6i2t
DefBloc+"dr >L <ableSi,nature <able6en,th Spec)ompliance )hec+Sum 0em#D
0em<able#D 0emRevi2ion )reator#D )reatorRevi2ion
<ableSi,nature >L DWord)on2t // &2 defined in 2ection G.3.F.
<able6en,th >L Dword)on2t // 6en,th of the table in b1te2 includin,
// the bloc+ header.
Spec)ompliance >L B1te)on2t // <he revi2ion of the 2tructure.
)hec+Sum >L B1te)on2t // B1te chec+2um of the entire table.
0em#D >L B1te)on2t(I) // 0%; #D of up to I character2. #f the 0%;
// #D i2 2horter than I character2$ it
// can be terminated with a !X66
// character.
0em<able#D >L B1te)on2t(=) // 0%; <able #D of up to = character2. #f
// the 0%; <able #D i2 2horter than =
// character2$ it can be terminated with
// a !X66 character.
0emRevi2ion >L DWord)on2t // 0%; <able Revi2ion.
)reator#D >L DWord)on2t // @endor #D of the &S6 compiler.
)reatorRevi2ion >L DWord)on2t // Revi2ion of the &S6 compiler.
20.2.2 Name Objects Encoding
6ead!ame)har >L `A]E`Z] U `_]
Di,it)har >L `*]E`F]
!ame)har >L Di,it)har U 6ead!ame)har
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8"6
Root)har >L `\]
ParentPrefi-)har >L `^]
`&]E`7] >L *=L7 E *=MA
`_] >L *=MD
`(]E`H] >L *=K* E *=KF
`\] >L *=MC
`\] >L *=ME
!ameSe, >L ?6ead!ame)har !ame)har !ame)har !ame)harB
// !otice that !ameSe,2 2horter than . character2 are filled with
// trailin, under2core2 (`_]2).
!ameStrin, >L ?Root)har !amePathB U ?Prefi-Path !amePathB
Prefi-Path >L !othin, U ?`\] Prefi-PathB
!amePath >L !ameSe, U Dual!amePath U ;ulti!amePath U !ull!ame
Dual!amePath >L Dual!amePrefi- !ameSe, !ameSe,
Dual!amePrefi- >L *=.E
;ulti!amePath >L ;ulti!amePrefi- Se,)ount !ameSe,(Se,)ount)
;ulti!amePrefi- >L *=.D
Se,)ount >L B1teData
!ote> Se,)ount can be from 4 to 3GG. 5or e-ample> ;ulti!amePrefi-(FG) i2 encoded a2
(-3f (-3F and followed b1 FG !ameSe,2. So$ the total encodin, len,th will be 4 D 4 D
FG[. L 4.3. !otice that> DualNa2ePref1= Na2e#e& Na2e#e& ha2 a 2maller encodin, than
the encodin, of> Ault1Na2ePref1='.( Na2e#e& Na2e#e&
Simple!ame >L !ameStrin, U &r,0b9 U 6ocal0b9
Super!ame >L Simple!ame U Debu,0b9 U <1peI0pcode
!ull!ame >L *=**
<ar,et >L Super!ame U !ull!ame
20.2.3 Data Objects Encoding
)omputationalData >L B1te)on2t U Word)on2t U Dword)on2t U Jword)on2t U Strin, U
)on2t0b9 U Revi2ion0p U DefBuffer
Data0b9ect >L )omputationalData U DefPac+a,e U Def@arPac+a,e
DataRef0b9ect >L Data0b9ect U 0b9ectReference U DDB"andle
B1te)on2t >L B1tePrefi- B1teData
B1tePrefi- >L *=*A
Word)on2t >L WordPrefi- WordData
WordPrefi- >L *=*B
DWord)on2t >L DWordPrefi- DWordData
DWordPrefi- >L *=*C
JWord)on2t >L JWordPrefi- JWordData
JWordPrefi- >L *=*E
Strin, >L Strin,Prefi- &2cii)har6i2t !ull)har
Strin,Prefi- >L *=*D
)on2t0b9 >L 7ero0p U 0ne0p U 0ne20p
B1te6i2t >L !othin, U ?B1teData B1te6i2tB
B1teData >L *=** E *=DD
WordData >L B1teDataM(>TN B1teDataM=>4GN
// *=****8*=DDDD
DWordData >L WordDataM(>4GN WordDataM4I>F4N
// *=********8*=DDDDDDDD
JWordData >L DwordDataM(>F4N DwordDataMF3>IFN
// *=****************8*=DDDDDDDDDDDDDDDD
&2cii)har6i2t >L !othin, U ?&2cii)har &2cii)har6i2tB
&2cii)har >L *=*7 E *=GD
!ull)har >L *=**
7ero0p >L *=**
0ne0p >L *=*7
0ne20p >L *=DD
Revi2ion0p >L %-t0pPrefi- *=K*
%-t0pPrefi- >L *=MB
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8* Advanced Configuration and 'ower %nterface !pecification
20.2.4 Package Length Encoding
P+,6en,th >L P+,6eadB1te U
?P+,6eadB1te B1teDataB U
?P+,6eadB1te B1teData B1teDataB U
?P+,6eadB1te B1teData B1teData B1teDataB
P+,6eadB1te >L ?bit TEI> B1teData count that follow2 ((EF)B
?bit GE.> 0nl1 u2ed if P+,6en,th ? IFB
?bit FE(> 6ea2t 2i,nificant pac+a,e len,th n1bbleB
!ote> <he hi,h 3 bit2 of the fir2t b1te reveal how man1 follow b1te2 are in the
P%&;en&t>. #f the P%&;en&t> ha2 onl1 one b1te$ bit ( throu,h G are u2ed to encode the
pac+a,e len,th (in other word2$ value2 (EIF). #f the pac+a,e len,th value i2 more than
IF$ more than one b1te mu2t be u2ed for the encodin, in which ca2e bit . and G of the
P+,6eadB1te are re2erved and mu2t be Cero. #f the multiple b1te2 encodin, i2 u2ed$
bit2 (EF of the P%&;ea"B:te become the lea2t 2i,nificant . bit2 of the re2ultin,
pac+a,e len,th value. <he ne-t B1teData will become the ne-t lea2t 2i,nificant = bit2
of the re2ultin, value and 2o on$ up to F B1teData b1te2. <hu2$ the ma-imum pac+a,e
len,th i2 3[[3=.
20.2.5 Term Objects Encoding
<erm0b9 >L !ameSpace;odifier0b9 U !amed0b9 U <1pe40pcode U <1pe30pcode
<erm6i2t >L !othin, U ?<erm0b9 <erm6i2tB
<erm&r, >L <1pe30pcode U Data0b9ect U &r,0b9 U 6ocal0b9
X2er<erm0b9 >L !ameStrin, <erm&r,6i2t
<erm&r,6i2t >L !othin, U ?<erm&r, <erm&r,6i2tB
0b9ect6i2t >L !othin, U ?0b9ect 0b9ect6i2tB
0b9ect >L !ameSpace;odifier0b9 U !amed0b9
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8*4
20.2.5.1
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8*2 Advanced Configuration and 'ower %nterface !pecification
Namespace Modifer Objects Encoding
!ameSpace;odifier0b9 >L Def&lia2 U Def!ame U DefScope
Def&lia2 >L &lia20p !ameStrin, !ameStrin,
&lia20p >L *=*N
Def!ame >L !ame0p !ameStrin, DataRef0b9ect
!ame0p >L *=*S
DefScope >L Scope0p P+,6en,th !ameStrin, <erm6i2t
Scope0p >L *=7*
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8*3
20.2.5.2
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8*" Advanced Configuration and 'ower %nterface !pecification
Named Objects Encoding
!amed0b9 >L DefBan+5ield U Def)reateBit5ield U Def)reateB1te5ield U
Def)reateDWord5ield U Def)reate5ield U Def)reateJWord5ield U
Def)reateWord5ield U DefDataRe,ion U DefDevice U Def%vent U
Def5ield U Def#nde-5ield U Def;ethod U Def;ute- U Def0pRe,ion U
DefPowerRe2 U DefProce22or U Def<hermal7one
DefBan+5ield >L Ban+5ield0p P+,6en,th !ameStrin, !ameStrin, Ban+@alue 5ield5la,2
5ield6i2t
Ban+5ield0p >L %-t0pPrefi- *=SG
Ban+@alue >L <erm&r, LB #nte,er
5ield5la,2 >L B1teData // bit (EF> &cce22<1pe
// ( An:Acc
// 4 B:teAcc
// 3 5or"Acc
// F D5or"Acc
// . Q5or"Acc
// G BufferAcc
// I Reserved
// TE4G Reserved
// bit .> 6oc+Rule
// ( No;oc%
// 4 ;oc%
// bit GEI> XpdateRule
// ( Presere
// 4 5r1teAs6nes
// 3 Wr1teAsZeros
// bit T> Reserved (mu2t be ()
5ield6i2t >L !othin, U ?5ield%lement 5ield6i2tB
5ield%lement >L !amed5ield U Re2erved5ield U &cce225ield
!amed5ield >L !ameSe, P+,6en,th
Re2erved5ield >L *=** P+,6en,th
&cce225ield >L *=*7 &cce22<1pe &cce22&ttrib
&cce22<1pe >L B1teData // Same a2 &cce22<1pe bit2 of 5ield5la,2.
&cce22&ttrib >L B1teData // #f &cce22<1pe i2 Buffer&cc for the S;B
// 0pRe,ion$ &cce22&ttrib can be one of
// the followin, value2>
// (-(3 #ABQu1c%
// (-(. #AB#en"Rece1e
// (-(I #ABB:te
// (-(= #AB5or"
// (-(& #ABBloc%
// (-() #ABProcessCall
// (-(D #ABBloc%ProcessCall
Def)reateBit5ield >L )reateBit5ield0p SourceBuff Bit#nde- !ameStrin,
)reateBit5ield0p >L *=SD
SourceBuff >L <erm&r, LB Buffer
Bit#nde- >L <erm&r, LB #nte,er
Def)reateB1te5ield >L )reateB1te5ield0p SourceBuff B1te#nde- !ameStrin,
)reateB1te5ield0p >L *=SC
B1te#nde- >L <erm&r, LB #nte,er
Def)reateDWord5ield >L )reateDWord5ield0p SourceBuff B1te#nde- !ameStrin,
)reateDWord5ield0p >L *=SA
Def)reate5ield >L )reate5ield0p SourceBuff Bit#nde- !umBit2 !ameStrin,
)reate5ield0p >L %-t0pPrefi- *=7K
!umBit2 >L <erm&r, LB #nte,er
Def)reateJWord5ield >L )reateJWord5ield0p SourceBuff B1te#nde- !ameStrin,
)reateJWord5ield0p >L *=SD
Def)reateWord5ield >L )reateWord5ield0p SourceBuff B1te#nde- !ameStrin,
)reateWord5ield0p >L *=SB
DefDataRe,ion >L DataRe,ion0p !ameStrin, <erm&r, <erm&r, <erm&r,
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8**
DataRe,ion0p >L %-0pPrefi- *=SS
DefDevice >L Device0p P+,6en,th !ameStrin, 0b9ect6i2t
Device0p >L %-t0pPrefi- *=S.
Def%vent >L %vent0p !ameStrin,
%vent0p >L %-t0pPrefi- *=*.
Def5ield >L 5ield0p P+,6en,th !ameStrin, 5ield5la,2 5ield6i2t
5ield0p >L %-t0pPrefi- *=S7
Def#nde-5ield >L #nde-5ield0p P+,6en,th !ameStrin, !ameStrin, 5ield5la,2 5ield6i2t
#nde-5ield0p >L %-t0pPrefi- *=SN
Def;ethod >L ;ethod0p P+,6en,th !ameStrin, ;ethod5la,2 <erm6i2t
;ethod0p >L *=7L
;ethod5la,2 >L B1teData // bit (E3> &r,)ount ((ET)
// bit F> SerialiCe5la,
// ( Not#er1al1Ee"
// 4 #er1al1Ee"
// bit .ET> S1nc6evel ((-((E(-(f)
Def;ute- >L ;ute-0p !ameStrin, S1nc5la,2
;ute-0p >L %-t0pPrefi- *=*7
S1nc5la,2 >L B1teData // bit (EF> S1nc6evel ((-((E(-(f)
// bit .ET> Reserved (mu2t be ()
Def0pRe,ion >L 0pRe,ion0p !ameStrin, Re,ionSpace Re,ion0ff2et Re,ion6en
0pRe,ion0p >L %-t0pPrefi- *=S*
Re,ionSpace >L B1teData // (-(( #:ste2Ae2or:
// (-(4 #:ste2I6
// (-(3 PCI_Conf1&
// (-(F E24e""e"Control
// (-(. #ABus
// (-(G CA6#
// (-(I Pc1Bar9ar&et
// (-=(E(-55> X2er Defined
Re,ion0ff2et >L <erm&r, LB #nte,er
Re,ion6en >L <erm&r, LB #nte,er
DefPowerRe2 >L PowerRe20p P+,6en,th !ameStrin, S12tem6evel Re2ource0rder
0b9ect6i2t
PowerRe20p >L %-t0pPrefi- *=SL
S12tem6evel >L B1teData
Re2ource0rder >L WordData
DefProce22or >L Proce22or0p P+,6en,th !ameStrin, Proc#D Pbl+&ddr Pbl+6en
0b9ect6i2t
Proce22or0p >L %-t0pPrefi- *=SK
Proc#D >L B1teData
Pbl+&ddr >L DwordData
Pbl+6en >L B1teData
Def<hermal7one >L <hermal7one0p P+,6en,th !ameStrin, 0b9ect6i2t
<hermal7one0p >L %-t0pPrefi- *=SM
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8*+ Advanced Configuration and 'ower %nterface !pecification
20.2.5.3
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8*9
Type 1 Opcodes Encoding
<1pe40pcode >L DefBrea+ U DefBrea+Point U Def)ontinue U Def5atal U Def#f%l2e U
Def6oad U Def!oop U Def!otif1 U DefRelea2e U DefRe2et U DefReturn
U DefSi,nal U DefSleep U DefStall U DefXnload U DefWhile
DefBrea+ >L Brea+0p
Brea+0p >L *=AM
DefBrea+Point >L Brea+Point0p
Brea+Point0p >L *=CC
Def)ontinue >L )ontinue0p
)ontinue0p >L *=FD
Def%l2e >L !othin, U ?%l2e0p P+,6en,th <erm6i2tB
%l2e0p >L *=A7
Def5atal >L 5atal0p 5atal<1pe 5atal)ode 5atal&r,
5atal0p >L %-t0pPrefi- *=K.
5atal<1pe >L B1teData
5atal)ode >L DwordData
5atal&r, >L <erm&r, LB #nte,er
Def#f%l2e >L #f0p P+,6en,th Predicate <erm6i2t Def%l2e
#f0p >L *=A*
Predicate >L <erm&r, LB #nte,er
Def6oad >L 6oad0p !ameStrin, DDB"andle0b9ect
6oad0p >L %-t0pPrefi- *=.*
DDB"andle0b9ect >L Super!ame
Def!oop >L !oop0p
!oop0p >L *=AK
Def!otif1 >L !otif10p !otif10b9ect !otif1@alue
!otif10p >L *=SN
!otif10b9ect >L Super!ame LB <hermal7one U Proce22or U Device
!otif1@alue >L <erm&r, LB #nte,er
DefRelea2e >L Relea2e0p ;ute-0b9ect
Relea2e0p >L %-t0pPrefi- *=.G
;ute-0b9ect >L Super!ame
DefRe2et >L Re2et0p %vent0b9ect
Re2et0p >L %-t0pPrefi- *=.N
%vent0b9ect >L Super!ame
DefReturn >L Return0p &r,0b9ect
Return0p >L *=AL
&r,0b9ect >L <erm&r, LB DataRef0b9ect
DefSi,nal >L Si,nal0p %vent0b9ect
Si,nal0p >L %-t0pPrefi- *=.L
DefSleep >L Sleep0p ;2ec<ime
Sleep0p >L %-t0pPrefi- *=..
;2ec<ime >L <erm&r, LB #nte,er
DefStall >L Stall0p X2ec<ime
Stall0p >L %-t0pPrefi- *=.7
X2ec<ime >L <erm&r, LB B1teData
DefXnload >L Xnload0p DDB"andle0b9ect
Xnload0p >L %-t0pPrefi- *=.A
DefWhile >L While0p P+,6en,th Predicate <erm6i2t
While0p >L *=A.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8*8 Advanced Configuration and 'ower %nterface !pecification
20.2.5.4
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8*6
Type 2 Opcodes Encoding
<1pe30pcode >L Def&c8uire U Def&dd U Def&nd U DefBuffer U Def)oncat U
Def)oncatRe2 U Def)ondRef0f U Def)op10b9ect U DefDecrement U
DefDeref0f U DefDivide U Def5indSet6eftBit U Def5indSetRi,htBit U
Def5romB)D U Def#ncrement U Def#nde- U Def6&nd U Def6%8ual U
Def6:reater U Def6:reater%8ual U Def66e22 U Def66e22%8ual U Def;id
U Def6!ot U Def6!ot%8ual U Def6oad<able U Def60r U Def;atch U
Def;od U Def;ultipl1 U Def!&nd U Def!0r U Def!ot U Def0b9ect<1pe U
Def0r U DefPac+a,e U Def@arPac+a,e U DefRef0f U DefShift6eft U
DefShiftRi,ht U DefSiCe0f U DefStore U DefSubtract U Def<imer U
Def<oB)D U Def<oBuffer U Def<oDecimalStrin, U Def<o"e-Strin, U
Def<o#nte,er U Def<oStrin, U DefWait U DefR0r U X2er<erm0b9
<1peI0pcode >L DefRef0f U DefDeref0f U Def#nde- U X2er<erm0b9
Def&c8uire >L &c8uire0p ;ute-0b9ect <imeout
&c8uire0p >L %-t0pPrefi- *=.K
<imeout >L WordData
Def&dd >L &dd0p 0perand 0perand <ar,et
&dd0p >L *=G.
0perand >L <erm&r, LB #nte,er
Def&nd >L &nd0p 0perand 0perand <ar,et
&nd0p >L *=GB
DefBuffer >L Buffer0p P+,6en,th BufferSiCe B1te6i2t
Buffer0p >L *=77
BufferSiCe >L <erm&r, LB #nte,er
Def)oncat >L )oncat0p Data Data <ar,et
)oncat0p >L *=GK
Data >L <erm&r, LB )omputationalData
Def)oncatRe2 >L )oncatRe20p BufData BufData <ar,et
)oncatRe20p >L *=SL
BufData >L <erm&r, LB Buffer
Def)ondRef0f >L )ondRef0f0p Super!ame <ar,et
)ondRef0f0p >L %-t0pPrefi- *=7.
Def)op10b9ect >L )op10b9ect0p <erm&r, Simple!ame
)op10b9ect0p >L *=FD
DefDecrement >L Decrement0p Super!ame
Decrement0p >L *=GN
DefDeref0f >L Deref0f0p 0b9Reference
Deref0f0p >L *=SK
0b9Reference >L <erm&r, LB 0b9ectReference U Strin,
DefDivide >L Divide0p Dividend Divi2or Remainder Juotient
Divide0p >L *=GS
Dividend >L <erm&r, LB #nte,er
Divi2or >L <erm&r, LB #nte,er
Remainder >L <ar,et
Juotient >L <ar,et
Def5indSet6eftBit >L 5indSet6eftBit0p 0perand <ar,et
5indSet6eftBit0p >L *=S7
Def5indSetRi,htBit >L 5indSetRi,htBit0p 0perand <ar,et
5indSetRi,htBit0p >L *=S.
Def5romB)D >L 5romB)D0p B)D@alue <ar,et
5romB)D0p >L %-t0pPrefi- *=.S
B)D@alue >L <erm&r, LB #nte,er
Def#ncrement >L #ncrement0p Super!ame
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
8+ Advanced Configuration and 'ower %nterface !pecification
#ncrement0p >L *=GM
Def#nde- >L #nde-0p BuffP+,Str0b9 #nde-@alue <ar,et
#nde-0p >L *=SS
BuffP+,Str0b9 >L <erm&r, LB Buffer$ Pac+a,e or Strin,
#nde-@alue >L <erm&r, LB #nte,er
Def6&nd >L 6and0p 0perand 0perand
6and0p >L *=F*
Def6%8ual >L 6e8ual0p 0perand 0perand
6e8ual0p >L *=FK
Def6:reater >L 6,reater0p 0perand 0perand
6,reater0p >L *=FL
Def6:reater%8ual >L 6,reater%8ual0p 0perand 0perand
6,reater%8ual0p >L 6not0p 6le220p
Def66e22 >L 6le220p 0perand 0perand
6le220p >L *=FM
Def66e22%8ual >L 6le22%8ual0p 0perand 0perand
6le22%8ual0p >L 6not0p 6,reater0p
Def6!ot >L 6not0p 0perand
6not0p >L *=F.
Def6!ot%8ual >L 6not%8ual0p 0perand 0perand
6not%8ual0p >L 6not0p 6e8ual0p
Def6oad<able >L 6oad<able0p <erm&r, <erm&r, <erm&r, <erm&r, <erm&r, <erm&r,
6oad<able0p >L %-t0pPrefi- *=7D
Def60r >L 6or0p 0perand 0perand
6or0p >L *=F7
Def;atch >L ;atch0p SearchP+, ;atch0pcode 0perand ;atch0pcode 0perand
Start#nde-
;atch0p >L *=SF
SearchP+, >L <erm&r, LB Pac+a,e
;atch0pcode >L B1teData // ( ;<R
// 4 ;%J
// 3 ;6%
// F ;6<
// . ;:%
// G ;:<
Start#nde- >L <erm&r, LB #nte,er
Def;id >L ;id0p ;id0b9 <erm&r, <erm&r, <ar,et
;id0p >L *=FE
;id0b9 >L <erm&r, LB Buffer U Strin,
Def;od >L ;od0p Dividend Divi2or <ar,et
;od0p >L *=SM
Def;ultipl1 >L ;ultipl10p 0perand 0perand <ar,et
;ultipl10p >L *=GG
Def!&nd >L !and0p 0perand 0perand <ar,et
!and0p >L *=GC
Def!0r >L !or0p 0perand 0perand <ar,et
!or0p >L *=GE
Def!ot >L !ot0p 0perand <ar,et
!ot0p >L *=S*
Def0b9ect<1pe >L 0b9ect<1pe0p Super!ame
0b9ect<1pe0p >L *=SE
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
%nde/ 8+4
Def0r >L 0r0p 0perand 0perand <ar,et
0r0p >L *=GD
DefPac+a,e >L Pac+a,e0p P+,6en,th !um%lement2 Pac+a,e%lement6i2t
Pac+a,e0p >L *=7.
Def@arPac+a,e >L @arPac+a,e0p P+,6en,th @ar!um%lement2 Pac+a,e%lement6i2t
@arPac+a,e0p >L *=7K
!um%lement2 >L B1teData
@ar!um%lement2 >L <erm&r, LB #nte,er
Pac+a,e%lement6i2t >L !othin, U ?Pac+a,e%lement Pac+a,e%lement6i2tB
Pac+a,e%lement >L DataRef0b9ect U !ameStrin,
DefRef0f >L Ref0f0p Super!ame
Ref0f0p >L *=G7
DefShift6eft >L Shift6eft0p 0perand Shift)ount <ar,et
Shift6eft0p >L *=GF
Shift)ount >L <erm&r, LB #nte,er
DefShiftRi,ht >L ShiftRi,ht0p 0perand Shift)ount <ar,et
ShiftRi,ht0p >L *=GA
DefSiCe0f >L SiCe0f0p Super!ame
SiCe0f0p >L *=SG
DefStore >L Store0p <erm&r, Super!ame
Store0p >L *=G*
DefSubtract >L Subtract0p 0perand 0perand <ar,et
Subtract0p >L *=GL
Def<imer >L <imer0p
<imer0p >L *=MB *=KK
Def<oB)D >L <oB)D0p 0perand <ar,et
<oB)D0p >L %-t0pPrefi- *=.F
Def<oBuffer >L <oBuffer0p 0perand <ar,et
<oBuffer0p >L *=FN
Def<oDecimalStrin, >L <oDecimalStrin,0p 0perand <ar,et
<oDecimalStrin,0p >L *=FG
Def<o"e-Strin, >L <o"e-Strin,0p 0perand <ar,et
<o"e-Strin,0p >L *=FS
Def<o#nte,er >L <o#nte,er0p 0perand <ar,et
<o#nte,er0p >L *=FF
Def<oStrin, >L <oStrin,0p <erm&r, 6en,th&r, <ar,et
6en,th&r, >L <erm&r, LB #nte,er
<oStrin,0p >L *=FC
DefWait >L Wait0p %vent0b9ect 0perand
Wait0p >L %-t0pPrefi- *=.M
DefR0r >L Ror0p 0perand 0perand <ar,et
Ror0p >L *=GD
20.2.6 Miscellaneous Objects Encoding
Miscellaneous o0#ects include<
Arg o0#ects
1ocal o0#ects
-e0ug o0#ects
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8+2 Advanced Configuration and 'ower %nterface !pecification
20.2.6.1
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Arg Objects Encoding
&r,0b9 >L &r,(0p U &r,40p U &r,30p U &r,F0p U &r,.0p U &r,G0p U &r,I0p
&r,(0p >L *=NS
&r,40p >L *=NF
&r,30p >L *=NA
&r,F0p >L *=NB
&r,.0p >L *=NC
&r,G0p >L *=ND
&r,I0p >L *=NE
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8+" Advanced Configuration and 'ower %nterface !pecification
20.2.6.2
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Local Objects Encoding
6ocal0b9 >L 6ocal(0p U 6ocal40p U 6ocal30p U 6ocalF0p U 6ocal.0p U 6ocalG0p U
6ocalI0p U 6ocalT0p
6ocal(0p >L *=N*
6ocal40p >L *=N7
6ocal30p >L *=N.
6ocalF0p >L *=NK
6ocal.0p >L *=NL
6ocalG0p >L *=NM
6ocalI0p >L *=NN
6ocalT0p >L *=NG
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8++ Advanced Configuration and 'ower %nterface !pecification
20.2.6.3
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%nde/ 8+9
Debug Objects Encoding
Debu,0b9 >L Debu,0p
Debu,0p >L %-t0pPrefi- *=K7
20.3 AML Byte Stream Byte Values
The following ta0le lists all the 0(te values that can 0e found in an AM1 0(te stream and the meaning of
each 0(te value. This ta0le is useful for de0ugging AM1 code.
Ta!le +/-& AML <)te Strea% <)te 7alues
1ncoding
7alue
1ncoding 0a%e 1ncoding
;roup
6ixed List Argu%ents 7aria!le List
Argu%ents
/ ?ero2p -ata 20#ect P P
/4 2ne2p -ata 20#ect P P
/2&/* P P P P
/+ Alias2p Term 20#ect Name!tring Name!tring P
/9 P P P P
/8 Name2p Term 20#ect Name!tring -ata3ef20#ect P
/6 P P P P
/A ;(te'refi/ -ata 20#ect ;(te-ata P
/; Word'refi/ -ata 20#ect Word-ata P
/C -Word'refi/ -ata 20#ect -Word-ata P
/- !tring'refi/ -ata 20#ect AsciiChar1ist NullChar P
/. GWord'refi/ -ata 20#ect GWord-ata P
/5 P P P P
/4 !cope2p Term 20#ect Name!tring Term1ist
/44 ;uffer2p Term 20#ect TermArg ;(te1ist
/42 'ackage2p Term 20#ect ;(te-ata 'ackage Term1ist
/43 Dar'ackage2p Term 20#ect TermArg 'ackage Term1ist
/4" Method2p Term 20#ect Name!tring ;(te-ata Term1ist
/4*&/2- P P P P
/2. =O.M> -ualName'refi/ Name 20#ect Name!eg Name!eg P
/25 =OFM> MultiName'refi/ Name 20#ect ;(te-ata Name!eg=N> P
/3&/" P P P P
/"4&/*A
=OAM&O?M>
NameChar Name 20#ect P P
/*; =OVM> ./t2p'refi/ P ;(te-ata P
/*; /4 Mute/2p Term 20#ect Name!tring ;(te-ata P
/*; /2 .vent2p Term 20#ect Name!tring P
/*; /42 Cond3ef2f2p Term 20#ect !uperName !uperName P
/*; /43 Create5ield2p Term 20#ect TermArg TermArg TermArg
Name!tring
P
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8+8 Advanced Configuration and 'ower %nterface !pecification
Ta!le +/-& AML <)te Strea% <)te 7alues
1ncoding
7alue
1ncoding 0a%e 1ncoding
;roup
6ixed List Argu%ents 7aria!le List
Argu%ents
/*; /45 1oadTa0le2p Term 20#ect TermArg TermArg TermArg
TermArg TermArg TermArg
P
/*; /2 1oad2p Term 20#ect Name!tring !uperName P
/*; /24 !tall2p Term 20#ect TermArg P
/*; /22 !leep2p Term 20#ect TermArg P
/*; /23 Ac:uire2p Term 20#ect !uperName Word-ata P
/*; /2" !ignal2p Term 20#ect !uperName P
/*; /2* Wait2p Term 20#ect !uperName TermArg P
/*; /2+ 3eset2p Term 20#ect !uperName P
/*; /29 3elease2p Term 20#ect !uperName P
/*; /28 5rom;C-2p Term 20#ect TermArg Target P
/*; /26 To;C- Term 20#ect TermArg Target P
/*; /2A ,nload2p Term 20#ect !uperName P
/*; /3 3evision2p -ata 20#ect P P
/*; /34 -e0ug2p -e0ug
20#ect
P P
/*; /32 5atal2p Term 20#ect ;(te-ata -Word-ata TermArg P
/*; /33 Timer2p Term 20#ect P P
/*; /8 2p3egion2p Term 20#ect Name!tring ;(te-ata TermArg
TermArg
P
/*; /84 5ield2p Term 20#ect Name!tring ;(te-ata 5ield1ist
/*; /82 -evice2p Term 20#ect Name!tring 20#ect1ist
/*; /83 'rocessor2p Term 20#ect Name!tring ;(te-ata
-Word-ata ;(te-ata
20#ect1ist
/*; /8" 'ower3es2p Term 20#ect Name!tring ;(te-ata Word-ata 20#ect1ist
/*; /8* Thermal?one2p Term 20#ect Name!tring 20#ect1ist
/*; /8+ %nde/5ield2p Term 20#ect Name!tring Name!tring
;(te-ata
5ield1ist
/*; /89 ;ank5ield2p Term 20#ect Name!tring Name!tring TermArg
;(te-ata
5ield1ist
/*; /88 -ata3egion2p Term 20#ect Name!tring TermArg TermArg
TermArg
P
/*C =OBM> 3ootChar Name 20#ect P P
/*- P P P P
/*. =O^M> 'arent'refi/Char Name 20#ect P P
/*5=OCM> NameCharP Name 20#ect P P
/+ =OiM> 1ocal2p 1ocal 20#ect P P
/+4 =OaM> 1ocal42p 1ocal 20#ect P P
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%nde/ 8+6
Ta!le +/-& AML <)te Strea% <)te 7alues
1ncoding
7alue
1ncoding 0a%e 1ncoding
;roup
6ixed List Argu%ents 7aria!le List
Argu%ents
/+2 =O0M> 1ocal22p 1ocal 20#ect P P
/+3 =OcM> 1ocal32p 1ocal 20#ect P P
/+" =OdM> 1ocal"2p 1ocal 20#ect P P
/+* =OeM> 1ocal*2p 1ocal 20#ect P P
/++ =OfM> 1ocal+2p 1ocal 20#ect P P
/+9 =OgM> 1ocal92p 1ocal 20#ect P P
/+8 =OhM> Arg2p Arg 20#ect P P
/+6 =OiM> Arg42p Arg 20#ect P P
/+A =O#M> Arg22p Arg 20#ect P P
/+; =OkM> Arg32p Arg 20#ect P P
/+C =OlM> Arg"2p Arg 20#ect P P
/+- =OmM> Arg*2p Arg 20#ect P P
/+. =OnM> Arg+2p Arg 20#ect P P
/+5 P P P P
/9 !tore2p Term 20#ect TermArg !uperName P
/94 3ef2f2p Term 20#ect !uperName P
/92 Add2p Term 20#ect TermArg TermArg Target P
/93 Concat2p Term 20#ect TermArg TermArg Target P
/9" !u0tract2p Term 20#ect TermArg TermArg Target P
/9* %ncrement2p Term 20#ect !uperName P
/9+ -ecrement2p Term 20#ect !uperName P
/99 Multipl(2p Term 20#ect TermArg TermArg Target P
/98 -ivide2p Term 20#ect TermArg TermArg Target Target P
/96 !hift1eft2p Term 20#ect TermArg TermArg Target P
/9A !hift3ight2p Term 20#ect TermArg TermArg Target P
/9; And2p Term 20#ect TermArg TermArg Target P
/9C Nand2p Term 20#ect TermArg TermArg Target P
/9- 2r2p Term 20#ect TermArg TermArg Target P
/9. Nor2p Term 20#ect TermArg TermArg Target P
/95 Aor2p Term 20#ect TermArg TermArg Target P
/8 Not2p Term 20#ect TermArg Target P
/84 5ind!et1eft;it2p Term 20#ect TermArg Target P
/82 5ind!et3ight;it2p Term 20#ect TermArg Target P
/83 -eref2f2p Term 20#ect TermArg P
/8" Concat3es2p Term 20#ect TermArg TermArg Target P
/8* Mod2p Term 20#ect TermArg TermArg Target P
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89 Advanced Configuration and 'ower %nterface !pecification
Ta!le +/-& AML <)te Strea% <)te 7alues
1ncoding
7alue
1ncoding 0a%e 1ncoding
;roup
6ixed List Argu%ents 7aria!le List
Argu%ents
/8+ Notif(2p Term 20#ect !uperName TermArg P
/89 !iHe2f2p Term 20#ect !uperName P
/88 %nde/2p Term 20#ect TermArg TermArg Target P
/86 Match2p Term 20#ect TermArg ;(te-ata TermArg
;(te-ata TermArg TermArg
P
/8A Create-Word5ield2p Term 20#ect TermArg TermArg Name!tring P
/8; CreateWord5ield2p Term 20#ect TermArg TermArg Name!tring P
/8C Create;(te5ield2p Term 20#ect TermArg TermArg Name!tring P
/8- Create;it5ield2p Term 20#ect TermArg TermArg Name!tring P
/8. 20#ectT(pe2p Term 20#ect !uperName P
/85 CreateGWord5ield2p Term 20#ect TermArg TermArg Name!tring P
/6 1and2p Term 20#ect TermArg TermArg P
/64 1or2p Term 20#ect TermArg TermArg P
/62 1not2p Term 20#ect TermArg P
/62 /63 1Not.:ual2p Term 20#ect TermArg TermArg P
/62 /6" 11ess.:ual2p Term 20#ect TermArg TermArg P
/62 /6* 1$reater.:ual2p Term 20#ect TermArg TermArg P
/63 1.:ual2p Term 20#ect TermArg TermArg P
/6" 1$reater2p Term 20#ect TermArg TermArg P
/6* 11ess2p Term 20#ect TermArg TermArg P
/6+ To;uffer2p Term 20#ect TermArg Target P
/69 To-ecimal!tring2p Term 20#ect TermArg Target P
/68 To@e/!tring2p Term 20#ect TermArg Target P
/66 To%nteger2p Term 20#ect TermArg Target P
/6A&/6; P P P P
/6C To!tring2p Term 20#ect TermArg TermArg Target P
/6- Cop(20#ect2p Term 20#ect TermArg !impleName P
/6. Mid2p Term 20#ect TermArg TermArg TermArg
Target
P
/65 Continue2p Term 20#ect P P
/A %f2p Term 20#ect TermArg Term1ist
/A4 .lse2p Term 20#ect P Term1ist
/A2 While2p Term 20#ect TermArg Term1ist
/A3 Noop2p Term 20#ect P P
/A" 3eturn2p Term 20#ect TermArg P
/A* ;reak2p Term 20#ect P P
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Ta!le +/-& AML <)te Strea% <)te 7alues
1ncoding
7alue
1ncoding 0a%e 1ncoding
;roup
6ixed List Argu%ents 7aria!le List
Argu%ents
/A+&/C; P P P P
/CC ;reak'oint2p Term 20#ect P P
/C-&/5. P P P P
/55 2nes2p -ata 20#ect P P
20.4 AML Encoding of Names in the Namespace
Assume the following namespace e/ists<
\
S(
;%;
S%<
:%<
S4
;%;
S%<
:%<
)PX
S%<
:%<
Assume further that a definition 0lock is loaded that creates a node B!.C',.!.T, and loads a 0lock using it
as a root. Assume the loaded 0lock contains the following names<
S<P4
\:%<
\\P)#(
\\P)#(.SBS
\S3
\S3.#S&.)0;4
\\\SF
\\\S3.;%;
\\\S3.;%;.S%<
Scope(\S(.)PX.S%<.S<P4)
RS7
\&B)
\&B).D%5
/
This will 0e encoded in AM1 as<
aS<P4a
ParentPrefi-)har a:%<_a
ParentPrefi-)har ParentPrefi-)har aP)#(a
ParentPrefi-)har ParentPrefi-)har Dual!amePrefi- aP)#(a aSBS_a
Root)har aS3__a
Root)har ;ulti!amePrefi- F aS3__a a#S&_a a)0;4a
ParentPrefi-)har ParentPrefi-)har ParentPrefi-)har aSF__a
ParentPrefi-)har ParentPrefi-)har ParentPrefi-)har Dual!amePrefi- aS3__a a;%;_a
ParentPrefi-)har ParentPrefi-)har ParentPrefi-)har ;ulti!amePrefi- F aS3__a a;%;_a
aS%<_a
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
892 Advanced Configuration and 'ower %nterface !pecification
After the 0lock is loaded, the namespace will look like this =names added to the namespace 0( the loading
operation are shown in 0old><
\
S(
;%;
S%<
:%<
CP$
#E9
#9P7
XYZ
ABC
DED
+E9
PCI*
#B#
S4
;%;
S%<
:%<
)PX
S%<
:%<
#.
I#A
C6A7
AEA
#E9
SF
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APPENDIX A: Device Class Specifcations
A Device Class PM Specifcations
This section defines the 0ehavior of devices as that 0ehavior relates to power management and, specificall(,
to the four device power states defined 0( AC'%. The goal is ena0ling device vendors to design power&
managea0le products that meet the 0asic needs of 2!'M and can 0e utiliHed 0( an( AC'%&compati0le
operating s(stem.
A.1 Overview
The power management of individual devices is the responsi0ilit( of a policy owner in the operating
s(stem. This software element will implement a power management polic( that is appropriate for the t(pe
=or class> of device 0eing managed. -evice power management polic( t(picall( operates in con#unction
with a glo0al s(stem power polic( implemented in the operating s(stem.
%n general, the device&class power management polic( strives to reduce power consumption while the
s(stem is working 0( transitioning among various availa0le power states according to device usage. The
challenge facing polic( owners is to minimiHe power consumption without adversel( impacting the
s(stemMs usa0ilit(. This 0alanced approach provides the user with 0oth power savings and good
performance.
;ecause the polic( owner has ver( specific knowledge a0out when a device is in use or potentiall( in use,
there is no need for hardware timers or such to determine when to make these transitions. !imilarl(, this
level of understanding of device usage makes it possi0le to use fewer device power states. $enerall(,
intermediate states attempt to draw a compromise 0etween latenc( and consumption 0ecause of the
uncertaint( of actual device usage. With the increased knowledge in the 2!, good decisions can 0e made
a0out whether the device is needed at all. With this a0ilit( to turn devices off more fre:uentl(, the 0enefit of
having intermediate states diminishes.
The polic( owner also determines what class&specific events can cause the s(stem to transition from
sleeping to working states, and ena0les this functionalit( 0ased on application or user re:uests. Notice that
the definition of the wake events that each class supports will influence the s(stemMs glo0al power polic( in
terms of the level of power management a s(stem sleeping state can attain while still meeting wake latenc(
re:uirements set 0( applications or the user.
A.2 Device Power States
The following definitions appl( to devices of all classes<
5$. !tate in which device is on and running. %t is receiving full power from the s(stem and is
delivering full functionalit( to the user.
5+. Class&specific low&power state =defined in the following section> in which device conte/t ma(
or ma( not 0e lost. ;uses in -4 cannot do an(thing to the 0us that would force devices on that 0us to
lose conte/t.
5&. Class&specific low&power state =defined in the following section> in which device conte/t ma(
or ma( not 0e lost. Attains greater power savings than -4. ;uses in -2 can cause devices on that 0us
to lose some conte/t =for e/ample, the 0us reduces power supplied to the 0us>. -evices in -2 must 0e
prepared for the 0us to 0e in -2 or higher.
5#. !tate in which device is off and not running. -evice conte/t is lost. 'ower can 0e removed
from the device.
-evice power&state transitions are t(picall( invoked through 0us&specific mechanisms =for e/ample, ATA
!tand0(, ,!; !uspend, and so on>. %n some cases, 0us&specific mechanisms are not availa0le and device&
specific mechanisms must 0e used. Notice that the e/plicit command for entering the -3 state might 0e the
removal of power.
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89" Advanced Configuration and 'ower %nterface !pecification
%t is the responsi0ilit( of the polic( owner =or other software> to restore an( lost device conte/t when
returning to the - state.
A.2.1 Bus Power Management
'olic( owners for 0us devices =for e/ample, 'C%, ,!;, !mall Computer !(stem %nterface V!C!%W> have the
additional responsi0ilit( of tracking the power states of all devices on the 0us and for transitioning the 0us
itself to onl( those power states that are consistent with those of its devices. This means that the 0us state
can 0e no lower than the highest state of one of its devices. @owever, ena0led wake events can affect this as
well. 5or e/ample, if a particular device is in the -2 state and set to wake the s(stem and the 0us can onl(
forward wake re:uests while in the -4 state, then the 0us must remain in the -4 state even if all devices are
in a lower state.
;elow are summaries of relevant 0us power management specifications with references to the sources.
A.2.2 Display Power Management
3efer to the Display Power (anagement Signaling Specification (DP(S), availa0le from<
Dideo .lectronics !tandards Association =D.!A>
24* North 5irst !treet
!uite ""
!an 7ose, CA 6*434&226
A -'M!&compliant video controller and -'M!&compliant monitor use the horiHontal and vertical s(nc
signals to control the power mode of the monitor. There are " modes of operation< normal, stand0(, suspend
and off. -'M!&compliant video controllers toggle the s(nc lines on or off to select the power mode.
A.2.3 PCMCIA/PCCARD/CardBus Power Management
3efer to the 'CMC%A ='ersonal Computer Memor( Card %nternational Association> We0 site, at
http<FFwww.pcmcia.org.
'CMC%A and 'CCA3- devices do not have device power states defined. The onl( power states availa0le
are on and off, controlled 0( the host 0us controller. The Card;us specification is a superset of the
'CCA3- specification, incorporating the power management specification for 'C% 0us. 'ower
management capa0ilities :uer(, state transition commands and wake event reporting are identical.
A.2.4 PCI Power Management
3efer to the 'C% !pecial %nterest $roup ='C%!%$> We0 site, at http<FFwww.pcisig.comF.
PCI <us Power Manage%ent Capa!ilities Kuer). 'C% ;us device capa0ilities are reported via
the optional Capa0ilities 1ist registers, which are accessed via the CapC'tr.
PCI <us Power Manage%ent State Transition Co%%ands. 'C% ;us device power states are
controlled and :ueried via the standard 'ower Management !tatusFControl 3egister ='MC!3>.
PCI <us :akeup 1vent "eporting. 'C% wake events are reported on the optional 'M.Y signal,
with setting of the WakeC%nt 0it in the 'MC!3. Wake event reporting is controlled 0( the WakeC.n 0it
in the 'MC!3 register.
A.2.5 USB Power Management
3efer to the ,niversal !erial ;us %mplementers 5orum =,!;&%5 > We0 site, at http<FFwww.us0.orgF.
2S< Power Manage%ent Capa!ilities Kuer). ,!; device capa0ilities are reported to the ,!;
@ost via the standard 'ower -escriptors. These address power consumption, latenc( time, wake
support, and 0atter( support and status notification.
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2S< Power Manage%ent State Transition Co%%ands. ,!; device power states are controlled
0( the ,!; @ost via the standard !.TC5.AT,3. command. ,!; device power states are :ueried via
the standard ,!; $.TC!TAT,! command.
2S< :akeup 1vent "eporting. ,!; wake event reporting is controlled using the
!.TC5.AT,3. command, with value -.D%C.C3.M2T.CWAE.,'. ,!; wake events are reported
0( sending remote wake resume signaling.
A.2.6 Device Classes
;elow is a list of the class&specific device power management definitions availa0le in this specification.
Notice that there e/ists a default device class definition that applies to all devices, even if there is a
separate, class&specific section that adds additional re:uirements.
Audio 5evice Class. Applies to audio devices.
C3M Port 5evice Class. Applies to C2M ports devices.
5ispla) 5evice Class. Applies to C3T monitors, 1C- panels, and video controllers for those
devices.
Input 5evice Class. Applies to standard t(pes of input devices such as ke(0oards, ke(pads, mice,
pointing devices, #o(sticks, and game pads, plus new t(pes of input devices such as virtual realit(
devices.
Mode% 5evice Class. Applies to modem and modem&like =for e/ample, %!-N terminal adapters>
devices.
0etwork 5evice Class. Applies specificall( to .thernet and token ring adapters. ATM and %!-N
adapters are not supported 0( this specification.
PC Card Controller 5evice Class. Applies to 'C Card controllers and slots.
Storage 5evice Class. Applies specificall( to ATA hard disks, flopp( disks, ATA'% and !C!% C-&
32Ms, and the %-. channel.
A.3 Default Device Class
The re:uirements e/pressed in this section appl( to all devices, even if there is a separate, class&specific
power management definition that identifies additional re:uirements.
A.3.1 Default Power State Defnitions
State 5efinition
- -evice is on and running. %t is receiving full power from the s(stem, and is delivering full
functionalit( to the user.
-4 This state is not defined and not used 0( the default device class.
-2 This state is not defined and not used 0( the default device class.
-3 -evice is off and not running. -evice conte/t is assumed lost, and there is no need for an( of it to
0e preserved in hardware. This state should consume the minimum power possi0le. %ts onl(
re:uirement is to recogniHe a 0us&specific command to re&enter -. 'ower can 0e removed from
the device while in -3. %f power is removed, the device will receive a 0us&specific hardware reset
upon reapplication of power, and should initialiHe itself as in a normal power on.
A.3.2 Default Power Management Policy
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89+ Advanced Configuration and 'ower %nterface !pecification
Present
State
0ext
State
Cause
- -3 -evice determined 0( the 2! to not 0e needed 0( an( applications or the user.
!(stem enters a sleeping state.
-3 - -evice determined 0( the 2! to 0e needed 0( some application or the user.
A.3.3 Default Wake Events
There are no default wake events, 0ecause knowledge of the device is implicit in servicing such events.
-evices can e/pose wake capa0ilities to 2!'M, and device&specific software can ena0le these, 0ut there is
no generic application&level or 2!&wide support for undefined wake events.
A.3.4 Minimum Power Capabilities
All devices must support the - and -3 states. 5unctionalit( availa0le in - must 0e availa0le after
returning to - from -3 without re:uiring a s(stem re0oot or an( user intervention. This re:uirement
applies whether or not power is removed from the device during -3.
A.4 Audio Device Class
The re:uirements e/pressed in this section appl( to audio devices.
A.4.1 Power State Defnitions
State Status 5efinition
- $e>'ired 'ower is on. -evice is operating.
-4 =ptional 'ower consumption is less than - state. -evice must 0e a0le to transition 0etween
- and -4 states within 4 ms. No audio samples ma( 0e lost 0( entering and
leaving this state.
-2 $e>'ired 'ower consumption is less than - state. -evice must 0e a0le to transition 0etween
- and -2 states within 4 ms. Audio samples ma( 0e lost 0( entering and
leaving this state.
-3 $e>'ired The device is completel( off or drawing minimal power. 5or e/ample, a stereo will
0e off, 0ut a light&emitting diode =1.-> ma( 0e on and the stereo ma( 0e listening
to %3 commands.
%f a device is in the -4 or -2 state it must resume within 4 ms. A device in the -3 state ma( take as long
as it needs to power up. %t is the responsi0ilit( of the polic( owner to advertise to the s(stem how long a
device re:uires to power up.
All audio devices must 0e capa0le of -, -2 and -3 states. %t is desira0le that an audio device 0e capa0le
of -4 state. The difference 0etween -4 and -2 is that a device capa0le of -4 can maintain complete state
information in reduced power mode. The polic( owner or other software must save all states for -2&
capa0le devices. !ome audio samples ma( 0e lost in transitioning into and out of the -2 state.
Notice that the -4 state was added to allow digital signal processor =-!'>&e:uipped audio hardware to
e/ploit low&power modes in the -!'. 5or e/ample, a -!' ma( 0e used to implement -ol0( AC&3 -ecode.
When paused it stops pla(ing audio, 0ut the -!' ma( contain thousands of 0(tes worth of state
information. %f the -!' supports a low&power state, it can shut down and later resume from e/actl( the
audio sample where it paused without losing state information.
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A.4.2 Power Management Policy
5or the purpose of the following state transition polic(, the following device&specific operational states are
defined<
Pla)ing. Audio is pla(ing.
"ecordingH
6oreground. Normal application is recording. 3ecording is considered foreground unless
specificall( designated low priorit(.
<ackground. !peech recognition or speech activit( detection is running. 3ecording ma( 0e
preempted 0( foreground recording or pla(ing. An( audio recording ma( 0e designated as
0ackground.
6ull 5uplex. -evice is simultaneousl( pla(ing and recording.
Paused. 5ile handle is open. 2nl( devices that are pla(ing, foreground recording or in full duple/
operation ma( 0e paused. ;ackground recording ma( not 0e paused. !tate is static and never lost. The
paused state assumes that a device must transition to the resumed state rapidl(. 'la(ing or recording
must 0e resumed within 4 ms. No audio samples ma( 0e lost 0etween the device is paused and later
resumed.
Closed. No file handle is open.
Present
State
0ext
State Cause
-3 - Audio device moves from closed to open state or paused when the device receives the
resume command.
- -4 Audio device receives pause command. %f device is -4 capa0le, this state is preferred. %f
not, the device driver will preserve conte/t, and the device will 0e set to -2.
-2F-4 - Audio device receives a resume command.
- -2 Audio device is closed. Audio inactivit( timer started.
-2 -3 Audio inactivit( timer e/pires.
- -3 Audio device is in 0ackground record mode and receives power&down command.
When an audio device is in the - state it will refuse s(stem re:uests to transition to -3 state unless it is in
0ackground record mode. When an audio device is paused =-4 or -2> and it receives a re:uest to transition
to the -3 state, it will save the state of the audio device and transition to the -3 state.
!ince multimedia applications often open and close audio files in rapid succession, it is recommended that
an inactivit( timer 0e emplo(ed 0( the polic( owner to prevent needless shutdowns =-3 transitions> of the
audio hardware. 5or e/ample, fre:uent power c(cling ma( damage audio devices powered 0( vacuum
tu0es.
A.4.3 Wake Events
An audio device ma( 0e a wake device. 5or e/ample, a ,!; microphone designed for securit( applications
might use the ,!; wake mechanism to signal an alarm condition.
A.4.4 Minimum Power Capabilities
All audio devices must 0e capa0le of -, -2 and -3 power states. %f the device is capa0le of maintaining
conte/t while in a low&power state it should advertise support for -4. Transitional latenc( for the -2 or -3
states must 0e less than 4 ms. There are no latenc( restrictions for -3 transitions, 0ut the polic( owner
should advertise the amount of time re:uired.
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A.5 COM Port Device Class
The re:uirements e/pressed in this section appl( to ,niversal As(nchronous 3eceiverFTransmitters
=,A3Ts> such as the common N!4+** 0uffered serial port and e:uivalents.
The two re:uired states for an( power&managed C2M 'ort are full on =-> and full off =-3>. This in turn
re:uires that the C2M port hardware 0e power&managea0le 0( AC'% control methods for C2M ports that
are on s(stem 0oards, or 0( standard 0us power management controls for C2M ports that are on add&in
cards =for e/ample, 'C%>. ;ecause of this, %!A&0ased C2M port add&in cards will not 0e a0le to meet this
re:uirement, and therefore cannot 0e compliant with this specification.
A.5.1 Power State Defnitions
State Status 5efinition
- $e>'ired 1ine drivers are on. ,A3T conte/t is preserved.
-4 ;0A This state is not defined for C2M 'orts. ,se the -3 state instead.
-2 ;0A This state is not defined for C2M 'orts. ,se the -3 state instead.
-3 $e>'ired 1ine drivers are off =unpoweredK outputs isolated from devices attached to the port>.
,A3T conte/t is lost. 1atenc( to return to - is less than 4 second.
A.5.2 Power Management Policy
Present
State
0ext
State Cause
-3 - 'ower&on reset
C2M port opened 0( an application
- -3 C2M port closed
!(stem enters sleeping state while wake is disa0led on this device.
!(stem enters sleeping state while wake is ena0led on this device and the device is
capa0le of generating wake to the s(stem from state -3.
A.5.3 Wake Events
%f the C2M port is capa0le of generating wake events, asserting the Jring indicatorL line =D.2" circuit 42*>
will cause the C2M port to assert a wake event. There are two common mechanisms that ma( 0e emplo(ed
=either one or 0oth> for performing machine wake using C2M ports.
The first provides a solution that is capa0le of waking the 'C whether the ,A3T is powered =-> or not
=-3>. @ere, the Jring indicatorL line =from D.2" circuit 42*> is commonl( connected directl( to the s(stem
wake device in addition to 0eing connected to the ,A3T. While this implementation is normative for C2M
ports located on s(stem mother0oards =see the AC'% specification>, it could also 0e done 0( add&in cards
with C2M ports that reside on 0uses supporting s(stem wake from devices in -3 =for e/ample, 'M.Y
signal on 'C%>.
The second mechanism re:uires that the ,A3T 0e powered =-> to use the ,A3TMs interrupt output pin to
generate the wake event instead. When using this method, the 2! C2M port polic( owner or power
management control methods are e/pected to configure the ,A3T. Although an( ,A3T interrupt source
=for e/ample, Odata read(M> could theoreticall( 0e used to wake the s(stem, these methods are 0e(ond the
scope of this document.
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A.5.4 Minimum Power Capabilities
A C2M port conforming to this specification must support the - and -3 states.
A.6 Display Device Class
The re:uirements e/pressed in this section appl( to all devices engaged in the displa( of program content,
which includes full screen displa( devices, displa( controllers, and graphics adapters. This class does not
include video capture devices unless the( are children of the graphics adapter. This class does not include
edge displa(s or hardware indicators for device states.
While saving power from the displa( and adapter are primar( goals of -ispla( -evice Class power
management definitions, the definitions are also intended to ensure that the user perceives the s(stem as
doffd during s(stem sleeping states, as re:uired a0ove. When the s(stem enters a lower power state, the
screen must go 0lack so the user knows the s(stem is idle. This is important 0ecause devices that cannot
actuall( save power =standard televisions, for e/ample> can still support the user notice of s(stem idle 0(
going 0lack.
A.6.1 Power State Defnitions
A.6.1.1 CRT Monitors (not including other full screen displays)
State Status 5efinition
- $e>'ired This state is e:uivalent to the J2nL state defined in the D.!A -'M! specification
=see 3elated -ocuments> and is signaled to the displa( using the -'M! method.
-ispla( is full( on
Dideo image is active
-4 =ptional This state is e:uivalent to the J!tand0(L state defined in the D.!A -'M! and is
signaled to the displa( using the -'M! method.
-ispla( is functional 0ut ma( 0e conserving energ(
Dideo image is 0lank
1atenc( to return to - must 0e less than * seconds
-2 $e>'ired This state is e:uivalent to the J!uspendL state defined in the D.!A -'M!
specification and is signaled to the displa( using the -'M! method.
-ispla( is functional and conserving energ(
Dideo image is 0lank
1atenc( to return to - is less than 4 seconds
-3 $e>'ired This state is e:uivalent to the J2ffL state defined in the D.!A -'M! specification
and is signaled to the displa( using the -'M! method.
-ispla( is non&functional
Dideo image is 0lank
C3T Monitors are a special case in power management. 2n the one hand, the( support a common defined
method =-'M!> for changing power states. 2n the other hand, that procedure and the C3T support is
e/tremel( slow and out of keeping with other faster power control methods used 0( other forms of displa(.
This definition should not preclude the use of faster and more effective methods of transitioning the C3T if
the( are availa0le and known to the controller. -'M! is not recommended as solution for new displa(
devices in the future.
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A.6.1.2 Internal Flat Panel Devices
!tate !tatus -efinition
- $e>'ired This state is e:uivalent to the J2nL state for a -'M! device, 0ut is signaled to the
panel 0( the correct application of power andFor controller specific signaling.
-ispla( is full( on
;acklight =if present> is full( on=su0#ect to performance state re:uirements I see
0elow>
Dideo image is active
-4 =ptional This state is not re:uired to 0e ph(sicall( different than a -3 state if the device is
a0le to meet the resume re:uirement and the driver is a0le to restore state.
-ispla( retains internal state 0ut ma( 0e conserving energ(
;acklight=if present> is full( off
Dideo image is 0lank
1atenc( to return to - must 0e less than * milliseconds
-2 =ptional This state is not re:uired to 0e ph(sicall( different than a -3 state if the device is
a0le to meet the resume re:uirement and the driver is a0le to restore state.
-ispla( retains state 0ut is conserving energ(
;acklight =if present> is full( offK
Dideo image is 0lank
1atenc( to return to - is less than * milliseconds
-3 $e>'ired This state is e:uivalent to the J2ffL state defined in the D.!A -'M!
specification. %t is signaled 0( the removal of power or possi0l( 0( controller&
specific signaling.
-ispla( is non&functional
;acklight =if present> is full( off.
Dideo image is 0lank
1atenc( to return to - is less than * milliseconds
%nternal flat panels =also known as local flat panels or sometimes as 1C-s> do not normall( support or
re:uire -'M! signaling to change power states. %nstead, controllers capa0le of managing such panels tend
to provide vendor&specific methods to control internal flat panels, often involving special se:uencing of
power signals to the panel. !ome ma( 0e managed onl( 0( the application or removal of power.
;acklight control for power management states is likewise controller and even platform specific. Note that
on&off 0acklight control for power management states is often unrelated to 0acklight intensit( or 0rightness
control that is used while in the - state.
The * milliseconds is onl( to allow some e/isting hardware to function . The target for new devices
should 0e 4 milliseconds.
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A.6.1.3 DVI Displays (Digital Flat Panels and DVI Monitors)
!tate !tatus -efinition
- $e>'ired This state is e:uivalent to the J2nL state for a -'M! device, 0ut is signaled to the
displa( 0( the correct application of power andFor controller specific signaling.
-ispla( is full( on
Dideo image is active
-4 =ptional This state is not re:uired to 0e ph(sicall( different than a -3 state if the device is
a0le to meet the resume re:uirement and the driver is a0le to restore state. %t is
signaled 0( the removal of displa( output and time e/piring. The ph(sical state
entered is no different than -2.
-ispla( retains internal state 0ut ma( 0e conserving energ(
Dideo image is 0lank
1atenc( to return to - must 0e less than 2* milliseconds
-2 =ptional This state is not re:uired to 0e ph(sicall( different than a -3 state if the device is
a0le to meet the resume re:uirement and the driver is a0le to restore state. %t is
signaled 0( the removal of displa( output and time e/piring The ph(sical state
entered is no different than -4.
-ispla( retains state 0ut is conserving energ(
Dideo image is 0lank
1atenc( to return to - is less than 2* milliseconds
-3 $e>'ired This state is e:uivalent to the J2ffL state defined in the D.!A -'M!
specification. %t is signaled 0( the removal of displa( output and time e/piring
-ispla( is non&functional
Dideo image is 0lank
1atenc( to return to - is less than 2* milliseconds
Although 2* milliseconds is shown here 0ecause not all devices in this group are fast now, the target
resume for a new device should 0e 4 milliseconds.
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882 Advanced Configuration and 'ower %nterface !pecification
A.6.1.4 Standard TV Devices (and Analog HDTVs)
!tate !tatus -efinition
- $e>'ired This state is e:uivalent to the J2nL state for a -'M! device.
-ispla( is full( on
Dideo image is active
-4 =ptional Dideo image is 0lank
1atenc( to return to - must 0e less than 4 milliseconds
-2 =ptional Dideo image is 0lank
1atenc( to return to - must 0e less than 4 milliseconds
-3 $e>'ired This state is not e:uivalent to the J2ffL state defined in the D.!A -'M!
specification 0ecause not power is actuall( saved.
Dideo image is 0lank
1atenc( to return to - is less than 4 milliseconds
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A.6.1.5 Other (new) Full Screen Devices
!ome devices not specificall( defined here alread( e/ist, such as pro#ectors that emulate C3Ts or @-TDs.
2thers ma( 0e coming. %t is important for an( device used for full screen displa( to support power
transitions and power management states, 0ut the primar( re:uirement for the method should 0e low
overhead.
!tate !tatus -efinition
- $e>'ired This state is e:uivalent to the J2nL state for a -'M! device, 0ut is signaled to the
panel 0( the correct application of power andFor device specific signaling known
to the controller.
-ispla( is full( on
Dideo image is active
-4 =ptional This state is not re:uired to 0e ph(sicall( different than a -3 state if the device is
a0le to meet the resume re:uirement and the driver is a0le to restore state. %t is
signaled to the panel 0( the correct application of power andFor device specific
signaling known to the controller..
-ispla( retains internal state 0ut ma( 0e conserving energ(
Dideo image is 0lank
1atenc( to return to - must 0e less than 4 milliseconds
-2 =ptional This state is not re:uired to 0e ph(sicall( different than a -3 state if the device is
a0le to meet the resume re:uirement and the driver is a0le to restore state. %t is
signaled to the panel 0( the correct application of power andFor device specific
signaling known to the controller.
-ispla( retains state 0ut is conserving energ(
Dideo image is 0lank
1atenc( to return to - is less than 4 milliseconds
-3 $e>'ired This state is e:uivalent to the J2ffL state defined in the D.!A -'M!
specification. %t is signaled 0( the removal of displa( output andFor device
specific methods known to the controller.
-ispla( is non&functional
Dideo image is 0lank
1atenc( to return to - is less than 2* milliseconds
Although 2* milliseconds is shown here 0ecause not all devices in this group are fast now, the target
resume for a new device should 0e 4 milliseconds.
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A.6.1.6 Video Controllers (Graphics Adapters)
State Status 5efinition
- $e>'ired ;ack&end is on
Dideo controller conte/t is preserved
Dideo memor( contents are preserved
-4 =ptional ;ack&end is off, e/cept for C3T control signaling =-'M!>
Dideo controller conte/t is preserved
Dideo memor( contents is preserved
1atenc( to return to - is less than 4 milliseconds
-2 =ptional ;ack&end is off, e/cept for C3T control signaling =-'M!>
Dideo controller conte/t is lost
Dideo memor( contents is lost
1atenc( to return to - is less than 2 milliseconds
-3 $e>'ired ;ack&end is off
Dideo controller conte/t is lost =power removed>
Dideo memor( contents is lost =power removed>
1atenc( to return to - is less than 2 milliseconds
A.6.1.7 Display Codecs
1ike the displa(s the( control, displa( codecs are children of the adapter and cannot 0e in a higher state
than the adapter or a lower state than the displa(s the( control . %t is generall( not helpful to deal with
codecs entirel( separatel( from the adapter or the displa(s the( control. While it ma( var( from device to
device, a codec will either 0e safel( powered down when its displa( is powered down or it ma( re:uire
power as long as the adapter receives power.
A.6.2 Power Management Policy for the Display Class
Present
State
0ext
State Cause
- -4 ,ser inactivit( for a period of time =T4>
-4 -2 ,ser inactivit( for a period of time =T2 ) T4>
-2 -3 ,ser inactivit( for a period of time =T3 ) T2>
-4F-2F-3 - ,ser activit( or application ,% change =for e/ample, dialog pop&up>
These state transition definitions appl( to 0oth the full screen displa( and the video controller. @owever, the
control of the two devices is independent, e/cept that a video controller will never 0e put into a lower
power state than its full screen displa(. Also, while full screen displa(s can transition directl( from -4 to
-3 or from -2 to -3, the adapters re:uire a transition to - from -4 or -2 0efore entering -3.
Transitions for the video controller are commanded via the 0us&specific control mechanism for device
states. MonitorF1C- transitions are commanded 0( signaling from the video controller and are onl(
generated as a result of e/plicit commands from the polic(&owner. 5ull screen displa( power control is
functionall( independent from an( other interface the monitor ma( provide =such as ,!;>. 5or instance,
@u0s and @%- devices in the monitor enclosure ma( 0e power&managed 0( their driver over the ,!; 0us,
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0ut the MonitorF1C- device itself ma( notK it must 0e power&managed from the video controller using the
methods a0ove.
A.6.3 Wake Events
-ispla( devices incorporating a s(stem power switch should generate a wake event when the switch is
pressed while the s(stem is sleeping.
A.6.4 Minimum Power Capabilities
A C3T monitor conforming to this specification must support the -, -2, and -3 states. 2ther full screen
displa(s onl( need to support - and -3. !upport for the -4 state is optional in all cases. Transitional
latencies for the -4 or -2 state must meet the re:uirements a0ove.
A video controller conforming to this specification must support the - and -3 states. !upport for the -4
and -2 states is optional. Transitional latencies for the -4 must 0e less than 4 milliseconds while -2 and
-3 must transition to - in less than 2 milliseconds.
A.6.5Performance States for Display Class Devices
'erformance states for displa( devices and adapters have one clear difference from defined power
management states. There is no displa( in an( power management state higher than -. @owever,
performance states are all applied within -, which means the( save power while continuing to displa(.
Not all displa( class devices will support performance states, 0ut in all cases, the( must allow continued
displa( where the( e/ist.
A.6.5.1 Common Requirements for Display Class Performance States
The definition of each state =up the line toward the 2!'M> must include ma/imum latenc( information on
transitions into the state and transitions out of the state. =5or states other than -'!4, it ma( 0e necessar( to
indicate whether the latenc( is the time from -'! to -'!/ or onl( from -'!/&4 to -'!/.>
.ach state has to have a relative weight indicator or a relative power savings indicator. %.e., it can make a
difference in 2!'M policies whether -'!4 saves 2X power and -'!2 save 9*X power even if latenc( is
longer.
While A!1 Name!pace structures ma( provide some of this information, it is recommended that displa(
class performance states 0e entered and e/ited 0( driver and not 0( control method wherever possi0le.
A.6.5.2 Performance states for Full Screen Displays
A.6.5.2.1 CRT Performance States
!ome C3Ts =in theor(> have the capa0ilit( for dreduced ond && a mode which displa(s 0ut uses less power
than full performance. .ven without this capa0ilit(, a C3T ma( 0e a0le to use reduced refresh or other
methods to reduce the total power of displa(ing.
A.6.5.2.2 Internal Flat Panel
%n general, panels consume a fi/ed amount of power. @owever, some panels are also capa0le of supporting
reduced refresh. More important, the amount of 0acklight 0rightness is a ma#or factor in s(stem power.
This clearl( needs to 0e coordinated with direct A!1 control methods for 0rightness and with am0ient light
sensing when present. @owever, a performance state ma( 0e achieved 0( offsetting the 0rightness value
computed 0( other methods, either 0( a fi/ed amount or a fi/ed percentage.
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A.6.5.2.3 DVI Full Screen Devices
-D% -evices are normall( capa0le of fre:uenc( control and ma( 0e a0le to 0enefit 0( fre:uenc( control.
@owever, 0ecause of sensitivit( to signal loss, -D% devices ma( have limitations on other t(pes of
performance control.
A.6.5.2.4 Standard TV and Analog HDTVs
!tandard TD and Analog @-TDs do not appear capa0le of performance states. Codecs controlling them
ma( 0e capa0le of power saving, however.
A.6.5.2.5 New Devices
The a0ilit( to reduce power while continuing to displa( will 0e increasingl( important.
A.6.5.3 Performance States for Video Controllers/Display Adapters
Adapters are somewhat limited during performance states 0ecause the( have to continue to support displa(
on one or more full screen devices. @owever, the( can still do a num0er of things to support performance
states, including
Changes to 0asic displa( and render capa0ilities, including speed or fre:uenc( range supported.
5eatureFCapa0ilit(FGualit( Control I limiting specific hardware features, limiting refresh rates,
limiting resolutions.
The limiting factor on what can 0e supported ma( sometimes 0e in the 2!'M. %f the 2!'M support
d(namic changes in these features during a performance state change =even if no other time>, more
opportunities arise.
2nce again, the latenc( on transitions and the power saved 0( specific states have to 0e made availa0le to
the 2!'M in order to use these options effectivel(.
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A.7 Input Device Class
The re:uirements e/pressed in this section appl( to standard t(pes of input devices such as ke(0oards,
ke(pads, mice, pointing devices, #o(sticks, game pads, to devices that com0ine these kinds of input
functionalit( =composite devices, and so on>, and to new t(pes of input devices such as virtual realit(
devices, simulation devices, and so on.
A.7.1 Power State Defnitions
State Status 5efinition
- $e>'ired -evice is receiving full power from its power source, delivering full functionalit( to
the user, and preserving applica0le conte/t and state information.
-4 =ptional %nput device power consumption is greatl( reduced. %n general, device is in a power
management state and is not delivering an( functionalit( to the user e/cept wake
functionalit( if applica0le. -evice status, state, or other information indicators =for
e/ample, 1.-s, 1C- displa(s, and so on> are turned off to save power.
The following device conte/t and state information should 0e preserved 0( the
polic( owner or other software<
Ee)!oard. Num, caps, scroll lock states =and Compose and Eana states if
applica0le> and associated 1.-Findicator states, repeat dela(, and repeat rate.
Fo)stick. 5orced feed0ack effects =if applica0le>.
An) input device. All conte/t and state information that cannot 0e preserved 0( the
device when itMs conserving power.
-2 ;0A This state is not defined for input devices, use -4 as the power management state
instead.
-3 $e>'ired %nput device is off and not running. %n general, the device is not delivering an(
functionalit( to the user e/cept wake functionalit( if applica0le. -evice conte/t and
state information is lost.
A.7.2 Power Management Policy
Present
State
0ext
State Cause
-3 - 3e:uested 0( the s(stem
- -4F-3[ 3e:uested 0( the s(stem =for e/ample, s(stem goes to sleep with wake ena0led>
-F-4 -3 3e:uested 0( the s(stem =for e/ample, s(stem goes to sleep with wake disa0led>
'ower is removed
-4F-3 - -evice with ena0led wake capa0ilit( re:uests transition 0( generating a wake event
3e:uested 0( the s(stem
[-epends on capa0ilit( of device =if it features -4 or -3 wake capa0ilit( or not>K device will 0e put in state
with the lowest possi0le power consumption.
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A.7.3 Wake Events
%t is recommended, 0ut not re:uired, that input devices implement and support 0us&specific wake
mechanisms if these are defined for their 0us t(pe. This is recommended 0ecause a user t(picall( uses an
input device of some kind to wake the s(stem when it is in a power management state =for e/ample, when
the s(stem is sleeping>.
The actual input data =particular 0utton or ke( pressed> thatMs associated with a wake event should never 0e
discarded 0( the device itself, 0ut should alwa(s 0e passed along to the polic( owner or other software for
further interpretation. This software implements a polic( for how this input data should 0e interpreted, and
decides what should 0e passed along to higher&level software, and so on.
%t is recommended that the device 0utton=s> or ke(=s> used for power management purposes are clearl(
la0eled with te/t andFor icons. This is recommended for ke(0oards and other input devices on which all
0uttons or ke(s are t(picall( la0eled with te/t andFor icons that identif( their usage.
5or e/ample, a ke(0oard could include a special&purpose power management 0utton =for e/ample,
J'owerL> that, when pressed during a s(stem sleeping state, generates a wake event. Alternativel(, the
0utton=s> on mice and other pointing devices could 0e used to trigger a wake event.
./amples of more advanced wake events include ke(0oard wake signaling when an( ke( is pressed, mouse
wake signaling on detection of AFS motion, #o(stick wake signaling on AFS motion, and so on. @owever,
in order to avoid accidental or unintentional wake of the s(stem, and to give the user some control over
which input events will result in a s(stem wake, itMs suggested that more advanced t(pes of wake events are
implemented as features that can 0e turned on or off 0( the user =for e/ample, as part of the 2!'M user
interface>.
A.7.4 Minimum Power Capabilities
An input device conforming to this specification must support the - and -3 states. !upport for the -4
state is optional.
A.8 Modem Device Class
The re:uirements e/pressed in this section appl( to modems and similar devices, such as ,!; controlled
%!-N Terminal Adapters =Jdigital modemsL> and computer&connected telephone devices =dCT phonesd>.
This specification will refer to these devices as JmodemsK the same considerations appl( to digital modems
and CT phones unless e/plicitl( stated otherwise.
The scope of this section is further restricted to modems that support power management using methods
defined 0( the relevant 'C&modem connection 0us. These include 'C%, ,!;, 'CCA3- ='CMC%A>,
Card;us, and modems on the s(stem mother0oard descri0ed 0( AC'% ;%2! control methods. The scope
does not include 0us&specific means for devices to alert the host 'C =for e/ample, how to deliver a
LringingLM message>, nor does it address how those alerting operations are controlled.
A.8.1 Technology Overview
Modems are traditionall( serial devices, 0ut toda( modems ma( 0e attached to a 'C 0( man( different
means. 5urther, man( new modems e/pose a software serial interface, where the modem controller
function is implemented in software. This specification addresses three different connection t(pes<
Traditional connections without power&managed connections =for e/ample, C2M, 1'T, %!A>
'ower managed connections =for e/ample, 'CCA3-, Card;us, 'C%, ,!;>
Mother0oard modems
5or some of the a0ove modem connection t(pes mentioned, there are three different modem architectures
possi0le<
Traditional modem =-AA, -!', and controller in hardware>
Controller&less design =-AA and -!' in hardware>
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d!oft modemd design =-AA and C2-.C onl( in hardware>
The hardware components of the modem shall 0e controlled 0( the relevant 0us commands, where
applica0le =,!;, 'C%, Card;us>. The software components are dependent on the power state of the C',.
A.8.1.1 Traditional Connections
%n older methods =C2M, 1'T, %!A> the modem is controlled primaril( 0( serialiHed A!C%% command
strings =for e/ample, D.2*ter> and traditional D.2" =3!&232> out&of&0and leads. %n these legac( devices,
there are no common means for power management other than the power switch for the device, or the
entire s(stem unit.
An e/ternal modem connected to a C2M port or 1'T port t(picall( has its own power suppl(. An 1'T port
modem might run from the current on the 1'T port Z*D suppl(. 5or C2M or 1'T port modems, power is
t(picall( controlled 0( a user switch.
The most common modem t(pe is an %!A card with an em0edded C2M port. 5rom a software standpoint,
the( are logicall( identical to e/ternal modems, 0ut the modems are powered 0( the 'C s(stem unit. 'ower
is drawn from the %!A 0us without independent power switching.
A.8.1.2 Power-Managed Connections
'CMC%A, 'CCA3- and Card;us slots are powered and power&managed 0( the s(stem, using means
defined in the relevant 0us specifications. 5or 'CMC%A and 'CCA3- devices, onl( - and -3 states are
availa0le, via !ocket !ervices in the 2! andFor AC'% ;%2!. Card;us adds intermediate states, using the
same mechanisms defined for 'C% ;us.
'C% 0us slots are powered and power&managed 0( the s(stem, using means defined in the 'C% specification.
,!; devices ma( 0e powered 0( the ,!; itself =4mA or *mA>, or have their own e/ternal power
suppl(. All ,!; devices are power&managed 0( the ,!; 0us master, using means defined in the ,!;
specification.
A.8.1.3 Motherboard Modems
A modem em0edded in the mother0oard is powered 0( controls on the mother0oard. %t should 0e power&
managed 0( using control methods e/posed via AC'% ;%2! ta0les.
A.8.2 Power State Defnitions
State Status 5efinition
- $e>'ired 'hone interface is on =ma( 0e on or off hook>
!peaker is on
Controller Conte/t is preserved
-4 ;0A Not defined =do not use>
-2 =ptional 'hone interface is not powered 0( the host =on hook>
!peaker is off
Controller conte/t is preserved
2 seconds ma/imum restore time
-3 $e>'ired 'hone interface is not powered 0( host =on hook>
!peaker is off
Controller conte/t ma( 0e lost
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* seconds ma/imum restore time
A.8.3 Power Management Policy
Present
State
0ext
State Cause
-2F-3 - !(stem issues a 0us command to enter the - state =for e/ample, an application is
answering or originating a call>.
- -2 !(stem issues a 0us command to enter the -2 state. =for e/ample, an application is
listening for an incoming call>.
- -3 !(stem issues a 0us command to enter the -3 state =for e/ample, all applications
have closed the Modem device>.
A.8.4 Wake Events
5or an( t(pe of modem device, wake events =if supported and ena0led> are onl( generated in response to
detected JringingL from an incoming call. All other events associated with modems =D.80is messages, and
so on> re:uire that the 'C 0e in the JworkingL state to capture them. The methods and signals used to
generate the wake ma( var( as a function of the modem connection =0us> t(pe and modem architecture.
Machine wake is allowed from an( modem power state =-, -2, and -3>, and is accomplished 0( methods
descri0ed in the appropriate 0us power management specification ='C%, ,!;, 'CCA3->, or 0( AC'%
s(stem 0oard control methods =for Modem on Mother0oard implementations>.
%f the specific modem implementation or connection t(pe does not ena0le it to assert s(stem wake
signaling, these modems will not 0e a0le to wake the machine. The 2! modem polic( owner will have to
retain the 'C in the JworkingL state to perform all t(pes of event detection =including ringing>.
A.8.5 Minimum Power Capabilities
A modem or similar device conforming to this specification must support the - and -3 states. !upport of
the -2 state is optional.
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A.9 Network Device Class
The re:uirements e/pressed in this section appl( to .thernet and token ring adapters. ATM and %!-N
adapters are not supported 0( this specification.
A.9.1 Power State Defnitions
5or the purpose of the following state definitions Jno 0us transmissionL means that transmit re:uests from
the host processor are not honored, and Jno 0us receptionL means that received data are not transferred to
host memor(.
State Status 5efinition
- $e>'ired -evice is on and running and is delivering full functionalit( and performance to the
user
-evice is full( compliant with the re:uirements of the attached network
-4 =ptional No 0us transmission allowed
No 0us reception allowed
No interrupts can occur
-evice conte/t ma( 0e lost
-2 =ptional No 0us transmission allowed
No 0us reception allowed
No interrupts can occur
-evice conte/t ma( 0e lost
-3 $e>'ired -evice conte/t is assumed to 0e lost
No 0us transmission allowed
No 0us reception allowed
No interrupts can occur
This document does not specif( ma/imum power and ma/imum latenc( re:uirements for the sleeping
states 0ecause these num0ers are ver( different for different network technologies. The device must meet
the re:uirements of the 0us that it attaches to.
Although the descriptions of states -4 and -2 are the same, the choice of whether to implement -4 or -2
or 0oth ma( depend on 0us services re:uired, power re:uirements, or time re:uired to restore the ph(sical
la(er. 5or e/ample, a device designed for a particular 0us might include state -4 0ecause it needs a 0us
service such as a 0us clock to support Magic 'acketj wake, and that service is availa0le in the 0us
deviceMs -4 power state 0ut not in -2. Also, a device might include 0oth state -4 and state -2 to provide a
choice 0etween lower power and lower latenc(.
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A.9.2 Power Management Policy
Present
State
0ext
State Cause
- -x !(stem enters sleep state. %f wake is ena0led, -x is the lowest power state =for
e/ample, -4, -2, -3> from which the network device supports s(stem wake.
An appropriate time&out has elapsed after a Jlink downL condition was detected. -x
is the lowest power state in which the network device can detect Jlink up.L
- -3 !(stem initiated network shutdown.
!(stem enters sleep state and wake is either not ena0led or the network device is
capa0le of waking from -3.
-4F-2F-3 - !(stem wake =transition to !>, including a wake caused 0( a network wake event.
A.9.3 Wake Events
Network wake events are generall( the result of either a change in the lin3 stat's or the reception of a wa3e
frame from the network.
A.9.3.1 Link Status Events
1ink status wake events are useful to indicate a change in the networkMs availa0ilit(, particularl( when this
change ma( impact the level at which the s(stem should re&enter the sleeping state. 5or e/ample, a
transition from Jlink offL to Jlink onL ma( trigger the s(stem to re&enter sleep at a higher level =for
e/ample, !2 versus !3> so that wake frames can 0e detected. Conversel(, a transition from Jlink onL to
Jlink offL ma( trigger the s(stem to re&enter sleep at a deeper level =for e/ample, !3 versus !2> since the
network is not currentl( availa0le. The network device should implement an internal dela( to avoid
unnecessar( transitions when the link status toggles on or off momentaril(.
A.9.3.2 Wake Frame Events
Wake frame events are used to wake the s(stem whenever meaningf'l data is presented to the s(stem over
the network. ./amples of meaningful data include the reception of a Magic 'acketj, a management
re:uest from a remote administrator, or simpl( network traffic directl( targeted to the local s(stem. %n all of
these cases the network device was pre&programmed 0( the polic( owner or other software with
information on how to identif( wake frames from other network traffic. The details of how this information
is passed 0etween software and network device depend on the 2! and therefore are not descri0ed in this
specification.
A.9.4 Minimum Power Capabilities
A network device conforming to this specification must support the - and -3 states. !upport for the -4
and -2 states is optional.
A.10 PC Card Controller Device Class
The re:uirements e/pressed in this section appl( to 'C Card controller devices and the 'C Card slots.
'ower management of PC Cards is not defined 0( this specification. 'C Card power management is
defined 0( the relevant power management specification for the cardMs device class =for e/ample, network,
modem, and so on>, in con#unction with the 'C Card standard =for 4+&0it cards> or the 'C% 'ower
Management !pecification =for Card;us cards>.
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A.10.1 Power State Defnitions
State Status 5efinition
- $e>'ired Card status change interrupts are full( functional.
Card functional interrupts are full( functional.
Controller conte/t =for e/ample, memor(, %F2 windows> is full( functional.
Controller interface is full( functional =processor can access cards>.
'ower to cards =slots> is availa0le =ma( 0e on or off under software control>.
The controller is at its highest power consumption level.
;us command response time is at its fastest level.
'C Cards can 0e in an( -x power state =-&-3>.
0oteH %n - state, C!T!C@$ interrupts can 0e passed to a s(stem from a powered
down 'C Card =for more detail, refer to section *.2.44.2 of 'C Card !tandard,
.lectrical !pecification>.
-4 =ptional Card status change interrupts are disa0led. C!T!C@$ interrupt events are still
detecta0le 0( the controller and cause the 0us&specific wake signal to 0e asserted if
wake is ena0led on the controller.
Card functional interrupts are disa0led.
Controller conte/t is preserved =all register contents must 0e maintained 0ut
memor( and %F2 windows need not 0e functional>.
Controller interface is non&functional =processor cannot access cards>.
'ower to cards =slots> is availa0le =ma( 0e on or offK retains power setting it had at
time of entr( to -4>.
'ower&level consumption for the controller is high 0ut less than -.
The time re:uired to restore the function from the -4 state to the - state is :uicker
than resumption from -3.
;us command response time is e:ual to or slower than in -.
'C Cards can 0e in the -4, -2, or -3 power states =not ->.
0oteH %n -4 state, C!T!C@$ interrupts can 0e passed to a s(stem from a powered&
down 'C Card =for more detail, refer to section *.2.44.2 of 'C Card !tandard,
.lectrical !pecification>.
-2 =ptional 5unctionall( the same as -4 =ma( 0e implemented instead of -4 in order to allow
0us andFor s(stem to enter a lower&power state>.
-3 $e>'ired Card status change interrupt< -isa0led and need not 0e detected.
Card functional interrupt< -isa0led and need not 0e detected.
Controller conte/t =for e/ample, memor(, %F2 windows>< 1ost.
Controller interface< Non&functional =processor can not access cards>.
Clock to controller< 2ff.
'ower to cards =slots>< 2ff =card conte/t lost>.
0oteH %f Dcc is removed =for e/ample, 'C% ;us ;3> while the device is in the -3
state, a 0us&specific reset =for e/ample, 'C% 3!TY> must 0e asserted when power is
restored and functions will then return to the - state with a full power&on reset
se:uence. Whenever the transition from -3 to - is initiated through assertion of a
0us&specific reset, the power&on defaults will 0e restored to the function 0(
hardware #ust as at initial power up. The function must then 0e full( initialiHed and
reconfigured 0( software.
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A.10.2 Power Management Policy
The 'C Card controller is a 0us controller. As such, its power state is dependent on the devices plugged into
the 0us =child devices>. 2!'M will track the state of all devices on the 0us and will put the 0us into the 0est
possi0le power state 0ased on the current device re:uirements on that 0us. 5or e/ample, if the 'C Card
cards are all in the -4 state, 2!'M will put the 'C Card controller in the -4 state.
Present
State
0ext
State Cause
-2F-3 - An( card in an( slot needing to transition to state - due to a wake event or 0ecause
of s(stem usage.
- -4 No card in an( slot is in state -.
- -2 No card in an( slot is in state - or -4.
- -3 All cards in all slots are in state -3.
A.10.3 Wake Events
A wake event is an( event that would normall( assert the controllerMs status change interrupt =for e/ample,
card insertion, card 0atter( state change, card 3e:Attn event, and so on> or ring&indicate signal.
A.10.4 Minimum Power Capabilities
A 'C Card controller device conforming to this specification must support the - and -3 states. !upport
for the -4 or -2 states is optional.
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A.11 Storage Device Class
The re:uirements e/pressed in this section appl( to ATA hard disks, flopp( disks, ATA'% and !C!% C-&
32Ms, and the %-. channel.
A.11.1 Power State Defnitions
A.11.1.1 Hard Disk, CD-ROM and IDE/ATAPI Removable Storage Devices
State Status 5efinition
- $e>'ired -rive controller =for e/ample, interface and control electronics> is functional.
%nterface mode conte/t =for e/ample, communications timings> is programmed.
-4 =ptional -rive controller =for e/ample, interface and control electronics> is functional.
%nterface mode conte/t =for e/ample, communications timings> is preserved.
-rive motor =for e/ample, spindle> is stopped, with fast&start mode ena0led, if
availa0le.
1aser =if an(> is off.
3ecommended latenc( to return to - is less than * seconds.
'ower consumption in -4 should 0e no more than 8X of power consumed in -.
0oteH 5or ATA devices, this state is invoked 0( the !tand0( %mmediate command.
-2 ;0A This state is not defined for storage devices.
-3 $e>'ired -rive controller =for e/ample, interface and control electronics> is not functionalK
conte/t is lost.
%nterface mode =for e/ample, communications timings> is not preserved.
-rive motor =for e/ample, spindle> is stopped.
1aser =if an(> is off.
'ower consumption in -3 is no more than 4X of power consumed in -.
0oteH 5or ATA devices, this state is invoked 0( the JsleepL command.
A.11.1.2 Floppy Disk Devices
State Status 5efinition
- $e>'ired -rive controller =for e/ample, interface and control electronics> is functional.
-rive motor =for e/ample, spindle> is turning.
-4 ;0A This state is not defined for flopp( disk drives.
-2 ;0A This state is not defined for flopp( disk drives.
-3 $e>'ired -rive controller =for e/ample, interface and control electronics> is not functionalK
conte/t is lost.
-rive motor =for e/ample, spindle> is stopped.
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A.11.1.3 IDE Channel Devices
State Status 5efinition
- $e>'ired Adapter is functional.
Adapter interface mode =for e/ample, communications timings> is programmed.
'ower is applied to the 0us =and all devices connected to it>.
-4 ;0A This state is not defined for the %-. Channel.
-2 ;0A This state is not defined for the %-. Channel.
-3 $e>'ired Adapter is non&functional.
Adapter interface mode =for e/ample, communications timings> is not preserved.
'ower to the 0us =and all devices connected to it> ma( 0e off.
A.11.2 Power Management Policy
A.11.2.1 Hard Disk, Floppy Disk, CD-ROM and IDE/ATAPI Removable
Storage Devices
Present
State
0ext
State Cause
-3 - -evice usage =high&priorit( %F2>.
- -4[ -evice inactivit( =no high&priorit( %F2> for some period of time =T4>.
- -3 -evice inactivit( =no high&priorit( %F2> for a period of time =T2\)T4>.
!(stem enters sleeping state.
-4[ - -evice usage =@igh&priorit( %F2>.
[ %f supported. 0oteH 5or ATA, the -3&to&- transition re:uires a reset of the %-. channel. This means
that 0oth devices on a channel must 0e placed into -3 at the same time.
A.11.2.2 IDE Channel Devices
Present
State
0ext
State Cause
-3 - An( device on the channel needing to transition to a state other than state -3.
- -3 All devices on the channel in state -3.
A.11.3 Wake Events
!torage devices with remova0le media can, optionall(, signal wake upon insertion of media using their 0us&
specific notification mechanism. There are no other wake events defined for !torage devices.
A.11.4 Minimum Power Capabilities
A hard disk, C-&32M or %-.FATA'% remova0le storage device conforming to this specification must
support the - and -3 states. !upport for the -4 state is optional.
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A flopp( disk and %-. channel device conforming to this specification must support the - and -3 states.
APPENDIX B: Video Extensions
B ACPI Extensions for Display Adapters
B.1 Introduction
This section of the document descri0es a num0er of specialiHed AC'% methods to support mother0oard
graphics devices.
%n man( cases, s(stem manufacturers need to add special support to handle multiple output devices such as
panels and TD&out capa0ilities, as well as special power management features. This is particularl( true for
note0ook manufacturers. The methods descri0ed here have 0een designed to ena0le interaction 0etween the
s(stem ;%2!, video driver, and 2! to smoothl( support these features.
!(stems containing a 0uilt&in displa( adapter are re:uired to implement the AC'% ./tensions for -ispla(
Adapters.
Ta!le <-+ 7ideo 1xtension 3!Cect "eJuire%ents
Method 5escription
C-2! .na0leF-isa0le output switching 3e:uired if s(stem supports displa(
switching or 1C- 0rightness levels
C-2- .numerate all devices attached to displa(
adapter
3e:uired if integrated controller supports
output switching
C32M $et 32M -ata 3e:uired if 32M image is stored in
proprietar( format
C$'- $et '2!T -evice 3e:uired if CD'2 is implemented
C!'- !et '2!T -evice 3e:uired if CD'2 is implemented
CD'2 Dideo '2!T 2ptions 3e:uired if s(stem supports changing post
D$A device
CA-3 3eturn the uni:ue %- for this device 3e:uired
C;C1 Guer( list of 0rightness control levels
supported
3e:uired if em0edded 1C- supports
0rightness control
C;CM !et the 0rightness level 3e:uired if C;C1 is implemented
C--C 3eturn the .-%- for this device 3e:uired if em0edded 1C- does not
support return of .-%- via standard
interface
C-C! 3eturn status of output device 3e:uired if the s(stem supports displa(
switching =via hotke(>
C-$! Guer( graphics state 3e:uired if the s(stem supports displa(
switching =via hotke(
C-!! -evice state set 3e:uired if the s(stem supports displa(
switching =via hotke(>.
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B.2 Defnitions
<uilt-in displa) adapter. This is a graphics chip that is 0uilt into the mother0oard and cannot 0e
replaced. AC'% information is valid for such 0uilt&in devices.
Add-in displa) adapter. This is a graphics chip or 0oard that can 0e added to or removed from
the computer. ;ecause the s(stem ;%2! cannot have specific knowledge of add&in 0oards, AC'%
information is not availa0le for add&in devices.
<oot-up displa) adapter. This is the displa( adapter programmed 0( the s(stem ;%2! during
machine power&on self&test ='2!T>. %t is the device upon which the machine will show the initial
operating s(stem 0oot screen, as well as an( s(stem ;%2! messages.
The s(stem can change the 0oot&up displa( adapter, and it can switch 0etween the 0uilt&in adapter
and the add&in adapter.
5ispla) device. This is a s(non(m for the term displa( adapter discussed a0ove.
3utput device. This is a device, which is a recipient of the output of a displa( device. 5or
e/ample, a C3T or a TD is an output device.
B.3 ACPI Namespace
This is an e/ample of the displa(&related namespace on an AC'% s(stem<
:P% // &)P# :eneralEpurpo2e "W event
_6(- // !otif1(@:&$ (-=() to tell 0SP; of the event$ when u2er pre22e2
// the hot +e1 to 2witch the output 2tatu2 of the monitor.
// !otif1(@:&$ (-=4) to tell the event to 0SP;$ when there are an1
// chan,e2 on the 2ubEdevice2 for the @:& controller
SB
UE P)#
UE @:& // Define the @:& controller in the name2pace
UE _PS( / PR(
UE _PS4 / PR4
UE _PSF
UE _D0S // ;ethod to control di2pla1 output 2witchin,
UE _D0D // ;ethod to retrieve information about child output device2
UE _R0; // ;ethod to retrieve the R0; ima,e for thi2 device
UE _:PD // ;ethod for determinin, which @:& device will po2t
UE _SPD // ;ethod for controllin, which @:& device will po2t
UE _@P0 // ;ethod for determinin, the po2t option2
UE )R< // )hild device )R<
UE _&DR // "ardware #D for thi2 device
UE _DD) // :et %D#D information from the monitor device
UE _D)S // :et current hardware 2tatu2
UE _D:S // Juer1 de2ired hardware active \ inactive 2tate
UE _DSS // Set hardware active \ inactive 2tate
UE _PS( \
UE _PS4 E Power method2
UE _PS3 E for the output device
UE _PSF /
UE 6)D // )hild device 6)D
UE _&DR // "ardware #D for thi2 device
UE _DD) // :et %D#D information from the monitor device
UE _D)S // :et current hardware 2tatu2
UE _D:S // Juer1 de2ired hardware active \ inactive 2tate
UE _DSS // Set hardware active \ inactive 2tate
UE _B)6 // Bri,htne22 control level2
UE _B); // Bri,htne22 control method
UE _BJ) // Bri,htne22 Juer1 )urrent 6evel
UE _PS( \
UE _PS4 E Power method2
UE _PS3 E for the output device
UE _PSF /
UE <@ // )hild Device <@
UE _&DR // "ardware #D for thi2 device
UE _DD) // :et %D#D information from the monitor device
UE _D)S // :et current hardware 2tatu2
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UE _D:S // Juer1 de2ired hardware active \ inactive 2tate
UE _DSS // Set hardware active \ inactive 2tate
The 1C- device represents the 0uilt&in output device. Mo0ile 'Cs will alwa(s have a 0uilt&in 1C- displa(,
0ut desktop s(stems that have a 0uilt&in graphics adapter generall( donMt have a 0uilt&in output device.
B.4 Display-specifc Methods
The methods descri0ed in this section are all associated with specific displa( devices. This device&specific
association is represented in the namespace e/ample in the previous section 0( the positioning of these
methods in a device tree.
B.4.1 _DOS (Enable/Disable Output Switching)
Man( AC'% machines currentl( reprogram the active displa( output automaticall( when the user presses
the displa( toggle switch on the ke(0oard. This is done 0ecause most video device drivers are currentl( not
capa0le of 0eing notified s(nchronousl( of such state changes. @owever, this 0ehavior violates the AC'%
specification, 0ecause the s(stem modifies some graphics device registers.
The e/istence of the C-2! method indicates that the s(stem ;%2! is capa0le of automaticall( switching
the active displa( output or controlling the 0rightness of the 1C-. %f it e/ists at all, the C-2! method must
0e present for all displa( output devices. This method is re:uired if the s(stem supports displa( switching
or 1C- 0rightness control.
Arguments<
;it 4<
< The s(stem ;%2! should not automaticall( switch =toggle> the active displa( output,
0ut instead #ust save the desired state change for the displa( output devices in
varia0les associated with each displa( output, and generate the displa( switch event.
2!'M can :uer( these state changes 0( calling the C-$! method.
4< The s(stem ;%2! should automaticall( switch =toggle> the active displa( output, with
no interaction re:uired on the 2! part. The displa( switch event should not 0e
generated in this case.
2< The C-$! values should 0e locked. %tMs highl( recommended that the s(stem ;%2!
do nothing when hotke( pressed. No switch, no notification.
3< The s(stem ;%2! should not automaticall( switch =toggle> the active displa( output,
0ut instead generate the displa( switch event notif( codes /82, /83, or /8".
2!'M will determine what displa( output state should 0e set, and change the displa(
output state without further involvement from the s(stem ;%2!.
;it 2
< The s(stem ;%2! should automaticall( control the 0rightness level of the 1C- when
the power changes from AC to -C.
4< The s(stem ;%2! should not automaticall( control the 0rightness level of the 1C-
when the power changes from AC to -C.
3eturn Dalue<
None
The C-2! method controls this automatic switching 0ehavior. This method should do so 0( saving the
parameter passed to this method in a glo0al varia0le somewhere in the ;%2! data segment. The s(stem
;%2! then checks the value of this varia0le when doing displa( switching. This method is also used to
control the generation of the displa( switching 0otif)=D$A, /8F/84>.
The s(stem ;%2!, when doing switching of the active displa(, must verif( the state of the varia0le set 0(
the C-2! method. The default value of this varia0le must 0e 4.
Hewlett-Packard@Intel@Microsoft@Phoenix@Toshi!a
6 Advanced Configuration and 'ower %nterface !pecification
B.4.2 _DOD (Enumerate All Devices Attached to the Display Adapter)
This method is used to enumerate devices attached to the displa( adapter. This method is re:uired if
integrated controller supports output switching.
2n man( laptops toda(, a num0er of devices can 0e connected to the graphics adapter in the machine.
These devices are on the mother0oard and generall( are not directl( enumera0le 0( the video driverK for
this reason, all mother0oard D$A attached devices are listed in the AC'% namespace.
These devices fall into two categories<
7ideo output devices. 5or e/ample, a machine with a single displa( device on the mother0oard
can have three possi0le output devices attached to it, such as a TD, a C3T, or a panel.
0on-video output devices. 5or e/ample, TD Tuner, -D- decoder, Dideo Capture. The( #ust
attach to D$A and their power management closel( relates to D$A.
;oth AC'% and the video driver have the a0ilit( to program and configure output devices. This means that
0oth AC'% and the video driver must enumerate the devices using the same %-s. To solve this pro0lem, the
C-2- method returns a list of devices attached to the graphics adapter, along with device&specific
configuration information. This information will allow the cooperation 0etween AC'% components and the
video driver.
.ver( child device enumerated in the AC'% namespace under the graphics adapter must 0e specified in this
list of devices. .ach displa( device must have its own %-, which is uni:ue with respect to an( other
attacha0le devices enumerated.
Arguments<
None
3eturn Dalue<
A 0uffer containing an arra( of video device attri0utes as descri0ed in the ta0le 0elow.
!ample Code<
;ethod (_D0D$ ()
Return (
Pac+a,e()