INTRODUCTION TO VLSI

Introduction
Integrated circuits were made possible by experimental discoveries which showed that
semiconductor devices could perform the functions of vacuum tubes, and by mid-20th-century
technology advancements in semiconductor device fabrication. The integration of large numbers
of tiny transistors into a small chip was an enormous improvement over the manual assembly of
circuits using discrete electronic components. The integrated circuit's mass production capability,
reliability, and building-bloc approach to circuit design ensured the rapid adoption of
standardi!ed I"s in place of designs using discrete transistors. There are two main advantages of
I"s over discrete circuits - cost and performance. "ost is low because the chips, with all their
components, are printed as a unit by photolithography and not constructed a transistor at a time.
#erformance is high since the components switch $uicly and consume little power, because the
components are small and close together. %s of 200&, chip areas range from a few s$uare mm to
around 2'0 mm
2
, with up to ( million transistors per mm
2
.
Advances in Integrated circuits
%mong the most advanced integrated circuits are the microprocessors, which control
everything from computers to cellular phones to digital microwave ovens. )igital memory chips
are another family of integrated circuit that is crucially important to the modern information
society. *hile the cost of designing and developing a complex integrated circuit is $uite high,
when spread across typically millions of production units the individual I" cost is minimi!ed.
The performance of I"s is high because the small si!e allows short traces, which in turn allows
low power logic +such as ",-./ to be used at fast switching speeds.
I"s have consistently migrated to smaller feature si!es over the years, allowing more
circuitry to be paced on each chip. %s the feature si!e shrins, almost everything improves - the
cost per unit and the switching power consumption go down, and the speed goes up. 0owever,
I"'s with nanometer-scale devices are not without their problems, principal among which is
leaage current, although these problems are not insurmountable and will liely be solved or at
least ameliorated by the introduction of high- dielectrics. .ince these speed and power
consumption gains are apparent to the end user, there is fierce competition among the
manufacturers to use finer geometries. This process, and the expected progress over the next few
years, is well described by the International Technology 1oadmap for .emiconductors, or IT1..
SSI, MSI, LSI
The first integrated circuits contained only a few transistors. "alled 2Small-Scale
Integration2 +SSI/, they used circuits containing transistors numbering in the tens...I circuits
were crucial to early aerospace pro3ects, and vice-versa. 4oth the ,inuteman missile and %pollo
program needed lightweight digital computers for their inertially-guided flight computers5 the
%pollo guidance computer led and motivated the integrated-circuit technology, while the
,inuteman missile forced it into mass-production.These programs purchased almost all of the
available integrated circuits from (6&0 through (6&7, and almost alone provided the demand that
funded the production improvements to get the production costs from 8(0009circuit +in (6&0
dollars/ to merely 82'9circuit +in (6&7 dollars/.
The next step in the development of integrated circuits, taen in the late (6&0s, introduced
devices which contained hundreds of transistors on each chip, called 2Medium-Scale
Integration2 +MSI/. They were attractive economically because while they cost little more to
produce than ..I devices, they allowed more complex systems to be produced using smaller
circuit boards, less assembly wor, and a number of other advantages. :urther development,
driven by the same economic factors, led to 2Large-Scale Integration2 +LSI/ in the mid (6;0s,
with tens of thousands of transistors per chip. <.I circuits began to be produced in large
$uantities around (6;0, for computer main memories and pocet calculators.
VLSI
The final step in the development process, starting in the (6=0s and continuing on, was
2>ery <arge-.cale Integration2 +><.I/, with hundreds of thousands of transistors, and beyond
+well past several million in the latest stages/. :or the first time it became possible to fabricate a
"#? on a single integrated circuit, to create a microprocessor. In (6=& the first one megabit
1%, chips were introduced, which contained more than one million transistors. ,icroprocessor
chips produced in (66@ contained more than three million transistors.This step was largely made
possible by the codification of 2design rules2 for the ",-. technology used in ><.I chips,
which made production of woring devices much more of a systematic endeavour.
ULSI, SI, SOC
To reflect further growth of the complexity, the term ULSI that stands for 2Ultra-Large
Scale Integration2 was proposed for chips of complexity more than ( million of transistors.
0owever there is no $ualitative leap between ><.I and ?<.I, hence normally in technical texts
the 2><.I2 term covers ?<.I as well, and 2?<.I2 is reserved only for cases when it is necessary
to emphasi!e the chip complexity, e.g. in mareting.
The most extreme integration techni$ue is !a"er-scale integration +SI/, which uses
whole uncut wafers containing processors as well as memory. %ttempts to tae this step
commercially in the (6=0s +e.g. by Aene %mdahl/ failed, mostly because of defect-free
manufacturability problems, and it does not now seem to be a high priority for industry.The *.I
techni$ue failed commercially, but advances in semiconductor manufacturing allowed for
another attac on the I" complexity, nown as S#stem-on-C$i% +SOC/ design. In this approach,
components traditionally manufactured as separate chips to be wired together on a printed circuit
board are designed to occupy a single chip that contains memory, microprocessor, peripheral
interfaces, Input9-utput logic control, data converters, and other components, together
composing the whole electronic system.
Ot$er develo%ments
In the (6=0s programmable integrated circuits were developed. These devices contain
circuits whose logical function and connectivity can be programmed by the user, rather than
being fixed by the integrated circuit manufacturer. This allows a single chip to be programmed to
implement different <.I-type functions such as logic gates, adders, and registers. "urrent devices
named :#A%s +:ield #rogrammable Aate %rrays/ can now implement tens of thousands of <.I
circuits in parallel and operate up to @00 ,0!. The techni$ues perfected by the integrated
circuits industry over the last three decades have been used to create microscopic machines,
nown as ,B,.. These devices are used in a variety of commercial and defense applications,
including pro3ectors, in 3et printers, and accelerometers used to deploy the airbag in car
accidents. In the past, radios could not be fabricated in the same low-cost processes as
microprocessors. 4ut since (66=, a large number of radio chips have been developed using
",-. processes. Bxamples include Intel's )B"T cordless phone, or %theros's =02.(( card.
Moore&s La!
The growth of complexity of integrated circuits follows a trend called 2,oore's <aw2,
first observed by Aordon ,oore of Intel. ,oore's <aw in its modern interpretation states that the
number of transistors in an integrated circuit doubles every two years. 4y the year 2000 the
largest integrated circuits contained hundreds of millions of transistors. It is difficult to say
whether the trend will continue.
'o%ularit# o" ICs
-nly a half century after their development was initiated, integrated circuits have become
ubi$uitous. "omputers, cellular phones, and other digital appliances are now inextricable parts of
the structure of modern societies. That is, modern computing, communications, manufacturing
and transport systems, including the Internet, all depend on the existence of integrated circuits.
Indeed, many scholars believe that the digital revolution brought about by integrated circuits was
one of the most significant occurrences in the history of manind.
$# VLSI(
Integration improves the designC
lower parasitics D higher speed.
lower power.
physically smaller.
Integration reduces manufacturing cost-no manual assembly.
C$allenges in VLSI Design
,ultiple levels of abstractionC transistors to "#?s.
,ultiple and conflicting constraintsC low cost and high performances are often at odds.
.hort design timeC <ate products are often irrelevant.
Dealing !it$ Com%le)it#
)ivide-and-con$uerC limit the number of components you deal with at any one time.
Aroup several components into larger componentsC
transistors form gates5
gates form functional units5
functional units form processing elements, etc.
To%-do!n vs* +ottom-u% Design
Top-down design adds functional detail.
"reate lower levels of abstraction from upper levels.
4ottom-up design creates abstractions from low-level behavior.
Aood design needs both top-down and bottom-up efforts.
Design Strategies
I" design productivity depends on the efficiency with which the design may be converted
from concept to architecture, to logic and memory, to circuit and hence to a physical layout.
% good design strategy with a good design system should provide for consistent descriptions in
various abstraction levels.
The role of good design strategies is to reduce complexity, increase productivity, and assure
woring product.
)esign is a continuous trade-off to achieve ade$uate results forC
#erformance - speed, power, function, flexibility
.i!e of die +hence cost of die/
Time to design
Base of test generation and testability
,ard!are Descri%tion Langauges -,DLs.
IBBB standardi!ed <anguage

V,DL

Verilog,DL
$at is V,DL(
V,DL/ V0.I" ,ardware Description Language
EV,SIC/ Very ,igh Speed Integrated Circuit
)eveloped originally by )%1#%
Efor specifying digital systems
International IBBB standard +IBBB (0;&-(667/
0ardware )escription, .imulation, .ynthesis
#ractical benefitsC
Ea mechanism for digital design and reusable design documentation
E,odel interoperability among vendors
EThird party vendor support
E)esign re-use.
V,DL vs* C0'ascal
C0'ascal/
E#rocedural programming languages.
ETypically describe procedures for computing a maths function or manipulation of data.
+e.g., sorting, matrix computing/
E% program is a recipe or a se$uence of steps for how to perform a computation or
manipulate data.
V,DL/
E a language to describe digital systems.
E#urposesC simulation and synthesis of digital systems.
Design 1lo!
S'2CI1ICATION
This is the stage at which we define what are the important parameters of the
system9design that you are planning to design. % simple example would beC I want to design a
counter5 it should be @ bit wide, should have synchronous reset, with active high enable5 when
reset is active, counter output should go to 202.
,I3, L2V2L D2SI3N
This is the stage at which you define various blocs in the design and how they
communicate. <et's assume that we need to design a microprocessorC high level design means
splitting the design into blocs based on their function5 in our case the blocs are registers, %<?,
Instruction )ecode, ,emory Interface, etc.
MICRO D2SI3N0LO L2V2L D2SI3N
<ow level design or ,icro design is the phase in which the designer describes how each
bloc is implemented. It contains details of .tate machines, counters, ,ux, decoders, internal
registers. It is always a good idea to draw waveforms at various interfaces. This is the phase
where one spends lot of time.
RTL CODIN3
In 1T< coding, ,icro design is converted into >erilog9>0)< code, using
synthesi!able constructs of the language. Formally we lie to lint the code, before starting
verification or synthesis.
SIMULATION
.imulation is the process of verifying the functional characteristics of models at any level
of abstraction. *e use simulators to simulate the 0ardware models. To test if the 1T< code meets
the functional re$uirements of the specification, we must see if all the 1T< blocs are
functionally correct. To achieve this we need to write a test4enc$, which generates cl, reset and
the re$uired test vectors. *e use the waveform output from the simulator to see if the )?T
+)evice ?nder Test/ is functionally correct.
S5NT,2SIS
.ynthesis is the process in which synthesis tools lie design compiler or .ynplify tae
1T< in >erilog or >0)<, target technology, and constrains as input and maps the 1T< to target
technology primitives. .ynthesis tool, after mapping the 1T< to gates, also do the minimal
amount of timing analysis to see if the mapped design is meeting the timing re$uirements.
-Im%ortant t$ing to note is, s#nt$esis tools are not a!are o" !ire dela#s, t$e# onl# 6no! o"
gate dela#s.*
1ormal Veri"ication/ "hec if the 1T< to gate mapping is correct.
Scan insertion / Insert the scan chain in the case of %.
'LAC2 7 ROUT2
The gatelevel netlist from the synthesis tool is taen and imported into place and route
tool in >erilog netlist format. %ll the gates and flip-flops are placed5 cloc tree synthesis and
reset is routed. %fter this each bloc is routed. The #G1 tool output is a A). file, used by
foundry for fabricating the %.I".
3AT2 L2V2L SIMULATION -OR. SD10TIMIN3 SIMULATION
There is another ind of simulation, called timing simulation, which is done after
synthesis or after #G1 +#lace and 1oute/. 0ere we include the gate delays and wire delays and
see if )?T wors at rated cloc speed.
'OST SILICON VALIDATION
-nce the chip +silicon/ is bac from fab, it needs to put in real environment and tested
before it can be released into ,aret. .ince the speed of simulation with 1T< is very slow
+number clocs per second/, there is always possibility to find a bug in #ost silicon validation.
NoteC %s design becomes complex, we write S2L1 C,2C8IN3 T2ST+2NC,, where
test bench applies the test vector, then compares the output of )?T with expected values.
C,A'T2R 9
+ASIC COM'ON2NTS O1 A V,DL MOD2L
The purpose of >0)< descriptions is to provide a model for digital circuits and systems.
This abstract view of the real physical circuit is referred to as entity. %n entity normally consists
of five basic elements, or design units.
In >0)< one generally distinguishes between the external view of a module and its
internal description. The external view is reflected in the entity declaration, which represents an
interface description of a 'blac box'. The important part of this interface description consists of
signals over which the individual modules communicate with each other.
The internal view of a module and, therefore, its functionality is described in the
architecture body. This can be achieved in various ways. -ne possibility is given by coding a
behavioral description with a set of concurrent or se$uential statements. %nother possibility is a
structural description, which serves as a base for the hierarchically designed circuit architectures.
Faturally, these two inds of architectures can also be combined. The lowest hierarchy level,
however, must consist of behavioral descriptions. -ne of the ma3or >0)< features is the
capability to deal with multiple different architectural bodies belonging to the same entity
declaration.
4eing able to investigate different architectural alternatives permits the development of
systems to be done in an efficient top-down manner. The ease of switching between different
architectures has another advantage, namely, $uic testing. In this case, it is necessary to bind
one architecture to the entity in order to have a uni$ue hierarchy for simulation or synthesis.
*hich architecture should be used for simulation or synthesis in con3unction with a given entity
is specified in the configuration section. If the architecture body consists of a structural
description, then the binding of architectures and entities of the instantiated submodules, the so-
called components, can also be fixed by the configuration statement.
The pacage is the last element mentioned here. It contains declarations of fre$uently
used data types, components, functions, and so on. The pacage consists of a pacage declaration
and a pacage body. The declaration is used, lie the name implies, for declaring the above-
mentioned ob3ects. This means, they become visible to other design units. In the pacage body,
the definition of these ob3ects can be carried out, for example, the definition of functions or the
assignment of a value to a constant. The partitioning of a pacage into its declaration and body
provides advantages in compiling the model descriptions.
2ntit# Declaration
%n entity declaration specifies the name of an entity and its interface. This corresponds to
the information given by the symbols in traditional design methods based on drawing
schematics. .ignals that are used for communication with the surrounding modules are called
ports.
Inter"ace o" a "ull-adder module
2)am%le /
entity :?<<%))B1 is
port + %, 4, " C in bit 5
.?,, "%11H C out bit /5
end :?<<%))B15
The module :?<<%))B1 has five interface ports. Three of them are the input ports %,
4 and " indicated by the >0)< eyword in. The remaining two are the output ports .?, and
"%11H indicated by out. The signals going through these ports are chosen to be of the type bit.
This is one of the predefined types besides integer, real and others types provided by >0)<. The
type bit consists of the two characters '0' and '(' and represents the binary logic values of the
signals.
Bvery port declaration implicitly creates a signal with the name and type specified. It can
be used in all architectures belonging to the entity in one of the following port modesC
inC The port can only be read within the entity and its architectures.
outC This port can only be written.
inoutC This port can be read and written. This is useful for modeling bus systems.
4u""erC The port can be read and written. Bach port must have only one driver.
S#nta) /
entit# entity name is
I generics J
I ports J
I declarations +types, constants, signals/ J
I definitions +functions, procedures/ J
I 4egin -- normally not used
statements J
end I entity name J :
Arc$itecture
The second important component of a >0)< description is the architecture. This is
where the functionality and the internal implementation of a module are described. In general, a
complex hierarchically structured system may have the topology.
,ierarc$ical circuit design
.C structural description
4C behavioral description
49.C mixed description
In order to describe such a system both behavioral and structural descriptions are
re$uired. % behavioral description may be of either concurrent or se$uential type. -verall,
>0)< architectures can be classified into the three main typesC
)ata flow modeling.
4ehavioral modeling.
.tructural modeling.