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+ +
=
C C L L
LC
f
f f
(7)
0
0 max
0
0 min
1
) )( ( f
f f
C C L L
LC
f
f f
+ +
(8)
Considering only small variations of the parameters
(LC~0), the relation (8) can be written as:
1 1
2
min
0
2
max
0
f
f
L
L
C
C
f
f
(9)
Assuming Q the unbalance between the reactive power
inverter generated and the load absorbed one, after the loss of
mains, the following relation comes from (4), (5), (6) :
L
L
C
C
Q
P
Q
f
(10)
Combining (9) and (10) a relation between the NDZ of the
frequency protections and the reactive power unbalance can
be obtained:
2
min
0
2
max
0
1 1
f
f
Q
P
Q
f
f
Q
f f
(11)
A similar relation linking the NDZ of voltage protections
and active power unbalance, P, can be obtained from (5):
1 1
2
min
0
2
max
0
V
V
P
P
V
V
(12)
where V
min
and V
max
are the lower and upper limits of the
NDZ of the voltage relay. A typical NDZ for a passive island
detection method based on the measurements of voltage and
frequency is reported in Figure 2 [7]. If the active/reactive
power unbalance between generation and load are within the
NDZ, the loss of mains is not detected by the IP and the
island remains supplied by the inverter.
Figure 2: Non Detecting Zone for an Interface Protection with passive island
recognition.
According to relation (11) frequency variations are mainly
related to reactive power unbalances, while active power
unbalances are responsible for voltage variations (12).
IV. THE EXPERIMENTAL ARRANGEMENT
The system represented in Figure 1 has been implemented
at the RSE laboratory in Piacenza (Italy). It consists of:
a DC source with PV array VI characteristic emulation
feature (P=20 kW, V
max
=500 V);
a single/three phase connection to the public LV grid
(alternatively, a 12 kVA grid simulator is available);
a data acquisition system which monitors AC and DC
measurements and allows on-line calculations of active,
reactive power and root-mean-square (RMS) values; the
Supervision system offers some visual tool to easily
check the power balance between generator and load; an
example of the Man to Machine visual Interface (MMI)
of the data acquisition system is shown in Figure 3;
an adjustable parallel RLC load (single or three phase)
with overall power capability up to 18 kW (resistive) and
18 kVAr (inductive and capacitive).
A power absorption from 2 kW/2 kVAr to 18 kW/18
kVAr can be set through series/parallel connections of load
elements, and small power variations (up to about 5 % of the
nominal value) can be produced for every load component. In
implementing each load component, particular care was given
in minimizing the parasitic effects. Some details of the
resistive load actual implementation are shown in Figure 4.
Manually operated switches and differential relays, for safety
purposes, complete the experimental set-up. An overview of
the laboratory environment is shown in Figure 5.
Figure 3: Topological diagram of the experimental set-up (taken from the
data acquisition system visual interface).
Figure 4: Resistive component of the load. The wirewound resistor is
implemented so that inductive parasitic effects are minimized.
V. EXPERIMENTAL RESULTS
The IP of three different Low Voltage (LV) single and
three phase PV inverters, rated 3 kW, 6 kW and 10 kW
respectively, are tested according to the IEC 62116 standard.
All of them adopt the passive island recognition criterion
based on measurements of frequency and voltage with the
same setting, reported in TABLE II.
TABLE II
INTERFACE PROTECTIONS SETTINGS
Protection relay Threshold value Intentional Delay
Inv I Inv II e III
Over-voltage 110% VN 50 ms 200 ms
Under-Voltage 90% VN 50 ms 100 ms
Over-frequency 50.3 Hz 50 ms 100 ms
Under-Frequency 49.7 Hz 50 ms 100 ms
In the follow the experimental results are presented. The
nominal values of the LV grid are V
0
=230V and f
0
=50Hz.
A. Single phase 3 kW PV inverter
The actual balance condition corresponds to:
PV array power: P
N
=2.8 kW;
AC side inverter active power: 2.7 kW;
load active power: 2650 W;
capacitive/inductive reactive power: 2.7 kVAr.
With reference to the Figure 6, the loss of mains occurs at
t=2 s and is fully corresponding to the zeroing of the from-
inverter-to-grid current (white curve).
According to the previous calculated load values, the island
voltage and frequency would be V
1
=232.16 V and f
1
=50.02
Hz well, within the NDZ of the IP. Indeed, the load remains
supplied by the inverter for some minutes after the loss of
mains, as shown in Figure 6, where the island voltage
waveform is shown in green, the inverter currents are
reported in blue and the grid current in white.
Figure 6: Voltage and current waveforms recorded by the data acquisition
system during a test in balanced power conditions for a 3 kW inverter.
The periodic voltage drop of the green waveform of Figure
6 is due to the Maximum Power Point Tracking (MPPT)
algorithm implemented within the inverter control. The
voltage remains above 90% V
N
even during these phenomena
and no under-voltage protection trip occurs. The IP fails the
test also for some unbalanced conditions with small excess of
capacitive reactive power.
B. Single phase 6 kW PV inverter
In this case, the actual balance condition at the rated
inverter power is:
PV array power: P
N
=5.6 kW;
AC side inverter active power: 5.5 kW;
load active power: 5.5 kW,
capacitive/inductive reactive power: 5.5 kVAr.
Even though the balance condition is expected to give rise
to an island, according to theoretical calculations (voltage and
frequency within the NDZ of the IP), an island condition for
more than few hundreds milliseconds was never recorded. An
example of recorded test result is shown in Figure 7. In this
case the IP trips in 70 ms. Many comparable results were
obtained for unbalanced conditions and for reduced PV array
power (66% P
N
and 33% P
N
).
Figure 7:Voltage and current waveforms recorded by the data acquisition
system during a test in balance power conditions for a 6 kW inverter.
To explain the experimental results, a simulation model of
the experimental set-up is developed in the ATPDraw
environment. In general the modelling activities are mainly
focused on:
confirming relations among power unbalances and island
voltage and frequency;
forecasting the behavior of the inverter, grid and IP in
different conditions;
explaining experimental results (even though the
simulation model represents a three phase inverter and
the actual inverter is single phase, the overall behavior
remains the same).
The grid frequency simulated is reported in Figure 8 for the
power balanced case (i.e. equations (1)(4) are satisfied). The
loss of mains occurs at t=1.0 s, (the frequency deviation
visible at t=1.0 s is due to some transient voltage perturbation
occurring at the loss of mains). In Figure 9 the current (red
curve) and voltage (green curve) simulated in case of power
balance during island are presented.
Figure 8: Island frequency simulated with balance between generation and
load.
Figure 9:Voltage and current waveforms simulated.
In the model, a perturb and observe MPPT algorithm is
embedded within the PV inverter control, in order to take into
account the power variations introduced by the MPPT itself.
This algorithm is set to have an active power variation 300
ms after the loss of mains. Simulation results are presented in
Figure 10 for a power variation of -5% P
N
and in Figure 11
for -10% P
N
. In both cases, the loss of mains occurs at t=1.0 s
and the MPPT reduces the active power at 1.3 s, but only in
case of a 10% active power reduction the islanding condition
has been detected.
0,8 1,0 1,2 1,4 1,6 1,8 [s]
-400
-300
-200
-100
0
100
200
300
400
[V]
Figure 10: Voltage drop due to a -5% PN inverter power variation.
0,8 1,0 1,2 1,4 1,6 1,8 [s]
-400
-300
-200
-100
0
100
200
300
400
[V]
Figure 11: Voltage drop due to a -10% PN inverter power variation.
Then, a reasonable explanation of the unexpected IP
operation in balance condition (Figure 7) may be found in the
active power variations introduced by the MPPT algorithm.
This can cause enough large voltage drops to be detected by
the under-voltage relay.
C. Three phase 10 kW inverter
The tested three phase inverter offers some advanced
features such as the Fault Ride Through (FRT) and the
control of reactive power injection/absorption for grid voltage
support. The inverter is tested in each condition, according to
the TABLE I, also at reduced PV array power (66% P
N
and
33% P
N
). In every test case, the run-up time is less than 200
ms; the Figure 12 shows the voltage and currents measured in
the balance condition.
1.8 1.85 1.9 1.95 2 2.05 2.1 2.15 2.2 2.25 2.3
-400
-200
0
200
400
V
o
lta
g
e
[
V
]
1.8 1.85 1.9 1.95 2 2.05 2.1 2.15 2.2 2.25 2.3
-20
-10
0
10
20
C
u
rr
e
n
t [
A
]
1.8 1.85 1.9 1.95 2 2.05 2.1 2.15 2.2 2.25 2.3
-2
-1
0
1
2
Time [s]
C
u
r
r
e
n
t [
A
]
Figure 12: Experimental results for the test of island detection for a 10 kW
inverter. Voltages are shown in the upper graph, inverter currents in the
central one and from-inverter-to-grid currents in the lower one. Loss of mains
occurs when the grid currents drop to zero.
VI. CONCLUSIONS
The main goal of the standard IEC 62116 is to provide a
test procedure to evaluate the reliability of islanding
prevention measure that must be implemented by the grid
connected PV Inverters.
The paper discusses the test procedure proposed by the
standard IEC 62116 and shows the experimental activities
oriented to its feasibility assessment made by RSE in 2012.
The experimental results allow to claim the main IEC 62116
merit: the focus on the specific balance condition (Q
L
=Q
C
,
P
LOAD
=P
INV
) as the most critical condition for island
detection. Besides, thanks to the actual RSE implementation,
it is possible to evaluate the most critical parts related to the
test laboratory developments that are:
the implementation of the adjustable RLC load, which
must have low parasitic parameters and high thermal
stability and whose power should be adjustable ;
the difficulty to achieve a stable steady state with the
desired match between power Inverter generation and
load absorption before the loss of mains.
At the same time, the reading of the experimental results
points out some issues concerning this standard:
possible interactions among more inverters, are not
considered;
the RLC load is not representative of all the possible grid
loads, such as nonlinear or distorting loads.
Finally, the experimental activities, made on three PV
inverters (single and three phase), show the possibility of
supporting island condition, also in presence of unbalanced
power exchanges between generation and loads. Maximum
Power Point Tracking algorithm plays an important role in
creating power unbalances which is useful for the island
detection. The phenomenon has been further investigated and
confirmed also by simulations.
ACKNOWLEDGEMENTS
This work has been financed by the Research Fund for the
Italian Electrical System under the Contract Agreement
between RSE S.p.A. and the Ministry of Economic
Development - General Directorate for Nuclear Energy,
Renewable Energy and Energy Efficiency in compliance with
the Decree of March 8, 2006.
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Figure 5: Overview of the test laboratory.