The 5th Power Electronics, Drive Systems and Technologies Conference (PEDSTC 2014), Feb 5-6, 2014, Tehran,

ran, Iran c
High-Resolution Numeral-Based Multilevel
Inverter with Low Number of Conducting Switches
for Low-Voltage PV Applications
Ehsan Esfandiari
Department of Electrical Engineering
Majlesi Branch, Islamic Azad University
Esfahan, Iran
e.esfandiari@iaumajlesi.ac.ir
Abstract-a new high-resolution staircase-output multilevel
inverter for low voltage PV applications is proposed in this paper.
The proposed topology can provide high number of levels with
low number of sources and conducting switches. A 1-2-7-14-
source version of this new topology can generate 49 levels with 4
sources, 30 total switches and 61 conducting switches. The
topology also can be expanded horizontally and vertically to
achieve higher resolution. In addition, a multiwinding-based
variant of the topology is proposed with lower number of switches
and one DC source. Experimental results show the feasibility of
the inverter. At last, the proposed topology was compared with
other staircase topologies considering important parameters in
low voltage PV systems.
Inde Terms-staircase, numeral-based, multilevel inverter,
on-state, conducting, power dissipation, low voltage PV.
In this paper, N represents the number of sources (or
windings) in the whole of the system and nm is the number of
sources in the mth string of sources.
I. INTRODUCTION
Multilevel inverters provide several benefts for power
electronic conversion, such as low THD, simple control
techniques, compactness, dependability and the capacity to
control a greater amount of power in the form of high voltages
and currents [ I -5], making this technology increasingly
important in the last several years [6-15] . These inverters also
feature a low operating cost, high dependability and high
efciency renewable sources.
The best-known multilevel inverter structures are the
cascaded H-Bridge inverter [16-20], the fying capacitor
inverter, and the diode clamping inverter [12, 13, 21].
Multilevel inverters can be divided into two types:
symmetrical and asymmetrical inverter structures [22-29]. The
former is so named due to the equality in the amplitude of the
DC sources. Control over the multilevel inverters can frther
divide them into two major categories: the low-fequency
controlled (staircase) multilevel inverters [3, 14, 23, 30] and
the PWM-controlled multilevel inverters. In the low
Frequency controlled multilevel inverters, the switches are
controlled by low fequency signals [31], hence generating a
3 bidirectional switches
978-1-4799-3479-9/14/$31.00 2014 IEEE
Behzad Bahraminejad
Department of Electrical Engineering
Majlesi Branch, Islamic Azad University
Esfahan, Iran
b.bahraminejad@iaumajlesi. ac.ir
staircase output. These inverters have a special place in
renewables [4, 14], due to their elimination of switching power
losses and because they are able to generate a high number of
levels using fewer sources with numeral-base magnitudes [22-
26, 32]. These inverters are the best option for renewables with
a high effciency arising fom the lower number of conducting
switches. A binary-source cascaded H-Bridge generates
2N+
1
- 1 levels with 2N number of conducting switches and
4N total switches
2
In the inverter proposed in [22], the
number of levels is limited to 2N+
1
- 1 with 2N + 2
conducting and 4N + 4 total switches. In the topology
proposed in [23], the number of levels is calculated by
nl(ni(ni + 1) + 1) with 4m conducting and I
1
(2ni + 2)
total switches. Reference [27] presents a confguration with
2N+
1
- 1 levels, N + 2 conducting and 2N + 4 total switches.
The system proposed in [33] can generate 2 nl(ni + 1) - 1
levels with (2m + 2) conducting switches and Il (2ni +
2)+4 total switches. The design proposed in [14] generates
2N + 1 levels with only 4 conducting and 2N + 6 total
switches.
The most recent confgurations in [28, 29] introduce
staircase-output multilevel inverters with a reduced number of
components for high voltage applications but a high number of
conducting switches due to the presence of several H-Bridge
blocks in the strings.
II. BACKGROUD
Low voltage, small and medium scale Photovoltaic Power
Generators (PPGs) are the fastest developing industry in the
world. The presence of modem, high breakdown-voltage
switches with low on-state resistance and voltage drop makes
cascading the switches unnecessary in the low voltage PPGs.
For widespread application, medium and small scale PPGs a
parallel battery bank is preferred to reach to greater reliability,
higher effciency and easier one-stage Maximum Power Point
Tracking (MPPT). Multiple battery banks (connected in series
or in discrete mode) increase the caballing volume, thus
decreasing the efciency and even the reliability. The number
of conducting switches also affects the efciency of these
2
Each switch consists of a p-n junction switch or a MOSFET and its anti
parallel diode.
550
VDC
H-Bridge
-
Fig. 1 The confguration proposed in [3, 14].
systems with high initial costs. In addition, based on available
standards, isolation is necessary in the PV converters.
Furthermore, reliability is an important issue in renewable
power generators. Particularly in remote areas, in the f

e,
various individual homes will employ only PVs for electnclty
generation. As a matter of fact, higher numbers of conducting
switches decrease the reliability and efciency.
III. SWITCH-LADDER MULTILEVEL INVERTER (FIG. 1, FIG. 3)
The feasibility of multi-winding, transformer-based
multilevel inverters was investigated in [22] and [14]. Fig. 1
shows the model proposed in the latter study. Operating this
inverter at 5 kW and 47 levels resulted in greater than 97%
efciency and a THD below 5%. The most important
advantage of this inverter is that only 4 switches are
conducting at low fequency during each interval. Another
advantage is that this inverter can tolerate fault conditions
using a special switching patter, due to the symmetrical and
parallel nature of the system. The high number of switches
S7
~~~~~~~~ . + YOU! - .. ~~~~~~~
Fig. 3 The proposed new configuration with a reduced number of sources
and conducting switches (49 levels).
551
H
Bridge
Fig. 2 The reconfigured topology of Fig. 1 and [33], optimized for low
voltage PV application with fewer windings ad switches.
(2N + 6 switches) is a drawback of this inverter. Fig. 2 shows
the reconfgured topology of Fig. 1 and [33], optimized for low
voltage PV application with fewer windings and switches.
IV. A NEW CONFIGURATION WITH REDUCED NUMBER OF DC
SOURCES (FIG. 3)
The new confguration proposed in Fig. 3 exhibits fewer
conducting switches (25% less) compared with [23]. It also has
a lower number of sources compared with the design proposed
in [33]. This system uses (3N - 2) 3 total switches and
N + 2 conducting switches which N is the total sources.
Extending the design horizontally with ni = 2, can lead to
n
1
(3ni + 1) levels with m strings (each string contains ni
sources). This means that the proposed design with 4 DC
sources (m = 2, ni = 2) can generate 49 levels with 30 total
switches and 6 conducting switches. Table 1 illustrates the
switching patter for Fig. 3.
TABLE I SWITCHING PATTERN FOR CIRCUIT PROPOSED IN FIG. 3.
level Conducting switches output
0 S,SSS
2
0
1 S,SsSj IVDc
2 SSSDS
2
2VDC
3 SgSDS[ 3VDC
4 S,S4SJ 4VDC
24 S9SZS[ 24VDC
-24 S7SySJ -24VDC
-4 S7SDS[ -4VDC
-3 S7S4SJ -3VDC
-2 S,SsSJ -2VDC
-I S7S4S
2 -IVDc
+ V
OU!
-
Fig. 4 Horizontally extended version of the confguration in Fig. 3 (343 levels).
A. Extended version of the proposed inverter
Fig. 4 is the horizontally extended version of the proposed
confguration with ! = 2 and ! = 3. This system can
generate 343 levels with 48 total and 8 conducting switches
using 6 DC sources. This topology can provide highest number
of levels with lower number of conducting switches.
V. MULTI-WINDING EDITION OF THE PROPOSED MULTI-LEVEL
So
14(t)
S,
7(t)

+ V ~
________ . 0ut er----==-
q
,
t
Fig. 5 Reconfgured version of Fig. 3 to be adopted fr low voltage PV
application requirements.
INVERTER WITH ONE DC SOURCE (FIG. 5)
The confguration proposed in Fig. 3 uses separated DC
sources and does not provide isolation. Fig. 5 presents a
proposed reconfgured edition of this topology that uses a
multi-winding transformer, provides isolation and can generate
49 levels fom 4 windings with 8 conducting switches and 22
total switches. The total number of switches was reduced
compared with Fig. 3. However, due to the presence of the
lower number of windings and the special array of switches,
this inverter is vulnerable against both short and open-circuits
and has a lower reliability compared with that in Fig. 1. The
principle of the operation is similar to confgurations of Fig. 1
and Fig. 2. This topology also comply the low voltage PV
7VDC=84V
S7
+ V
L
~~~~~~~~
.
out
Fig. 6 The proposed new confguration with a reduced number of sources
and conducting switches (21 levels).
552

V
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4,6
3,10

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TO
-3.10
-4.6
-6,215
- 7 7 . T D. . 1b.Z
mm
<
. ZD.Z . .1 .
B


5,0
mV
3,4
`.b
1.

T.
21.6
.4
-32
5.0
.
Fig. 7 Output voltage and current of the proposed inverter (Fig. 3) under a 40n resistive load
Fig. 8 Total Harmonic Distortion of the current and voltage under a 40n resistive load.
application requirements.
VI. EXPERIMENTAL RESULT (FIG. 6)
To show the feasibility of the proposed inverter, a 1-2-7
source sample of the proposed inverter was constructed. The
confguration is shown in Fig. 6 and can generate 21 levels
with 6 conducting switches. IRFP4242 MOSFETs fom IR
Company with 39mf on-state resistance were used in the form
of bidirectional switches. Firing signals were generated using
an ATMEGA128 microcontroller board. The amplitude of the
sources are approximately 12V, 24V and 84V respectively and
were produced using multiple DC power supplies in the lab.
553
Fig. 7 shows the output voltage and current of the proposed
inverter under a 40f resistive load. Fig. 8 shows the Total
Harmonic Distortion (THO) of the voltage and current under a
40f resistive load. The registered THO for voltage and current
was near 1.5%. The switching angles were calculated using the
following equation,
O
n
= sin-1 (
n
-po.s) (1)
Which P is the number of voltage levels in a quarter (in the
experimental case, P = 10).
TABLE 2 BRIEF COMPARISON OF THE STAIRCASE MULTILEVEL INVERTERS OPTIMIZED FOR LOW VOLTAGE PV APPLICATIONS
Conf in [23]
Confin Conf in Conf in [33] nj-4, Conf in [22] Conf in [14] (Fig. 1 )
No. of DC sources
No. of output
windings
No. of switches
Provision of isolation
No. of levels
No. of condo switches
Composition of
voltage drop with p
n junction switches
Composition of
voltage drop with
Mosfet switches
Reliability in faults
nj=2,m=2
4
24
No
49
8
4Vs+4Vo
4Ros(on)+4Vo
Low
Fig. 3 Fig. 5
nj=2,m=2
4
4
30 26
No Yes
49
6
3Vs+3Vo
3Ros(on)+3Vo
Low
VII. MAKING A DECISION
Several parameters must be considered when selecting
between confgurations, including total investment cost, type
of available switches, input voltage, power rate, expected level
of reliability, output quality and the efciency of the system.
The confguration in [14] (Fig. I) exhibits a lower number of
conducting switches with more total switches and windings
and has a higher reliability. The topology in Fig. 2 features a
lower number of windings and fewer total switches with more
conducting switches compared with [14] (Fig. I). Finally, the
confguration in Fig. 5 has fewer windings and total switches
and more conducting switches compared with both [14] (Fig.
1) and Fig. 2. Aside fom the efciency of the transformer, the
number and type of conducting switches are the most
important parameters that affect the efciency of the staircase
output multilevel inverters in high initial-cost PV generators.
Table 2 shows a brief comparison of the staircase multilevel
inverters optimized for low voltage PV applications. Some
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n
2
=5 N=23
N=5 N=4
9
5 4 23
26 24 20 52
No Yes Yes Yes
59 63 31 47
6 12 10 4
4Vs+2Vo 7Vs+5Vo 6Vs+4Vo 3Vs+IVo
4Ros(on)+2Vo
7Ros(on)+ 6Ros(on)+4
3Ros(on)+IVo
5Vo Vo
High Low Very high
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CONCLUSION
This paper presented a new staircase multilevel inverter
topology optimized for low-voltage PV generators. A
horizontally extended version of the proposed inverter can
generate n
1
(3ni + 1) levels with ! strings and ni = 2
sources in each string. The feasibility of the proposed inverter
was validated using experimental results. A 21-level prototype
could generate output with 1. 5% THD. At last, to facilitate a
wise selection between topologies based on the available
technology and facilities, the staircase-output topologies were
briefy compared in Table 2.
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