36-1 Field Oriented Control of A Multilevel PWM Inverter Fed Induction Motor

Final Year Project Thesis
FIELD ORIENTED CONTROL OF A
MULTILEVEL PWM INVERTER FED
INDUCTION MOTOR
Student Name: Ehab Zabaneh

Student Number: 09713828
Supervisor: Dr. W. W. L Keerthipala
Co-Supervisor: Ass. Prof. W. Lawrence
8 Bennett Drive
CanningVale
Perth WA 6155
27th October 2000
Prof. J Hullett
Head of School
School of Electrical and Computer Engineering
Curtin University of Technology
Kent Street
Bentley
Perth WA 6102
Dear Sir,
I have the honour of submitting this project thesis to fulfil the requirements of the
Bachelor of Electrical Engineering.
Yours faithfully,
Ehab Zabaneh
09713828
FIELD ORIENTED CONTROL OF A MULTILEVEL PWM INVERTER FED INDUCTION MOTOR
ABSTRACT
This report deals with the real time control of an induction motor through vector
control analysis implemented through the use of a digital signal processor TMS320.
This system provides the gate drive signals to a five level pulse width modulated
(PWM) inverter driving an induction motor. Vector control of induction motor is
based upon the field-oriented co-ordinates aligned in the direction of the rotor m.m.f.
However, there is no direct means of measuring the phase angle of the rotor
magnetising current β (i.e. the m.m.f. angle) and therefore an observer is needed to
estimate β for the implementation of vector control. Two types of observers are
used when estimating the rotor flux angle based on the linear and non-linear model
of the induction motor. The linear model of the observer is easier to implement but it
does not take into account that the induction motor can operate in the region of
saturation
Keywords:
Vector Control, PWM, Field Oriented Control, Induction Motor, Observer, TMS320.
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ACKNOWLEDGMENTS
The author would like to thank the project supervisor Dr. W. W. L Keerthipala for
his help, advice, guidance and continued support for the duration of the project.
Special thanks also to Edward Tsang, my project partner, for his tireless work and
excellent inverter design.
Thanks are also extended to the Power Laboratory staff Mark and Zibby for their
help and work throughout the duration of the project.
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NOMENCLATURE
ia, ib, ic - Stator phase currents
iα, iβ - Stator current components
id, iq - Stator current flux and torque components
id ref, iq ref - Stator current flux and torque reference vectors
β - Rotor Flux Angle
imR - Rotor Magnetizing Current
J - Moment of Inertia
K1, k2 - proportional constant and integration constant of
PI controller respectively
M - Mutual Inductance between stator and rotor
N - Speed of Induction Motor in rpm
P - Output power of induction motor
DSP - Digital Signal Processor
ωr - Rotor Angular Speed
ω - Motor Speed
LR - Rotor Inductance
LS - Stator Inductance
RR - Rotor Resistance
RS - Stator Resistance
TR - Rotor Time Constant
TS - Stator Time Constant
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TABLE OF CONTENTS
ABSTRACT .................................................................................................................I
NOMENCLATURE................................................................................................ III
TABLE OF CONTENTS.........................................................................................IV
LIST OF FIGURES ............................................................................................... VII
CHAPTER 1: INTRODUCTION............................................................................. 1
CHAPTER 2: LITERATURE REVIEW................................................................. 5
2.1 FIELD ORIENTED CONTROL .................................................................................. 5
2.2 OBSERVER MODULES........................................................................................... 9
2.3 DIGITAL SIGNAL PROCESSORS ........................................................................... 11
2.3 THREE PHASE INDUCTION MOTOR ..................................................................... 13
CHAPTER 3: THEORY REVIEW........................................................................ 19
3.1 FIVE LEVEL PULSE WIDTH MODULATED (PWM) INVERTER ............................. 20
3.1.1 Five Level Inverter Design ......................................................................... 24
3.1.2 Inverter Gate Control ................................................................................. 31
3.1.3 Verifing proposed design............................................................................ 37
3.1.4 Sine Wave Generator.................................................................................. 38
3.1.5 PWM Signal Generation............................................................................ 38
3.2 THREE PHASE INDUCTION MOTOR ..................................................................... 41
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3.2.1 No-Load Test .............................................................................................. 42
3.2.2 Blocked Rotor Test ..................................................................................... 42
3.3 MATHEMATICAL MODELS.................................................................................. 44
3.3.1 Space Vector Transformation..................................................................... 45
3.3.2 Motor Map – Reference Vector Transformation ........................................ 48
3.3.3 Inverse Space Vector Transformation ........................................................ 50
3.3.4 Rotor Flux Angle β estimation ................................................................... 50
3.4 THE TMS320C40 DIGITAL SIGNAL PROCESSOR ................................................ 52
CHAPTER 4: SIMULATION RESULTS ............................................................. 59
4.1 PWM INVERTER SIMULATION ........................................................................... 59
4.2 INDUCTION MOTOR SIMULATION ....................................................................... 60
4.3 FIELD ORIENTATED CONTROL SIMULATION ...................................................... 61
4.3.1 Induction Motor and Supply....................................................................... 61
4.3.2 3S to 2R Transformation ............................................................................ 62
4.3.3 Beta Estimation .......................................................................................... 63
CHAPTER 5: SYSTEM IMPLEMENTATION ................................................... 65
5.1 CURRENT SENSING............................................................................................. 65
5.1.1 HCPL-788J Optocoupler............................................................................ 66
5.1.2 ADS7816 A-D Converter............................................................................ 67
5.1.3 Current Sensing Board ............................................................................... 68
5.2 CODE GENERATION............................................................................................ 70
5.2.1 Clarke Transformation Code...................................................................... 73
5.2.2 Park Transformation Code......................................................................... 74
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5.2.3 PI Regulator Code...................................................................................... 75
5.3 FIVE LEVEL PWM INVERTER ............................................................................. 79
CHAPTER 6: CONCLUSIONS AND RECOMMENDATIONS ........................ 81
6.1 CONCLUSIONS .................................................................................................... 81
6.2 FUTURE RECOMMENDATIONS ............................................................................ 82
CHAPTER 7: REFERENCES ................................................................................ 84
8.0 APPENDICES .................................................................................................... 88
8.1 APPENDIX A – FIVE LEVEL PWM INVERTER CIRCUIT ....................................... 90
8.2 APPENDIX B – FIVE LEVEL PWM INVERTER OUTPUT GRAPHS .......................... 96
8.3 APPENDIX C – INDUCTION MOTOR SIMULATION CIRCUITS .............................. 100
8.4 APPENDIX D – INDUCTION MOTOR SIMULATION CIRCUITS OUTPUT GRAPHS .. 102
8.5 APPENDIX E – TEXAS INSTRUMENTS TMS320C40 DATASHEET ...................... 105
8.6 APPENDIX F – FIELD ORIENTED CONTROL SIMULATION .................................. 135
8.7 APPENDIX G – FIELD ORIENTED CONTROL SIMULATION OUTPUT GRAPHS ..... 139
8.8 APPENDIX H - HCPL 788J DATASHEET ........................................................... 144
8.9 APPENDIX I – ADS 7816 ANALOGUE TO DIGITAL CONVERTER DATASHEET ... 165
8.9 APPENDIX J – OPTOCOUPLER PCB AND CIRCUIT ............................................. 179
8.10 APPENDIX K – POWER SUPPLY BOARD AND CIRCUIT .................................... 184
9.0 LIST OF PUBLICATIONS............................................................................. 189
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LIST OF FIGURES
Figure 1.1: Complete System Diagram____________________________________ 3
Figure 2.1.1: Vector Transformation _____________________________________ 6
Figure 2.1.1: Vector Control Phasor Diagram _____________________________ 7
Figure 2.1.2: Vector Control System Implementation ________________________ 7
Figure 2.1.3: Speed Control system with constant V/f ration___________________ 8
Figure 2.1.4: Flux and Torque closed loop control __________________________ 9
Figure 2.2.1: Total System Diagram Using ANN Observers __________________ 10
Figure 2.3.1: Pole Configuration _______________________________________ 15
Figure 2.3.2: Torque V Speed Curve for an Induction Motor _________________ 17
Figure 3.1: Field Oriented Control System _______________________________ 19
Figure 3.1.1: Five Level PWM Inverter __________________________________ 23
Figure 3.1.1.1: Diode clamped 5 level inverter. ____________________________ 24
Figure 3.1.1.2: Five level voltage waveform. _____________________________ 26
Figure 1.1.1.3 Level 1 current flow _____________________________________ 27
Figure 3.1.1.4: Level 2 current flow path. ________________________________ 27
Figure 3.1.1.5: Level 3; zero level current flow. ___________________________ 28
Figure 3.1.1.6: Zero level is required to prevent crossover glitch. _____________ 29
Figure 3.1.1.7: Level 4 current flow. ____________________________________ 30
Figure 3.1.1.8: Level 5 current flow. ____________________________________ 30
Figure 3.1.1.9: Level 3; zero level current flow ___________________________ 31
Figure 3.1.2.1: Modulating signal and gate signal relation___________________ 33
Figure 3.1.2.2: Destructive gate sw state. ________________________________ 34
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Figure 3.1.2.3: PWM multiplier Circuit. _________________________________ 35
Figure 3.1.5.1: Multi-carrier PWM. _____________________________________ 39
Figure 3.1.5.2: PWM generation. _______________________________________ 40
Figure 3.2.1: Induction Motor Equivalent Circuit __________________________ 41
Figure 3.3.1: System Diagram _________________________________________ 45
Figure 3.1.1.1: Clarke Transformation Phasor Diagram ____________________ 46
Figure 3.1.1.2: Park Transformation ____________________________________ 47
Figure 3.3.4.1: Beta Estimation ________________________________________ 51
Figure 3.4.1: The TMS320C40 Pin Grid Array ____________________________ 53
Figure 3.4.2: TMS320C40 Block Diagram________________________________ 56
Figure 3.4.2 (Continued): TMS320C40 Block Diagram _____________________ 57
Figure 4.3.1.1: Induction Motor Simulation_______________________________ 62
Figure 4.3.2.1: 3S to 2R Transformation _________________________________ 63
Figure 4.3.3.1: Beta Estimation ________________________________________ 64
Figure 5.1.1.1: HCPL-788J Typical System Diagram _______________________ 67
Figure 5.1.2.1: ADS7816 Pin Configuration ______________________________ 68
Figure 5.1.3.1: Current Sensing Board Circuit ____________________________ 69
Figure 5.1.3.2: Power Supply Schematic _________________________________ 70
Figure 5.2.1: Main Program Flow Chart _________________________________ 72
Figure 5.2.3.1: Classical PI Regulator___________________________________ 75
Figure 5.2.3.2: Numerical PI Regulator with Integral Correction _____________ 76
Figure 5.3.1: Complete Inverter System Diagram __________________________ 79
Figure 5.3.2: Inverter Gate Control Signal _______________________________ 80
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CHAPTER 1
INTRODUCTION
Over the past decade thex field orientated or vector control of induction motors has
gone through rapid development due to the advancement of the microprocessor.
Vector control allows precise controllability of an induction motor, but since the
induction motor is a complex multi-variable non linear system, vector control
requires a large number of fast real time computations to be continually carried out
so that the right instantaneous voltages are applied to each stator winding. In essence
vector control enables precision control over an induction motors torque and speed as
is available from a DC motor.
In this project vector control is simulated and then implemented using a Digital
Signal Processor (DSP) the TMS320. This DSP forms the control circuit from which
a five level Pulse Width Modulated (PWM) inverter is driven. The PWM inverter
will then supply the induction motor with the correct voltage, frequency and phase.
The induction motor that is to be controlled is a squirrel cage induction motor, which
produces 2.2 kW. The induction motor is known as the “workhorse” industry due to
the extreme simplicity and ruggedness of the squirrel cage construction. The squirrel
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cage motor has a rotor with a winding consisting of conducting bars embedded in
slots in the rotor iron and short-circuited at each end by conducting end rings.
An inverter converts dc voltage from the input to ac voltage at the output. The PWM
inverter output ac voltage can be controlled in both magnitude and frequency. This
control of voltage and frequency is needed as it allows the user to vary the current,
torque and speed of the induction motor at various loads.
The complete system will consist of an ac voltage input that is put through a diode
bridge rectifier to produce a dc output which across a shunt capacitor, this will, in
turn, feed the PWM inverter. The PWM inverter is controlled to produce a desired
sinusoidal voltage at a particular frequency, which is filtered by the use of an
inductor in series and capacitor in parallel and then through to the squirrel cage
induction motor. The voltage and frequency that the inverter supplies is controlled
by the control system which takes its input from the induction motor parameters to
produce required speed. The system diagram is shown in Figure 1.1 below.
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Figure 1.1: Complete System Diagram
This project will utilise electronics to measure the line currents and motor speed then
using digital signal processing to carry out vector control analysis in order to control
the switching within the PWM inverter so that the appropriate voltage and frequency
is applied to the induction motor. In order to achieve this a good understanding of
PWM inverter characteristics and control theory along with solid understanding of
squirrel cage induction motor function and parameters must be achieved before
commencement of the design process.
In order to simulate the circuits and to validate the design process PSCAD simulation
software will be used. Power System Computer Aided Design (PSCAD) is a
graphical based design software that allows the design and simulation of power
systems and power electronics components. It allows the viewing of output graphs
of any features in the system including internal component parameters. This software
will be used to simulate the induction motor and its characteristics under different
conditions as well as simulation of the PWM circuit. An advantage of PSCAD is the
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ability to use logic gates to simulate control signals and therefore it will be used to
implement control circuits and designs.
From the above the following objectives were set for the project,
• Gain understanding of Squirrel cage Induction motor characteristics and
parameters.
• Gain Understanding of Pulse Width Modulated (PWM) Inverter.
• Understand control techniques of a PWM fed induction motor, in
particular vector control.
• Simulation of PWM inverter and induction motor using PSCAD software.
• Simulation of Various circuits and motor connections using PSCAD
simulation software.
• Implement control of induction motor through the use of Digital Signal
Processing (DSP).
• Implement control circuitry on PCB.
• Implementation of connection of control circuitry to PWM inverter and
induction motor.
• Testing of system.
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CHAPTER 2
LITERATURE REVIEW
AC motors are of great use in industry due to their low cost, robustness and precise
controllability, however only over the past few years that the full potential of the
controllability of these motors has been reached. This is due to the development of
more powerful microprocessors that can compute long algorithms much faster, which
has led to the full control of an induction motor using PWM inverters. This inturn
has led to a lot of research conducted over the past few years vector control methods
for induction motors and its implementation using digital microprocessors using
analogue to digital (A/D) converters.
2.1 Field Oriented Control
The other name for vector control is field orientated control and there has been a lot
of work done that uses this type of control to drive an induction motor that is fed by a
single level PWM inverter. Due to the complexity of the induction motor a simpler
model is needed in order to achieve control [24, 19,17, 26]. Field orientation method
gets its name from the fact that control over the motor stems from gaining control
over the two components of the stator or field current. In order to achieve this the
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stator current is analysed using a synchronously rotating frame as the reference, with
the rotor magnetising current as reference, and then splitting the stator current into
two independent components Isd and Isq which respectively control the field and
torque of the motor. A diagram of this is shown in figure 2.1.1 [25] below.
Figure 2.1.1: Vector Transformation
A phasor representation is shown below in figure 2.1.1 [26].
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Figure 2.1.1: Vector Control Phasor Diagram
A typical field oriented scheme measures the phase currents to the motors and
through vector transformations are converted to the rotor D-Q frame currents Id and
Iq. These vectors are then compared to a set of reference currents Idref and Iqref, the
output is then fed through a proportional integral (PI) controller. The outputs from
the controllers then go through reverse transformations from the rotor D-Q frame
back to the stator currents. A usual system diagram is shown below in Figure 2.1.2
[3].
Figure 2.1.2: Vector Control System Implementation
A typical speed control system is with constant volts/hertz control and slip regulation
is shown by the block diagram in figure 2.1.3 [29].
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Figure 2.1.3: Speed Control system with constant V/f ration
The slip frequency ωs1, which is proportional to torque, is regulated by the speed
loop errors. The ωs1 signal is added with speed signal ωr to generate the inverter
frequency. The voltage control signal Ve* is generated from the inverter frequency
through a function generator so as to maintain airgap flux approximated constant.
The drive system accelerates with the clamped value of slip. Instead of regulating
slip, it can be maintained constant and the speed loop error may control the dc link
voltage [24]. The variation of volts/hertz ratio causes variation of airgap flux and
correspondingly the developed torque is regulated.
A slightly modified control system incorporates close loop armature current or power
factor control instead of slip control. The flux and torque close loop control is shown
in the block diagram in figure 2.1.4 [28].
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Figure 2.1.4: Flux and Torque closed loop control
The torque loop error generates the slip command, which is added with the speed to
generate the frequency command. The airgap flux may either be maintained constant
as in a dc motor or programmed as a function of torque for steady state efficiency
improvement. A set of three phase sinusoidal reference current waves is generated
and the inverter switching devices are controlled such that the actual current profile
remains confined within a hysteresis band. The feedback airgap flux and voltage
signals can be estimated from the machine terminal voltages and currents.
2.2 Observer Modules
Field orientated control can be achieved if the angular position of the rotor m.m.f.
vector is known, but the rotor magnetising current cannot be measured directly,
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which means that when the machine is rotating the rotor m.m.f. is not known.
Therefore, this rotor m.m.f. must be estimated continuously using on-line observers.
The success of the control depends on this estimation. Until recently on-line
observers have not taken into account the non-linear parameter variation of the
magnetic circuit of the induction motor. Therefore a usual system diagram consisted
of an induction motor with a feedback loop to the control circuitry, which then
carried out a set of algorithms using DSP, and then it sent the control signals to the
PWM inverter. This process will continue on-line as different load demands are
asked of the motor in order to maintain a required speed or torque.
However recently Artificial Neural Network (ANN) observers have been
implemented in order to take into account the non-linear parameter variation. These
observers were simulated and results showed that they reduce the real-time
requirements for m.m.f. vector estimation greatly. The total system was then
implemented as shown in the Figure 2.2 [6] below.
Figure 2.2.1: Total System Diagram Using ANN Observers
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After these systems were devised the implementation of these systems using
microprocessors was then carried out. The main simulation and performance
techniques were carried out on a PC 486 with another microprocessor connected
through the serial port and various other control components such as an A/D
converter, tachometer circuitry and amplifier circuitry.
2.3 Digital Signal Processors
With the advances in microprocessor technology and DSP controllers there has been
a host of commercially available microprocessors that provide PWM module for
control of inverters. Typically the signals and algorithms associated with such a
system can be very complex and lengthy to compute, however through the use of
DSP and the digitisation of the signal, calculation of the output, and the output to the
D/A converter all must be completed within the sample clock period, the speed at
which this can be done determines the maximum bandwidth that can be achieved
with the system. Along with advancement in chips and DSP the PWM module and
A/D converters can be all incorporated to provide all the functions needed for a
single chip system. A three-phase, centre-based PWM controller provides
programmable fixed frequency, variable duty cycle, and waveform generation to
produce power inverter switching signals. System designers can configure PWM
switching dead-time, narrow pulse deletion and other waveform parameters. The
PWM controller also features an output enable block that simplifies space vector and
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sensorless control algorithms, an external hardware trip/reset pin, and a pulsed output
mode for transformer coupled gate drivers.
Different types of microprocessors have been utilised in the implementation of field
orientated control. The MC68040 has been utilised in both field orientated control
and in the implementation of ANN observer estimation of the rotor flux angle. The
system also included 4 Mbytes of RAM, two 32-pin EPROM sockets, dual port
MC68681 I.C. for serial port communication, Local Resource Controller (LRC),
VSB and VME bus interfaces. One port of the MC68681 is connected to the 486 PC.
The MC68040 operates at 27.6 MIPS with a clock frequency of 33 MHz and 32-bit
address/data bus.
The TMS320 is a DSP from Texas instruments that has been specifically designed
for field orientated control. The TMS320's high level of throughput results from the
chip's comprehensive instruction set and highly-pipelined architecture. Based on a
modified Harvard Architecture, the TMS320 allows transfer between program and
data spaces for increased device flexibility. Constants can be stored in program
memory, and program branches based on data computations can be performed. Thus,
parallel operations can execute a complex instruction in one 200-nanosecond (ns)
cycle. Competing chips typically execute instructions in 250-, 300- or 400-ns cycles.
The TMS320's speed in enhanced by the arithmetic logic unit's (ALU's) 16 x 16-bit
multiplier that uses 16-bit, signed 2's complement numbers to form a 32-bit product
in 200 ns. Although the TMS320 accepts 16-bit inputs and has a 16-bit output, it
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features a 32-bit ALU/accumulator that carries out all arithmetic operations to 32
places for greater numeric precision [23].
2.3 Three Phase Induction Motor
The AC induction motor has been called the workhorse of the industry due to its
wide application and popularity. An induction motor s an AC machine in which
alternating current is supplied to the stator armature windings directly and to the
rotor winding by induction or transformer action from the stator. The stator
windings of an induction motor are similar to the stator windings of the synchronous
machine. However, the rotor windings of the induction motor may be either of two
types:
A Wound Rotor: carries three windings similar to the stator windings. The terminals
of the rotor windings are connected to the stator windings. The terminals of the rotor
windings are connected to insulated slip rings mounted on the rotor shaft. Carbon
brushes bearing on these rings make the rotor terminals available to the user of the
machine. For the steady state operation these terminals are shorted.
A Squirrel-Cage Rotor: consists of conducting bars embedded in slots in the rotor
magnetic core, and these bars are short-circuited at each end by conducting end rings.
The rotor bars and the rings are shaped like a squirrel cage, hence the name.
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Since the squirrel cage motor is the workhorse of the industry, this paper will only
deal with this type of machine.
In an induction motor, the current flowing through windings in the stator sets up a
rotating magnetic field. This current also causes an "induced" current to flow through
the bars in the. The resultant force causes the rotor to rotate as it continually "chases"
the rotating magnetic field and, since the rotor is firmly fixed to the shaft, the shaft
also rotates. The basic constructing of an induction motor has not changed
significantly over the past few years.
The stator windings in a motor are there to provide a path for the A.C. current to flow
which in turn produces the magnetic field, which will cause the rotor to rotate.
The windings are insulated copper wire and inserted into slots in the stator
laminations. These slots have insulation between the windings and the steel
laminations. This is known as the "stator pack". The windings are designed to
provide the output and speed required. The stator pack is, in turn, inserted into the
motor casing known as the "stator frame". The ends of the winding are brought out
through the motor casing to terminals in a terminal box mounted on the frame. This
is where the mains leads are connected.
The rotor consists of laminations, shaft, bearings and a squirrel cage winding. The
bars are generally aluminium but can be copper or any such material. The squirrel
cage rotor motor is the most common type in use today as it requires simple control
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gear and, in most cases, can be used instead of a wound rotor motor. The bearings
are used to support the shaft and to enable it to rotate.
In practice it is not possible to create one magnetic pole without at the same time
creating an equal and opposite pole, so the highest achievable speed for an AC
induction motor using a 50 HZ supply is 3000 rpm. It is possible to arrange the
stator windings in such formations as to provide any number of PAIRS of poles and
therefore 2,4,6,8,10,12 pole motors are available. Motors over 12 poles are available
if required but are not in common use. The number of poles is determined by the
number of magnet poles. Figure 2.3.1, below, shows the typical configuration of the
poles of an induction motor.
Figure 2.3.1: Pole Configuration
The rated theoretical speed is called the "Synchronous" speed because it is the speed
that would be obtained if the rotor rotated in "Synchrony" with the magnetic field. In
any AC induction motor, the synchronous speed is never achievable, since friction
losses in the bearings, air resistance within the motor and additional drag imposed by
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the load combine to cause the rotor to lag slightly behind the rotational speed of the
magnetic field. This lagging effect is known as the "slip".
The "Synchronous" speed of a motor can be determined by the formulae:
Synchronous speed = ns = 120f/P
And the slip is calculated as,
ns − nr
s=
ns
Where:
s = Slip
ns = synchronous speed
nr = rotor speed
f = frequency
p = number of poles
If the frequency varies, the speed varies in a direct ratio. The percentage slip varies
from one motor to the next and for any given motor the slip will decrease as the load
decreases. At no- load the slip may be as little as 0.5%, while at full load, depending
on the size of the motor, it can be high as 5.0%. Thus typical "Full Load" speeds for
2,4,6 and 8 pole motors, on a 50 Hertz supply, could be 2950, 1470, 980 and 735 rpm
respectively, compared with the synchronous speeds of 3000; 1500; 1000 and 750
rpm. It is not surprising to find that the "slip" of a motor is closely related to the
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motor's efficiency, and in fact, the full load speed of a motor is a good guide to the
motor's efficiency.
Torque is the rotational equivalent of linear force and for any rotating machine, if the
power and speed are known then the electromagnetic torque is given by the formula:
P
T=
ω
When a motor is driving the load at full speed, the torque developed by the motor
will always equal the torque required by the load to keep it running at that speed. The
more accurate the motor selection, the closer this torque value will approach the
rated full load torque (F.L.T.) of the motor. A typical torque v speed curve for an
induction motor is shown in figure 2.3.2 below.
Figure 2.3.2: Torque V Speed Curve for an Induction Motor
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During the starting cycle (or Run Up Time), however, the torque developed by the
motor at any given instant must always exceed the torque required by the load at that
particular speed, otherwise the load will not continue to accelerate and the motor will
stall.
At any given speed during run up, the difference between the motor torque and the
load torque is known as the Accelerating Torque and, taken over the complete curve
of torque against speed from zero to 100% speed, it is this accelerating torque which
determines the run up time. The initial point is known as the Starting torque or
locked rotor torque (L.R.T.), the minium point is known as the Pull Up torque
(P.U.T.) and the maximum point known as the Pull Out Torque (P.O.T.)
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CHAPTER 3
THEORY REVIEW
In this project field orientated control is to be implemented using the Texas
Instruments TMS320C40 DSP processor. Before practical implementation the
system design is to be simulated using PSCAD/EMTDC software. The system
diagram shown below in figure 3.1 is an overview of the field oriented control
system to be implemented.
Figure 3.1: Field Oriented Control System
The above system can be split up into three major sections; firstly the five level Pulse
Width Modulated (PWM) inverter, the three phase squirrel cage induction motor and
the control circuitry. The control circuitry is implemented through the use of the
TMS320C40 microprocessor.
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3.1 Five Level Pulse Width Modulated (PWM) Inverter
There are eleven major sub-systems in the five level vector controlled inverter
induction motor drive system. It is possible to generate the appropriate gate signals
for each of the 8 gates per phase of the inverter digitally but this process is
complicated and will make real time calculations required by the vector control
algorithm run slower in the DSP. The block diagram shown in figure 3.1.1 below
shows the major blocks of the motor drive system with emphasis on the inverter sub-
systems. The relationship of the vector control unit to the inverter has been clearly
shown but the vector control algorithm will not be explained in great detail, as it is
the responsibility of the vector control project team.
The appropriate gate signal generation for the three phase five level inverter drive
will be generated by separate dedicated hardware components in this design. This
allows a modular design process. The project has been split into two parts, one part is
the inverter and the other is the vector control feedback system with the combination
of both parts and the three-phase induction motor forming a complete high
performance variable speed, vector controlled drive system.
Referring to figure 3.1.1 below starting form the left hand side, it can be seen the
vector control sub-system sends its command data via a programmable interface
controller to control the output of the sine wave generator. The sine wave generator
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takes input parameters of phase, voltage and frequency as 12 bit binary numbers and
synthesises the required sine wave with the commanded input data.
The sine wave generated is compared to four offset triangular carriers running at a
fixed frequency of 6300Hz. This is done on the PWM board. The output of the PWM
board consists of four lines with the appropriate pulse duration for each band of the
out put voltage of the inverter.
In order to control eight gates with only four PWM signals the PWM signals must be
further processed through an appropriate logic circuit, which will enable the correct
four IGBT switches to receive PWM switching pulses depending on the amplitude of
the modulating signal. This is done by the Band Detection Board. Finally the PWM
pulse data and band data are combined to produce 8 lines, which will provide the
correct logic to switch the eight IGBTs on and off to produce a PWM five level
waveform.
Typically the control circuits require isolation from the IGBT switching circuits
because of the large potential differences from each level on the power switching
devices and the low voltage logic controls. This isolation from the logic controls and
each gate level is achieved by coupling each gate drive signal through an appropriate
optically isolated IGBT driver. The driver also features de-saturation detection to
sense when the IGBT is being short-circuited and the voltage drop across the device
is not as low as when it is fully switched on therefore producing excessive device
heating and possible device damage. The IGBT driver modules have the facility to
- 21 -
produce a shut down signal, which will alert protection systems to shut the inverter
down safely.
The next block contains the five level inverter. It consists of 8 IGBTs with voltage
level clamping diodes to isolate the voltages of each level. There are 4 PWM voltage
levels and a zero voltage level to make a total of fiver levels. Four IGBTs are
required to switch four series connected voltage sources to produce the five level
PWM output waveform. Another four switches are also required with some blocking
diodes to provide the bi-directional current switching capability of the inverter to
conduct inductive flyback currents.
Finally the inverter power stage with its appropriate four series connected voltage
sources is connected to the induction motor in either star or delta connection. The
phase currents and voltages will then be measured, put through linear optical
isolation, scaled and fed to the ADC of the TMS320 DSP. The DSP will perform the
required vector control algorithms to calculate the required phase, voltage and
frequency the inverter must produce in order to keep the induction motor speed
running close to the desired value.
- 22 -
Figure 3.1.1: Five Level PWM Inverter
- 23 -
3.1.1 Five Level Inverter Design
To support inductive loads the five level inverter must be constructed in a way in
which bidirectional current flow for all levels is supported otherwise problems
explained in the previous section will occur. Figure 3.1.1.1 shows the basic single
phase switching circuit for the five level inverter which supports inductive loads.
Figure 3.1.1.1: Diode clamped 5 level inverter.
A minimum of 8 switches are required to generate the five level waveform. The
capital letters in figure 3.1.1.1 denote the complement of the signal present on the
gates of the lower case gates. This implies that at any instant in time there must at
lest be 4 switches which must be active. The diodes labelled DP1 to DP3 and DN! To
DN3 are voltage level blocking diodes. Their job is to prevent a short circuit of the
- 24 -
series connected voltage sources during switching of the IGBTs and to provide
inductive return paths to support bidirectional current flow involved with all
inductive loads. Detailed diagrams will we presented to describe the current flows in
the converter topology presented above. The advantage of this design is the
switching elements are only exposed to the voltage of one voltage level therefore
reducing the stress on the switch during hard switching (switching when the voltage
and currents are not zero). The disadvantage is multiple switches are required ie 2(N-
1) switches and [2(N-1)]-2 voltage level clamping diodes are required, where N
denotes the number of levels. So in this case N=5 which means the number of IGBTs
required to build a five level inverter is 2(5-1) = 8 and the number of clamping
diodes is 2 less than the number of switches therefore requiring 6 blocking diodes.
The blocking diodes must be rated to withstand the load current.
Inverter current flow
The current flows for the five level power processing circuit shown in figure 3.1.1.1
is best described by the following diagrams. The output voltage waveform of the
inverter is displayed in figure 3.1.1.2. The top of level 1 is the first band the top level
2 the second band and so on. The zero (level 3) level does not contain a band because
there is no PWM switching taking place at this level but the modulation signal does
however have a band in which it classified to belong to the third level.
- 25 -
Levels
V
1
1pu
0 3
-1pu 5
Figure 3.1.1.2: Five level voltage waveform.
The current flow through the five level inverter in figure 3.1.1.1 to produce the top
level is depicted in figure 3.1.1.3 below. The lower case labels on the IGBTs are
switched by a complementary gating signal to the gates labelled with upper case
letters. The current flows through q1, q2, q3, and q4 to produce the top voltage level
(level 1 of figure 3.1.1.2).
The top voltage level is pulse width modulated this means q1 switches on and off at
the carrier frequency of 6300Hz as shown in figure 3.1.1.3.
- 26 -
Figure 1.1.1.3 Level 1 current flow
Voltage level 2 in figure 3.1.1.3 is generated by turning q1 off and Q1 on. It should
be noted that Q1 actually does not conduct any current yet as it is not forward biased
due to the present current flow path. Current now flows from a single capacitor
voltage source V1+ and clamping diode DP1 to deliver half the previous bus voltage
to one phase of the motor load. This is shown in figure 3.1.1.4 below.
Figure 3.1.1.4: Level 2 current flow path.
- 27 -
The next voltage level in figure 3.1.1.2 is the zero voltage level. This level is created
by connection of the load to no voltage sources ( short circuit ) . This allows the
lagging inductive current to pass through the inverter when the leading voltage is 0V.
This is depicted in figure 3.1.1.5 below.
Figure 3.1.1.5: Level 3; zero level current flow.
The next diagram graphically shows the importance of the zero level. Figure 3.1.1.6
is a plot of current and voltage through one phase of the inductive load. It can bee
seen the current is lagging the voltage.
- 28 -
Figure 3.1.1.6: Zero level is required to prevent crossover glitch.
If q3 and q4 are not conducting during the change over from positive to negative
polarity the voltage waveform will contain a glitch at the zero crossing point in the
voltage waveform. The first glitch in figure 3.1.1.6 results from open circuiting a
negative current which is lagging the voltage which has already reached the zero
point. The voltage across the inductive load will thus be Vl= -Ldi/dt which results in
a positive voltage spike. The opposite happens for the negative cycle of the
waveform. Appendix A1 is the simulated verification of this glitch problem if the
zero level gates are not properly turned on at the required instance. The negative
voltage cycle is generated in a similar way to the positive half cycle .
The current now must flow in the opposite direction to the positive half cycle. The
current in the negative direction flows from the bottom to the top on the load as
compared to the top to the bottom for figure 3.1.1.3 to 3.1.1.5 demonstrating the
- 29 -
positive direction current flow. So continuing on from the zero voltage level, the next
level is 1V- level which is level 4 . The current flow for level 4 is displayed in figure
3.1.1.7 below.
Figure 3.1.1.7: Level 4 current flow.
The final level is created by forcing 2 voltage sources connected in series in the
negative direction through the inverter as shown in figure 3.1.1.8.
Figure 2.1.1.8: Level 5 current flow.
The only current flow pattern which is left to discuss is the negative transition to zero
level. This is the opposite to figure 3.1.1.5 which is level 3 and is shown in figure
3.1.1.9.
- 30 -
Figure 3.1.1.9: Level 3; zero level current flow
3.1.2 Inverter Gate Control
After studying the different possible current paths it is possible to form a table of
gate control logic to control the inverter. This is done by simply tracing the current
flow through the switches of the diagrams in chapter 5 and forming a table for all the
possible different combinations of switch operation to generate a sine AC waveform
depending on the band the modulating signal is in. It is clear that the modulating sine
wave will have the same phase relationship with the final output wave form therefore
if sensors are used to detect which band the modulating signal is in then the correct
IGBT group can be activated in the inverter to switch the current. The initial table
formed is shown below in table 3.1.2.1.
Combination Gate Band
states
mod>0 mod> (mod> (mod>- (mod> q q q q Q Q Q Q
0.1 1) 0.1) -1) 1 2 3 4 1 2 3 4
1 1 1 0 0 1 1 1 1 0 0 0 0 1
1 1 0 0 0 0 1 1 1 1 0 0 0 2
0 0 0 0 0 0 0 1 1 1 1 0 0 3
1 0 0 0 0 0 0 1 1 1 1 0 0 3
0 0 0 1 0 0 0 0 1 1 1 1 0 4
0 0 0 1 1 0 0 0 0 1 1 1 1 5
Table 3.1.2.1: Gate combinations and output relation.
- 31 -
The zero level is different to level 1, 2, 4, 5 in the way that it does not occupy a band
of significant thickness. This will cause serious problems if the control device which
is responsible for detecting the band the modulating signal. The reason is the zero
voltage level is extremely noisy with up to 30mV of switching noise from other
control processes sharing the same regulated DC power supply. So if we wanted to
know if the modulating signal has crossed the zero point, by using a comparator the
noise would cause the output to go high permanently thus giving useless results to
down stream control processes.
The band detection and IGBT gate selection problem with results which are
tabulated in table 3.2.1.2 is described graphically in figure 3.1.2.1 below. This figure
is important due to the fact that it makes it easier to grasp the problem and devise a
simple solution.
2
1 PWM LEVEL 2+
1
2 PWM LEVEL 1+
0.1
3 0
-0.1
(per unit) BAND DETECTION
PWM LEVEL 1- 4 -1
PWM LEVEL2- 5 -2
Q1
Q2
Q3
Q4
PRIMARY GATE SIGNA

Q5
Q6
Q7
Q8
- 32 -
Figure 3.1.2.1: Modulating signal and gate signal relation
From this graphical representation the reasons for the limits set on detecting the
band the modulating signal is in can easily be seen. The other important point to be
made is that the solid fill on the rows , represent the time in which particular sets of 4
gates should be active according to the band the modulating signal is in.
Now it seems it is a simple matter of creating a look-up table in an embedded
microcontroller to implement table 3.1.2.1 and control the 8 IGBTs in each phase of
the inverter. This is not possible if the inverter is to be pulse width modulated at a
high frequency (5000Hz). The reason is the inverter gates q1, q2, Q3,Q4 are
switched at the carrier frequency ( 5000Hz) This means in order to obey the general
rule that at any time only 4 gates are to be active , the microcontroller cannot respond
fast enough to be able to detect band combinations and also “multiply: the correct
pulse data into the output gate signals which control the IGBTs. This will result in
more than 4 gates being on at any one time. The consequences of disobeying the “4
gates on” rule will result in a short circuit of the DC bus through the IGBTs. For
example take the case if q1 is switching rapidly on and off , this means Q1 which is
its complement must also do the same but be 180º out of phase.
- 33 -
Lets assume for some reason there was an error in the drive logic and both q1 and
Q1 were on at the same instant then the following current path will flow through the
inverter as depicted in figure 3.1.2.2.
Figure 3.1.2.2: Destructive gate sw state.
- 34 -
The top DC voltage source will short circuit through the 5 switches which are active
thus destroying them. The solution to this problem is to feed the complementary gate
signal from an inverter gate which derives its signal from the appropriate PWM
level. This is shown in figure 3.1.2.3 below.
Figure 3.1.2.3: PWM multiplier Circuit.
To understand how the above circuit operates the following basic facts should be
noted:
There are eight active IGBT switches that must me controlled ie switch s1 to s8
The capital letters denote the complementary signal of the lower case signal
- 35 -
Only q1,q2,Q3,Q4 require the PWM signal to be combined with the gate signals
generated by a microcontroller look-up table with the data coming out port RB7,
RB6, RB1, RB0.
Table 3.1.2.1 which displays the required gate control logic can now be simplified to
that shown in table 3.1.2.2. The shaded region represents timing data which is now
redundant as it has been implemented by dedicated hardware inverter gates which
feed the complementary switching signals to the required gates q3,q4,Q1,Q2 to avoid
the short circuiting problem previously mentioned.
Combination Gate Band
states
mod>0 mod> (mod> (mod>- (mod> q q q q Q Q Q Q
0.1 1) 0.1) -1) 1 2 3 4 1 2 3 4
1 1 1 0 0 1 1 1 1 0 0 0 0 1
1 1 0 0 0 0 1 1 1 1 0 0 0 2
0 0 0 0 0 0 0 1 1 1 1 0 0 3
1 0 0 0 0 0 0 1 1 1 1 0 0 3
0 0 0 1 0 0 0 0 1 1 1 1 0 4
0 0 0 1 1 0 0 0 0 1 1 1 1 5
Table 3.1.2.2: Shaded regions logic is implemented by inverter gates
- 36 -
As a result of the simplification of the control table , four output lines are not
required to be connected from the microcontroller. Refering to figure 41 the inputs to
the AND gates are from port B of the microcontroller the details of the hardware
connections are summarised in table 4 below.
port No connected to gate via IGBT No

AND gate
RB0 q1
RB1 q2
RB2 nc
RB3 nc
RB4 nc
RB5 nc
RB6 Q3
RB7 Q4
Table 3.1.2.3: Connection relationship between look up table outputs and gates
3.1.3 Verifing proposed design
The logic design outlined in section 6.1 first must be verified by simulation for its
logical accuracy. Basically at this stage of simulations details such as the output
voltage and THD are not of major concern but the main aim is to try to obtain the
correct output waveform. This sounds easy but there are some critical timing issues
involved at this point in the simulation.
Firstly the software package used for the simulation of the control system was
Power Systems Computer Aided Design. The reason why this package was chosen
was its wide choice of standardised control components such as op amp integrators
and power electronic devices from the flexible AC transmission library. Also the
- 37 -
THD for the three phase output voltage and current can also be easily simulated in
PSCAD. The major advantage of PSCAD over a package such as MATLAB is the
mathematical models of the power switches is already written. The other software
which is also suitable for this work is PSPICE. The reason why this package was not
used was mainly due to the fact that a full version of the software was not available
to simulate complex control circuits.
3.1.4 Sine Wave Generator.
The main part of the control block consists of 4 major blocks. The first block is the
modulation signal generator which produces sine waves from three input parameters.
These are the peak to peak amplitude, phase displacement and frequency. The sine
signal is responsible for modulating the output pulse widths of the final synthesised
sine wave. It therefore can be identified as a major subsystem in the control scheme
of the inverter. The sine signal generator can easily be translated into hardware by
using a digital signal processing device. A commonly available device to perform
this function is called a numerically controlled oscillator. It accepts three input of
phase, frequency and amplitude and produces an analogue sine wave in 6 clock
cycles using the specified inputs.
3.1.5 PWM Signal Generation.
The next block is the pulse width modulation signal generator. For multilevel
inverters namely a five level inverter (n=5) we require n-1 carrier signals to generate
the pulse width signals to control the output. Basically the generated sine signal is
- 38 -
fed into four comparators which compare the modulating sine wave to four triangular
carrier signal. This comparison is shown in figure 3.1.5.1 below.
Figure 3.1.5.1: Multi-carrier PWM.
From the above figure it can be seen that the carrier signals are of a higher frequency
than the modulating signal and also displaced into four bands. The phase
displacement of the carriers are in phase and the amplitude is such that the carrier
signals do not overlap into the adjacent bands for the modulation scheme chosen for
this project. If we assume that the hight of each carrier signal is 1 pu, then the
modulating signal must be at lest 4 pu in amplitude
Attention must be paid to the way the comparator is connected. The function of a
simple comparator is to decide if the input value to the comparator is greater than the
reference value. If so the output of the comparator will be high otherwise the output
is low. This is shown in figure 3.1.5.2 below. This process occurs for each of the four
carriers. The negative polarity of the sine wave requires the inputs to the comparator
to be reversed so that when the sine-modulating signal is smaller than the carrier the
output is 1.
- 39 -
Figure 3.1.5.2: PWM generation.
Typically the comparator function is implemented using an operational amplifier
without feedback so when the input value exceeds the reference input value the
output voltage “swings” polarity and saturates quickly in the new direction thus
producing pulse level waveforms.
- 40 -
3.2 Three Phase Induction Motor
The induction motor used for this project is a three phase 2.2kW, 1420rpm, 2.6A
440V motor. In order to carry out the field oriented control implementation the
parameters of the induction machine must be known. In order to achieve this the
induction motor must be simplified into its equivalent two-axis model. This model is
shown in figure 3.2.1 below [19].
Figure 3.2.1: Induction Motor Equivalent Circuit
In order to get the induction motor parameters two tests are carried out. Firstly the
No-load test is performed to obtain the shunt parameters of the motor, which
represent the magnitude current and its core loss. The test is performed at rated
frequency, and the voltage applied to the motor is rated voltage. Secondly the
Blocked-Rotor test is carried out. In this test, as its name suggests, the rotor of the
induction motor is blocked so that it cannot move. The blocked rotor test is
performed at 25% of the rated frequency. From these tests the induction motor stator
and rotor inductances and resistance were determined.
- 41 -
3.2.1 No-Load Test
The no-load test was performed to obtain the shunt parameters of the motor
and the following was measured,
R1 = R2 = R3 = 11.3 Ω
Vnl = 407 V kVAr = 1.69
Inl = 2.41 A kVA = 1.69
Pnl = 152 W f = 50 Hz
pf = 0.09
Therefore the following can be calculated,
Vnph = Vn = 407V
In 2.41
Inph = = = 1.39 A
3 3
Pn 152
Pnph = = == 50.67W
3 3
Pnph − I 2 nph x r1 50.67 − 1.39 2 x113
Pcph = = = 14.29W
2 2
V 2 nph 407 2
rc = = = 11.503kΩ
Pcph 14.39
Pnph 50.67
cosθm = = = 0.089
Vnph I nph 407 x1.39
θn = 84.867 o Lagging
3.2.2 Blocked Rotor Test
The blocked-rotor test was performed and the following parameters were
measured,
Vsc = 97.2V VAr = 659
- 42 -
Isc = 4.63A VA = 777
Psc = 413 f = 50Hz
pf = 0.53
Therefore the following can be calculated,
Vscph = Vsc = 97.2V

I sc 4.63
I sph = =
= 2.67
3 3
P 413
Pscph = sc = = 137.67W
3 3
Pscph
cosθ sc = = 0.5304
Vscph I scph
θ sc = 57.96 o Lagging
Vscph 97.2
Ze = ∠θ sc = ∠ − 57.96 o = 36.362∠ − 57.96 o
I scph 2.67
Z e = 19.29 − j 30.82
Z e = Re − jX e
Therefore,
r2 = 19.29 − 11.3 = 7.99Ω
The rotor resistance per phase is then 7.99 ohm per phase, also
- 43 -
X L = jωL
j 30.82 = jx 2πx50 xL
Therefore,
L = 98.10mH
L
LR = = 49.05mH
2
Using the above the rotor time constant can also be calculated,
LR 49.05mH
TR = = = 6.14m sec
RR 7.99
The values calculated above can now be used in all of the vector calculations and the
transformations.
3.3 Mathematical Models
The TMS320C40 digital signal processor will perform many mathematical
derivations and these can be broken up into sections as in the system diagram shown
below in figure 3.3.1.
- 44 -
Figure 3.3.1: System Diagram
The areas circled red in the above diagram represent a certain part of the vector
transformation. These are,
1. 3S to 2R Space Vector Transformation
2. Motor Map – Reference Vector Transformation
3. 2R to 3S Space Vector Transformation
The above transformations involve heavy mathematics and as such are computed
using the TMS320C40 microprocessor. The above vectorial transformations are
explained fully in the following sections.
3.3.1 Space Vector Transformation
The control system will continually measure the stator voltages applied to the
induction motor. These measurements will then go through a set of vector
transformations or projection in order to transform them into the rotor D-Q frame.
- 45 -
The stator currents are measured using Current Transformers (CT) and the analogue
input is fed through to the processor. These signals will then go through two sets of
transformations so that they are in rotor co-ordinates. The first is the Clarke
transformation, which converts the stator currents into another reference frame with
only two orthogonal axis called (α,β. Assuming that the stator axis a and the axis α
are in the same direction then the following can be performed,
⎡ 1 1 ⎤ ⎡I ⎤
1 − −
⎡ Iα ⎤ ⎢ 2 ⎥⎢I ⎥
a
2
⎢ Iβ ⎥ = ⎢ ⎥
3 ⎥⎢ b ⎥
⎣ ⎦ ⎢ 0 3
− ⎢I ⎥
⎣⎢ 2 2 ⎦⎥ ⎣ c ⎦
Using the above the phasor diagram shown in figure 3.3.1.1 [23] below can be
drawn.
Figure 3.1.1.1: Clarke Transformation Phasor Diagram
- 46 -
The Park transformation can now be carried out. This is the most important
transformation in field orientated control. This projection modifies a two phase
orthogonal system (α,β into the D-Q rotating frame. This transformation relies on
the assumption that the d axis is aligned with the rotor flux and this is shown in
figure 3.1.1.2 [23].
Figure 3.1.1.2: Park Transformation
The angle θ shown in the above diagram is the rotor flux angle. As previously
discussed this cannot be measured directly but is estimated, an analysis of the
estimation method is discussed further in this chapter. The flux and torque
components of the current vector are determined by the following set of equations:
⎡ Id ⎤ ⎡ cosθ sin θ ⎤ ⎡ Iα ⎤
⎢ Iq ⎥ = ⎢− sin θ cosθ ⎥⎦ ⎢⎣ Iβ ⎥⎦
⎣ ⎦ ⎣
Using the above transformations the stator currents are now in the reference D-Q
frame. These currents will now need to be compared to a set of reference D-Q
parameters. These reference values are determined by the required values of speed
- 47 -
and torque. As shown in the previous system diagram these required values of speed
and torque are put through a motor map that produces the reference parameters of the
D-Q frame.
3.3.2 Motor Map – Reference Vector Transformation
The induction motor can be represented by a simplified model. This simplified
model is shown in the following matrix.
⎡ M M ⎤
⎢ R1 + Lo P − Loω o L2
P −
L2
ωo ⎥
⎡ e1α ⎤ ⎢ M M
⎥⎡i ⎤
⎢ e ⎥ ⎢ Loω o R1 + Lo P ωo P ⎥ ⎢ 1α ⎥
⎢ 1β ⎥ = ⎢ L2 L2 ⎥ ⎢ i1β ⎥
⎢ e2α ⎥ ⎢ M R2 ⎥ ⎢i ⎥
⎢ ⎥ ⎢ − L R2 0 +P − (ω o − ω r )⎥ ⎢ 2α ⎥
⎣⎢ 2 β ⎦⎥
e ⎢ 2 L 2 ⎥ ⎣⎢i2 β ⎦⎥
⎢ M R2 ⎥
⎢ 0 − R2 ω o − ω r +P ⎥
⎣ L2 L2 ⎦
From the above the torque equation of the induction machine can be computed.
Power input to the induction motor can be divided into three components, the
winding resistance loss, magnetic energy stored in the machine and power output.
Therefore,
[ ]
Pin = i T v = [i ] [ R + L p + Gω ][i ]
T
Where,
⎡ Rs 0 0 0 ⎤
⎢ 0 Rs 0 0 ⎥
R=⎢ ⎥
⎢ 0 0 Rs 0 ⎥
⎢ ⎥
⎣ 0 0 0 - 48Rs- ⎦
⎡ Ls 0 M 0⎤
⎢ ⎥
L=⎢
0 Ls 0 M⎥
⎢M 0 LR 0⎥
⎢ ⎥
⎢⎣ 0 M 0 LR ⎥⎦
⎡ 0 0 0 0⎤
⎢ 0 0 0 0 ⎥⎥
G=⎢
⎢ 0 M 0 LR ⎥
⎢ ⎥
⎣− M 0 − LR 0⎦
⎡i sa ⎤ ⎡ v sa ⎤
⎢i ⎥ ⎢v ⎥
d
p= , i = ⎢ sb ⎥ and v = ⎢ sb ⎥
dt ⎢i xa ⎥ ⎢v xa ⎥
⎢ ⎥ ⎢ ⎥
⎣i xb ⎦ ⎣v xb ⎦
Therefore the mechanical power output is,
Pout = i T Gωi
And therefore the torque equation can be written as,
Pout
τe =
ω
- 49 -
3.3.3 Inverse Space Vector Transformation
Once the actual values from the Park transformation are compared to the reference
values from the motor map the output will need to go through the inverse Park
transformation in order to give the required current in the stator frame.
−1
⎡ Iα ⎤ ⎡ cosθ sin θ ⎤ ⎡ I dnew ⎤
⎢ Iβ ⎥ = ⎢− sin θ ⎢ ⎥
cosθ ⎥⎦ ⎣ I qnew ⎦
⎣ ⎦ ⎣
The above equations are then used to transform into equivalent stator currents. The
TMS320C40 Microprocessor will then send the five level inverter three digital
outputs namely, the required voltage, frequency and phase. From there the inverter
will produce its own switching logic.
3.3.4 Rotor Flux Angle β estimation
The transformations shown above depend on the rotor flux angle β for their
calculations. However, as there are no means of measuring this angle online it has to
be estimated. There are two general classes of estimations, linear and non-linear.
The ANN Observer model discussed previously is an example of the non-linear
model and is a more accurate approximation, however, due to simplicity of design
the linear model was chosen as the method of the estimation.
- 50 -
This linear model requires three inputs Ia, Ib, ω and also the rotor time constant. The
three inputs will be measured directly and the rotor time constant was derived from
the parameter tests performed on the induction motor as is shown below,
LR
TR =
RR
The complete estimation diagram is shown below in figure 3.3.4.1.
Figure 3.3.4.1: Beta Estimation
The above system shows that the stator currents are multiplied by the inverse of the
rotor time constant and are then added to the negative sum of the integral divided by
the rotor time constant plus the multiple of the rotor angular speed and the integral of
the other stator current.
- 51 -
3.4 The TMS320C40 Digital Signal Processor
Carrying out all of the mathematics above will be the TMS320C40 digital signal
processor. The particular model of the DSP that was acquired is the
TMS320C40GFL50, which is a high performance floating point digital signal
processor. It is a fast microprocessor with a 50MHz clock cycle. The '320C40 digital
signal processors (DSPs) are 32-bit, floating-point processors manufactured in 0.72-
um, double-level metal CMOS technology [23]. The '320C40 is a part of the fourth
generation of DSPs from Texas Instruments and is designed primarily for parallel
processing.
The processor is delivered as a 325 pin grid array package as shown in figure 3.4.1
[23] below.
- 52 -
Figure 3.4.1: The TMS320C40 Pin Grid Array
The processor has the following features [23],
• 33-ns Instruction Cycle Time,
330 MOPS, 60 MFLOPS,
30 MIPS, 384M Bytes/s
• '320C40-50:
40-ns Instruction Cycle Time
- 53 -
• '320C40-40:
50-ns Instruction Cycle Time
• Six Communications Ports
• Six-Channel Direct Memory Access (DMA) Coprocessor
• Single-Cycle Conversion to and From IEEE-754 Floating-Point Format
• Single Cycle, 1/x<>
• Source-Code Compatible With TMS320C3x
• Single-Cycle 40-Bit Floating-Point,
32-Bit Integer Multipliers
• Twelve 40-Bit Registers, Eight Auxiliary Registers, 14 Control Registers, and
Two Timers
• IEEE 1149.1 (JTAG) Boundary Scan Compatible
• Two Identical External Data and Address Buses Supporting Shared Memory
Systems and High Data-Rate, Single-Cycle Transfers:
• High Port-Data Rate of 120M Bytes/s ('C40-60) (Each Bus)
• 16G-Byte Continuous Program/Data/Peripheral Address Space
• Memory-Access Request for Fast, Intelligent Bus Arbitration
• Separate Address-Bus, Data-Bus, and Control-Enable Pins
• Four Sets of Memory-Control Signals Support Different Speed
Memories in Hardware
• 325-Pin Ceramic Grid Array (GF Suffix)
• Fabricated Using 0.72-um Enhanced Performance Implanted CMOS
(EPICTM) Technology by Texas Instruments (TITM)
- 54 -
• Software-Communication-Port Reset
• NMI\ With Bus-Grant Feature
• Separate Internal Program, Data, and DMA Coprocessor Buses for Support of
Massive Concurrent Input/Output (I/O) of Program and Data Throughput,
Maximising Sustained Central Processing Unit (CPU) Performance
• On-Chip Program Cache and Dual-Access/Single-Cycle RAM for Increased
Memory-Access Performance
• 512-Byte Instruction Cache
• 8K Bytes of Single-Cycle Dual-Access Program or Data RAM
• ROM-Based Boot Loader Supports Program Bootup Using 8-, 16-, or
32-Bit Memories or One of the Communication Ports
• IDLE2 Clock-Stop Power-Down Mode
• 5-V Operation
A block diagram of the processor is shown in figure 3.4.2 [23] below.
- 55 -
Figure 3.4.2: TMS320C40 Block Diagram
- 56 -
Figure 3.4.2 (Continued): TMS320C40 Block Diagram
- 57 -
The TMS320C40 has six on-chip communication ports for processor to processor
communications with no external hardware and simple communication software.
These communication ports remove input/output bottlenecks, and the independent
smart DMA co-processor is able to handle the CPU input/output burden.
The TMS320C40 is supported by a host of parallel processing development tools for
developing and simulating code easily and for debugging parallel processing
systems. Its code generation tools include and ANSI C complier, operating system
support for parallel processing as well as DMA and communication port drivers, and
an assembler linker with support for mapping program and data to parallel
processors. Its simulation tools include parallel DSP system-level simulation and
TI’s software simulator with high language debugger.
The complete TMS320C40 datasheets are included in Appendix E.
- 58 -
CHAPTER 4
SIMULATION RESULTS
In order to verify the design principles simulations were carried out. Power Systems
Computer Aided Design (PSCAD) is a software tool that allows the simulation of
complex systems with relative ease. One of the biggest advantages of PSCAD is its
ability to also process logic circuits, which is of vital importance when modelling
vector control systems.
4.1 PWM Inverter Simulation
A five level PWM inverter was designed and tested by Edward Tsang as part of his
final year project. The simulation verified the PWM inverter design and the practical
implementation is in progress. The PWM inverter simulation results are included in
appendix A and B.
- 59 -
4.2 Induction Motor Simulation
The squirrel cage induction motor can be simulated using PSCAD due to the existing
motor model that can be edited to suite the requirements at hand. The particular
model used had the following parameters,
• 2.5kW or 3.34 Hp
• 240 V at 50Hz
Using the above parameters the simulation of the induction motor was carried. In
order to demonstrate the effect of changing the parameters of the induction motor,
the torque, speed and slip variables were varied and the results were observed using
the output graphs. The circuit diagram used consisted of a 3-phase 240V 50Hz
supply connected through a transmission line to the induction motor. The Schematic
diagram drawn is shown in appendix C.
The simulation results further proved the induction motor theory; as such it was
shown as the slip increases the torque increases until it reaches a particular point and
then decreases until the rotational speed is equal to the synchronous speed or when
the slip is equal to zero. The output graphs shown in Appendix D demonstrate the
results observed.
- 60 -
It is also important to note that the induction motor simulation assumed ideal
conditions and parameters. Therefore, after laboratory tests are performed on the
induction motor “real” parameters can be incorporated into the induction motor
model to provide a more realistic output during simulation.
4.3 Field Orientated Control Simulation
For ease of simulation the field oriented control was split into 4 separate systems for
simulation. These were,
1. Induction Motor Supply
2. 3S to 2R Transformation – Transformation of the stator currents into rotor
d-q frame.
3. Beta Estimation – Estimation of the rotor flux angle.
4. Motor Map – Calculation of Reference Id and Iq.
4.3.1 Induction Motor and Supply
As the five level inverter was not yet ready an approximate model of a three phase
supply was used with controlled voltage, frequency and phase. This supplied the
induction motor directly. The induction motor parameters were adjusted to match
the actual motor used. The circuit used is shown in figure 4.3.1.1 below.
- 61 -
Figure 4.3.1.1: Induction Motor Simulation
The output results and full system diagram are shown in appendix F.
4.3.2 3S to 2R Transformation
The stator currents to rotor frame transformation involved a number of different
calculations. The inputs to the system are the three line currents and the rotor flux
angle. The rotor flux angle is an output of another sub-system. The system diagram
is shown below in figure 4.3.2.1.
- 62 -
Figure 4.3.2.1: 3S to 2R Transformation
The full system diagram is shown in appendix F.
4.3.3 Beta Estimation
In accordance with the theory discussed in the previous section the beta estimation
was carried out. The three inputs Ia, Ib and ω are put through computations and the
beta angle output is used by other parts of the system. The estimation diagram in
PSCAD is shown below in figure 4.3.3.1.
- 63 -
Figure 4.3.3.1: Beta Estimation
The full estimation diagram is shown in appendix F.
The output graphs from all of the above simulations for field orientated control are
shown in appendix G.
- 64 -
CHAPTER 5
SYSTEM IMPLEMENTATION
The system implementation was carried out using both hardware and software.
Optocoupler sensors are utilised to sample the three phase currents then the signal is
converted to digital format. The vector transformations are implemented using
machine code which is then downloaded to the TMS320C40 digital signal processor.
5.1 Current Sensing
In order to carry out the aforementioned vector transformations the values of the
stator currents must be known. Thus a current sensing board was required to give
feedback to the digital signal processor. Therefore currents sensors have been
employed to sample the stator currents whilst also isolating the system from the high
voltage side. The isolated analogue output signal from the current sensors would
then need to be converted to digital format before being sent to the digital signal
processor. The sensor that was chosen for this project is the Hewlett Packard HCPL-
788J Optocoupler. The output of the Optocoupler is fed to a Burr-Brown ADS7816
12 bit analogue-digital converter.
- 65 -
5.1.1 HCPL-788J Optocoupler
The HCPL-788J isolation amplifier is designed for current sensing in electronic
motor drives. In a typical implementation, motor currents would flow through a
shunt resistor and the resulting analogue voltage drop is sensed by the HCPL-788J.
A larger analogue output voltage is created on the other side of the HCPL-788J’s
isolation barrier. The output voltage is proportional to the motor current and can be
connected directly to a single supply analogue to digital converter. A digital over-
range output is useful for quick detection of short circuit conditions on any of the
phases. Due to the swings of the common mode voltage in nanoseconds the HCPL-
788J was designed to ignore very high common node slew rates (10kV/µs). A
typical system diagram is shown below in figure 5.1.1.1.
- 66 -
Figure 5.1.1.1: HCPL-788J Typical System Diagram
The full datasheet for the HCPL-788J is provided in Appendix H.
The analogue voltage input Vin, shown in figure 5.1.1.1, is converted to a digital
signal and is sampled 6 million times per second and then a 1-bit output representing
the input very accurately is generated. This data stream is then transmitted via a light
emitting diode (LED) over the optical barrier after encoding. The detector then
converts the optical signal back to a bit stream which is converted from digital to
analogue then put through a low pass filter and outputted through the Vout pin as
shown in figure 5.1.1.1.
5.1.2 ADS7816 A-D Converter
The ADS7816 is a 12-bit, 200kHz sampling analogue-to-digital converter. It
features low power operation with automatic power down, a synchronous serial
interface and a differential input. The reference voltage can be varied from 100mV
to 5V, with a corresponding resolution from 24µV to 1.22mV. The standard pin
configuration is shown in figure 5.1.2.1.
- 67 -
Figure 5.1.2.1: ADS7816 Pin Configuration
The analogue input is provided to two pins: +In and –In. When the conversion is
initiated, the differential input on these pins is sampled on the internal capacitor
array. While a conversion is in progress, both inputs are disconnected from any
internal function. The digital result of the conversion is clocked out by the
DCLOCK input and is provided serially, most significant bit first, on the DOUT pin.
The digital data that is provided on the DOUT pin is for the conversion currently in
progress-there is no pipeline delay. It is possible to continue to clock the ADS7816
after the conversion is complete and to obtain the serial data least significant bit first.
The full datasheet is shown in Appendix I.
5.1.3 Current Sensing Board
The integration of the current sensing HCPL-788J and the analogue to digital
converter ADS7816 will provide the input to the TMS320C40 digital signal
processor. The current sensing circuit is also implemented on a printed circuit board.
The implementation circuit diagram is shown in figure 5.1.3.1 below.
- 68 -
Figure 5.1.3.1: Current Sensing Board Circuit
The operation of the board is as follows; the input signals from the three shunt
resistor, one for each phase, are fed into the inputs of the three HCPL-788J
optocouplers where the signal is isolated and amplified. The output of the
optocouplers is fed to the inputs on the TMS320C40 digital signal processor. The
timing with the DSP is provided through the CLOCK input on the analogue to digital
converters. The full circuit diagram and the Printed Circuit Board (PCB) layout are
shown in Appendix J.
In order for the above design to be implemented an isolated and non isolated 5 volt
supplies are needed. Therefore another circuit and printed circuit board were
designed to supply the required power. This circuit required one single phase step
down transformer with two secondaries, one isolated and one not isolated, feeding
- 69 -
two full bridge rectifiers. The output voltage of the rectifiers is regulated using
LM320 transistors. Therefore two 5V outputs are fed to the optocoupler board as
required. The circuit diagram is shown in figure 5.1.3.2 below.
Figure 5.1.3.2: Power Supply Schematic
The full circuit diagram and the PCB layout diagram are shown in Appendix K.
5.2 Code Generation
The vector transformations can be carried out in the TMS320C40 digital signal
processor using machine language. Therefore all transformations have to be done in
machine language before downloading to the digital signal processor. Some of code
development has been based on the Texas Instruments recommendations for field
oriented control code development. In order to simplify the program a flow chart
- 70 -
was formed that showed the flow of signals and calculations that are required. The
flow chart of the main program is shown in figure 5.2.1 below.
- 71 -
Figure 5.2.1: Main Program Flow Chart
- 72 -
The program sections have been broken up into smaller programs and are
represented below. It is important to note that the code developed for
implementation in 4.12 format.
5.2.1 Clarke Transformation Code
The following is the code developed for the Clarke transformation.
*********************************************
* Clarke Transformation
* (a,b,c) -> (Ialpha,Ibeta)
*********************************************
lacc ia
sacl isalpha
add ib
neg
sac1 ic
lacc ib,1 ;isbeta = (2*ib + ia)/sqrt(3)

add ia
sac1 tmp
lt tmp
mpy #SSQRT3inv ;SQRT3inv=(1/sqrt(3))=093dh
pac
sach isbeta
*********************************************
* End Clarke Transformation
*********************************************
- 73 -
The Clarke transformation requires 12 words of ROM, 6 words of RAM and 0.24
MIPS.
5.2.2 Park Transformation Code
The following is the code developed for the Park transformation.
*********************************************
* Park Transformation
* (Ialpha,Ibeta) -> (Id,Iq)
* isd=isalpha*cos(beta)+isbeta*sin(beta)
* isq=-isalpha*sin(beta)+isbeta*cos(beta)
*********************************************
lt isbeta
mpy sinbeta
lta isalpha
mpy cosbeta
mpya sinbeta
sach isd,4
lacc #0
lt isbeta
mpys cosbeta
apac
sach isq,4
*********************************************
* End Park Transformation
*********************************************
The Park transformation requires 12 words of ROM, 6 words of RAM and 0.24
MIPS.
- 74 -
5.2.3 PI Regulator Code
The Proportional Integral (PI) regulators are implemented with output saturation and
with integral component correction. An electrical drive based on the Field Oriented
Control needs two constant as reference components, namely the flux and torque
components. The classic PI regulator is well suited to regulating the torque and flux
feedback to the desired values as it is able to reach constant references, by correctly
setting both the P term (Kpi) and the I term (Ki) which are respectively responsible
for error sensibility and for the steady state error. The numerical expression of the PI
regulator is as follows:
k −1
U k = K pi ek + K i ek + ∑ en
n =0
which can also be represented as a closed loop system as shown in figure5.2.3.1
below.
Figure 5.2.3.1: Classical PI Regulator
The limiting point of this regulator, however, is that during normal operation, or
testing, large reference value variations or large disturbances may occur, resulting in
saturation and overflow of the regulator variables and output. If they are not
- 75 -
controlled, this kind of non-linearity damages the dynamic performance of the
system. A solution to this problem is to add to the previous model a correction of the
integral component as depicted in figure 5.2.3.2.
Figure 5.2.3.2: Numerical PI Regulator with Integral Correction
The algorithm for this regulator can be depicted as follows:
INPUT yrefk, yfbk
ek = yrefk - yfbk
uk = xi + Kpiek
ulk = uk
IF uk>umax THEN ulk = umax
IF uk<umin THEN ulk = umin
OUTPUT ulk
Elk = uk-ulk
xi = xi+Kiek+Kcorelk
- 76 -
Therefore the implementation code developed for the speed PI regulator is shown
below. It is important to also note that the speed and torque regulators are essentially
the same and as such only the speed regulator is shown in the following.
*****************************************************
* Speed regulator with integral component correction
*****************************************************
lacc n_ref
sub n
sacl epin ;epin=n_ref-n, 4.12 format
lacc xin, 12
lt epin
mpy Kpin
apac
sach upi, 4 ;upi=xin+epin*Kpin, 4.12 format
bit upi,0
bcnd upimagzeros,NTC ;If value >0 we branch
lacc #Isqrefmin ;negative saturation
sub upi
bcnd neg_sat,GT ;if upi<ISqrefmin branch to saturate
lacc upi
b limiters
neg_sat
lacc #Isqrefmin ;set acc to -ve saturated value

b limiters
upimagzeros
- 77 -
lacc #Isqrefmax ;positive saturation
sub upi
bcnd pos_sat, LT ;if upi>ISqrefmax branch to saturate

lacc upi
b limiters
pos_sat
lacc #Isqrefmax
limiters
sac1 iSqref
sub upi
sacl elpi ;elpi=iSqref-upi
It elpi
Mpy Kcorn
pac
lt epin
mpy Kin
apac
add xin, 12
sach xin, 4 ;xin=xin+epin*Kin+elpi*Kcorn
***********************************************************
* END Speed regulator with integral component correction
***********************************************************
- 78 -
5.3 Five Level PWM Inverter
The five level inverter has been successfully implemented as per the design criteria.
One phase of the inverter was implemented and tested and produced the desired
voltage and current waveforms. Figure 5.3.1, shown below, displays the full system
with all PCB’s.
Figure 5.3.1: Complete Inverter System Diagram
The above figure clearly shows the three phases of the inverter with the IGBT’s
connected to the heat sinks. The board in the middle is the power supply board to
- 79 -
each of the phases. The other three boards are the control boards for each phase and
that is where the synthesising of each of control signals is undertaken before the final
gate control signal is sent to each of the power boards and in turn to each IGBT. The
output signals are fed to each phase of the induction motor.
Figure 5.3.2, shown below, displays the gate control signals associated with one
phase of the inverter. The gate control signal is for level 2 at the top of the sinusoidal
waveform.
Figure 5.3.2: Inverter Gate Control Signal
- 80 -
CHAPTER 6
CONCLUSIONS AND RECOMMENDATIONS
The field oriented control of induction motors is of high performance. It requires a
lot of real time calculations and power electronic devices to implement, its control is
based on the development of microprocessors and power electronic techniques.
Presently fast processors and high current power electronic devices, such as
MOSFET's and IGBT's, possess not only high power rating but also high switching
frequency. All of this makes the application of field oriented control for industry a
more viable solution when precise controllability is required.
6.1 Conclusions
In this project field oriented control was implemented using the software package
Power System Computer Aided Design (PSCAD). Software implementation of field
oriented control is under process and will be of future consideration. Code has been
generated for the majority of routines required for the implementation on the
TMS320C40 digital signal processor.
- 81 -
Estimation of the rotor flux angle has been achieved by the use of a linear model. PI
regulators were also used as the main controllers. PI regulators have been used due to
their relative simplicity and they require less time to produce the control actions.
Transient state factors of the induction motor has been ignored to simplify design,
but it may cause some data errors.
The five level inverter was designed and appropriate switching techniques were
discussed. PSCAD software was used to verify design and once that was completed
implementation was under way. The five level PWM inverter was implemented
using eight printed circuit boards (PCB). One phase of the inverter was fully
functional and tests were performed on the output voltage and current waveforms.
The other two phases will follow suit and can further be tested to ensure appropriate
voltage and current waveforms are generated.
Integration between the inverter logic and the TMS320C40 digital signal processor
field oriented control logic was not completed and that will be the subject of future
studies. However it was established that three outputs from the vector control,
namely magnitude frequency and phase, will result in the inverter adjusting its
outputs to suit these requirements.
6.2 Future Recommendations
- 82 -
Although a substantial work has been done on the project so far a lot of further
improvement and study is also required. One of the main areas of future work will be
to ensure that the remaining two phases of the inverter are operating properly.
The next step will be to connect the inverter to the induction motor at a constant
speed and frequency and ensure that it drives the induction motor.
Further development of the code for field oriented control is required so that the
implementation for use on the TMS320C40 digital signal processor. This in
particular will concentrate on developing code for the reference values of speed and
torque. Development of the current sensing board and the interface to the DSP will
be required to be at more carefully to ensure that the correct values are sensed and
sent to the DSP.
Further development can concentrate on feedback control from the load. This will in
a sense make this a stand-alone system that will be able to vary its output due to
changes in the load and load behaviour. Development of sensing mechanisms from
the load will be required along with interface to the DSP.
Development of this system so that it can be used for use in an electric car is one of
the possibilities for future work.
- 83 -
CHAPTER 7
REFERENCES
[1] Shepherd, W & Hulley, L.N. & Liang D.T.W. 1995, Power Electronics and
Motor Control, Cambridge Press, Melbourne.
[2] Nasar S.A. & Boldea I. 1992, Electric Machines Dynamics and Control, CRC
Press, USA.
[3] Mohan N., Undeland T. & Robbins W.P. 1995, Power Electronics,
Converters, Applications and Design, John Wiley & Sons, USA.
[4] Fitzgerald A., Kingsley C. Jr & Umans S.D. 1992, Electric Machinery,
McGraw-Hill, Britain.
[5] Wade S., Dunnigan M. & Williams B. 1994, 'Simulation of Induction
Machine Vector Control and Parameter Identification', Power Electronics
and Variable Speed Drives, October, no. 399, pp. 42-47.
- 84 -
[6] Keerthipala W., Chun M. & Duggal B. 1997, ‘Microprocessor
implementation of field-oriented control of induction motor using ANN
Observers’, Journal of Microprocessors and Microsystems, April 1997, no.
21, pp. 105-112.
[7] Nash J. N. 1996, ‘Direct Torque Control Induction Motor Vector Control
Without an Encoder’, IEEE Conference, May 1993, pp. 86-93.
[8] Lander C. W. 1993, Power Electronics 3rd Edition, USA.
[9] www.microchip.com
[10] www.analog.com/publications/press/products/ADMC330_100896.html
[11] www.allegromicro.com/prod/sum/2917.htm
[12] www.rowan.it/inglese/vettgb.htm
[13] www.intercast.com/design/mcs96/datashts/272543.htm
[14] www.best.com/~workline/g/23/273g.htm
[15] ece-www.colorado.edu/~ecen4517/course_material/project/induction.html
- 85 -
[16] www.iet.auc.dlk/danprot/cour_ka2.htm
[17] Hughes A. 1990, Electric Motors and Drives, Reed International Books,
Britain.
[18] Koziol R, Sawicki J & Szklarski L. 1992, Digital Control of Electric Drives,
Polish Scientific Publishers, USA.
[19] Dubey G.K. 1995, Fundamentals of Electrical Drives, Narosa Publishing
House, India.
[20] Smeaton R.W. 1987, Motor Applications & Maintenance Handbook,
McGraw-Hill Book Company, USA.
[21] Kenjo T. 1994, Power Electronics for the Microprocessor Age, Oxford
University Press, Tokyo.
[22] Yamayee Z. & Bala J. 1994, Electromechanical Energy Devices and Power
Systems, John Wiley and Sons Inc. USA.
[23] www.ti.com
[24] Bose B.K. 1986, Introduction to Microcomputer Control in Microcomputer
Control of Power Electronics and Drives, IEEE Press USA.
- 86 -
[25] Bose B.K. 1982, Adjustable Speed AC Drives – A Technology Status Review
in Microcomputer Control of Power Electronics and Drives, IEEE Press
USA.
[26] Gabriel R. & Leonard S.M. 1982, Microprocessor Control of Induction
Motor – A Technology Status Review in Microcomputer Control of Power
Electronics and Drives, IEEE Press USA.
[27] Hu J. Duggal B.R. & Vilathgamuwa, ‘Sensorless Field Oriented Control of
Induction Motor’, IEEE Conference, pp. 607-611.
[28] Benchaib A. Rachid A. & Audrezet E. 1999, ‘Sliding Mode Input-Output
Linearization and Field Orientation for Real-Time Control of Induction
Motors’. IEEE Transactions on Power Electronics, Vol.14 No.1, pp. 3-13.
[29] Hava A. Kerkman Russel & Lipo T. 1999, ‘Simple Analytical and Graphical
Methods for Carrier Based PWM-VSI Drives’. IEEE Transactions on Power
Electronics, Vol.14 No.1, pp. 49-61.
[30] Robyns B. Sente P. Buyse H. & Labrique F. 1999, ‘Influence of Digital
Current Control Strategy on the Sensitivity to Electrical Parameter
Uncertainties of Induction Motor Indirect Field Orientated Control’. IEEE
Transactions on Power Electronics, Vol.14 No.4, pp. 690-699.
- 87 -
8.0 APPENDICES
Appendix A – Five Level PWM Inverter Circuit Using PSCAD
Appendix B – Five Level PWM Inverter Output Graphs using PSCAD
Appendix C – Induction Motor Simulation Circuits using PSCAD
Appendix D – Induction Motor Simulation Output Graphs Using PSCAD
Appendix E – Texas Instruments TMS320C40 Datasheets
Appendix F – Field Oriented Control Simulation Using PSCAD
Appendix G - Field Oriented Control Simulation Output Graphs Using PSCAD.
Appendix H – HCPL-788J Optocoupler Datasheet.
Appendix I – ADS7816 Analogue to Digital Converter Datasheet.
Appendix J – Optocoupler PCB and Circuits.
Appendix K – Power Supply Board and Circuit.
- 88 -
- 89 -
8.1 Appendix A – Five Level PWM Inverter Circuit
- 90 -
- 91 -
- 92 -
- 93 -
- 94 -
- 95 -
8.2 Appendix B – Five Level PWM Inverter Output Graphs
- 96 -
- 97 -
- 98 -
- 99 -
8.3 Appendix C – Induction Motor Simulation Circuits
- 100 -
- 101 -
8.4 Appendix D – Induction Motor Simulation Circuits Output
Graphs
- 102 -
- 103 -
- 104 -
8.5 Appendix E – Texas Instruments TMS320C40 Datasheet
- 105 -
- 106 -
- 107 -
- 108 -
- 109 -
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- 125 -
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- 130 -
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- 132 -
- 133 -
- 134 -
8.6 Appendix F – Field Oriented Control Simulation
- 135 -
- 136 -
- 137 -
- 138 -
8.7 Appendix G – Field Oriented Control Simulation Output Graphs
- 139 -
- 140 -
- 141 -
- 142 -
- 143 -
8.8 Appendix H - HCPL 788J Datasheet
- 144 -
- 145 -
- 146 -
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- 148 -
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- 153 -
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- 163 -
- 164 -
8.9 Appendix I – ADS 7816 Analogue to Digital Converter Datasheet
- 165 -
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- 167 -
- 168 -
- 169 -
- 170 -
- 171 -
- 172 -
- 173 -
- 174 -
- 175 -
- 176 -
- 177 -
- 178 -
8.9 Appendix J – Optocoupler PCB and Circuit
- 179 -
- 180 -
- 181 -
- 182 -
- 183 -
8.10 Appendix K – Power Supply Board and Circuit
- 184 -
- 185 -
- 186 -
- 187 -
- 188 -
9.0 LIST OF PUBLICATIONS
“Field Oriented Control for a Multilevel PWM Inverter Fed Induction Motor”
Submitted for IEEE Student Prize, IEAust Student paper and the PowerCon 2000
conference.
- 189 -

36-1 Field Oriented Control of A Multilevel PWM Inverter Fed Induction Motor

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Final Year Project Thesis

FIELD ORIENTED CONTROL OF A

MULTILEVEL PWM INVERTER FED

Student Name: Ehab Zabaneh

27th October 2000

Bachelor of Electrical Engineering.

(PWM) inverter driving an induction motor. Vector control of induction motor is

excellent inverter design.

help and work throughout the duration of the project.

iα, iβ - Stator current components

id, iq - Stator current flux and torque components

id ref, iq ref - Stator current flux and torque reference vectors

β - Rotor Flux Angle

imR - Rotor Magnetizing Current

K1, k2 - proportional constant and integration constant of

M - Mutual Inductance between stator and rotor

N - Speed of Induction Motor in rpm

P - Output power of induction motor

DSP - Digital Signal Processor

ωr - Rotor Angular Speed

TR - Rotor Time Constant

TS - Stator Time Constant

LIST OF FIGURES ............................................................................................... VII

CHAPTER 2: LITERATURE REVIEW................................................................. 5

2.1 FIELD ORIENTED CONTROL .................................................................................. 5

2.2 OBSERVER MODULES........................................................................................... 9

2.3 DIGITAL SIGNAL PROCESSORS ........................................................................... 11

2.3 THREE PHASE INDUCTION MOTOR ..................................................................... 13

CHAPTER 3: THEORY REVIEW........................................................................ 19

3.1 FIVE LEVEL PULSE WIDTH MODULATED (PWM) INVERTER ............................. 20

3.1.1 Five Level Inverter Design ......................................................................... 24

3.1.2 Inverter Gate Control ................................................................................. 31

3.1.3 Verifing proposed design............................................................................ 37

3.1.4 Sine Wave Generator.................................................................................. 38

3.1.5 PWM Signal Generation............................................................................ 38

3.2 THREE PHASE INDUCTION MOTOR ..................................................................... 41

3.2.1 No-Load Test .............................................................................................. 42

3.2.2 Blocked Rotor Test ..................................................................................... 42

3.3 MATHEMATICAL MODELS.................................................................................. 44

3.3.1 Space Vector Transformation..................................................................... 45

3.3.2 Motor Map – Reference Vector Transformation ........................................ 48

3.3.3 Inverse Space Vector Transformation ........................................................ 50

3.3.4 Rotor Flux Angle β estimation ................................................................... 50

3.4 THE TMS320C40 DIGITAL SIGNAL PROCESSOR ................................................ 52

CHAPTER 4: SIMULATION RESULTS ............................................................. 59

4.1 PWM INVERTER SIMULATION ........................................................................... 59

4.2 INDUCTION MOTOR SIMULATION ....................................................................... 60

4.3 FIELD ORIENTATED CONTROL SIMULATION ...................................................... 61

4.3.1 Induction Motor and Supply....................................................................... 61

4.3.2 3S to 2R Transformation ............................................................................ 62

4.3.3 Beta Estimation .......................................................................................... 63

CHAPTER 5: SYSTEM IMPLEMENTATION ................................................... 65

5.1 CURRENT SENSING............................................................................................. 65

5.1.1 HCPL-788J Optocoupler............................................................................ 66

5.1.2 ADS7816 A-D Converter............................................................................ 67

5.1.3 Current Sensing Board ............................................................................... 68

5.2 CODE GENERATION............................................................................................ 70

5.2.1 Clarke Transformation Code...................................................................... 73

5.2.2 Park Transformation Code......................................................................... 74

5.2.3 PI Regulator Code...................................................................................... 75

5.3 FIVE LEVEL PWM INVERTER ............................................................................. 79

CHAPTER 6: CONCLUSIONS AND RECOMMENDATIONS ........................ 81