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I. INTRODUCTION
237
238
III.
A. Considered parameters
PROFINET IO data passes through several layers when
traveling from the process field to the controller and vice
versa. As a result, delay on inputs and refresh of outputs are
strictly related to cycle times of internal task in PROFINET
IO components, as illustrated in Fig. 2.
The key parameters that have direct influence on
performance of a PROFINET IO Class 1 system are:
the application cycle time in the IO-Controller, TIOC
the communication cycle time of PROFINET IO, TPN
elaboration/actuation/sampling cycles in the IODevice. Since a device can have many microprocessors and/or multiple tasks, several independent
cycle times are observable: TIOD, tIOD etc. It is
impossible to associate a cycle to a specific
microprocessor/task just looking to the device from
the outside (i.e. the device is a black box).
Size (in bits) of PROFINET IO packets, SPN
rising and falling time of physical output lines, Tr
and Tf
time constant of the physical input lines filters,
IO-Controller
TIOC
IO-Device
TPN
TIOD
Input
stage
Process
Phase 3
Internal Buffer
Phase 2
Simulation
of
complex
systems
IO-Device Buffer
Phase 1
Estimation of
Generation
of device
models
IO-controller Buffer
Estimation of
PLC cycle
Application
Estimation of
Bus cycle
tIOD
Output
driver
Tr , Tf
a) IO-Controller model
b) IO-Device model
Backplane layer
CPU layer
CPU layer
239
TABLE I
MODEL PARAMETER FOR SCENARIO 1
Component
model
IO-Controller
(317-2PN/DP)
IO-Device 1
(ILB-PN24)
IO-Device 2
(ET200S-PN)
Parameter
TPN
NIOD
TPN
TIOD
tIOD
TPN
TIOD
tIOD
Mean Value
(s)
16000
117
70
1
16000
177
16000
1760
200
a) IO-Controller
b) IO-Device
240
Relative
Variation
0.5%
5%
5%
0.5%
2%
0.5%
2%
2%
TABLE II
COMPARISON BETWEEN PERFORMANCE ESTIMATION OBTAINED FROM A
SIMULATED NETWORK (SIM.) AND FROM A REAL NETWORK (EXP.)
Component
TPNq,D1
IO-Device 1
TIOD1
tIOD1
TPNq,D2
IO-Device 2
TIOD2
tIOD2
Group of
samples
1
2
3
1&2
2&3
1
2
3
4
5
6
2&5
1&2
Sim.
(s)
15844
16013
16183
169
170
15597
15783
15971
17389
17590
17777
1807
186
Exp.
(s)
15997
16173
176
15554
15761
16017
17312
17522
17692
1761
207
Error
(s)
16
10
-6
43
22
-46
77
68
85
46
-21
performance indicator is
TER = TH
Moreover, the jitter JER on TER is important and it is
defined as
JER = max[TH] min [TH]
OPNET simulator records OD2 during the simulation and
extracts TH distribution. Simulation results are shown in
Fig. 8: maximum value of TER is 33636 s and its jitter JER
is 19439 s. Experimental results obtained in the same (but
real) situation are TER = 33874 s and JER = 19874 s.
It is clear, from numerical and graphical results, that JER
is roughly equal the imposed TPN (16 ms). Table III reports
simulation outcomes when different communication cycle
times are considered. Obviously JER>TPN because IOC and
IOD communication cycles are not synchronized.
TABLE III
SCENARIO 2: WORST CASE EVENT REACTION TIME TER AND JITTER JER
VARYING COMMUNICATION CYCLE TIME T PN
TPN
(ms)
4
8
16
Switches
along path
IOC - IOD2
1
2
3
1
3
Max TER
(s)
JER
(s)
9020
9039
9039
9029
9029
5647
5665
5664
5655
5662
200
40
2
2
150
1
20
Sam ples
30
Samples
JER
(s)
5647
10976
19439
Max TER
(s)
9020
17760
33636
100
50
10
1
0
15715
15822
15928
16035
16142
T H (s)
0
15367
4
16090
16814
17538
T H (s)
241
V. CONCLUSION
1200
JER
1000
Sam ples
800
600
400
200
0
14586
18474
22361
26249
30137
T H (s)
242
Max TER
(s)
8277
16293
32266
JER
(s)
4436
8428
16567
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