FUZZY LOGIC I N THE PHASE-LOCKED LOOP

DC MOTOR SPEED CONTROL SYSTEM

Mao-Fu Lai
Dept. of Electrical Engineering
Chinese Culture University
Taipei, Taiwan
Abstract - This paper presents a novel design using fuzzy logic
control and phase-locked loop to obtain a DC motor speed
control system with excellent regulation and high robustness.
The fuzzy logic controller is i ncoprated in order to achieve
quick contml of motor speed rmoothly, The fimy logic
controller enhances the robustness of the motor control system,
which can handle abrupt load variation and exhibit good
disturbance behavior. The PLL becomes effective at steady-
state conditions when the speed error is small * A control
scheme using fuzzy control of DC motor speed with extremely
accuracy provided by PLL is implemented. Simulation
demonstrates the effectiveness of the proposed scheme. Test
results show that a system which consists of both fuzzy control
and PLL can yield a high performance De motor speed
control system.
I. INTRODUCTION
Phased-locked loop (PLL) techniques have wide applications
in systems where exact frequency synchronization is
required. This technique has also been applied to the speed
control of DC motors , where motor speed can be locked to
an accurate reference frequency[lS]. The resulting motor
speed will not dri ft due to environmental changes. The speed
accuracy of 0.002% for a PLLcontrolled Dc motor system
has been achieved [ 11. However , PLLcontrolled motor
drives have the following shortcomings.
Chen Chang
Dept. of Electronic Engineering
Tung-Nan Junior College of Technology
Taipei, Taiwan
IEEE Catalog Number: 97TH8280 - 1222 -
(1) PLL-controlled motor system tend to be unstable for
low-speed operation [2].
(2) PLL-controlled motor systems have large response time.
(3) PLLcontmlled motor systems may get out of
synchronization for an abrupt load variation [4].
(4) The system may be rejected to get into PLL operation
mode, so that PLL cannot start operating smoothly.
To overcome the disadvantages of PLL motor control
system, a X-based fuzzy logc controller ( FLC ) is
incorporated for combination with phase-locked loop for
precise and robust speed control of a DC motor. Fuzzy
logic enables the useof empirical experience in a control
systemdesign. The benefits of using fuzzy logic controller in
control system have been demonstrated in a variety of
applications [6-lo]. The fuzzy logic controller is used to pull
the motor speed into the locking range of PLL . When the
speed error between the setpoint speed and the measured
motor speed is larger than a preset value , the motor is
incremented or decremented by the fuzzy logic controller
toward the PLL locking range. In order to achieve excellent
speed regulation, PLL control replaces the FLC when speed
error is within the locking range of the PLL. When the
system operates in the phase-locked loop, the speed of the
motor is locked by a reference fr-equency. Synchronization of
the motor speed to a very accurate reference frequency
warrants that the motor speed will not drift due to
temperature or component wear. Thus, a precise speed
control of DC motor operation is achieved.
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11. SYSTEM CONFIGURATION
111. FUZZY LOGIC CONTROLLER
Theblock diagram of the PLL-controlled DC motor speed
A power dnve incorporating FLC is illustrated in Fig. 1.
amplifier is used to provide a DC voltage with adequate
power to dnve the DC motor at the desired speed. An
encoder mounted on motor shaft serves as a speed feedback.
The PLL or FLC is employed to control the DC motor speed.
When speed error is larger than the preset value, the FLC is
active. Thus, motor speed is accelerated or decelerated
toward the setpoint speed through fuzzy control.
The systemflowchart is shown in Fig. 2. When motor
speed error reaches the PLL locking range, the systementers
the P U operation. Once the speed error is beyond the preset
range, the systemwill return to the fuzzy logic control mode.
The operation modeis selected by the switching logic as
illustrated in Fig. 1.
The main benefit of using fuzzy logc design in DC motor
speed control system is that the same controller can easily be
applied to various motors having Merent parameters. The
function of FLC is to achieve quick speed response without
overshoot and to provide good disturbance behavior.
The block diagram of the fuzzy logc controller isshown
in Fig. 3 ~ The knowledge base consists of input and output
membership functions. The rule ba& is made up of a set of
lingutstic rules relating the fuzzy input variables to the
desired fuzzy control actions. Fuzzification converts a crisp
input signal into fuzzifed signals that can beidentified by
their degrees of membershp functions. The inference
mechanism uses linguistic rules to convert the input
conditions into a fuzziied output. Defkmfication converts
the fuzzy output hto crisp controlling signals, which is the dc
voltage variations (A v ) that change the DC motor speed.
Wd feedback
Fi g 1 Block diagram of DC mator speed control system
... .. .. . , .. , . . . .,. f3V bloc! ................ ....... ..... :
i Knowlnlp,c Rule I
1
(hitpiit !+ding Encoder
fnclor
Fig. 3 Fuzzy logic controller m a DC motor speed cmtrol system
; ; ; p; r t q
mode
DC motor
drive
Fi g2 Flowchart
WEE Catalog Number: 97TH8280 - 1223 - ISIEW - Guimarges, Portugal
Fuzzification maps the process error, and change of error
to the fuzzy sets labels. The scaling and quantization
procedure defines the range of values that characterize
membership functions. The quantization of e and A e are
shown in Table 1.
These quantized inputs are then converted into suitable
linguistic labels. In this paper, the following linguistic labels
are employed.
1. Input variables:
P (positive), N (negative) , Z (zero).
2. Output variables:
PB (positive big), PS (positive small), ZO ( zero).
NS (negative small), NB (negative big).
The normalized membership function of input variables is
illustrated in Fig. 4.
-12
-6
0
6
12
Table 1 Quantized levels for input and outpLdvariables
-20 -2 -2
-10 - I - I
0 . - 0 , 0
10 1 I
20 2 2
-30
I -18 1-30 I -3 I -7 I
30
6 6
e
A e
t
-7 -6 -5 -4 -3 -2 - 1 0 1 2 3 4 5 6 I
Fig. 4 Membership hdi ons for mput variables.
IEEE Catalog Number: 97TH8280
The rule base defines the rules which represents desired
relationship between the input and output variables in terms
of membership functions. The control statements are
represented as a set of IF.. . THEN rules. The control rules
used in our systemare shown in Table 2. For example, a
fuzzy rule can beexpressed as follows : IF the speed error is
negative (N) and the error change is positive (P), THEN the
voltage variation driving the DC motor is positive small
e%.
The control rules are evaluated by an inference
mechanism. During the rule evaluation process , the
combination of the selected rules in the knowledge base can
be evaluated accordmg to any of the following methods, the
min-max algorithm,the correlation-product metha and the
Mamdani algorithm. An inference strategy based on the
Mamdant method is used in t hxs paper.
The membership function of the output variable (A v) are
depicted in Fig. 5 .
Table 2 control rules
A V
t
-7 -6 -5 -4 -3 -2 - I 0 I 2 3 4 5 6 I
Fig. S Membership fundims for output variables
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The defuzzification process is used to determine a crisp Routh-Hdtz criteria
value according to the fuzzy output from inference
mechanism. Several defizification techniques, such as
weighted-average criterion, mean of maximum, and center-
of-area methods are available. The centera-area method,
which computes the center of area of the inference
mechanism output possibility distribution, is used as a
defuzzification strategy in our syst em.
It can be observed from the above analysis that various
design parameters can sect PLL system stability. The
system designer may use the above model as a guideline for
the selection of suitable parameters.
Based on membership function and linguistic control rules,
a look-up table can be derived amrding to the selected
hi f kati on and dehification functions. By proper
scaling, the look-up table for FLC can beobtained as shown
in Table 3.
IV. PLL-CONTROLLED OPERATION
The block diagram of the DC motor drive system
operating in PLL modeis shown in Fig. 6(a). which
comprises a phase detector (PD), a low-pass filter (LPF), a
power amplifier, a DC motor, and an incremental encoder.
DC motor and en&r are used as a VCO block in the
phase-locked loop.
In order to analyze the stability of PLL system in Fig. 6(a),
a transfer function model is developed. The modeling of the
phase-locked loop system is shown is Fig. 6(b). The transfer
function of the ender is represented by H(s) =n/2 71 . The
continuous model for the phase detector can berepresented
km
by K /s [2], where K is the constant of PD. The transfer rtI - 4
d d Iisr,
function of low pass filter is denoted by 1/( l+s K), where Kf
8M
I I
is the RC ti me constant. The power amplifier is represented
by a constant gain Kp. The DC motor can bemodeled by
km/(l +t m), where K , is motor voltage constant and t
is motor mechanical time constant [ 5] .
(b)
The model in Fig. 6(b) can besimplified to a model with
forwad gain G(s) and feedback
stability of the closed loop system, the bilinear
transformation is applied. The stability can obtained using (b) systemmodding
H(s). TO investigate the Fig. 6 Phasdocked loop DC motor speed control system
(a) bl& diagram
IEEE Catalog Number: 97THS280 - 1225 - ISIE97 - Guimariies, Portugal
VI. EXPERIMENTAL RESULTS
The complete Pc-based DC motor speed control
systemusing the proposed FLC and PLL is implemented to
venfv the theoretical analysis. The host computer is a PC
586 system, Additional interface boards are used and
plugged in the PC system. These include D/A converter
board ~ counter board and 110interface board . The
experimental set-up is shown Fig. 7.
A 2-channel incremental encoder mounted on the
motor shaft converts motor rotation into 500 pulses per turn .
The pulse output fromdoubling circuit with 1000 pulses
each turn is applied to the input of the PD and also to the
counter for the measurement of the motor speed by the
microcomputer,
A DC motor having the following characteristics is used
for experiment : rated voltage =24 V ,rated current =1. IA ,
rated speed =1640 rpm, z m =2 seconds , Kd =2V/rad,
Km=IO rad /sec. Other parameters are as follows : n=1000
for encoder and doubling circuit , Kd =2V/rad for PD, and
Kf =7.5 seconds for LPF.
The .fuzzy controller algorithm is implemented in the PC
by C language . The actual motor speed is measured at the
fixed interval and speed errors are computed by PC.
(with f i t 7 7 logic
converter
I LPF
I
For comparison, a P D control is implemented by
software in PC where the FLC algorithm is realized . The
experiments verify that, in comparison with pure PLL and
PID control, the systemWithboth PLL and FLC control
modes provides best performance .
VII. CONCLUSION
A fuzzy logic controller in combination with PLL control
to obtain a robust and precise speed control for a DC motor
drive has been presented.
Conventional speed controller for DC motor system
requires a complete mathematical model of the motor. Fuzzy
logtc design uses linguistic description to replace the
mathematical model. This can reduce design complexity and
expeihte the development cycle. However, fuzzy control
alone cannot provide best performance of DC mode speed
control both in transient state and steady state . The
overshoot phenomena may occur depends on the
quantization levels of input and output variables . Thus the
PLL control is used to replace the FLC once the speed error
is within a preset limit . When the speed error is larger, the
FLC becomes active and the systemresponds quickly by
drawing the motor speed into the preset speed error range .
The feasibility of using both PLL and FLC in DC motor
speed control systemhas been demonstrated. Precise speed
regulation is achieved by PLL operation . The systemcan
pckl y recover from loss of lock situation by FLC. The
proposed control scheme with PLL and FLC in parallel
combine the rapidity of fuzzy controller during the transient
state and the accuracy of PLL control during the steady
state .
It has been shown by experiment that the performance of
a PLL- controlled motor speed dnve improved with the
incorporation of fbzzy logc controller in the system.
Fig. 7 Experimental &-up
IEEE Catalog Number: 97THS280 - 1226 - ISIE97 - Guimar5es, Portugal
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