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RUN /Hold input and STATUS output, which monitors and control
conversion timing. It can operate with upto 30 conversions per second. Fig. 2 shows the
interfacing diagram.
Fig. 2 : Interfacing 8255, ADC 7109 and 8086
Algorithm :
Step I : Initialize the data section.
Step II : Make Run /
ERROR signal. If this signal is low, it indicates that printer is in Paper End
state, Offline state and Error state. In such a case display message PRINTER
OFFLINE and stop.
Micropro. & Interfacing Techniques (PU) L-58 Lab Manual
Fig. 9
Fig. 10
If the BUSY signal is low, then the computer sends an ASCII code on eight parallel
data lines. The computer also sends a
ACK
(acknowledgement) signal, to indicate that data to be printed is received. The rising edge
of the
ACK signal, resets the BUSY signal from the printer. When the computer sees that
BUSY signal is low, it sends the next character along with strobe and the sequence is
repeated till the last character to be printed is transferred. Fig. 10 shows the circuit for
interfacing centronix type parallel input printer to 8255 A. Port A is used as an output
port, to send 8-bit data to the printer. Port B is used an input port to check the
ERROR ,
PE and BUSY signals.
The port C signals, PC
7
is used as an
STB signal.
The PC0 is used to send
INIT signal to
the printer for initialisation.
Back : MOV CX, 0FFFH Wait for 50 s, so that printer will get
Initialized.
DEC CX
LOOP BACK
MOV AL, 01H
INIT = 1
OUT DX, AX
UP : MOV DX, PORT B
IN AL, DX
MOV AH, AL Save the status in AH also.
AND AL, 01H
JNZ CHECK Check for BUSY signal. If high goto
CHECK.
MOV AL, [BX] Load the first character in AL.
MOV DX, Port A Load the address of Port A in DX.
OUT DX, AL Send the character to be printed.
MOV DX, Port C DX = address of Port C.
L2 : IN AL, DX
Check for
ERROR signal.
JNZ UP
LEA DX, MSG 2 Display Message Printer offline.
MOV AH, 09H
INT 21H
Micropro. & Interfacing Techniques (PU) L-61 Lab Manual
Label Instruction Comment
JMP UP
ENDD : LEA DX, MSG 3 Display Message Printing
completed.
MOV AH, 09H
INT 21H
MOV AH, 4CH Terminate Program.
INT 21H
END.
Flowchart B.4
Micropro. & Interfacing Techniques (PU) L-62 Lab Manual
Programs of 8253
Program 1 : Write 8086 ALP to program 8253 in mode 0, modify the program for hardware re-
triggerable monoshot mode. Generate a square wave with a pulse of 1 ms. Comment on
the difference between Hardware Triggered and software triggered strobe mode. Observe
the waveform at GATE and OUT pin of IC 8254 on CRO.
(i) To program 8254 in mode 0 means to initialize it.
Control word
Corel A
MOV AL, 31 H ; Counter 0, mode 0 CWR
MOV DX, 5006 ; CWR address
OUT DX, AL ; Loads control word in the CWR
(ii) The modification in the above program, for mode 5 i.e. Hardware retriggerable
monoshot mode is only to change the control word.
Control word
Corel B
MOV AL, 3BH ; Counter 0, mode 5 CWR
MOV DX, 5006 ; CWR address
OUT DX, AL ; Loads control word in CWR.
(iii) Program to generate a square wave with a pulse of 1 ms.
Step 1 : Assume the Counter 0 is used to generate square wave and addresses of
Counter 0 = 10 H and Control register = 13 H.
Step 2 : The output period required is 1 ms. The input frequency is 1 MHz, so
input period = 1 s.
Count value =
Required period
Input period
=
1 ms
1 s
= (1000)
10
Step 3 : The control word format to initialize counter 0, 16 bit counter, BCD
counting and square wave generator mode will be as follows :
Corel C
Micropro. & Interfacing Techniques (PU) L-63 Lab Manual
Step 4 : The 8253 initialisation program will be as follows :
MOV AL, 37H ; Initialise counter 0,
MOV DX, 0013 H ; mode 3 CWR address
OUT DX, AL ; 16 bit count and BCD counter
MOV AL, 00H ; Load LSB count value to counter 0
MOV DX, 10H
OUT DX, AL
MOV AL, 10H ; Load MSB count value to counter 0
MOV DX, 10H
OUT DX, AL
(iv) For the difference between Hardware triggered and software triggered strobe mode
please refer chapter 16.
(v) For the wave forms at GATE and OUT pin of IC 8254.
Programs of 8279
Program 1 : Write a program to initialize and operate 8279 for the following specifications. The
addresses of 8279 are A2 H and B2 H
(i) 12 digit display to display roll nos. from 1 to 12
(ii) Display scan time 15.24 msec. and external clock is 3 MHz.
(iii) Clear code is FF H
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
dp g f e d c b a
Soln. :
Step I : According to specification (i) the 8279 should be initialized in 16 digit right
entry mode.
(a) Keyboard /display mode set command :
DD = 11; KKK should be encoded KKK = 000 ;
The command word is,
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0 0 0 0 0 0 0 0 = 18 H
Step II : Specification (ii) gives external clock frequency and display scan time.
. Scan time =
Display scan time
2
4
=
10.24
16
= 640 s.
. Clock cycle time =
640 s
64
= 10 s
Internal clock = 100 kHz
PPPPP =
3 10
6
100 10
3
= 30
10
= 1E H
(b) Program clock :
PPPPP = 11110; The command word is, 0011 1110 = 3E H.
Step III : (c) Clear code command :
The command word is, 1101 1100 = DC H; CD
2
CD
1
CD
0
= 111, C
F
= 0, C
A
= 0
Micropro. & Interfacing Techniques (PU) L-64 Lab Manual
Step IV : According to specification (iii) the display is common anode type that is logic 0
corresponds to segment ON and logic 1 corresponds to segment OFF. It also
gives the connection of segments with A
3
- A
0
and B
3
- B
0
lines.
.We will have look up Table B.4 as follows :
Table B.4 : Look-up Table
dp g f e d c b a Data Address
(D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
)
1 1 1 1 1 1 0 0 1 F9 2000
2 1 0 1 0 0 1 0 0 A4 2001
3 1 0 1 1 0 0 0 0 B0 2002
4 1 0 0 1 1 0 0 1 99 2003
5 1 0 0 1 0 0 1 0 92 2004
6 1 0 0 0 0 0 1 0 82 2005
7 1 1 1 1 1 0 0 0 f8 2006
8 1 0 0 0 0 0 0 0 80 2007
9 1 0 0 1 0 0 0 0 90 2008
A 1 0 0 0 1 0 0 0 88 2009
B 1 0 0 0 0 0 1 1 83 200A
C 1 1 0 0 0 1 1 0 C6 200B
Step V : (d) Write display RAM command :
In right entry mode, the status of display is given as follows :
According to specification digit 12 to digit 15 are not connected. Hence the
first entry should be displayed on rightmost digit (digit 11). After first entry,
it shifts the address of digit and then displays contents of corresponding
location.
i.e. first entry will be displayed on digit 12
AI = 1, A
3
A
2
A
1
A
0
= 1100
Hence the command word is, 1001 1100 = 9C H
Step VI : Now we can find address of control/status and data register.
A
7
1
1
A
6
0
0
A
5
1
1
A
4
0
1
A
3
0
0
A
2
0
0
A
1
1
1
A
0
0
0
Here addresses show a change in A
4
bit. Hence A
4
of microprocessor is
connected to A
0
line of 8279. The address of control/status register is B2
while the address of data register is A2.
Step VII : Flowchart of the program is shown in Fig.10(a)
Micropro. & Interfacing Techniques (PU) L-65 Lab Manual
Title INITIALIZATION OF 8279
Label Instruction Comments
.model small
.code
MOV AL, 00H Keyboard/display mode
OUT B2 H, AL set command
MOV AL, 3E H Program CLK
Command
OUT B2, AL
MOV AL, DC H Clear code command
OUT B2, AL
MOV AL, 9C H 9CH for left entry mode
OUT B2, AL Write display RAM
command
L2: MOV BX, 2000 H
MOV CX, 000F H Character counter
L1: MOV AL, [BX] Read character code
from memory
OUT A2 H, AL
CALL DELAY (1 sec.)
INC BX
DEC CX
LOOPNE L1
LOOP L2
end
Programs of 8251
Program 1: Perform an experiment to establish communication between two 8251 systems A and B.
Program 8251 system A in asynchronous transmitter mode and 8251 system B in
asynchronous receiver mode. Write an ALP to transmit the data from system A and
receive the data at system B. The requirements are as follows:
Transmission :
- A message is stored as ASCII characters in the memory.
- A message specifies the number of characters to be transmitted as the first byte.
Reception :
- Message is retrieved and stored in the memory.
- Successful reception should be indicated.
(i) The interfacing schematic will be as Fig. 11.
(ii) The mode word required for asynchronous mode, 8 bit character. We assume baud
rate factor 16, No parity check and 1 stop bit.
Fig. 10(a)
Micropro. & Interfacing Techniques (PU) L-66 Lab Manual
Fig. 11
The mode word format for transmitter and receiver will be as follows :
COREL 20
(iii) Command word format to enable Tx and Rx will be as follows :
COREL 21
(iv) Status word to check TxRDy will be 01H and RxRDy will be 02H.
(v) The flow chart for both systems will be as shown Flowchart B.5.
(vi) Program for both systems will be same.
Program :
Label Instruction Comment
MOV BX, address
1
Memory pointer for Tx
MOV DX, address
2
Memory pointer for Rx
Micropro. & Interfacing Techniques (PU) L-67 Lab Manual
Label Instruction Comment
MOV AL, 00 H Dummy 00's to 8251
OUT F3 H, AL
OUT F3 H, AL
OUT F3 H, AL
MOV AL, 40 H Internally reset 8251
OUT F3 H, AL
MOV AL, 4E H Mode word
OUT F3 H, AL
MOV AL, 15 H Command word
OUT F3 H, AL
UP : IN AL, F3 H Status word
AND AL, 01 H
TEST AL, 01 H Check TxRDy
CALL Tx data call subroutine 1
IN AL, F3 H status word
AND AL, 02 H
TEST AL, 02 H Check RxRDy
CALL Rx data Call subroutine 2
LOOP UP Go to up.
Subroutine 1
Tx data MOV AL, [BX] Take data from memory
OUT F2 H, AL Data 8251 Tx
INC BX memory pointer = memory pointer + 1
RET Go to main program.
Subroutine 2
Rx data IN F2 H, AL Take data from Rx
MOV [DX], AL Store data in memory
INC DX Memory pointer = Memory pointer +1
RET Go to main program
Micropro. & Interfacing Techniques (PU) L-68 Lab Manual
Flowchart B.5
8259 Programs
Program 1 : Write 8086 APL to interface 8259 in cascade mode (M/S) and demonstrate execution of
ISR in following manner :
Main program will display two digits up counter. When slave IRQ interrupt occurs, it
clears the counter and starts up counting again. When Master IR1 interrupt occurs, it
resets the counter to FFH and starts down counting.
Explanation :
Fig. 12 shows the interfacing of 8259 with 8086 in cascaded mode. Eight interrupt
lines IR0-IR7 are connected to the interrupt request register (IRR).A microprocessor uses
Micropro. & Interfacing Techniques (PU) L-69 Lab Manual
two PICs to provide 15 interrupt inputs (7 on the master PIC and 8 on the slave one). the
following table lists the interrupt sources on the PC .
Input on
8259A
Priority 80x86 INT Device
IRQ 0 Highest 08h Timer Chip
IRQ 1 09h Keyboard
IRQ 2 0Ah Cascade for controller 2 (IRQ 8-15)
IRQ 9/1 71h CGA vertical retrace (and other IRQ 2
devices)
IRQ 8/0 70h Real-time clock
IRQ 10/2 72h Reserved
IRQ 11/3 73h Reserved
IRQ 12/4 74h Reserved in AT, auxiliary device on PS/2
systems
IRQ 13/5 75h FPU interrupt
IRQ 14/6 76h Hard disk controller
IRQ 15/7 77h Reserved
IRQ 3 0Bh Serial Port 2
IRQ 4 0Ch Serial Port 1
IRQ 5 0Dh Parallel port 2 in AT, reserved in PS/2
systems
IRQ 6 0Eh Diskette drive
IRQ 7 Lowest 0Fh Parallel Port 1
For cascaded 8259, the INT pin of the slaves are connected to interrupt request pins
(IR0 IR7) and
INTA to the