5

VER : 1A
BOM P/N

=4+6<67(0%/2&.',$*5$0

Description

Channel B

Arrandale
rPGA 989
Dual Channel DDR III
800/1066 MHZ

DDRIII-SODIMM1
DDRIII-SODIMM2

P22

ATI-Park
EXT_HDMI

VRAM DDRIII
PCI-E x16 512MB

P4, 5, 6, 7
IMC

GFX

EXT_CRT

P14,15
P16, 17, 18, 21, 22, 23
FDI
X'TAL
14.318MHz

SLG8LV595
CLOCK
GENERATOR

64Mb * 16 *4 pc

CRT Con.
P23

EXT_LVDS

DMI

DMI(x4)
FDI

P3

DMI

CLK

INT_CRT

USB-8

INT_LVDS

Int. MIC

LVDS/CCD/MIC
Con.
P23

Display
C

SATA 0

SATA - HDD
P28

INT_HDMI

SATA

PS8101
LS

P24

SATA 1

SATA - ODD
P28

USB

P33

Ibex Peak-M

MINI CARD
WLAN

USB-13

PCH

USB-3/9/11

USB/B Con.
(USB Port x2)

PCIE-1
USB-4

BRM 57780
GIGA LAN P26

X'TAL
32.768KHz

P33

P31

AU6437-GBL
Cardreader control

RJ45
P26

X'TAL
25MHz

Cardreader

P27

P8, 9, 10, 11, 12, 13

P33

Bluetooth Con.

X'TAL 25MHz

USB-12

P31
P9

BATTERY

Azalia

RTC

SPI ROM

SPI

IHDA

P9

LPC

ISL88731A
Batery Charger

LPC
Int. MIC

ALC272X
AUDIO CODEC

NPCE781
EC

P30

X'TAL
32.768KHz

P37

UP6111AQDD
P36

RT8206B
3V/5V

CPU core

Reference

MIC JACK

IV@
EV@

for Discrete Graphic only SKU

Touch Pad
Board Con.

P29

P30

Description
for UMA only SKU

VRAM@

GMT 1453L amp

P30

K/B Con.

for different VRAM parts

HP

do not stuff

W25X40BVSSIG
SPI FLASH P35

+1.5V_SUS

+VGPU_CORE

+1V

(PWM Type)

+VGFX_AXG

P41

HPA00835RTER
P40

MAX8792ETD+T
P38

+1.8V

P43

Discharger

P42

P43

P44

Quanta Computer Inc.

P34

PROJECT : ZQH
Size

Document Number

Date:

Monday, March 14, 2011

Rev
1A

Block Diagram
5

Thermal Protection
P44

Fan Driver

P34

P30

ISL62881HRZ-T
P39

RT9018A
P34

Speaker

+1.05V

RT8207A
P37

ADP3212
BOM Option Table

P24

PCIE-6

PCI-E x1

USB-1

USB Port

HDMI Con.
EXT_HDMI

Sheet
1

of

35

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)

+3.3V

VIN

+3V_D

VDDR3

dGPU_VRON

ISL6264

+3_D (0.5A)

PG_GPUIO_EN

VDDC

MOS (AO3413)
P22

VIN

+VGPU_CORE (20A)

PG_1V_EN

VDDCI
ISL62872

P44

+1.5V

+1.5V_SUS

+1V (DP PLL PWR)

PG_1.5V_EN

G9334ADJ & MOS

P45

PG_1.5V_EN

+1V (3A)

+5V

PG_1.5V_EN

VDDR4

MOS (AO4710)
P43

P47

+VGPU_IO (4.5A)

VDDR1

+1.8V

MOS (AO6402)
P43

+1.5V_GPU (10A)

dGPU_PWROK

BJT

dGPU_PWR_EN#

P22

MOS
AO3413

P22

+5_GPU

+1.8V_GPU (3A)

GPU PWR CTRL Option 2 (VDDR3 after VDDR1)

VIN

VIN

PG_GPUIO_EN

VDDC

dGPU_VRON

ISL6264

PG_1V_EN

VDDCI
ISL62872

P44

+VGPU_CORE (20A)

+1.5V

+1V (DP PLL PWR)

+1.5V_SUS

PG_1.5V_EN

+VGPU_IO (4.5A)

+1.5V_GPU

VDDR1

G9334ADJ & MOS

P45

+1V (3A)

+1.8V

+3V_D

VDDR3

+1.5V_GPU (10A)

+5V

PG_1.5V_EN

VDDR4

MOS (AO3413)
P22

MOS (AO4710)
P43

P47

MOS (AO6402)
P43

+3_D (0.5A)

dGPU_PWROK

BJT

dGPU_PWR_EN#

P22

MOS
AO3413

P22

+5_GPU

+1.8V_GPU (3A)

Thermal Follow Chart

Power States

+3.3V

DESCRIPTION

CONTROL
SIGNAL

ACTIVE IN

POWER PLANE

VOLTAGE

VIN

+10V~+19V

MAIN POWER

ALWAYS

ALWAYS

+VCCRTC

+3V~+3.3V

RTC POWER

ALWAYS

ALWAYS

+3VPCU

+3.3V

EC POWER

ALWAYS

ALWAYS

+5VPCU

+5V

CHARGE POWER

ALWAYS

ALWAYS

+15V

+15V

CHARGE PUMP POWER

ALWAYS

ALWAYS

+3V_S5

+3.3V

LAN/BT/CIR POWER

S5_ON

S0-S5

+5V_S5

+5V

USB POWER

S5_ON

S0-S5

+5V

+5V

HDD/ODD/Codec/TP/CRT/HDMI POWER

MAINON

S0

+3V

+3.3V

PCH/GPU/Peripheral component POWER

MAINON

S0

+1.5VSUS

+1.5V

CPU/SODIMM CORE POWER

SUSON

S0-S3

+0.75V_DDR_VTT

+0.75V

SODIMM Termination POWER

MAINON

S0

+VGFX_AXG

variation

Internal GPU POWER

GFX_ON

S0

+1.8V

+1.8V

CPU/PCH/Braidwood POWER

MAINON

S0

+1.5V

+1.5V

MINI CARD/NEW CARD POWER

MAINON

S0

NTC
Thermal
Protection

CPU
CORE PWR

H_ORICHOT#
H/W Throttling

PM_THRMTRIP#

CPU

3V/5 V
SYS PWR

SYS_SHDN#

WIRE-AND

SML1ALERT#

FAN Driver

PCH

FAN

SM-Bus

+1.1V_VTT

CPU VTT POWER

MAINON

S0

+1.05V

+1.05V

PCH CORE POWER

MAINON

S0
S0

+1.05V or +1.1V

+VCC_CORE

variation

CPU CORE POWER

VRON

LCDVCC

+3.3V

LCD POWER

LVDS_VDDEN

+5V_GPU

+5V

SWITCHABLE PWM IC POWER

dGPU_PWR_EN#

EC

CPUFAN#

S0
Discrete enable

+GPU_CORE

+0.9V~+1.1V

GPU CORE POWER

+3V_D

Discrete enable

+GPU_IO

+0.9V~+1.1V

GPU I/O POWER

PG_GPUIO_EN

Discrete enable

+1.5V_GPU

+1.5V

VRAM CORE POWER

PG_1.5V_EN

Discrete enable

+1.8V_GPU

+1.8V

GPU_CRE/LVDS/PLL POWER

+1.5V_GPU

Discrete enable

+1V

+1V

DP/PEG POWER

PG_1V_EN

Discrete enable

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

PWR Status & GPU PWR CRL & THRM

Date:
1

Monday, March 14, 2011

Sheet

2
8

of

45

Rev
1A

150mA(30mil)

L50

+1.5V

+1.5V_CLK

*PBY160808T-181Y-N/2A/180ohm_6

+VDDIO_CLK
C243
.1u/16V_4

C627
.1u/16V_4

+3V

L23

C238

C267

C251

4.7u/10V_8

.1u/16V_4

.1u/16V_4
R455

<10> CLK_ICH_14M
C614

1
17
24
5
29

VDD_DOT
VDD_SRC
VDD_CPU
VDD_27
VDD_REF

CLK_SDATA
CLK_SCLK

31
32

SDA
SCL

33_4

CPU_SEL

30

REF_0/CPU_SEL

XTAL_IN

28

XTAL_IN

Y6
14.318MHz
C612

XTAL_OUT

27

XTAL_OUT

VDD_SRC_I/O
VDD_CPU_I/O

33p/50V_4

33p/50V_4

2
8
9
12
21
26
33

IDT:
AL003197001 (ICS9LVS3197AKLFT)
Realtek: AL000890000 (RTM890N-632-GRT)
Silego: AL000595000 (SLG8LV595VTR)

CPU_CLK select

PBY160808T/2A/180ohm_6 +1.05V

C244

C607

C609

.1u/16V_4

.1u/16V_4

10u/Y5V_8

10u/Y5V_8

U20

+3V_CLK

BLM18AG601SN1D/200mA/600ohm_6

L48

C613
.1u/16V_4
R565
0_6

20mil

80mA(20mil)

C246

VSS_DOT
VSS_27
VSS_SATA
VSS_SRC
VSS_CPU
VSS_REF
GND

15
18

DOT_96
DOT_96#

3
4

27M
27M_SS

6
7

SRC_1/SATA
SRC_1#/SATA#
SRC_2
SRC_2#

Place each 0.1uF cap as close as

possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.
CLK_BUF_DREFCLK <10>
CLK_BUF_DREFCLK# <10>

10
11
13
14

*CPU_STOP#

16

CPU_1
CPU_1#
CPU_0
CPU_0#

20
19
23
22

CKPWRGD/PD#

25

R130

CLK_BUF_DREFSSCLK <10>
CLK_BUF_DREFSSCLK# <10>
CLK_BUF_PCIE_3GPLL <10>
CLK_BUF_PCIE_3GPLL# <10>
+3V
10K_4

TP23
TP24
CLK_BUF_BCLK <10>
CLK_BUF_BCLK# <10>
CK_PWRGD_R

ICS9LRS3197AKLFT

+3V

SMBus

CLK Enable

+1.05V

+3V

R543
R451
*10K_4
<10> ICH_SMBDATA

R446

C617

10K_4

*10p/50V/COG_4

CLK_SDATA

CPU_SEL

R545
1K/F_4

2.2K_4
CLK_SDATA <14,15,19>

CK_PWRGD_R
3

Q18
2N7002K
+3V

R542

<10> ICH_SMBCLK
A

CPU_SEL CPU0/1=133MHz
(default)

2.2K_4

1
3

R544
100K/F_4

<30> VR_PWRGD_CK505#

Q19
2N7002K

CLK_SCLK

CLK_SCLK <14,15,19>

Q17
2N7002K

CPU0/1=100MHz

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

Clock Generator
Date:
5

Monday, March 14, 2011

Sheet
1

of

45

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)

AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND on Arrandale
directly if motherboard only supports discrete graphics. If motherboard supports
integrated graphics but without eDP, these pins can also be connected to GND directly.

Processor Compensation Signals

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

D24
G24
F23
H23

<8>
<8>
<8>
<8>

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

D25
F24
E23
G23

E22
D21
D19
D18
G21
E19
F21
G18

<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

D22
C21
D20
C18
G22
E20
F20
G19

<8> FDI_FSYNC0
<8> FDI_FSYNC1

F17
E17

<8>

FDI_INT

C17

<8> FDI_LSYNC0
<8> FDI_LSYNC1

F18
D17

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
FDI_FSYNC[0]
FDI_FSYNC[1]
FDI_INT
FDI_LSYNC[0]
FDI_LSYNC[1]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

R437

R444

20/F_4

H_COMP3

AT23

R442

20/F_4

H_COMP2

AT24

R173

49.9/F_4 H_COMP1

G16

R440

49.9/F_4 H_COMP0

750/F_4

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

<11>

AH24

H_CATERR#

AK14

AT15

H_PECI

H_PROCHOT#

<27,30> H_PROCHOT#

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

AT26

T10

AN26

AK15

<11> PM_THRMTRIP#

T20

COMP3
COMP2

BCLK
BCLK#

COMP1
COMP0
SKTOCC#
CATERR#

PECI

PROCHOT#

THERMTRIP#

BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]

PRDY#
PREQ#
H_CPURST#

<8>

AP26
AL15

PM_SYNC

AN14

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

AN27

<11,27> H_PWRGOOD

AK13

<8> PM_DRAM_PWRGD

<10,18,19,23,27> PLTRST#

R193

H_VTTPWRGD

AM15

T14

AM26

1.5K/F_4 CPU_PLTRST# AL14

RESET_OBS#

PWR MANAGEMENT

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

Intel(R) FDI

<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

49.9/F_4

CLOCKS

<8>
<8>
<8>
<8>

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

R436

PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD

TCK
TMS
TRST#

JTAG & BPM

B24
D23
B23
A22

PCI EXPRESS -- GRAPHICS

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

B26
A26
B27
A25

THERMAL

<8>
<8>
<8>
<8>

U22B

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI

A24
C23
B22
A21

MISC

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DDR3
MISC

U22A

<8>
<8>
<8>
<8>

TDI
TDO
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

A16
B16
AR30
AT30

CLK_CPU_BCLK <11>
CLK_CPU_BCLK# <11>
T62
T67

T21
D

E16
D16

CLK_PCIE_3GPLL <10>
CLK_PCIE_3GPLL# <10>

A18 DPLL_REF_SSCLK_R
A17 DPLL_REF_SSCLK#_R

R465
R471
R472
R463

F6
AL1
AM1
AN1

*0_4
*0_4
0_4
0_4

DDR3_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

AN15
AP15

R254
R253
R252

<14,15>

100/F_4
24.9/F_4
130/F_4

R187
R183

PM_EXTTS#0 <14>

10K_4
10K_4

AT28
AP27

XDP_PREQ#

T68
T69

AN28
AP28
AT27

XDP_TCLK
XDP_TMS
XDP_TRST#

T8
T9
T71

AT29
AR27
AR29
AP29

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

T70
T66
T65
T64

AN25

H_DBR#_R

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7

R149

DPLL_REF_SSCLK <10>
DPLL_REF_SSCLK# <10>

Layout Note: Place

these resistors
near Processor

+1.05V
PM_EXTTS#1 <15>

*Short_4

XDP_DBRST# <8>

T19
T18
T17
T13
T11
T15
T16
T12

RSTIN#

R196
750/F_4
Clarksfield/Auburndale

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

Clarksfield/Auburndale

Processor pull-up
Thermaltrip protect

JTAG MAPPING

VTT PWR_Good

XDP_TDI_R

XDP_TDI

+1.05V

R433

0_4

R429

*0_4

XDP_TDO_M
XDP_TDO
H_CATERR#
H_PROCHOT#
H_CPURST#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#

+1.05V

+3V
<8,30> DELAY_VR_PWRGOOD

Q16

FDV301N

R420
R192
R137
R438
R135
R435
R434
R133
R439

51/F_4
49.9/F_4
68_4
*68_4
*51_4
*51_4
*51_4
*51_4
51/F_4

<27>

MPWROK

R176

*0_4

R430

0_4

+1.5VSUS

2
Q15
3 MMBT3904

U5
R179
1K_4

TC7SH08FU
SYS_SHDN#

Scan Chain
(Default)

STUFF -> R469, R491, R507

NO STUFF -> R489, R490

CPU Only

STUFF -> R490, R491

NO STUFF -> R469, R489, R507

GMCH Only

STUFF -> R489, R507

NO STUFF -> R491, R490, R469

H_VTTPWRGD

4
2K/F_4

PM_THRMTRIP# 1

R432
XDP_TDO_R

0.1u/10V_4

<11> PM_THRMTRIP#

0_4
XDP_TDI_M

C309

R209
1K_4

XDP_TDO

R431

R205
1.1K/F_4

<29,34>
R199
3K/F_4

Use a voltage divider with VDDQ

(1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
PM_DRAM_PWRGD
required voltage.
Note: CRB uses a 3.3V (always ON)
rail with 2K and 1K combination.

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

AUBURNDA 1/4
Date:
5

Sheet

Monday, March 14, 2011

1

of

45

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U22D

U22C
W8
W9
M3

M_B_CLK0 <15>
M_B_CLK0# <15>
M_B_CKE0 <15>

V7
V6
M2

M_B_CLK1 <15>
M_B_CLK1# <15>
M_B_CKE1 <15>

AB8
AD6

M_B_CS#0 <15>
M_B_CS#1 <15>

SB_ODT[0]
SB_ODT[1]

AC7
AD1

M_B_ODT0 <15>
M_B_ODT1 <15>

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

D4
E1
H3
K1
AH1
AL2
AR4
AT8

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

D5
F4
J4
L4
AH2
AL4
AR5
AR8

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

C5
E3
H4
M5
AG2
AL5
AP5
AR7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

<15> M_B_DQ[63:0]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

<14> M_A_BS#0
<14> M_A_BS#1
<14> M_A_BS#2

AC3
AB2
U7

<14> M_A_CAS#
<14> M_A_RAS#
<14> M_A_WE#

AE1
AB3
AE9

AA6
AA7
P7

M_A_CLK0 <14>
M_A_CLK0# <14>
M_A_CKE0 <14>

Y6
Y5
P6

M_A_CLK1 <14>
M_A_CLK1# <14>
M_A_CKE1 <14>

SA_CS#[0]
SA_CS#[1]

AE2
AE8

M_A_CS#0 <14>
M_A_CS#1 <14>

SA_ODT[0]
SA_ODT[1]

AD8
AF9

M_A_ODT0 <14>
M_A_ODT1 <14>

SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

M_A_DM[7:0] <14>

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

B9
D7
H7
M7
AG6
AM7
AN10
AN13

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

C9
F8
J9
N9
AH7
AK9
AP11
AT13

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS#[7:0] <14>

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

C8
F9
H9
M9
AH8
AK10
AN11
AR13

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS[7:0] <14>

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

M_A_A[15:0] <14>

Clarksfield/Auburndale

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10

<15> M_B_BS#0
<15> M_B_BS#1
<15> M_B_BS#2

AB1
W5
R7

<15> M_B_CAS#
<15> M_B_RAS#
<15> M_B_WE#

AC5
Y7
AC6

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

DDR SYSTEM MEMORY - B

<14> M_A_DQ[63:0]

DDR SYSTEM MEMORY A

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#

M_B_DM[7:0] <15>

M_B_DQS#[7:0] <15>

M_B_DQS[7:0] <15>

M_B_A[15:0] <15>

Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5]

Requires minimum 12mils spacing
with all other signals, including data signals.

Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

AUBURNDA 2/4
Date:
5

Monday, March 14, 2011

Sheet
1

of

45

18A

U22G
T72

C281
22u/6.3V_8

C280
22u/6.3V_8

C316

330u/2V_7343
+
C651
*330U/2V_7343

C298
10u/6.3V_8

C299
10u/6.3V_8

+1.05V
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

C313

22U/6.3V_8

C326

22U/6.3V_8

J24
J23
H25
C311
10U/6.3V_8

POWER

CPU VIDS

VTT_SELECT

AN33

H_PSI#

H_PSI#

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_DPRSLPVR

H_VID0 <30>
H_VID1 <30>
H_VID2 <30>
H_VID3 <30>
H_VID4 <30>
H_VID5 <30>
H_VID6 <30>
H_DPRSLPVR

C332
10U/6.3V_8

<30>

C656
10U/6.3V_8

C312
22u/6.3V_8

K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25

SENSE LINES

VTT_SENSE
VSS_SENSE_VTT

VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

<30>

VCC_AXG_SENSE
VSS_AXG_SENSE

<33>
<33>

GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON

AM22
AP22
AN22
AP23
AM23
AP24
AN24

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6

AR25
AT25
AM24

GFX_ON <33>
GFX_DPRSLPVR <33>
GFX_IMON <33>

<33>
<33>
<33>
<33>
<33>
<33>
<33>

ARD:3A
CFD:6A
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

+1.5VSUS

P10
N10
L10
K10

C358

C356

C355

C352

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

C417

C360

C357

1U/6.3V_4

22U/6.3V_8

22U/6.3V_8

+ C363
330U/2V_7343

+1.05V
C660
C654

J22
J20
J18
H21
H20
H19

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

C618
C630

0.6A
VCCPLL1
VCCPLL2
VCCPLL3

L26
L27
M26

+1.8V
22U/6.3V_8
4.7U/6.3V_6
2.2U/6.3V_6
1U/6.3V_4
1U/6.3V_4

C258
C274
C231
C233
C239

G15

AN35

Clarksfield/Auburndale

I_MON
R104

VCC_SENSE
VSS_SENSE

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

VTT0_59
VTT0_60
VTT0_61
VTT0_62

C330
22u/6.3V_8

AR22
AT22

T73

C655
22u/6.3V_8

H_VTTVID1=Low, 1.1V
H_VTTVID1=High, 1.05V

ISENSE

VTT1_45
VTT1_46
VTT1_47

PEG & DMI

PSI#
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR

SENSE
LINES

+1.05V

VAXG_SENSE
VSSAXG_SENSE

1.8V

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

GRAPHICS VIDs

+
C635
*330U/2V_7343

AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16

- 1.5V RAILS

22A

+VGFX_AXG

10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8

DDR3

+1.05V
C658
C657
C634
C327
C648
C649
C644
C659
C652
C331

1.1V

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

POWER

1.1V RAIL POWER

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

FDI

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

GRAPHICS

330u/2V_7343

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

CPU CORE SUPPLY

330u/2V_7343

C285

C284

10U/6.3V_8
22U/6.3V_8
10U/6.3V_8
22U/6.3V_8
22U/6.3V_8
10U/6.3V_8
10U/6.3V_8
22U/6.3V_8
22U/6.3V_8
10U/6.3V_8
10U/6.3V_8
22U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
0.1u/10V_4_X7R
0.1u/10V_4_X7R

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

VTT Rail Values are

Auburndal VTT=1.05V
Clarksfield VTT=1.1V

+VCC_CORE

C568
C626
C234
C589
C623
C643
C642
C590
C567
C640
C230
C588
C235
C569
C297
C624
C621
C638
C625
C566
C622
C266
C265
C236
C641
C287
C232
C633
C275
C271

U22F

CPU Core Power

ARD:48A
CFD:52A

100/F_4

AJ34
AJ35
B15
A15

<30>

+VCC_CORE
VCCSENSE <30>
VSSSENSE <30>

R103
100/F_4
VTT_SENSE
VSS_SENSE_VTT

T75
T74

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

H_DPRSLPVR

H_PSI#

R388
R395
R387
R394
R389
R396
R400
R409
R401
R410
R404
R413
R402
R411
R403
R412
R419
R418

1K_4
*1K/F_4
1K_4
*1K/F_4
1K_4
*1K/F_4
*1K/F_4
1K_4
*1K/F_4
1K_4
1K_4
*1K/F_4
*1K/F_4
1K_4
1K_4
*1K/F_4
*1K/F_4
1K_4

+1.05V

Quanta Computer Inc.

Clarksfield/Auburndale
Note:
For Validating IMVP VR R6451 should be STUFF
and R2N1 NO_STUFF

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

HFM_VID : Max 1.4V

LFM_VID : Min 0.65V

PROJECT : ZQH
Size

Document Number

Rev
1A

AUBURNDA 3/4 (PWR)

Date:
5

Sheet

Monday, March 14, 2011

1

of

45

U22I

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W 35
W 34
W 33
W 32
W 31
W 30
W 29
W 28
W 27
W 26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9

U22E

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30

<14> VREF_DQ_DIMM0
<15> VREF_DQ_DIMM1

CFG0
CFG3
CFG4
CFG7

VSS

NCTF

U22H

AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35

AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

TP20
TP22
TP34
TP25
TP26

AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

B19
A19

RSVD15
RSVD16

A20
B20

RSVD17
RSVD18

U9
T9

RSVD19
RSVD20

AC9
AB9

RSVD21
RSVD22

C1
A3

RSVD_NCTF_23
RSVD_NCTF_24

J29
J28

RSVD26
RSVD27

A34
A33

RSVD_NCTF_28
RSVD_NCTF_29

C35
B35

RSVD_NCTF_30
RSVD_NCTF_31

RESERVED

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

RSVD32
RSVD33

AJ13
AJ12

RSVD34
RSVD35

AH25
AK26

RSVD36
RSVD_NCTF_37

AL26
AR2

RSVD38
RSVD39

AJ26
AJ27

RSVD_NCTF_40
RSVD_NCTF_41

AP1
AT2

RSVD_NCTF_42
RSVD_NCTF_43

AT3
AR1

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65

E15
F15
A2
D15
C15
AJ15
AH15

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

VSS

TP8
TP9

AP34

TP19

AP34 can be NC on CRB; EDS/DG suggestion to GND

Clarksfield/Auburndale

Clarksfield/Auburndale

Clarksfield/Auburndale

Processor Strapping
1
CFG0
(PCI-Epress
Configuration Select)

Single PEG

CFG3
(PCI-Epress Static
Lane Reversal)

Normal Operation

CFG4
Disabled; No Physical Display Port
(Embended
Display Port Presence) attached to Embedded Diplay Port

7
V
K
,S
H
D
Q
H

F
Q
WF
&
R
G
H
LO
P
OID
S
%
LU
R
*
UF
N

DEFAULT

0
Bifurcation enabled
Lane Numbers Reversed
Enabled; An external Display port
device is connected to the Embedded
Display port

CFG0 R128

*3.01K_NC

CFG3 R125

3.01K/F_4

CFG4 R127

*3.01K

CFG7 R126

*3.01K/F_4

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

AUBURNDA 4/4
Date:
4

Sheet

Monday, March 14, 2011

1

of

45

AC-coupling CAP place close to PCH

IBEX PEAK-M (DMI,FDI,GPIO)

IBEX PEAK-M (LVDS,DDI)

U21C

BE22
BF21
BD20
BE18

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

BD22
BH21
BC20
BD18
BH25

+1.05V

R441

49.9/F_4

BF25

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOMP

FDI_INT
FDI_FSYNC0
FDI_FSYNC1

DMI_IRCOMP
FDI_LSYNC0
FDI_LSYNC1

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

<4>
<4>
<4>
<4>
<4>
<4>
<4>
<4>

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

<4>
<4>
<4>
<4>
<4>
<4>
<4>
<4>

BJ14

U21D

SYS_PWROK

T6
M6
B17
K5

RSV_ICH_LAN_RST# A10

D9

<4> PM_DRAM_PWRGD

C16

<27> ICH_RSMRST#
SUS_PWR_ACK_R

M1

P5

<27> DNBSWON#

<27>

R246

PCH_ACIN

*0_4 ACIN_R

P7

PM_BATLOW#

A6

PM_RI#

F14

SYS_RESET#

WAKE#

SYS_PWROK
PWROK
MEPWROK
LAN_RST#
DRAMPWROK
RSMRST#

CLKRUN# / GPIO32

System Power Management

XDP_DBRST#

SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#

SUS_PWR_DN_ACK / GPIO30
PWRBTN#
ACPRESENT / GPIO31

SLP_S3#
SLP_M#
TP23

BATLOW# / GPIO72
RI#

PMSYNCH
SLP_LAN# / GPIO29

R119
R120

+3V

R144

R111
R112
<4>

BF13

FDI_FSYNC0

<4>

BH13

FDI_FSYNC1

<4>

BJ12

FDI_LSYNC0

<4>

BG14

FDI_LSYNC1

<4>

PCIE_WAKE#

Y1

AB48
Y45

<16> INT_LVDS_EDIDCLK
<16> INT_LVDS_EDIDDATA

FDI_INT

J12

Y48

<16> INT_LVDS_BRIGHT

CLKRUN#

10K_4
10K_4

AB46
V48

2.37K/F_4

AP39
AP41

0_4
0_4

<16> INT_TXLOUT0<16> INT_TXLOUT1<16> INT_TXLOUT2<16> INT_TXLOUT0+

<16> INT_TXLOUT1+
<16> INT_TXLOUT2+

INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-

BB47
BA52
AY48
AV47

INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+

BB48
BA50
AY49
AV48
AP48
AP47

<18,19>

AY53
AT49
AU52
AT53

<27>

AY51
AT48
AU50
AT51

P8
F3

R234

*Short_4

ICH_SUSCLK

SUSC#

<27>

SUSB#
SLP_M#

R225

N2

Y53
Y51

<16> INT_HSYNC
<16> INT_VSYNC
DAC_IREF

TP32

PM_SYNC
PM_SLP_LAN#

SDVO_TVCLKINN
SDVO_TVCLKINP

L_BKLTCTL

SDVO_STALLN
SDVO_STALLP

L_DDC_CLK
L_DDC_DATA

SDVO_INTN
SDVO_INTP

R134
1K/F_4

<4>

AD48
AB51

BJ46
BG46

BJ48
BG48
BF45
BH45

L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG

SDVO_CTRLCLK
SDVO_CTRLDATA

LVD_VREFH
LVD_VREFL

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD

CRT_DDC_CLK
CRT_DDC_DATA

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN

T51
T53

SDVO_CTRLCLK <17>
SDVO_CTRLDAT <17>

BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

INT_HDMI_HPD
INT_HDMITX2N_R
INT_HDMITX2P_R
INT_HDMITX1N_R
INT_HDMITX1P_R
INT_HDMITX0N_R
INT_HDMITX0P_R
INT_HDMICLK-_R
INT_HDMICLK+_R

C249
C247
C242
C245
C253
C250
C237
C241

0.1u/10V_4_X7R
0.1u/10V_4_X7R
0.1u/10V_4_X7R
0.1u/10V_4_X7R
0.1u/10V_4_X7R
0.1u/10V_4_X7R
0.1u/10V_4_X7R
0.1u/10V_4_X7R

<17>

INT_HDMITX2N
INT_HDMITX2P
INT_HDMITX1N
INT_HDMITX1P
INT_HDMITX0N
INT_HDMITX0P
INT_HDMICLKINT_HDMICLK+

<17>
<17>
<17>
<17>
<17>
<17>
<17>
<17>
C

DDPC_CTRLCLK
DDPC_CTRLDATA

<27>

*0_4

BJ10

AA52
AB53
AD53
V51
V53

<16> INT_CRT_DDCCLK
<16> INT_CRT_DDCDAT

P12

F6

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

<16> INT_CRT_BLU
<16> INT_CRT_GRN
<16> INT_CRT_RED

H7

L_BKLTEN
L_VDD_EN

<27>

E4

K8

AT43
AT42

INT_TXLCLKOUT- AV53
INT_TXLCLKOUT+ AV51

<16> INT_TXLCLKOUT<16> INT_TXLCLKOUT+

<4> XDP_DBRST#

T48
T47

<16> INT_LVDS_BLON
<16> INT_LVDS_DIGON

Digital Display Interface

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

LVDS

<4>
<4>
<4>
<4>

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

BD24
BG22
BA20
BG20

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

CRT

<4>
<4>
<4>
<4>

BC24
BJ22
AW20
BJ20

FDI

<4>
<4>
<4>
<4>

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI

<4>
<4>
<4>
<4>

Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38

R place close to PCH

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

R425

150_4

INT_CRT_BLU

R426

150_4

INT_CRT_GRN

R427

150_4

INT_CRT_RED

IbexPeak-M_R1P0

TP18

IbexPeak-M_R1P0

PCH Pull-high/low

+3V_S5

System PWR_OK

+3V

XDP_DBRST#

R226

PM_RI#

R184

10K_4

PM_BATLOW#

R514

10K_4

+3V_S5

8.2K_4
1K_4

C636
PCIE_WAKE#

R230

10K_4

ICH_RSMRST#

R482

10K_4

PM_SLP_LAN#

R248

*10K_4

RSV_ICH_LAN_RST#

R499

10K_4

SUS_PWR_ACK_R

R530

10K_4

SYS_PWROK

R477

10K_4

ACIN_R

R227

10K_4

'(/$<B95B3:5*22'QHHG38.WR9
38DWSRZHUVLGH

*.1u_4

R523

1
SYS_PWROK

DELAY_VR_PWRGOOD

4
2
U24

CLKRUN#

R538

PWROK_EC

<4,30>

Quanta Computer Inc.

<27>

100K_4

TC7SH08FU

PROJECT : ZQH
Size

Document Number

Rev
1A

IBEX PEAK-M 1/6

Date:
5

Sheet

Monday, March 14, 2011

1

of

45

RTC Circuitry

C335

2
1

15p/50V_4
+VCCRTC

Y1

1
C662
1u/10V_4

BAT54C

J2
*SHORT_ PAD1

N18608864
BT1
RTC_CONN

RTC_RST#

C14

SRTC_RST#

D17

C650
1u/10V_4

R479

+VCCRTC

1M_4

SM_INTRUDER#

A16

PCH_INVRMEN

J1
*SHORT_ PAD1

A14

RTCX1
RTCX2

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

RTCRST#
FWH4 / LFRAME#
SRTCRST#
INTRUDER#

LDRQ0#
LDRQ1# / GPIO23

INTVRMEN

SERIRQ

D33
B33
C32
A32

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

C34

LPC_LFRAME#

<19,27>
<19,27>
<19,27>
<19,27>
<19,27>
D

A34
F34
R222

10K_4

AB9

+3V
IRQ_SERIRQ

<27>

C663
1u/10V_4

B13
D13

SRTC_RST#

20K/F_4
1

R474

U21A
RTC_X1
RTC_X2

15p/50V_4

R473
1K_4

R195
10M_4

32.768KHZ
C328

LPC

RTC_RST#

20K/F_4

3
4

R483

RTC

CR1
+3VPCU
VCCRTC_1

SPKR

P1

ACZ_RST#

C30
G30

<21> PCH_AZ_CODEC_SDIN0

F30
E32
F32

+3V_S5

HDA Bus

R460

ACZ_SDOUT

B29

PCH_GPIO33

H32

PCH_GPIO13

*10K_4

<17> HDMI_HPD_PCH#

J30

M3
K3

<21> PCH_AZ_CODEC_SYNC

R453

33_4

ACZ_SYNC

R449

33_4

ACZ_RST#

R456

33_4

ACZ_SDOUT

K1

<21> PCH_AZ_CODEC_RST#

J2
J4

<21> PCH_AZ_CODEC_SDOUT

R450

<21> PCH_AZ_CODEC_BITCLK

33_4

SPI_CLK_R

BA2

SPI_CS0#_R

AV3

SPI_CS1#

AY3

ACZ_BIT_CLK
+3VPCU

C628
*27p_4

R525

*10K_4

SPI_SI_R

AY1

SPI_SO_R

AV1

SPKR
HDA_RST#

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

HDA_SDIN3

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

HDA_SDO
HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST# / GPIO13

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

JTAG_TCK

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

JTAG_TMS
JTAG_TDI
JTAG_TDO
TRST#

SATAICOMPO
SATAICOMPI

AK7
AK6
AK11
AK9

SATA_RXN0_C
SATA_RXP0_C

SATA_RXN0_C <20>
SATA_RXP0_C <20>
SATA_TXN0 <20>
SATA_TXP0 <20>

AH6
AH5
AH9
AH8

SATA_RXN1_C
SATA_RXP1_C

SATA_RXN1_C <20>
SATA_RXP1_C <20>
SATA_TXN1 <20>
SATA_TXP1 <20>

AF11
AF9
AF7
AF6

Note:
SATA port2/3 may not be available on all PCH sku
(HM55 support 3 port only)

AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1

AF16
R182

AF15

37.4/F_4

+1.05V

SPI_CLK
SPI_CS0#
SPI_CS1#

SATALED#

SPI_MOSI
SPI_MISO

SATA0GP / GPIO21
SATA1GP / GPIO19

T3
TP13
Y9

R240

43K/F_4

+3V

V1

R521

43K/F_4

+3V

Disable

1 = Integrated VRM is enabled

0 = Integrated VRM is disabled

+VCCRTC

R489

330K_6

PCH_INVRMEN

SPI_MOSI

TPM Functionality
Disable

1 = Enabled
0 = Disable

+3V

R540

*1K_4

SPI_SI_R

SPKR

Reboot option at power-up

0 = Default Mode (Internal weak Pull-down)

1 = No Reboot Mode with TCO Disabled

+3V

R532

PCH SPI
B

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

HDA_SYNC

IbexPeak-M_R1P0

3&+6WUDS3LQ&RQILJXUDWLRQ7DEOH
INTVRMEN Integrated 1.05V VRM Enable /

HDA_BCLK

IHDA

<21>

A30
D29
SPKR

SATA

ACZ_SYNC

JTAG

ACZ_BIT_CLK

Internal weak pull-down

VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V

SPI

HDA_SYNC (PCH strap pin)

HDA_DOCK_EN Flash Descriptor

Security Override
#/GPIO33

0 = Flash Descriptor Security will be overridden

1 = Security measure defined in the Flash
Descriptor will be enabled.

GNT0#,
GNT1#

(0,0) = LPC
(1,0) = PCI

*1K/F_4 SPKR
B

PCH_GPIO33

R164
R145

*1K/F_4
*10K_4

+3V

+3V
U25
SPI_CS0#_R
SPI_CLK_R
SPI_SI_R
SPI_SO_R

1
6
5
2
3

CE#
SCK
SI
SO

VDD
HOLD#

WP#

VSS

W25Q32BVSSIG

+3V

R541

R129
R122
R123
R131

8
7 R539

3.3K/F_4

GNT2#/
GPIO53

4
C671
.1u/10V_4

GNT3#/
GPIO55

3.3K/F_4

NV_ALE
NV_CLE

GPIO8

Boot BIOS Strap

(0,1) = Reserved NAND

<10>
(1,1) = SPI

PCI_GNT0#
<10> PCI_GNT1#

ESI compatible mode is for server

platforms only

ESI Strap
(Server Only)

R158

<10> PWM_SELECT#

GPIO15

GPIO27

+3V

*1K/F_4

Top-Block
Swap Override
IntelR Anti-Theft Technology
HDD Data Protection
(Intel AT-d) Enable

0 = Top Block Swap Mode

1 = Default Mode (Internal pull-up)
1 = Enabled
0 = Disabled (Default)

<10>

NV_ALE

R202

*1K/F_4

+1.8V

DMI Termination
Voltage

DMI termination voltage. Weak

internal pull-up. Do not pull low.

<10>

NV_CLE

R206

*1K/F_4

+1.8V

Reserved

<10> PCI_GNT3#

This signal has a weak internal pull up.

NOTE: This signal should not be pulled low<11>

RSV_GPIO8

R421

R204
R203

1K_4
1K_4
*1K_4
*1K_4

Reserved

On-Die PLL Voltage

Regulator
<internal weak pull-up>

0 = Intel ME Crypto Transport Layer Security

(TLS) cipher suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security<11>
(TLS) cipher suite with confidentiality
0 = Disables the VccVRM.
1 = Enables the internal VccVRM to have
a clean supply for analog rails.

CR_WAKE#

<11> PCH_GPIO27

*10K/F_4

10K_4

+3V_S5

*1K_4

R244

1K_4

R221

*10K_4

+3V_S5

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

IBEX PEAK-M 2/6

Date:
5

Sheet

Monday, March 14, 2011

1

of

45

U21B
U21E

<19>

PCI_GNT0#
PCI_GNT1#
PWM_SELECT#
PCI_GNT3#

F48
K45
F36
H53

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

B41
K53
A36
A48

PCI_RST#

PCI_RST#

K6

PCI_SERR#
PCI_PERR#

E44
E50

PCI_IRDY#

TP15

PCI_DEVSEL#
PCI_FRAME#

A42
H44
F46
C46

PCI_PLOCK#

D49

PCI_STOP#
PCI_TRDY#

D41
C48

ICH_PME#

M7

PCI_PLTRST#
R423
TP21
R105
CLK_PCI_FB R117

<19> CLK_LPC_DEBUG
B

<27> CLK_PCI_775

22_4
22_4
22_4

CLK_LPC_DEBUG_C
CLK_PCI_PCCARD
CLK_PCI_775_C
CLK_PCI_FB_C

D5
N52
P53
P46
P51
P48

NV_WE#_CK0
NV_WE#_CK1

PIRQA#
PIRQB#
PIRQC#
PIRQD#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
PCIRST#
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#
PLOCK#

USBRBIAS#
STOP#
TRDY#

USBRBIAS

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

BA32
BB32
BD32
BE32
BF33
BH33
BG32
BJ32
NV_ALE
NV_CLE

BD3
AY6

NV_ALE <9>
NV_CLE <9>

AU2 NV_RCOMP R508

<19>
<19>
<19>
<19>

Wireless

*32.4/F_4

PCIE_RX6PCIE_RX6+
PCIE_TX6PCIE_TX6+

C259
C268

0.1u/10V_4_X7R PCIE_TXN6_C
0.1u/10V_4_X7R PCIE_TXP6_C

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

BA34
AW34
BC34
BD34
AT34
AU34
AU36
AV36

AV7
AY8
AY5

BG34
BJ34
BG36
BJ36

AV11
BF5

USBP1USBP1+

USBP4USBP4+

<25>
<25>

<25>
<25>

AK48
AK47

MB USB

BLUETOOTH 3.0

CLK_PCIE_REQ0#

EHCI1
CLK_PCIE_REQ1#_R

USB port6/7 may not be available on all PCH sku

(HM55 support 12port only)
USBP8USBP8+
USBP9USBP9+

<16>
<16>
<25>
<25>

USBP11USBP11+
USBP12USBP12+
USBP13USBP13+

<25>
<25>
<23>
<23>
<19>
<19>

<19> PCIE_CLK_REQ2#

R531

*Short_4CLK_PCIE_REQ2#_R

USB/B-USB1-2
USB/B-USB1-1

U4
AM47
AM48

<19> CLK_PCH_SRC2#
<19> CLK_PCH_SRC2

Camera

TP28
TP27

P9
AM43
AM45

TP29
TP30

USB_BIAS R466

N4

AH42
AH41
CLK_PCIE_REQ3#

EHCI2

A8

Card Reader

AM51
AM53

Mini Card (WLAN )

CLK_PCIE_REQ4#

M9

PERN3
PERP3
PETN3
PETP3

D25
TP4
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4_5#

PERN4
PERP4
PETN4
PETP4

SML0DATA
SML1ALERT# / GPIO74
SML1CLK / GPIO58

PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6

SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#

PEG_A_CLKRQ# / GPIO47
PERN7
PERP7
PETN7
PETP7

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

PERN8
PERP8
PETN8
PETP8

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P

CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

PCIECLKRQ2# / GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P

REFCLK14IN

RSV_SMBALERT#

H14

ICH_SMBCLK

C8

ICH_SMBDATA

J14

RSV_SML0ALERT#

C6

SMB_CLK_ME0

G8

SMB_DATA_ME0

ICH_SMBCLK <3>
ICH_SMBDATA <3>

M14

RSV_SML1ALERT# R242

E10

SMB_CLK_ME1

G12

SMB_DATA_ME1

T13

CL_CLK1

T11

CL_DATA1

T9

CL_RST1#

*0_4

SML1ALERT# <11,26,27>

CL_CLK1 <19>
CL_DATA1 <19>
CL_RST1# <19>

PEG_CLKREQ#_R

H1
AD43
AD45
AN4
AN2

CLK_PCIE_3GPLL# <4>
CLK_PCIE_3GPLL <4>

AT1
AT3

DPLL_REF_SSCLK# <4>
DPLL_REF_SSCLK <4>

AW24
BA24

CLK_BUF_PCIE_3GPLL# <3>
CLK_BUF_PCIE_3GPLL <3>

AP3
AP1

CLK_BUF_BCLK# <3>
CLK_BUF_BCLK <3>

F18
E18

CLK_BUF_DREFCLK# <3>
CLK_BUF_DREFCLK <3>

AH13
AH12

CLK_BUF_DREFSSCLK# <3>
CLK_BUF_DREFSSCLK <3>

P41

CLK_ICH_14M <3>
C600

PCIECLKRQ3# / GPIO25

CLKIN_PCILOOPBACK

CLKOUT_PCIE4N
CLKOUT_PCIE4P

XTAL25_IN
XTAL25_OUT

PCIECLKRQ4# / GPIO26

H6

XCLK_RCOMP

CLKOUT_PCIE5N
CLKOUT_PCIE5P

CLKOUTFLEX0 / GPIO64

PCIECLKRQ5# / GPIO44

USB_OC0# <25>
TP5
TP11
TP10

AK53
AK51

<18> CLK_PCIE_LOM#
<18> CLK_PCIE_LOM
USB_OC4_5# <25>
<18> CLK_PCIE_LAN_REQ#

USB_OC6#
USB_OC7#

SML0CLK

B9

J42

CLK_PCI_FB

AH51
AH53

XTAL25_IN
XTAL25_OUT

27p/50V_4

R428
1M_4

AF38 XCLK_RCOMP R141

90.9/F_4

Y5
25MHz
C599

+1.05V

27p/50V_4

22.6/F_4
AJ50
AJ52

N16
J16
F16
L16
E14
G16
F12
T15

SML0ALERT# / GPIO60

Port1 and port9 can be used on debug mode

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25

SMBDATA
PERN2
PERP2
PETN2
PETP2

SMBus

AU30
AT30
AU32
AV32

SMBCLK

Link

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

SMBALERT# / GPIO11

Controller

AW30
BA30
BC30
BD30

CLK_PCIE_REQ5#

PME#
PLTRST#

AV9
BG8

PERN1
PERP1
PETN1
PETP1

PCI-E*

NVRAM

NV_RB#

0.1u/10V_4_X7R PCIE_TXN1_C
0.1u/10V_4_X7R PCIE_TXP1_C

PEG

F51
A46
B45
M53

NV_RCOMP

NV_WR#0_RE#
NV_WR#1_RE#

C615
C616

<9>
<9>
<9>
<9>

TP3
PCI_GNT0#
PCI_GNT1#
PWM_SELECT#
PCI_GNT3#

PCI_REQ0#
PCI_REQ1#
dGPU_SELECT#
PCI_REQ3#

NV_ALE
NV_CLE

LAN

BG30
BJ30
BF29
BH29

TP1

G38
H51
B37
A44

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

<18> PCIE_RX1<18> PCIE_RX1+

<18> PCIE_TX1<18> PCIE_TX1+

From CLK BUFFER

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

NV_DQS0
NV_DQS1

AY9
BD1
AP15
BD8

R233

*Short_4PCIE_CLK_REQB#

P13

TP6
TP7

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56

Clock Flex

J50
G42
H47
G34

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

PCI

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

USB

H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67

T45

BOARD_ID1

P43

BOARD_ID2
BOARD_ID3

T42
N50

R760

*0_4

EXT48MHZ <23>

IbexPeak-M_R1P0

48MHz output for cardreader

IbexPeak-M_R1P0

+3V

+3V_S5

+3V_S5

+3V_S5

+3V_S5

6
7
8
9
10

5
4
3
2
1

USB_OC1#
USB_OC0#
USB_OC6#
USB_OC7#

10K_4
10K_4
10K_4
10K_4
10K_4
10K_4

CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
PCIE_CLK_REQB#
PEG_CLKREQ#_R

R534

10K_4

CLK_PCIE_REQ1#_R

5
PCI_PLTRST#

2
4

PLTRST# <4,18,19,23,27>

+3V
3

U7
TC7SH08FU

6
7
8
9
10

R251

R407

10K_4

R408

*10K_4 BOARD_ID3 R414

BOARD_ID2 R136

10K_4
*10K_4

R180

10K_4
<27> 2ND_MBCLK

2.2K_4
SMB_CLK_ME1

3
Q4
2N7002K
+3V_S5

BOARD_ID1

+3V
RP4
PCI_PIRQD#
PCI_REQ1#
PCI_FRAME#
PCI_TRDY#

*10K_4 BOARD_ID1 R132

+3V

8.2K_10P8R
C353
.1u/10V_4

R406

Not Defined

+3V
5
4
3
2
1

PCI_REQ3#
PCI_PIRQB#
PCI_REQ0#
PCI_PIRQH#

High = 80port output to LPC

BOARD_ID2
R138
R139
R422
R143
R518

8.2K_10P8R

dGPU_SELECT#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
CLK_PCIE_REQ2#_R

10K_4
8.2K_4
8.2K_4
8.2K_4
10K_4

R181

Low = 80port output to PCI

USB_OC3#
USB_OC2#
USB_OC4_5#

R245
R513
R229
R247
R232
R517

+3V_S5
RP2

2.2K_4
A

High = Reserved
BOARD_ID3
Low = Reserved (Default)

<27> 2ND_MBDATA

100K_4

3
Q5
2N7002K

SMB_DATA_ME1

+3V
RP1
R249

PCI_PIRQC#
PCI_PIRQA#
PCI_STOP#
PCI_IRDY#

*0_4

+3V

6
7
8
9
10

5
4
3
2
1

PCI_DEVSEL#
PCI_PLOCK#
PCI_PERR#
PCI_SERR#

+3V_S5
R504
R211
R243
R512
R511
R214
R212

8.2K_10P8R

10K_4
10K_4
10K_4
2.2K_4
2.2K_4
2.2K_4
2.2K_4

RSV_SMBALERT#
RSV_SML0ALERT#
RSV_SML1ALERT#
ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0

Quanta Computer Inc.

PROJECT : ZQH
Size

Rev
1A

IBEX PEAK-M 3/6

Date:

Document Number
Monday, March 14, 2011
1

Sheet

10

of

45

GPU RST#

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U21F
Y3
C38

TACH1 / GPIO1

<27> SIO_EXT_SCI#

SIO_EXT_SCI#

D37

TACH2 / GPIO6

BOARD_ID0

J32

TACH3 / GPIO7

RSV_GPIO8

F10

GPIO8

<9>

RSV_GPIO8
TP14

<9>

CR_WAKE#

LAN_DISABLE#

K9

LAN_PHY_PWR_CTRL / GPIO12

CR_WAKE#

T7

GPIO15

dGPU_HOLD_RST#

GPIO22

<9>

PCH_GPIO27

TP12

TP33

R524

EC suggestion use GPIO49 for FAN control

CLK_CPU_BCLK# <4>

AM1

CLK_CPU_BCLK <4>

BG10

H_PECI <4>

T1

SIO_RCIN#

PROCPWRGD

BE10

H_PWRGOOD <4,27>

THRMTRIP#

BD10

SCLOCK / GPIO22

TP_PCH_GPIO28

V13

GPIO28

STP_PCI#

M11

AB7
AB13
V3
P3

PECI
RCIN#

STP_PCI# / GPIO34

SATA2GP / GPIO36

TP1

SATA3GP / GPIO37

TP2

SLOAD / GPIO38

TP3

TP5

AY46

RST_GATE#

F1

PCIECLKRQ7# / GPIO46

TP6

AV43

SV_SET_UP

AB6

SDATAOUT1 / GPIO48

TP7

SATA5GP / GPIO49

TP8

GPIO57

TP9

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

TP11

RSVD

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

NCTF

SATA5GP / GPIO49 / TEMP_ALERT# is used to

alert for EC when CPU or Graph/Memory
controllers' temperature go out of limit.
So connecting GPIO49 to EC and avoid this
pin to be used for other purpose

TP_PCH_GPIO28
GPIO45
RST_GATE#
GPIO57
LAN_DISABLE#

TP12
TP13
TP14

M18
N18
AJ24
AK41
AK42

M30

H12

TP19

AA23

NC_1

AB45

SIO_RCIN#
SIO_A20GATE
dGPU_HOLD_RST#
SATA5GP
GPIO22

R533
R520
R536
R537
R224

10K_4
10K_4
*10K_4
10K_4
10K_4

SAVE_LED#
STP_PCI#

R519
R228

10K_4
10K_4

GPIO38

R535

10K_4

BMBUSY#

R522

8.2K_4

SV_SET_UP

R241

10K_4

SV_SET_UP

1-X High = Strong (Default)

GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1

GPIO57

R207

10K_4

AB38
AB42

NC_4

AB41

NC_5

T39

TP24

10K_4
10K_4
10K_4

N30

TP18

INIT3_3V#

R146
R445
R223

M32

TP16

NC_3

SIO_EXT_SMI#
SIO_EXT_SCI#
dGPU_PWR_EN#

+3V

AF13

TP15

NC_2

10K_4
10K_4
10K_4
*10K_4
10K_4

AV45

N32

TP17

R239
R516
R515
R208
R231

+3V

AY45

TP4

F8

+1.05V

BB22

PCIECLKRQ6# / GPIO45

GPIO57

+3V_S5

PM_THRMTRIP# <4>
56/F_4

AW22

SDATAOUT0 / GPIO39

AA4

56/F_4

BA22

H3

SATA5GP

GPIO Pull-up/Pull-down

<27>

SATACLKREQ# / GPIO35

GPIO45

*Short_4

PCH_THRMTRIP#_R R197

R200

TP10

SIO_A20GATE <27>

AM3

GPIO27

SAVE_LED#

U2

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

AB12

GPIO38

dGPU_PWR_EN# should be stable

before dGPU_VRON enable

A20GATE

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

GPIO24

dGPU_PRSNT#

AF48
AF47

TACH0 / GPIO17

H10

dGPU_PWR_EN#

CLKOUT_PCIE7N
CLKOUT_PCIE7P

SATA4GP / GPIO16

V6
TP17

AH45
AH46

F38
Y7

PCH_GPIO27

CLKOUT_PCIE6N
CLKOUT_PCIE6P

AA2

CPU

TP2

<10,26,27> SML1ALERT#

BMBUSY# / GPIO0

SIO_EXT_SMI#

MISC

BMBUSY#

GPIO

TP31
<27> SIO_EXT_SMI#

+3V

R148

*10K_4

BOARD_ID0

R238

10K_4

dGPU_PRSNT# R220

R155

10K_4
*10K_4

dGPU always exist

P6

High = 15"
BOARD_ID0

C10

Low = 14"

IbexPeak-M_R1P0

High = Disable
RSV_GPIO8

Low = Enable

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Date:

Monday, March 14, 2011

Rev
1A

IBEX PEAK-M 4/6

5

Sheet
1

11

of

45

10u/6.3V_8 1u/6.3V_4 .1u/16V_4

VCCCORE(+1.05V) = 1.432A(80mils)
D

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

VCCADAC[1]
VCCADAC[2]
VSSA_DAC[1]
VSSA_DAC[2]

AE50

+VCCA_DAC_1_2

L44
PBY160808T/2A/180ohm_6

+3V

AE52
C604.01u/25V_4

C574

C572

AF53
C598
22u/6.3V_8 22u/6.3V_8
0.1u/10V_4_X7R

AF51

U21J

R114

*Short_4

*10uh_8 +V1.1LAN_VCCA_CLK
C597
*10u/6.3V_6
C603
*1u/6.3V_4

L47

+1.05V
+3V

AH38

VCCALVDS

R175

+1.05V

+1.05V_VCCAUX

*0_6

C629

+V1.1LAN_VCCAPLL_EXP

BJ24

VCCAPLLEXP
VCC3_3[2]

AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

+1.05V

C289
C292
C305
C294
C282

10U/6.3V_8
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]

AN30
AN31
R113

AF24
C300
1U/6.3V_4

*SHORT0603

+3V_VCCA3GBG

L51

*1uH_6

+VCCAFDI_VRM

BJ18

+1.05V_VCCDPLL_FDI

AM23

VCCVRM[1]
VCCFDIPLL
VCCIO[1]

C645
*10u/6.3V_6

L24

0.1UH_8/250mA +1.8V

C255

C248

.01u/25V_4

.01u/25V_4

22u/6.3V_8

TP_PCH_VCCDSW
C307
1u/6.3V_4

C482 change to 0 ohm resistor.

AD39

AB34

AD41

VCC3_3 = 357mA(30mils)

AB35
AD35

Y20
AD38

+3V_VCC_GIO

R417

*SHORT0603

AF43

VCCME(+1.05V) = 1.849A(100mils)

+3V

C339

+1.05V

.1u/16V_4 .1u/16V_4

R140

*SHORT0805

R150

0_8

AF41
+1.05V_VCCEPW

AF42
V39

C257

22U/6.3V_8

V42

C269

22U/6.3V_8

Y39

C277

1U/6.3V_4

Y41

C278

1U/6.3V_4

Y42

VCCVRM= 196mA(15mils)

VCC3_3[1]

AT22

+V1.1LAN_VCCAPLL_FDI

VCCTX_LVDS
C256

C279

VCCDMI[1]
VCCDMI[2]

AT24
AT16

+VCCVRM

R178

+VCCDMI

*SHORT0603

R194

*Short_4

+V1.5S_1.8S

VCCDMI= 61mA(15mils)

+1.05V

VCCACLK[1]

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCACLK[2]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

C334

R210

*SHORT0805

+1.8V

+V1.1LAN_VCCA_A_DPL

68mA(15mils)

BB51
BB53

C319
.1u/16V_4

+V1.1LAN_VCCA_B_DPL

69mA(15mils)

C288
C286
C273

VCCME3_3= 85mA(15mils)
+3V_VCCME_SPI

R201

*SHORT0603

+3V

BD51
BD53
AH23
AJ35
AH35

VCCIO = 3.062A(150mils)
AM8
AM9
AP11
AP9

V9

AU24

+V1.5S_1.8S

VCCPNAND= 156mA(15mils)
VCCPNAND

+VCCRTCEXT
0.1u/10V_4_X7R

+1.05V

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

VCCLAN[1]
VCCLAN[2]
DCPSUSBYP
VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]
VCCME[7]
VCCME[8]
VCCME[9]
VCCME[10]
VCCME[11]
VCCME[12]

AU16
C324
1u/10V_4

FDI

+V1.5S_1.8S
+1.05V

*SHORT0603

VCC3_3[4]

VCCVRM[2]

VCCIO[54]
VCCIO[55]

AN35

VCC3_3[3]

AP43
AP45
AT46
AT45

V41

37mA(15mils)
R185

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

*10u/6.3V_6

VCCIO = 3.062A(150mils)

+3V

LVDS

*1uh_6

VCCIO[24]

HVCMOS

L49

AK24

DMI

+1.05V

+1.05V_PCH_VCCDPLL_EXP

PCI E*

40mA(15mils)

*SHORT0603

NAND / SPI

R174

AP53
AF23

AH39

VCCTX_LVDS= 59mA(15mils)

+1.05V

AP51

VCCLAN = 320mA(30mils)
VCCALVDS
VSSA_LVDS

VCCIO = 3.208A(150mils)

POWER

VCCACLK= 52mA(15mils)

VCCALVDS= 1mA

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4

C329

AF34
AH34
AF32
V12

C325

+VCCSST
0.1u/10V_4_X7R
+V1.1LAN_INT_VCCSUS
0.1u/10V_4_X7R

Y22

C306

.1u/16V_4

USB

C340

3.3 V. This rail should be powered up during S0 system state.

Note that Thermal Sensor shares the same power supply rail with DAC.
The external filters on this pin are not needed in case internal graphic is
disabled so only 3.3-V connection is required.

DCPRTC

VCCVRM[3]
VCCADPLLA[1]
VCCADPLLA[2]

Clock and Miscellaneous

C283

VCC CORE

C291

VCCADAC= 69mA(15mils)

CRT

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

+1.05V

POWER

U21G

VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
VCCSUS3_3[28]
VCCIO[56]
V5REF_SUS

V5REF

PCI/GPIO/LPC

IBEX PEAK-M (POWER)

VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]

VCCIO[2]
VCC3_3[14]

V24
V26
Y24
Y26

+1.05V
C295

+3V_S5_VCCPUSB

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

C303
C290
C302

R169

+1.05V

R162

*SHORT0805

+3V_S5

0.1u/10V_4_X7R
0.1u/10V_4_X7R
0.022U/16V_4

VCCSUS3_3 = 0.163A(20mils)
R172

*SHORT0603

+1.05V

V5REF_SUS< 1mA
R468
D17
C639

100/F_4

+5V_S5

RB500V-40

+3V_S5

1U/6.3V_4

V5REF< 1mA

U23

R115

100/F_4

+5V

RB500V-40

+3V

V23
D4
V5REF_SUS

F24

C240

K49

V5REF

J38

+3V_VCCPPCI

R142

*SHORT0603

1U/6.3V_4

+3V

VCC3_3 = 0.357A(30mils)

L38
C261

0.1u/10V_4_X7R

C260

0.1u/10V_4_X7R

M36
N36
P36
U35
AD13

VCCIO[3]

31mA(15mils)

VCCIO[4]
VCCSATAPLL[1]
VCCSATAPLL[2]

DCPSST

+V1.1LAN_VCCAPLL

AK3
AK1

C668
*1u/6.3V_4

IbexPeak-M_R1P0

L28

*10uh_8

+1.05V

C351
*10u/6.3V_6

VCCIO = 3.062A(150mils)

DCPSUS
VCCIO[9]

*SHORT0603

AH22

+V1.1LAN_VCC_SATA

AT20

+V1.5S_1.8S

+1.05V
B

R213

*SHORT0603

+V1.5S_1.8S

C344
.1u/16V_4

C345
.1u/16V_4

R168

+3V_S5

*SHORT0603
+3V_S5_VCCPSUS

Internal weak pull-down

VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V

U19
U20

C314

VRM enable by strap pin GPIO27

which supply clean 1.05V for
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]

0.1u/10V_4_X7R U22

VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]

VCC3_3 = 0.357A(30mils)
R186

+3V

*SHORT0603

+3V_VCCPCORE

V15
V16

C318
L45

0.1u/10V_4_X7R Y16

VCC3_3[6]
VCC3_3[7]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

V_CPU_IO >1mA(15mils)
+
C592
*220u_3528
L46

10uh_8

+1.05V

R424
*SHORT0805

R198

0_6

+V1.1LAN_VCCA_B_DPL
+

C601

+VTT_VCCPCPU
C342
C338
C336

4.7U/6.3V_6
0.1u/10V_4_X7R
0.1u/10V_4_X7R

C664
C665

0.1u/10V_4_X7R
0.1u/10V_4_X7R

AT18
AU18

V_CPU_IO[1]
V_CPU_IO[2]

VCCIO[11]

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

+V1.1LAN_VCCA_A_DPL

*10uh_8

VCCIO[10]

VCCIO[12]

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

C320
1u/10V_4

AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22

VCCME = 1.849A(100mils)
+1.05V_VCCEPW

AA34
Y34
Y35
AA35

VCCRTC= 2mA(15mils)
A12

+VCCRTC

220u_3528

VCCRTC
IbexPeak-M_R1P0

HDA

+1.05V

VCC3_3[5]

VCCVRM[4]

CPU

+1.8V

HDA_SYNC (PCH strap pin)

SATA

VCCSUS3_3 = 163mA(20mils)
VCCVRM=196mA(15mils)

PCI/GPIO/LPC

P18

RTC

1U/6.3V_4

VCCSUSHDA

L30

+V3.3A_1.5A_HDA_IO

R163

*Short_4

+3V_S5

VCCSUSHDA= 6mA(15mils)
C276
1u/10V_4

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

IBEX PEAK-M 5/6

Date:
5

Sheet

Monday, March 14, 2011

1

12

of

45

U21I

IBEX PEAK-M (GND)

D

U21H

AB16

VSS[0]

AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

IbexPeak-M_R1P0
A

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

IbexPeak-M_R1P0

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

IBEX PEAK-M 6/6

Date:
5

Monday, March 14, 2011

Sheet
1

13

of

45

+1.5VSUS
M_A_DQ[63:0] <5>

R270
R269

<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
10K_4
10K_4

M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#

<3,15,19> CLK_SCLK
<3,15,19> CLK_SDATA

<5> M_A_ODT0
<5> M_A_ODT1
<5> M_A_DM[7:0]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

DIMM0_SA0
DIMM0_SA1
CLK_SCLK
CLK_SDATA

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

<5> M_A_DQS[7:0]

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

<5> M_A_DQS#[7:0]

PC2100 DDR3 SDRAM SO-DIMM

(204P)

JDIM1A
<5> M_A_A[15:0]

M_A_DQ4
M_A_DQ0
M_A_DQ2
M_A_DQ3
M_A_DQ1
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ12
M_A_DQ13
M_A_DQ11
M_A_DQ10
M_A_DQ8
M_A_DQ9
M_A_DQ14
M_A_DQ15
M_A_DQ17
M_A_DQ20
M_A_DQ18
M_A_DQ19
M_A_DQ16
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ28
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ29
M_A_DQ31
M_A_DQ30
M_A_DQ36
M_A_DQ33
M_A_DQ35
M_A_DQ34
M_A_DQ32
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ45
M_A_DQ44
M_A_DQ47
M_A_DQ42
M_A_DQ41
M_A_DQ40
M_A_DQ46
M_A_DQ43
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ62
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ63
M_A_DQ58

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DDR3-DIMM1_H=8.0_Reverse

2.48A

+3V

M3 solution
<7> VREF_DQ_DIMM0

R266

*M3@0_6

+SMDDR_VREF_DIMM

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

+SMDDR_VREF_DQ0
1
+SMDDR_VREF_DIMM
126

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

+1.5VSUS

R276
*10K_4

VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

GND
GND

205
206

+0.75V_DDR_VTT

DDR3-DIMM1_H=8.0_Reverse
+SMDDR_VREF

R275

*SHORT0603

+SMDDR_VREF_DIMM
R264
*10K_4

C403
470p/X7R_4

+1.5VSUS

M1 solution
+SMDDR_VREF

Place these Caps near So-Dimm0.

<4> PM_EXTTS#0
<4,15> DDR3_DRAMRST#

JDIM1B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

PC2100 DDR3 SDRAM SO-DIMM

(204P)

R268

R259
*10K/F_4
*SHORT0603

+SMDDR_VREF_DQ0

R260
*10K/F_4

C380
470p/X7R_4

+1.5VSUS
+SMDDR_VREF_DIMM
C366
10u/6.3V_6

C381
10u/6.3V_6

C369
10u/6.3V_6

C377
.1u/16V_4

+ C367
C379
*330u/2V_7343
.1u/16V_4

C365
10u/6.3V_6
C391
10u/6.3V_6

C372
10u/6.3V_6

+3V

C370
.1u/16V_4

+SMDDR_VREF_DQ0

C387
.1u/16V_4

C371
.1u/16V_4

C376
.1u/16V_4

C378

C385

C383

.1u/16V_4
2.2u/6.3V_6

2.2u/6.3V_6

+0.75V_DDR_VTT

C397
2.2u/6.3V_6

C394
.1u/16V_4

C393
1U/6.3V_4

C375
1U/6.3V_4

C374
1U/6.3V_4

C389
1U/6.3V_4

C373

C396

C412

Quanta Computer Inc.

4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6

PROJECT : ZQH
Size

Document Number

Rev
1A

DDRIII SO-DIMM-0
Date:
5

Monday, March 14, 2011

Sheet
1

14

of

45

<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
10K_4
10K_4

R295
R298

+3V

M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DIMM1_SA0
DIMM1_SA1

<3,14,19> CLK_SCLK
<3,14,19> CLK_SDATA

<5> M_B_ODT0
<5> M_B_ODT1
<5> M_B_DM[7:0]

<5> M_B_DQS[7:0]

<5> M_B_DQS#[7:0]

PC2100 DDR3 SDRAM SO-DIMM

(204P)

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQ5
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ0
M_B_DQ4
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ26
M_B_DQ25
M_B_DQ30
M_B_DQ27
M_B_DQ29
M_B_DQ24
M_B_DQ28
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ45
M_B_DQ47
M_B_DQ43
M_B_DQ44
M_B_DQ41
M_B_DQ46
M_B_DQ42
M_B_DQ48
M_B_DQ53
M_B_DQ50
M_B_DQ54
M_B_DQ52
M_B_DQ49
M_B_DQ51
M_B_DQ55
M_B_DQ60
M_B_DQ57
M_B_DQ63
M_B_DQ58
M_B_DQ59
M_B_DQ56
M_B_DQ62
M_B_DQ61

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

+1.5VSUS

M_B_DQ[63:0] <5>

JDIM2A
<5> M_B_A[15:0]

2.48A

+3V

<4> PM_EXTTS#1
<4,14> DDR3_DRAMRST#

M3 solution

R302

<7> VREF_DQ_DIMM1

*M3@0_6

+SMDDR_VREF_DQ1

+SMDDR_VREF_DIMM

+SMDDR_VREF

R299

R301
*10K/F_4

*SHORT0603

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

+1.5VSUS

M1 solution

JDIM2B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

GND
GND

205
206

+0.75V_DDR_VTT

+SMDDR_VREF_DQ1
DDR3-DIMM1_H=4.0_Reverse

R304
*10K/F_4

C452
470p/X7R_4

DDR3-DIMM1_H=4.0_Reverse

+1.5VSUS

Place these Caps near So-Dimm1.

+SMDDR_VREF_DIMM

C438
10u/6.3V_6

C435
10u/6.3V_6

C437
10u/6.3V_6

C434
.1u/16V_4

+ C450
C413
330u/2V_7343
.1u/16V_4

C439
10u/6.3V_6
C436
10u/6.3V_6

C408
10u/6.3V_6

+3V

C407
.1u/16V_4

+SMDDR_VREF_DQ1

C405
.1u/16V_4

C406
.1u/16V_4

C433
.1u/16V_4

C416

C440 C444

.1u/16V_4
2.2u/6.3V_6

2.2u/6.3V_6

+0.75V_DDR_VTT

C443
2.2u/6.3V_6

C427
.1u/16V_4

C425
1U/6.3V_4

C414
1U/6.3V_4

C424
1U/6.3V_4

C415
1U/6.3V_4

C411

C421

4.7U/6.3V_6 4.7U/6.3V_6

C402

4.7U/6.3V_6

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

DDRIII SO-DIMM-1
Date:
5

Monday, March 14, 2011

Sheet
1

15

of

35

CRT Switch

CRT
C272

0_ohm Resistor place close to Joint-Point

INT_CRT_RED
INT_CRT_GRN
INT_CRT_BLU

CRTVDD5

16

SSM22LLPT

INT_CRT_RED

L27

BLM18BA750SN1D/0.3A/75ohm_6

CRT_R1

INT_CRT_GRN

L26

BLM18BA750SN1D/0.3A/75ohm_6

CRT_G1

L25

BLM18BA750SN1D/0.3A/75ohm_6

INT_CRT_BLU

INT_CRT_DDCDAT
INT_CRT_DDCCLK

CN8
CRT-CONN

6
1
7
2
8
3
9
4
10
5

CRT_B1

R189

R177

R165

C322

C308

C293

C637

C647

C653

150/F_4

150/F_4

150/F_4

10p/50V_4

10p/50V_4

10p/50V_4

10p/50V_4

10p/50V_4

10p/50V_4

11

CRT_11

12

DDCDAT_1

13

CRTHSYNC

14

CRTVSYNC

15

DDCCLK_1

T22

17

<8> INT_CRT_DDCDAT
<8> INT_CRT_DDCCLK

D16

SMD1206P110TFT

INT_VSYNC
INT_HSYNC

<8> INT_VSYNC
<8> INT_HSYNC

0.1u/10V_4_X7R

F2
2

+5V
<8> INT_CRT_RED
<8> INT_CRT_GRN
<8> INT_CRT_BLU

+3V
C301

U23
CRTVDD5

CRT_BYP

7
8

0.1u/10V_4_X7R
C632

.22u/25V_6

+3V

VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO
SYNC_IN1

CRT_VSYNC2
CRT_HSYNC2

16
14

R458
R457

CRTVSYNC
CRTHSYNC

0_4
0_4

INT_VSYNC
INT_HSYNC

15
13

C315
CRT_R1
CRT_G1
CRT_B1

0.1u/10V_4_X7R

3
4
5
6

VIDEO_1
VIDEO_2
VIDEO_3

DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2

GND

CRTVDD5

+3V

10
11

INT_CRT_DDCCLK
INT_CRT_DDCDAT

9
12

DDCCLK_1
DDCDAT_1

R462
R469

2.7K_4
2.7K_4

R452

R476

2.7K_4

2.7K_4

C661

.1u/10V_4

CRTVDD5

C620

10p/50V_4

CRTVSYNC

C619

10p/50V_4

CRTHSYNC

C631

*10p/50V_4

DDCCLK_1

C646

*10p/50V_4

DDCDAT_1

CM2009-02QR

LCD Power
+3V

LVDS

VIN
+3V
C7
C2

C3
C1

0.1u/10V_4_X7R
1000p/50V_4

4.7u/25V_8

U1

1000p/50V_4
1U/6.3V_4

6
4

INT_LVDS_DIGON

INT_TXLCLKOUT+
INT_TXLCLKOUT-

0_ohm Resistor place close to Joint-Point

INT_TXLOUT0+
INT_TXLOUT0INT_TXLOUT1+
INT_TXLOUT1-

CCD +3V-current budget 0.2A

CCD-USB
C12
INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA

*1u/6.3V_4

INT_LVDS_DIGON
INT_LVDS_BLON

<8> INT_LVDS_DIGON
<8> INT_LVDS_BLON

+3V

R5

C11
*1u/6.3V_4

*1u/6.3V_4

*SHORT0603
CCD_PWR

C14
*1u/6.3V_4

USBP8-_R
USBP8+_R

LCDVCC

+3V

*SHORT0603
1/10 delete R8
VIN

R14

*SHORT0805

R16

*SHORT0805

INVCC0

*0_4

R13

0_4

C10

*.1u/10V_4

*2.2u/10V_8

0.1u/10V_4_X7R.01u/25V_4

C4

5
22u/6.3V_8

R4
100K_4

G_4

Backlight Control

+3VPCU

R375
*100K_4
LID591#

<27>

G_1

LID591#,EC intrnal PU
+3V

D14
BAS316
R376
R377

10K_4
BL_ON

10K_4

R7

C9

AAT4280-4

LVDS_CONN
LVDS_BRIGHT

BL#
*0_4

R2
L1
<10>
<10>

+3VPCU

2
3

USBP8+
USBP8-

2
3

1
4

1
4

USBP8+_R
USBP8-_R

INT_LVDS_BLON

RFCMF1632100M3T/200mA/90ohm
R3
*0_4

EC_FPBACK#

<27>

2
R378

0.1u/10V_4_X7R

2
Q9
DTC144EUA

100K_4

Q11
2N7002K

C491

2
Q10
2N7002K
1

<8> INT_LVDS_BRIGHT

0.8A

C5

<27> CONTRAST

R11

INT_TXLCLKOUT+
INT_TXLCLKOUTINT_TXLOUT0+
INT_TXLOUT0INT_TXLOUT1+
INT_TXLOUT1INT_TXLOUT2+
INT_TXLOUT2-

<8> INT_TXLCLKOUT+
<8> INT_TXLCLKOUT<8> INT_TXLOUT0+
<8> INT_TXLOUT0<8> INT_TXLOUT1+
<8> INT_TXLOUT1<8> INT_TXLOUT2+
<8> INT_TXLOUT2-

GND

C6

<8> INT_LVDS_EDIDCLK
<8> INT_LVDS_EDIDDATA

ON/OFF

LCDVCC

1
2

INT_TXLOUT2+
INT_TXLOUT2-

C13

GND

LVDS_BRIGHT
BL_ON

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

OUT

IN

G_0

INT_LVDS_EDIDDATA
2.2K_4
2.2K_4
INT_LVDS_EDIDCLK
R6
BLM15AG121SS1/0.5A/120ohm_4

R10
R9

+3V

G_5

CN5

IN

C8

LID591#

HE1
PT3661-BB

Quanta Computer Inc.

D13
*VPORT_6

PROJECT : ZQH

PT3661-BB : AL003661003
EM-6781-T3 : AL006781000

Size

Document Number

Date:

Monday, March 14, 2011

Rev
1A

CRT/LVDS/CAMERA/LID

Lid Switch (Hall sensor)

4

Sheet

16
8

of

35

HDMI-detect
+3V

HDMI LEVEL SHIFTER

R282

<9> HDMI_HPD_PCH#

*0_4
R278
10K_4

+3V

C667

C349

C350

C666

2.2u/6.3V_6

.1u/10V_4

.1u/10V_4

.1u/10V_4

.1u/10V_4

R219

+3V

*4.7K_4
DDCBUF_EN
CFG

+3V

HDMI_HPD_EC#

<27> HDMI_HPD_EC#

+5V

+3V

R283
*10K_4

Active Buffer

C346

HDMI_MB_HP
HDMI_DDCDATA_MB
HDMI_DDCCLK_MB
HDMI_HPD_EC#

close to pin2/11/15/21/26/33/40/46
+3V

*.1u/10V_4

from PCH
<8> INT_HDMITX0N
<8> INT_HDMITX0P
+3V
1/7 swap

<8> INT_HDMITX2P
<8> INT_HDMITX2N
<8> INT_HDMITX1P
<8> INT_HDMITX1N
+3V

36
35
34
33
32
31
30
29
28
27
26
25
37
38
39
40
41
42
43
44
45
46
47
48
49

GND
IN_D1IN_D1+
VCC
IN_D2IN_D2+
GND
IN_D3IN_D3+
VCC
IN_D4IN_D4+
GND

GND
OUT_D1OUT_D1+
VCC
OUT_D2OUT_D2+
GND
OUT_D3OUT_D3+
VCC
OUT_D4OUT_D4+

1
2
3
4
5
6
7
8
9
10
11
12

<8> INT_HDMICLK+
<8> INT_HDMICLK-

4.7K_4
*4.7K_4

PC0

R549

*4.7K_4

PC1

+3V

R510
R217

*4.7K_4
*4.7K_4

DDCBUF_EN

R509
R218

*4.7K_4
*4.7K_4

CFG

PC0
PC1

from PCH
R188

LS_REXT

+3V
R547
R548

HDMI_MB_HP

2
Q20
2N7002D

.1u/10V_4

GND
CCT2
CCT1
VCC
DDC_EN
GND
HPD_SINK
SDA_SINK
SCL_SINK
GND
VCC
OE#

C321

24
23
22
21
20
19
18
17
16
15
14
13

MB_HDMITX0N
MB_HDMITX0P
+3V

MB_HDMITX2P
MB_HDMITX2N

1/7 swap

I2C

MB_HDMITX1P
MB_HDMITX1N
+3V

MB_HDMICLK+
MB_HDMICLK-

GND
VCC
TRIM
HPDEN
GND
REXT
HPD_S
SDA_S
SCL_S
NC
VCC
GND

U6
C341

D19 2

+5V

1RB501V-40

R528
1.5K_4

PS8101

+3V
HDMI_DDCCLK_MB
C

499/F_4

Control by pin4 HPDEN_R

D18 2

+5V

1RB501V-40

<8> INT_HDMI_HPD

R527
1.5K_4

<8> SDVO_CTRLDAT

Equalization Control
PC1 PC0
PIN4 PIN3 EQ Control
L
L
H
H

L
H
L
H

8dB
4dB
12dB
0dB

<8> SDVO_CTRLCLK

PC0
internal PD
PC1
internal PD
DDCBUF_EN
internal PD
CFG
internal PD
DDC_EN
internal PU

HDMI_DDCDATA_MB

+3V

R486
R485

2.2K_4
2.2K_4

EMI

HDMI connector
MB_HDMITX2P

R502

CN11

*100/F_4

MB_HDMITX2P
MB_HDMITX2N

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

MB_HDMITX2N
MB_HDMITX1P

MB_HDMITX1P
R496

MB_HDMITX1N
MB_HDMITX0P

*100/F_4
MB_HDMITX1N

MB_HDMITX0N
MB_HDMICLK+

MB_HDMITX0P
R507

+5V

*100/F_4

F1
HDMI_DDCCLK_MB
D20
SMD1206P110TFT
HDMI_DDCDATA_MB
N126408677
SSM22LLPT
2
1
N56126873

MB_HDMITX0N
MB_HDMICLK+
R490

MB_HDMICLK-

*100/F_4
C721
470p/X7R_4

MB_HDMICLK-

R271

HDMI_MB_HP

*Short_4 N137984458

SHELL1
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0GND
CK+
CK Shield GND
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL2

20

23
22

21

HDMI

R546
100K_4
A

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Date:

Monday, March 14, 2011

Rev
1A

HDMI (PS8101)
5

Sheet
1

17

of

35

LAN (LAN)
<BOM note>
If center tap power come from internal switch
regulator
=>Stuff 52SWR@ (Default)
If center tap power come from internal LDO
=>Stuff 52LDO@

* Why does Pin17 CLKREQn connect to Pin16(LED2) and Pin30(DVDDL)?

<Layout note>
Close to Pin2

76.1mA ; 30mil
+3V_S5

+3V_LAN

LX

4.7uH/1A
DCR:0.15ohm

VDD33

<4,10,19,23,27> PLTRST#

Int. PU in SB

TP37

<8,19> PCIE_WAKE#

C43
10U/10V_8

20mil

VDDCT_REG

6
AVDDL
C41
1U/10V_4

C42
0.1U/16V_4

XTLO_LAN

AVDDH

XTLI_LAN

1
2

33P/50V_4

XTLO_LAN

XTLO

XTLI_LAN

9
10

R29
C33
1U/10V_4

2.37K/F_4

C34
0.1U/16V_4

Y2
25MHz-LAN

33P/50V_4
C48

6.8PF/50V_4

TX0N

C46

6.8PF/50V_4

TX1P

C51

6.8PF/50V_4

TX1N

C52

6.8PF/50V_4

<Layout note>
Close to LAN Chip
1nF reserved for EMI

TP38

21
22

PCIE_RXN0_LAN

C20

.1U/10V_4

23

PCIE_RXP0_LAN

C22

.1U/10V_4

24

XTLI

REFCLK_N

25

AVDDH_REG

REFCLK_P

26

AVDDL

27

RBIAS

12

TRXP0

RX_P

28

TX0N

13

TRXN0

RX_N

29

TX1P

14

TRXP1

DVDDL_REG

30

TX1N

15

TRXN1

LED[0]

31

LED[2]

LED[1]

32

GND1

33

AR8158-BL1A-RL

only

20

AVDDL

1/7 swap the pin define for layout

SMBUS for debug

PCIE_RX1- <10>
PCIE_RX1+ <10>
AVDDL

CLK_PCIE_LOM# <10>

C29
0.1U/16V_4

CLK_PCIE_LOM <10>

PCIE_TX1+ <10>

C28
0.1U/16V_4

PCIE_TX1- <10>

DVDDL
LAN_ACTLED
C30
*0.1U/16V_4

20mil

LAN_LINKLED#

C27
1U/10V_4

C17
0.1U/16V_4

4
2

4
2

TX_P

CLK_PCIE_LAN_REQ# <10>

TP39

TX0P

TP16

TX_N

0/J_4

18
19

11

16

TX0P

NC

32Pin QFN

R236

17

RN1
49.9/F_4P2R

3
1

RN2
49.9/F_4P2R

3
1

C49

RBIAS

TESTMODE

AVDDL_REG

20mil
C44

AR8158
4X4mm

VDDCT

1
2

VDDCT

SMDATA

WAKEn

20mil
C40
0.1U/16V_4

SMCLK

PERSTn

VDDCT

C39
0.1U/16V_4

CLKREQn

2
TP36

VDDCT_REG
C47
0.1U/16V_4

LX

L3

C37
0.1U/16V_4

GND10
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2

<Layout note>
Close to Pin1

40mil
LX
C45
1U/10V_4

42
41
40
39
38
37
36
35
34

C69
10U/10V_8

1/10 change to 2.2 ohm

D

TP35

2.2_6
1

R36

PU in CLK Gen.

Power Sequence:
VDD33 to PERSTn >= 100ms

U8

1/7 change solution for surge

U4
X-TX1N
X-TX1P
X-TX0N
X-TX0P

1
2
3
4

1
2
3
4

8
7
6
5

C32
0.1U/16V_4

U2
TX1N
TX1P
TX0N
TX0P

8
7
6
5

*UCLAMP2512T.TCT

1
2
3
4

1
2
3
4

8
7
6
5

C35
*1000P/50V_4

C16
0.1U/16V_4

C38
*1000P/50V_4

8
7
6
5

*UCLAMP2512T.TCT

+3V_S5
+1.1V analog power

VDD33

24/27

AVDDL

ATHEROS
AR8158

+1.7V analog power

AVDDL_REG

AVDDH_REG

10

DVDDL_REG

30

VDDCT_REG

VDDCT

LX

+1.1V regulator output (For all the analog 1.1V supply pins)
+2.7V regulator output
+1.1V regulator output (For all the digital 1.1V supply pins)
+1.8V regulator output (For VDDCT when LDO mode)
+1.7V Switching regulator (For VDDCT when switching mode)

TRANSFORMER (LAN)

RJ45 Connector (LAN)

CN9
R25

LAN_ACTLED

5.1K/J_8

R12
*510/J_6

9
N27354430
10

YELLOW_N
YELLOW_P

U26
C19

VDDCT L2

C24

0.1U/16V_4

C26
C23

*1000P/50V_4
0.1U/16V_4

C25

*1000P/50V_4

TX1N
TX1P

AVDD_CEN

0_6

CX8EG601000: 0.5A/600ohm_6
C31
*1U/6.3V_4

TX0N
TX0P

8
7
6
5
4
3
2
1

TDTD+
CT
NC
NC
CT
RDRD+

TXTX+
CT
NC
NC
CT
RXRX+

9
10
11
12
13
14
15
16

X-TX1N
X-TX1P
TERM0

*0.1U/50V_8

LAN_ACTLED

X-TX0P
X-TX0N
X-TX1P
TERM9

Active LED Pin:

Non-overclocking=>active high

X-TX1N
TERM9
TERM1
X-TX0N
X-TX0P

R30

*5.1K/J_8
LAN_LINKLED#

1nF reserved for EMI

C54

*0.1U/50V_8

R19

75/F_8

75/F_8

R20

*510/J_6

R15

*0_8

11
12

LAN_LINKLED#

NS0014 LF_Bothhand
R18

1
2
3
4
5
6
7
8

LINK LED Pin:

SWR mode=>active low
LDO mode=>active high

+3V_S5

0+
01+
2+
213+
3-

R265

GND2
GND1

*0_6
*0_6

14
13
R235

GREEN_N
GREEN_P
RJ45

TERM9

R21
*1M_8

C18
220P/3KV_1808
D2
*B88069X9231T203 1/11 change to 220p by EMI's request

Quanta Computer Inc.

1/7 change to 10/100 type

PROJECT : ZQH
Size

Document Number

Rev
1A

LAN AR8158L
Date:
5

Monday, March 14, 2011

Sheet
1

18

of

35

Debug
0_4
0_4

CL_DATA1_WLAN
CL_CLK1_WLAN

CL_RST1#
CL_DATA1
CL_CLK1

R561
R555
R307

*0_4
*0_4
*0_4

CL_RST1#_WLAN
CL_DATA1_WLAN
CL_CLK1_WLAN

+WL_VDD
A

<10>
<10>

PCIE_TX6+
PCIE_TX6-

<10>
<10>

PCIE_RX6+
PCIE_RX6-

R574
R314

<10> CLK_PCH_SRC2
<10> CLK_PCH_SRC2#

0_4
0_4

CLK_PCH_WIFI
CLK_PCH_WIFI#

<10> PCIE_CLK_REQ2#
PCIE_WAKE#_R

15
13
11
9
7
5
3
1

+WL_VDD
R303

*SHORT0805 +WL_VDD

LTS_AAA-PCI-046-K01

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

+WL_VDD

16
14
12
10
8
6
4
2

A_LFRAME#_R
A_LAD3_R
A_LAD2_R
A_LAD1_R
A_LAD0_R

C457
10u/6.3V_8

+1.5V

USBP13+
USBP13-

C458
0.1u/10V_4

C697
*0.1u/10V_4

C432
*0.1u/10V_4

<10>
<10>
CLK_SDATA <3,14,15>
CLK_SCLK <3,14,15>

+1.5V

+1.5V

+WL_VDD

PLTRST#

R293
R288
R285
R281
R280

PLTRST# <4,10,18,23,27>
RF_EN <27>
0_4
0_4
0_4
0_4
0_4

Debug
LPC_LFRAME# <9,27>
LPC_LAD3 <9,27>
LPC_LAD2 <9,27>
LPC_LAD1 <9,27>
LPC_LAD0 <9,27>

C695
1000p/50V_4

C684
0.1u/10V_4

C688
10u/6.3V_8

+1.5V
+WL_VDD

53

+WL_VDD

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

+3V

H=7.0mm
CN13

GND

<10>
<10>
<10>

Check LED signal. (active high or low)

R556
R306

<10>
PCI_RST#
<10> CLK_LPC_DEBUG

GND

+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA

54

MINI-CARD WLAN(MPC)

<8,18> PCIE_WAKE#

Q6
*DTC144EUA
PCIE_WAKE#_R
1

modify 10/19

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Date:

Monday, March 14, 2011

Rev
1A

MINI PCI-E card/TV

1

Sheet

19
8

of

45

MAIN SATA HDD

EE RETURN-PATH CAPACITORS
VIN 1/10 add for plane

+5V

+3V
CN12

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

SATA_TXP0_C
SATA_TXN0_C

C461
C459

.01u/25V_4
.01u/25V_4

SATA_RXN0
SATA_RXP0

C456
C453

.01u/25V_4
.01u/25V_4

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

C507

0.1u/25V_4_X5R

C470

0.1u/25V_4_X5R

C474

0.1u/25V_4_X5R

C361

*.1u/10V_4

SATA_RXN0_C <9>
SATA_RXP0_C <9>

C483

C711

*.1u/10V_4

C670

*.1u/10V_4

C718

.1u/10V_4

C719

.1u/10V_4

C720

.1u/10V_4

C722

470p/X7R_4

C323

0.1u/25V_4_X5R

C672

0.1u/25V_4_X5R

C333

0.1u/25V_4_X5R

C673

0.1u/25V_4_X5R

C460

0.1u/25V_4_X5R

C430

0.1u/25V_4_X5R

C426

0.1u/25V_4_X5R

+VGFX_AXG

*.1u/10V_4

C497
220p/50V_4
.1u/10V_4

+5V_HDD
C359

C462

+5V

R550

*SHORT0805 +5V_HDD
C676

C386

C400

C398

C395

C392

*100u/6.3V_3528

10u/6.3V_6

*.1u/16V_4

*.1u/16V_4

.01u/25V_4

.01u/25V_4

6$7$+''

*.1u/10V_4

+5V_S5

*.1u/10V_4

C489

*.1u/10V_4

C723

470p/X7R_4

C490

+1.05V
C553
C224

0.1u/25V_4_X5R

C669

0.1u/25V_4_X5R

C480

0.1u/25V_4_X5R

C493

2200p/50V_4

C494

2200p/50V_4

C337

0.1u/25V_4_X5R

C674

0.1u/25V_4_X5R

*.1u/10V_4

C479

.1u/10V_4

2200p/50V_4
+VCC_CORE

1/11 add by EMI's request

C498 220p/50V_4

2200p/50V_4

C704
.1u/10V_4

C496

C499 220p/50V_4

C508 *.1u/10V_4

C500 220p/50V_4

1/11 add by EMI's request

1/11 add for plane

CN20

C495
2200p/50V_4

1/11 add by EMI's request

C506

MAIN_SATA

26
25

VIN

+3V

24

GND24

SATA_TXP0 <9>
SATA_TXN0 <9>

C471
.1u/10V_4

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

ODD (SATA)
CN7

GND14

SATA_TXP0_C
SATA_TXN0_C
SATA_RXN0
SATA_RXP0

0.94A(80mils)

+5V

C401

C399

*.1u/16V_4

*10u/6.3V_6

14

GND
A+
AGND
BB+
GND

1
2
3
4
5
6
7

DP
5V
5V
MD
GND
GND

8
9
10
11
12
13

GND15

15

SATA_TXP1_C
SATA_TXN1_C

C317
C310

.01u/25V_4
.01u/25V_4

SATA_RXN1
SATA_RXP1

C304
C296

.01u/25V_4
.01u/25V_4

SATA_TXP1 <9>
SATA_TXN1 <9>
SATA_RXN1_C <9>
SATA_RXP1_C <9>
+5V

SATA_DP

R159

*1K_4
+5V_ODD

R443

C263

C262

C254

C264

C252

.01u/25V_4

.01u/25V_4

*.1u/16V_4

*.1u/16V_4

10u/6.3V_6

GND23

23

*SHORT0805

C611
*100u/6.3V_3528

SATA_ODD_H=7.7

*SATA_CONN

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

SATA-HDD/ODD/USB-ESATA
Date:
1

Monday, March 14, 2011

Sheet
4

20

of

35

Rev
1A

Mute(ADO)
HP

<22>

HP-L

<22>

HP-R

+3V

reverse R441
R585

*0_4

R551

0_4

ADOGND
MIC1-VREFO-L

MIC1-VREFO-L <22>

MIC1-VREFO-R
D

ADOGND

+5VA

R615

R599

*10K_4

10K_4

PD#

*BAS316

D22

BAS316

D23

C760

AMP_MUTE# <27>

MIC1-VREFO-L

*0_4

BAS316

Codec(ADO)

EAPD#

MIC1-VREFO-R <22>

MIC2-VREFO
R584

10u/6.3V_6

C478

PCH_AZ_CODEC_RST#

D24

ADOGND

Place next to pin 27

+

2.2u/6.3V_6

1/7 by FAE's recommend

C476

ADOGND

C477

C473

+5VA

2.2u/6.3V_6 0.1u/10V_4

+5VA

Place next to pin 25

10u/6.3V_6 0.1u/10V_4

10u/6.3V_6

0.1u/10V_4
49

SPDIFO
PGND

LINE2-L
Sense A

24

T29

23

T28

22

MIC1-R

21

MIC1-L

ADOGND
5

26

10u/6.3V_6

25

C475

0.1u/10V_4

<27> AMP_MUTE#
MIC1-R

<22>

MIC1-L

<22>

U29
4

EAPD#

MIC

TC7SH08FU

R323
0_4

HP_MUTE# <22>
C485

VREF

AVSS1

AVDD1

29

27

30

28
LDO-CAP

MIC2-VREFO

MIC1-VREFO-R

32

33

31
MIC1-VREFO-L

HP-OUT-L

34

LINE2-R

SPDIFO2/EAPD

Spilt by DGND

Place next to pin 46

CPVEE

PVDD2

PCBEEP

48

RESET#

47

C789

SYNC

C790

MIC2-L

12

C793

MIC2-R

SPK-R+

11

46
EAPD#

C792

SPK-R-

DVDD-IO

45

JDREF
Sense-B

10

44

R_SPK+

MONO-OUT

(Vista Premium Version)

PVSS2

SDATA-IN

R_SPK-

R_SPK+

PVSS1

DVSS2

R_SPK-

<22>
*SHORT0603 +5VPVDD2

R587

+5V

<22>

SPK-L-

43

42

41

MIC1-L

BIT-CLK

L_SPK-

L_SPK-

10u/6.3V_6

<22>
0.1u/10V_4

SPK-L+

L_SPK+

SDATA-OUT

<22>

LINE1-L
MIC1-R

C779

C472

+5V_S5
LINE1-R

PVDD1

PD#

10u/6.3V_6 0.1u/10V_4

C783

40

GPIO1/DMIC-CLK

C780

39
L_SPK+

AVDD2

C784

+5VPVDD1

*SHORT0603

AVSS2

R581

+5V

38

GPIO0/DMIC-DATA

37

Spilt by AGND

CBN

ADOGND

ANALOG

DVDD1

ADOGND

Place next to pin 38

CBP

U10

HP-OUT-R

36

C466
0.1u/10V_4

C468
10u/6.3V_6

35

2.2u/6.3V_6

*4.7u/10V_6

20
R582

19

20K/F_4

ADOGND

18
17

MIC2_INT_R

C469

1u/10V_6

R308

1K_4

16

MIC2_INT_L

C463

1u/10V_6

R309

1K_4

MIC2_INTL1

15
14
SENSEA

13

ANALOG

R305

20K/F_4

R313

39.2K/F_4

MIC1_JD

MIC1_JD

<22>

HPOUT_JD <22>

ALC271X-VB3-GR

PCBEEP dont coupling any signals if possible

8/17 separate PCBEEP to Digital from Realtek suggestion

DIGITAL

1.6Vrms
+3V

PCBEEP

C451

1u/10V_6 BEEP_1
C428

C447
0.1u/10V_4

C448
10u/6.3V_6

100p/50V_4

R297

47K/F_4

R296
4.7K_4

D10

BAS316

D11

BAS316

SPKR

<9>

PCBEEP_EC <27>

2/17 change
B

Place next to pin 1

R588

PCH_AZ_CODEC_RST#

ACZ_SDIN0_R R586

22_4

PD#

0V : Power down Class D SPK amplifer

3.3V : Power up Class D SPK amplifer

C445

PCH_AZ_CODEC_SYNC

<9>

PCH_AZ_CODEC_SDIN0

<9>

PCH_AZ_CODEC_SDOUT

<9>

PCH_AZ_CODEC_BITCLK

<9>

R553

0_4

IN

2
A

OUT

SET

R564
R563
R571
R311
C464
C689

GND

SHDN

R569

*29.4K/F_4

*G923-330T1UF
R566
*10K/F_4
C707

C709

0_4
0_4
0_4
*0_4
*1000p/50V_4
*1000p/50V_4

R337
C492
*22P_4

MIC2-VREFO
2.2K_4
1/7 by FAE's recommend
A

ADOGND

*10u/10V_3216 *0.1u/10V_4
ADOGND

R331

MIC2_INTL1

1
2

INT_MIC

C710

C708
+

*0.1u/10V_4

Place next to pin 9

1
2

U30
4

10u/6.3V_6

*100p/50V_4

CN4

UPB201209T-310Y-N/6A/31ohm_8
+5VA

C441

0.1u/10V_4

C429

INT MIC array

ANALOG

L58

C431

+3V

*22p/50V_4

Power (ADO)
DIGITAL
+5V

<9>

*SHORT0603

C467 .1U_4

*0_4

Quanta Computer Inc.

Tied at one point only under

the codec or near the codec

*10u/10V_3216
ADOGND

PROJECT : ZQH

ADOGND
Size
ADOGND

cap place close to MIC-connector

C730, C787 close U37 pin3 and L65

5

Rev
1A

REALTEK ALC663&888/MDC
Date:

Document Number

Sheet

Monday, March 14, 2011

1

21

of

35

MIC

<21> MIC1-VREFO-R

Internal Speaker

<21> MIC1-VREFO-L

Normal OPEN Jack

R325
4.7K/F_4

R324
4.7K/F_4
CN18

<21>
<21>

MIC1-L

C482

4.7u/6.3V_6

MIC1_L2

R318

1K/F_4

MIC1_L3

MIC1-R

C481

4.7u/6.3V_6

MIC1_R2

R317

1K/F_4

MIC1_R3
<21>

L35
BLM15AG121SS1/0.5A/120ohm_4
L34
BLM15AG121SS1/0.5A/120ohm_4

BLACK

1
2
6
3
4

MIC1_L
MIC1_R
MIC1_JD

CN16

1/7 swap
<21>
<21>
<21>
<21>

L_SPK+
L_SPKR_SPKR_SPK+

L_SPK+
L_SPKR_SPKR_SPK+

R572
R570
R215
R216

L_SPK+_1
L_SPK-_1
R_SPK-_1
R_SPK+_1

0_6
0_6
0_6
0_6

1
25
36
4

MIC1_JD
5
MIC
C486
470p/50V_4

Max. 100mVrms input for Mic-IN

C384
C388
C382
C390
*0.22u/25V_6 *0.22u/25V_6 *0.22u/25V_6 *0.22u/25V_6

C484
470p/50V_4

MIC1_JD

SPEAKER-CONN

ADOGND
ADOGND
D21
2

*VPORT_6

ADOGND
C

HP/SPDIF
<21>

HP_MUTE#

BLACK

<21>

HP-L

HP-L-2 R328
HP-R-2 R327
1

HPL-1
HPR-1

L37
L36

1 CN17
2
6
3
4

HPL_SYS
HPR_SYS

BLM15AG121SS1/0.5A/120ohm_4
BLM15AG121SS1/0.5A/120ohm_4

HP-L-2

Q23
FDV301N
R322

56/F_4
56/F_4

C488

R326

R329

C487

*1K_4

*1K_4

2200p/50V_4 2200p/50V_4

<21>

HPOUT_JD

8
5
JA6331-0230T3B-8H

*0_6
ADOGND
ADOGND

HP_MUTE#
B

<21>

HP-R

HP-R-2

Q24
FDV301N
R321

*0_6

HPOUT_JD

D12
2

*VPORT_6

Quanta Computer Inc.

ADOGND

PROJECT : ZQH
Size

Document Number

Rev
1A

AMP /AUDIO JACK CONN

Date:
5

Monday, March 14, 2011

Sheet
1

22

of

35

2 IN 1 CARD READER (SD/MMC)

CN3
SD_DAT1
SD_DAT0

10
9
8
7
6
5
3
2
1

SD_CLK
VCC_XD
SD_CMD
SD_DAT3
SD_DAT2

DATA1
DATA0
VSS2
CLK
VDD
VSS1
CMD
DATA3
DATA2

PIN45=Clock input selection

'1' for 48MHz input [Default,Internal PU]
'0' for 12MHz input
R554

0.1u/16V_4

+3V

U28

R557

*SHORT0603
C701
4.7u/10V_6

<10>

EXT48MHZ
R560

330_4

+3V_VDD
<10>
<10>

USBP12+
USBP12C698

C699

*5p/50V_4

*5p/50V_4

XI
XO
+1.8V_VDD

1
2
3
4
5
6
7
8
9
10
11
12

LED
EXT48IN
RSTN
REXT
VD33P
DP
DM
VS33P
XI
XO
VDD
V18

C696
4.7u/10V_6

CTRL0, CRTL 1 trace length shorter ,

and surround with GND.
The trace length difference for each card interfaces should be
smaller than 500 mil

AU6435-GDL

crystal trace width needs at least 10 mils.

C702

18p/50V_4

C1_VDDHM
DATA6
CTRL0
DATA5
CTRL2
DATA4
DATA3
DATA2
XDWPN
XDCEN
EEPDATA
EEPCLK

36
35
34
33
32
31
30
29
28
27
26
25

C1_IOP
Y7
12MHz
C703

18p/50V_4

R558
270K_4
XO

+3V
+3V

C1_IOP

DATA1

R577

33_4

SD_DAT1

DATA2

R578

33_4

SD_DAT2

DATA3
DATA2
XD_WP#
XD_CE#
EEPDATA
EEPCLK

DATA3

R579

33_4

SD_DAT3

T92
T94
T91
T93

Close to connector
2

R552

C725 0.1u/16V_4

C690 4.7u/10V_6

SD_DAT0

CTRL2

T96

SD write protect
1:decided by SDWP[Default]
0:letting SD always
write-able

CTRL0

R529

33_4

CTRL1

+1.8V_VDD

C270 2.2u/6.3V_6

33_4

CLK length should be as short as possible. Shorter than

1200 mil is good.
*0_4
XD_CD#

VCC_XD

R562

CTRL0

pin13 output 20mils

XI

DATA0
C726 *4.7u/10V_6
C724 0.1u/16V_4

13
14
15
16
17
18
19
20
21
22
23
24

XTALSEL
HID
NBMD
CTRL1
CTRL3
DATA1
DATA0

0.1u/16V_4

C700 *0.47u/10V_6
+3V

0.1u/16V_4

Close to CN14 pin 14 & pin23

4.7u CAP close to pin23

48
47
46
45
44
43
42
41
40
39
38
37

C694

VDDHM
GND
VDD
XTALSEL
HID
NBMD
CTRL1
CTRL3
DATA1
DATA0
DATA7
C1_VSSHM

*100K_4

C692

C1_V33
C1_IOP
AVDD5V
AGND5V
V33
VDDHM
VSSA_SYN
GND
VDD
CTRL4
XDCDN
SDWPEN

R559
0_4

C454

4.7u/10V_6

T95

R580

C442

*Short_4 XTALSEL

C708 close PIN48, 47

+3V

<4,10,18,19,27> PLTRST#

VCC_XD

PIN43=Power saving mode enable.

'1' for enable [Default]
'0' for disable

C743 close PIN46, 47

+1.8V_VDD

13

SD-CARD

GND1

DFHS11FR033

SD_CD#

14

Second

SD_WP

DFHS11FR011

11
12

Main

CD/SW

CARD READER Controller

AU6435-GDL

WP/SW
SW COM

GND

SD_CLK
SD_WP

C449
*10p/50V_4

+3V
C691

CTRL2

0.1u/16V_4

1/12 add by FAE's request

CTRL3

R573

33_4

SD_CMD
SD_CD#

352-(&7=4
4XDQWD&RPSXWHU,QF
Size

Document Number

Rev
1A

AU6433 CardReader
Date:
A

Monday, March 14, 2011

Sheet
E

23

of

43

LED

+3V_S5

POWER

<27>

Amber
R342

PWRLED#

100/F_4

LED3

Bule

Blue
C

R339

*1M_4

R336

*1M_4

+3VPCU
+3VPCU

Battery

Amber
LED_B/R

<27>
<27>

BATLED0#
BATLED1#

R338

300/F_4

R335

100/F_4

LED5

Blue

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

POWER/MMB/LAUNCH/LED
Date:
5

Monday, March 14, 2011

Sheet

24
1

of

35

USB

+5V_S5

C455
U9
1U/6.3V_4
D

<27>

USBON#

2
3

IN1
IN2

4
1

EN#
GND

OUT3
OUT2
OUT1

8
7
6

OC#

USBPWR1
C693
+

C465

BLUETOOTH CONNECTOR for 3.0

1000p/50V_4

+3V_S5

BT_POWER

330u/6.3V_6X5.7
2

<10> USB_OC0#

*AO3413

+ C705
*2.2u/6.3V_6

5
4
3
2
1

USBP4+_R
USBP4-_R

Q22

G547F2P81U

CN15

C706
*1000p/50V_4

T101

BT_LED

<27> BT_POWERON#

7
6

*BT_CONN

CN14
1
2
3
4

USBP1-_R
USBP1+_R
R310

*0_4

1
2
3
4

8
7
6
5

8
7
6
5

<10>
<10>

USB_MB_Turbo

R567
L57
3 3
2 2

USBP4+
USBP4-

4
1

USBP4+_R
USBP4-_R

DLW21HN900SQ2L/300mA/90ohm
R312
*0_4

1
4

USBP1+_R
USBP1-_R

RV2

RV1

*EGA-0402

*EGA-0402

2
3

1
4

2
3

USBP1+
USBP1-

4
1

*RFCMF1632100M3T/200mA/90ohm
R568
*0_4

L33
<10>
<10>

C712
*.01u/16V_4

*0_4

+5V_S5

USB/B
C446
*1u/6.3V_4
R279
*SHORT1206
C409
*1u/6.3V_4
USB_DB FFC CONN

R261

*0_4

L29
<10>
<10>

USBP9+
USBP9-

2
3

2
3

1
4

1
4

USBP9+_R
USBP9-_R

<10> USB_OC4_5#

DLW21HN900SQ2L/300mA/90ohm
R262
*0_4

USBP11-_R
USBP11+_R

R274

USBP9-_R
USBP9+_R

*0_4

L31
<10>
<10>

USBP11+
USBP11-

2
3

2
3

1
4

1
4

USBP11+_R
USBP11-_R

<27>

USBON#

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
17
1
18
CN10

DLW21HN900SQ2L/300mA/90ohm
R273
*0_4

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

USB/ BT
Date:
5

Monday, March 14, 2011

Sheet
1

25

of

35

CPU FAN

CN2

MY7
MY6
MY5
MY4
MY11
MY10
MY9
MY8
MY15
MY14
MY13
MY12

MX4
MX5
MX6
MX7

C549
2.2U_6

10K_4

<27>

VO
GND
/FON GND
GND
VSET GND

CPUFAN#

CN6

VIN

<10,11,27> SML1ALERT#
<27>

FANSIG

U17
2

3
5
6
7
8

TH_FAN_POWER

G995P1U

1
2
3

C547

C548

C546

2.2U_6

.01U_4

*.01U_4

FAN_CONN

FANPWR = 1.6*VSET
27
28
KB

+3VPCU

MX1
MX0

R385
+5V

MY3
MY2
MY1
MY0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

MX6
MX7
MY17
MY16

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0

<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>

MX3
MX2
MX4
MX5

7
8
5
6
3
4
1
2
CP6
*100p/50Vx4
7
8
5
6
3
4
1
2
CP5
*100p/50Vx4
7
8
5
6
3
4
1
2
CP4
*100p/50Vx4
7
8
5
6
3
4
1
2
CP3
*100p/50Vx4
7
8
5
6
3
4
1
2
CP2
*100p/50Vx4
7
8
5
6
3
4
1
2
CP1
*100p/50Vx4
C222 *100p/50V_4
C221 *100p/50V_4

+3V

K/B

RP3
10
9
8
7
6

TOUCHPAD & Switch CONN.

10K_10P8R
1 MX3
2 MX2
3 MX1
4 MX0
5

+5V

+5V
L20

+TPVDD

*SHORT0603
C223

HOLE

R86
10K_4

R87
10K_4

0.1u/10V_4_X7R
CN1

HOLE2
*hg-c315d110p2
7
6
8
5
9
4

HOLE21
HOLE3
*H-C197D87P2 *H-C94D94N

HOLE22
*H-O95X134D95X134N

<27>

TPDATA

<27>

TPCLK

L18
L19

C220
RIGHT#

TPDATA_R
TPCLK_R

*SHORT0603
C219

1
2
3

1
2
3
4
5
6
7
8
9
10
11
12

*SHORT0603

*.01u/25V_4
*.01u/25V_4

LEFT#

HOLE11
*H-TC256BC165D165P2

SW3
3
1

LEFT#

2
4

SW2
3
1

SWITCH_1.5

2
4

SWITCH_1.5

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

HOLE12
*H-TC256BC165D165P2
RIGHT#

HOLE6
HOLE17
HOLE10
HOLE16
HOLE7
*hg-c315d118p2 *hg-c315d118p2 *hg-c315d118p2 *hg-c315d118p2 *hg-c315d118p2
7
6 7
6 7
6 7
6 7
6
8
5 8
5 8
5 8
5 8
5
9
4 9
4 9
4 9
4 9
4

13
14

Aces 88501-120N
HOLE8
*H-TC256BC165D165P2

1
2
3

HOLE9
*hg-c315d118p2
7
6
8
5
9
4

1
2
3

1
2
3

1
2
3

HOLE13
HOLE14
HOLE15
*hg-c315d118p2 *hg-c315d118p2 *hg-c315d118p2
7
6 7
6 7
6
8
5 8
5 8
5
9
4 9
4 9
4

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

KB/FAN/TP+FP
Date:
5

Monday, March 14, 2011

Sheet
1

26

of

35

EC(KBC)

L22

PBY160808T-250Y-N/3A/25ohm_6

I/O ADDRESS SETTING(KBC)

+A3VPCU
+3V
C226

30mil

C227

0.1u/10V_4_X7R
10u/6.3V_6
+3VPCU
R108
1

E775AGND
2.2_6
2

D15

0.03A(30mils)

+3VPCU_EC

0.1u/10V_4_X7R
*.1u/16V_4

0.1u/10V_4_X7R U18

C570

C571

4.7U/6.3V_6

0.1u/10V_4_X7R

0.1u/10V_4_X7R
*.1u/16V_4

C225

VDD

4.7U/6.3V_6

C229

102

C551

AVCC

C593

VCC1
VCC2
VCC3
VCC4
VCC5

C538

19
46
76
88
115

BAS316
C573

C595

E775AGND

10u/6.3V_8 ICMNT

C605

KBRST/GPIO86

29

ECSCI/GPIO54

GPIO24/LDRQ

BAS316

EC_FPBACK#

<16> EC_FPBACK#

NOCIR#

T60
<4,10,18,19,23>

PLTRST#

<25> USBON#
<9> IRQ_SERIRQ

<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

USBON#

123

GPIO67/PWUREQ

IRQ_SERIRQ

125

SERIRQ

<28>
MBCLK
<28>
MBDATA
<10> 2ND_MBCLK
<10> 2ND_MBDATA

<8> ICH_SUSCLK

R390

*20M_6

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9/SDP_VIS
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

70
69
67
68

E775_32KX2
R398

Y4

GPIO

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

E775_32KX1

R392

GPIO65/SMI

54
55
56
57
58
59
60
61

MAINOND

*Short_4

LREST

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

TPCLK
TPDATA
PCH_ACIN

<26>
TPCLK
<26>
TPDATA
<8> PCH_ACIN
<25> BT_POWERON#
<31,32,34> MAINON
T55

GPIO10/LPCPD

72
71
10
11
12
13
77

79

GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2

NPCE781

64
95
93
94
119
109
120
65
66
15
16
17
20
21
22
23
24
25
26
27
28
91
110
112
80

TIMER

PS/2

GPIO72/IRRX1/SIN2
GPIO70/IRRX2_IRSL0
GPIO71/IRTX/SOUT2
GPIO87/CIRRXM/SIN_CR
GPIO34/CIRRXL
GPIO16/CIRTX
GPO83/SOUT_CR/XORTR
F_SDI
F_SDO
F_CS0
F_SCK

FIU

GPIO55/CLKOUT/IOX_DIN

4
L21

C550
*32.768KHz
*15p/50V_4

GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO66/G_PWM

GPIO77/SPI_DI
GPO76/SPI_DO/SHBM
GPIO75/SPI_SCK

SPI

GPIO00/32KCLKIN

*33K/F_4

GPIO01/TB2
GPIO03
GPIO06/IOX_DOUT
GPIO07
GPIO23/SCL3
GPIO30/CIRTX2
GPIO31/SDA3
GPIO32/D_PWM
GPIO33/H_PWM
GPIO36
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/CIRRXM/TRST
GPO47/SCL4
GPIO50/TDO
GPIO51
GPIO52/CIRTX2/RDY
GPIO53/SDA4
GPIO81
GPO82/TEST
GPO84/TRIST
GPIO41
GPIO56/TA1
GPIO20/TA2/IOX_DIN
GPIO14/TB1

SMB IR

GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2
GPIO25/PSCLK3
GPIO12/PSDAT3

GPIO02

101
105
106
107

LPC

PLTRST#

<11> SIO_EXT_SMI#

124

GPIO94/DA0
GPI95/DA1
GPI96/DA2
GPI97

D/A

VCC_POR

VCORF

D3

GPIO85/GA20

PBY160808T-250Y-N/3A/25ohm_6

C552
*15p/50V_4

VREF

SHBM=0: Enable shared memory with host BIOS

TEMP_MBAT <28>

WL_SW

T58

T6
T7
CPUFAN#

<26>

MBCLK
MBDATA

R92
R91

10K_4
10K_4

2ND_MBCLK
2ND_MBDATA

R88
R89

10K_4
10K_4

T61
BATLED0# <24>
BATLED1# <24>
VRON <30>
AC_OFF

+3V

T52

3G_SW

AMP_MUTE# <21> 2/17 add for throttling function

T49
T48
T47
T46

D/C#
<28>
S5_ON <29,34>
HDMI_HPD_EC# <17>

H_PROCHOT_EC

Q12
*DMN601K-7

+3VPCU

PWR/B

R26
10K_4

DNBSWON# <8>
T50
ODDLED

<4,30>

T45

CN21

+3V_S5

DNBSWON#
SUSON
SUSB#

+3V
+VCC_CORE

PWROK_EC
PLTRST#

<4,11> H_PWRGOOD

CONTRAST <16>
PCBEEP_EC <21>
PWRLED# <24>

SPI FLASH(KBC)

T54
T51

+3VPCU
U19

SPI_SDI_uR R99
RSMRST#_uR

R90

*Short_4

PWROK_EC_uR

R386

*Short_4

T53

R96

ICH_RSMRST# <8>
SUSC# <8>
PWROK_EC <8>
RF_EN <19>

7/24 modify
+3VPCU

HWPG

P_SAVE_LED#

22_4 SPI_SDI_uR_R

*100K_4

R101

10K_4

SO

SPI_SDO_uR

SI

SPI_SCK_uR

SCK

SPI_CS0#_uR

86
87
90
92

SPI_SDI_uR
SPI_SDO_uR_R
SPI_CS0#_uR
SPI_SCK_uR_R

30

ECDB_CLOCK

T43

85

VCC_POR#

R415

104

VREF_uR

R97

22_4

SPI_SDO_uR

R102

22_4

SPI_SCK_uR

R107

VDD

HOLD

C591

WP

0.1u/10V_4

CE

VSS

W25X40BVSSIG

T59

47K/F_4

*Short_4

1/13 Comfirm by vendor mail :

If the Southbridge enables 'Long Wait Abort' by
default, the flash device should be 50MHz (or faster)

HWPG(KBC)

+3VPCU

+3V

+A3VPCU
R110
10K_4

SM Bus 1

<34> HWPG_1.8V

Battery

<31> HWPG_1.05V

SM Bus 2

PCH

SM Bus 3

GPU-I2C

SM Bus 4

N/A

<32> HWPG_1.5V
<29> SYS_HWPG

D9

BAS316

D7

BAS316

D8

BAS316

D6

BAS316

D5

BAS316

HWPG

R109
*Short_4

MPWROK <4>

POWER-ON Switch(KBC)

INTERNAL KEYBOARD STRIP SET(KBC)

SW1
*DIP:TME-533B-Q-T/R

NBSWON#

MAINON <31,32,34>
VRON

<30>

1
3

+3VPCU
MY0

2
4
5
6

R393

10K_4

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Date:

Monday, March 14, 2011

*CON30_DEBUG

1
2

SPEAKER-CONN

T5

S5_ON
ICH_RSMRST#
SUSC#

HWPG

C50
*1000P/16V/X7R_4

SM BUS ARRANGEMENT TABLE

CN19

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

1
2

C36
0.1U/10V/X5R_4

<33> HWPG_GFX

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

1/10 change P/N & footprint

NBSWON#

H_PROCHOT#

SUSON <32>
FANSIG <26>

SHBM_R

75
73
74
113
14
114
111

1u/6.3V_4

NBSWON#

+3VPCU

<28>

LID591# <16>
SUSB# <8>

32
118
62
81
84
83
82

ACIN

NBSWON#

E775AGND

Power sequence

10K_4

1/13 Comfirm by vendor mail :

Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware

C539

E775AGND

R405

SHBM_R

SHBM

SML1ALERT# <10,11,26>
ICMNT <28>

SM BUS PU(KBC)

31
117
63

0.01u/16V_4

<11> SIO_RCIN#

122

97
98
99
100
108
96

121

AGND

C228
*10p/50V_4

GPIO11/CLKRUN

<11> SIO_A20GATE

<11> SIO_EXT_SCI#

A/D

GND1
GND2
GND3
GND4
GND5
GND6

*22_4

CLKRUN#

GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3
GPIO05
GPIO04

VCORF_uR 44

<8>
R106

CLK_PCI_775

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

5
18
45
78
89
116

CLK_PCI_775

3
126
127
128
1
2

103

<9,19> LPC_LFRAME#
<9,19> LPC_LAD0
<9,19> LPC_LAD1
<9,19> LPC_LAD2
<9,19> LPC_LAD3
<10> CLK_PCI_775

Rev
1A

WPCE781 & FLASH

4

Sheet
1

27

of

35

VA1

VA

1
2
3
4

PR145
0.01_0612

PD6
SBR1045SP5-13
1

PL2
HI0805R800R-00_8

PJ1

VA2

PQ29
FDD6685_G

VIN

PQ27
FDD6685_G

PC82
0.1u/50V_6

PR147
220K_4

PR144
0_4

PD5
SMAJ20A

PR146
0_4

PC6
0.1u/50V_6

PC1
2200p/50V_6

PR156
33K/F_4

PC81
0.1u/50V_6

PL1
HI0805R800R-00_8

POWER_JACK

CSIN_1

CSIP_1

PC79
2200p/50V_6

1
PD1
SW1010CPT

PR148
220K_4

D/C#

PR157
10K_4

<27>

PR149
0_4

PC78
0.1u/50V_6

PQ28
IMD2AT108
CSIN_1

2
PQ32
DMN601K-7

CSIP_1
VIN

PR9
10/F_4

PC11
1u/16V_6

PR8
10/F_4
PC14
0.1u/50V_6

27 CSIN

PC7
1u/16V_6

ISL88731_VDDP

PD7
*RB500V-40

VDDSMB

VDDP
BOOT

PR6
2.7_6
25 88731B_2

PC10
0.1u/50V_8
88731B_1

MBDATA

<27>

MBCLK

PR7
100K_4

<27>

ACIN

10
13

UGATE

24

ISL88731_UGATE

SCL

PHASE

23

ISL88731_PHASE

ACOK

LGATE

20

ISL88731_LGATE

SDA

PQ31
AON7410

PR158
0.01_0612
PL5
6.8uH

BAT-V

<27>

PC83
2200p/50V_6

3
2
1

11

VCC

PC12
0.1u/50V_6

CSSN

NC
GND
GND
GND
GND
CSSP

+3VPCU

+3VPCU

PC84
10u/25V_1206

5
21

26

1
33
32
31
30
28 CSIP

PR159
4.7_6

PR155
*4.7_6

4
PC9
0.1u/50V_6
DCIN

PGND
22

PR3
10/F_4

PR11
82.5K/F_4
88731ACSET

PC3
0.1u/50V_6
2
1
PC2
100p/50V_6

PL4
HI0805R800R-00_8

ACIN

VREF

ICOMP

PU1
ISL88731C

CSOP

18 CSOP

CSON

17 CSON

NC

16

VBF

15

GND

29

BAT-V

TEMP_MBAT <27>

PR152
100K_4

PR10
2.21K/F_4

GND

VCOMP
NC

TEMP_MBAT

PC85
2200p/50V_6

BAT-V

PC87
10u/25V_1206

PC86
10u/25V_1206

BAT-V

PR1
10/F_4

BAT-V
PR2
100_4

12

CSOP_1
PC88
*680p/50V_6

CSOP_1

PR4
*SHORT0402

NC

NC

PR153
100_4

14

10 1
2
3
4
5
6
7
9 8

ICM

5
PL3
HI0805R800R-00_8

C114F3-108A1-L_Batt_Conn

PQ30
AON7410

PC8
0.1u/50V_6

MBAT+

PR12
22K/F_4

19

DCIN

3
2
1

PR5
49.9/F_6

+3VPCU

PJ2
PC5
47p/50V_6

PC4
47p/50V_6

PC13
0.01u/50V_6
ICMNT

PR154
*SHORT_PAD_4

PR150
100_4

PR151
100_4

PC15
PC16
*1u/16V_6 0.01u/50V_6
MBCLK

<27>

MBDATA

<27>

ISL88731 thermal pad

tie to Pin12
ICMNT

<27>

PC17
*0.01u/50V_6

PU6
CM1293A-04SO

TEMP_MBAT

CH1

VN

CH2

CH4

VP

CH3

MBDATA

Quanta Computer Inc.

+3VPCU
MBCLK

PROJECT : ZQH
Size

Add ESD diode base on EC FAE suggestion

Rev
1A

Charger(ISL88731A)
Date:

Document Number

Monday, March 14, 2011

Sheet
1

28

of

35

MAIND

MAIND

SYS_SHDN#

<32,34>

SYS_SHDN#

<4,34>

Ven=7.23V

<27> SYS_HWPG

VIN

+3VPCU

VIN

VL

8223REF

+3VPCU

VIN

PGOOD

+5V_DH

21

PC66
0.1u/50V_6

UGATE1

22

BOOT1

PR107
1/F_6

+5V_B

20

PHASE1

+5V_DL

19

LGATE1

24

VOUT1

17

14

+3V_SKIP

TONSEL

+3V_TON

UGATE2

10

+3V_DH

BOOT2

+3V_B

PHASE2

11

+3V_LX

LGATE2

12

+3V_DL

PC65
0.1u/50V_6
PR106
1/F_6

PL14
2.2uH

+3VPCU
3 Volt +/- 5%
TDC : 3.7A
PEAK : 5A
OCP : 6A
Width : 120mil

+3VPCU

GND

OUT2

FB2

PR98
*4.7_6

+3V_FB

4
PC178
0.1u/50V_6
PC175
330u/6.3V_6X5.7

PC58
*680p/50V_6

PC59
*680p/50V_6

3
2
1

PQ12
AON7702

8223_EN
PR117
10K/F_4

PR126
6.81K/F_4

15

GND

ENTRIP2

25

FB1

PR248
0_4

1
2
3

PC177
0.1u/50V_6

ENTRIP1

+5V_FB

ENC

PQ11
AON7702

PR97
*4.7_6

PC174
330u/6.3V_6X5.7

PU5
RT8223M

PR125
15.4K/F_4

PQ14
AON7410

SKIPSEL

PC171
4.7u/25V_8

+5V_LX

PR243
0_4

REF

EN

23

VREG5

13

+3V_PG

VREG3

VIN

SYS_SHDN#

1
2
3
PL13
2.2uH

PR242
*0_4

PR247
0_4

+5VPCU

PQ13
AON7410

PR241
*0_4
PC165
2200p/50V_6

PR246
330K/F_4

16

PR244
*100K/F_4

+5VPCU
5 Volt +/- 5%
TDC : 5A
PEAK : 6.5A
OCP : 8A
Width : 200mil

PC183
1u/6.3V_4

3
2
1

PR245
0_4

4.7u/6.3V_6

PC181
0.1u/25V_4

8223_EN

PC63
2200p/50V_6

8223_VIN

PC170
4.7u/25V_8

PC173
100u/25V_6X5.8

18

PC182

PR239
665K/F_4

4.7u/6.3V_6

PR240
10_8

PC184

VIN

PC185
0.1u/10V_4

PR131
10K/F_4

PR249
100K/F_4

PR250
97.6K/F_4

PR251
71.5K/F_4

+5V_DL

OCP:8A
B

PC186
0.1u/50V_6

2
PD9
CHN217

L(ripple current)
=(9-5)*5/(2.2u*0.4M*9)
=2.525A
Iocp=8-(2.525/2)=6.74A
Vth=6.74A*14mOhm=94.32mV
R(Ilim)=(94.32mV*10)/10uA
~94.32K

+3V_DL

L(ripple current)
=(9-3.3)*3.3/(2.2u*0.5M*9)
~1.9A
Iocp=6-(1.9/2)=5.05A
Vth=5.05A*14mOhm=70.7mV
R(Ilim)=(70.7mV*10)/10uA
=70.7K

PR253
0_6

PR254
0_6

1
PC187
0.1u/50V_6

OCP:6A

PR252
*0_6

PR255
0_6

2
PD10
CHN217

3
PC188
0.1u/50V_6

+15V_ALWP

+15V
PR256
22_8

PC189
0.1u/50V_6

PR139
22_8

PR143
1M_6

+5VPCU

PR142
*1M_6

+5VPCU

+3VPCU

+3VPCU

PR138
22_8

VIN

5
6
7
8

PR140
1M_6

+15V

+5V_S5

5
6
7
8

+3V_S5

5
6
7
8

VIN

S5D
MAIND

PQ58
AO4468

PQ19
DMN601K-7

PC75
*2.2n/50V_4

+5V_S5

+5V_S5
TDC : 2.85A
PEAK : 3.8A
Width : 120mil

+3V_S5
TDC : 0.23
PEAK : 0.3A
Width : 20mil

+5V

+5V
TDC : 2.17A
PEAK : 2.9A
Width : 90mil

+3V

+3V
TDC : 2.66A
PEAK : 3.6A
Width : 120mil

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

SYSTEM 5V/3V (RT8206)

Date:

3
2
1

PQ18
DMN601K-7

3
2
1

+3V_S5

PQ17
DMN601K-7

PR141
1M_6

PQ56
AO4468

PQ57
AO3404

2
3
2
1

PQ16
DTC144EU

PQ15
AO4468

<27,34> S5_ON

MAIND 4

S5D

Sheet

Monday, March 14, 2011

1

29

of

35

VID 1.2875V

H_VID2

PR197

*0_4

H_VID3

+VCC_CORE
Countinue current:36A
Peak current:48A
OCP minimum 55A
Loadline=1.9mV/A (IMVP 6.5)
Rilm=1.69K

VIN

PQ41
AOL1448

*0_4

<4,8>

PR198

DELAY_VR_PWRGOOD

Connect to input caps

1

H_VID1

H_VID0

*0_4

*0_4

PR200

PR199

+3VPCU

PR55
1K/F_4
H_VID4

*0_4

H_VID6

PC120
4.7u/25V_8

PC122
PC124
4.7u/25V_8 100u/25V_6X5.8

*SHORT_PAD_4

+5V_S5

PQ43
AOL1718

PR52
649K/F_4

PR203

PR39
1.91K/F_4

+VCC_CORE

PL8
0.36uH

2/16 change for leakage

PC130
1000p/50V_4

PR236

PC121
4.7u/25V_8

PC118
0.1u/50V_6

2
1

PR193

PC179
100u/25V_6X5.8

+3V

PR35
*2.2/F_6

H_VID5

*0_4

PR195

2/16 change for leakage

+5V_S5

1
2
3

*0_4

PR196

+3VPCU

PC136
0.1u/50V_6

PC22
330u/2V_7343

PR50
*499/F_4

12
49

38

39

PR30
0_6

AGND

DRVH1

AGND

BST1

35

3212_DH1

36

3212_BOOT1
PR38
2.2_6

34

3212_SW1

31

3212_DL1

PR31
0_4
PSI#_1

41

SW1

10

VIN

VR_TT

H_VID3

<6>

H_VID4

<6>

H_VID5

<6>

H_VID6

VRON
<6> H_DPRSLPVR

PR36
100K/F_4

CPU_VID2

46

CPU_VID3

45

CPU_VID4

44

CPU_VID5

43

CPU_VID6

42
VR_ON

PR37

0_4

PR32

499/F_4

DPRSLPVR_R 40
4

<3> VR_PWRGD_CK505#
+3V

PR43

PVCC

23
B

24
PC27
150p/50V_4

3212_FB

VID1

DRVH2

VID2

BOOT2

PC135
0.1u/50V_6

PC133
4.7u/25V_8

PR49
2.2_6

VID4

DRVL2

29

3212_DL2

PGND

30

SW2

1
1

PQ46
AOL1718

VID6
EN

+VCC_CORE

PL9
0.36uH
3212_SW2

DPRSLPVR

PR54
*2.2/F_6

PC32
*1000p/50V_6

CLK_EN#

SWFB2

28

PR48

100/F_4

PR59
0_6

PR60
10/F_6

PC30
330u/2V_7343

SWFB1

SWFB3

PC128
*330u/2V_7343

3212_CS_PH2

OD3#
PWM3

PC117
0.1u/50V_6

1/12 unstuff
33

PR44

100/F_4

3212_CS_PH1
B

3212_CSSUM

19

FB

PC34
1000p/50V_4

PR61
150K/F_6

PR58
165K/F_4

PR56
150K/F_6

PC26
12p/50V_4

PC33
1000p/50V_4
COMP

CSCOMP

CSREF

RPM

13

PR204
4.99K/F_4
1
2

17

3212_CSCOMP

21

ILIM

3212_ILIM

PR57
73.2K/F_4

Short the net trace

Close to Phase 1 Inductor

PR51
1.69K/F_4
PR53
0_4

18

IMON
IREF

LLINE

PR190
220K_6 NTC

20

FBRTN

RT

15

1000p/50V_4

PC132
4.7u/25V_8

PC31
0.22u/25V_6

27

VID5

14

PC127

1
PC134
4.7u/25V_8

25 3212_BOOT2

VID3

1.65K/F_4

3212_CSREF

PC126
0.082u/16V_4
<6>

3212_DH2

26

PR45
39.2K/F_4

3212_COMP 7
3212_FBRTN

PQ48
AOL1448

4.7u/6.3V_6

CSSUM

PC28
150p/50V_4

1.91K/F_4

22

PR46

32

H_VID2

<6>

47

PC29

ADP3212

VID0

<6>

CPU_VID1

+5V_S5

PU2

TRDET#
VARFR

H_VID1

48

PC137
100u/25V_6X5.8

TTSNS

<6>

CPU_VID0

<27>

H_VID0

5.1K/F_4 8
9

11
PR47

+5V_S5

1
2
3

PC129
1
*0.01u/16V_4
<6>

7.32K/F_4

PR191

+5V_S5
*220K_6 NTC

Panasonic
ERT-J0EV474J

DRVL1

PR207

This NTC Close to Phase 1 Inductor

PC25
0.22u/25V_6

PSI#

H_PSI#

1
2
3

<6>
PQ9
*DMN601K-7

<4,27> H_PROCHOT#

PR33
10/F_6

PWRGD

VCC

PC23
2.2u/6.3V_6

1/12 stuff

RAMP

+1.05V

PC123
*330u/2V_7343

PC24
*1000p/50V_6

PH1

37

3212_VCC

PH0

PR34
10_6

*SHORT_PAD_8

1
2
3

16 3212_RAMP

CSREF

I_MON

PC131
1u/6.3V_4

PR202
*0_4

PR206
*27.4_4

+1.05V

PR210
80.6K/F_4

PR208
162K/F_4

Peak :40A ; OCP:53A (1.69K/F_4)

Peak :48A ; OCP:55A (1.74K/F_4)

PR209
69.8K/F_4

PR42
0_4
VSSSENSE <6>
VCCSENSE <6>
PR41
0_4

Quanta Computer Inc.

PR40
*27.4_4

PROJECT : ZQH
Size

+VCC_CORE

Rev
1A

+VCC_CORE ADP3212
Date:

Document Number

Monday, March 14, 2011

Sheet
1

30

of

35

[PWM]
VIN
+5V_S5

PR71
10_6

+
PD2
RB500V-40

PR79
1M/F_4

PC56
4.7u/6.3V_6
PR95
0_6

PU4
G5602

PR91
0_4

PC54
0.1u/50V_6

PQ55
AOL1448

PC57
4.7u/25V_8

PC163
*4.7u/25V_8

PC180
100u/25V_6X5.8

+1.05V
PC168
100u/25V_6X5.8

PR74
*10K/F_4

<27> HWPG_1.05V

16

TON

VOUT

VDD

FB

PGOOD

13

UGATE

12

UGATE-1.05V

11

PHASE-1.05V

PHASE
OC
VDDP

PR94
3.4K/F_4

10
9

LGATE

GND

PGND

NC

TPAD

17

14

NC

PC42
1u/16V_6

BOOT

PL12
1uH

PC48
*0.1u/50V_6

EN/DEM

PC55
1u/16V_6

PR86
2.2_6
LGATE-1.05V

4
PQ54
AOL1718

PC153
560u/2.5V

PC47
2200p/50V_6

1
2
3

+3V

15

1
2
3

<27,32,34> MAINON

PC164
2.2n/50V_4

PR96
2.2/F_6

+1.05V
1.05 Volt +/- 5%
TDC : 11A
PEAK : 15A
OCP : 18A
Width : 1320mil

PC144
*560u/2.5V

PC145
0.1u/50V_6

PC46
*1000p/50V_6

R1

PR75
4.02K/F_4

PC41
*33p/50V_6

1.05V_FB

R2

TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)
A

TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K

PR73
10K/F_4

AO1718 Rdson=3~4.3mOhm
L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)
~3.647A

PR237

0_6

PR222

0_6

RILIM=4.3mohm*18-1.823/20uA=3.477Kohm
I(choke)peak=21.647A

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

+VTT (G5602R41U)
Date:
5

Monday, March 14, 2011

Sheet
1

31

of

35

[PWM]

PC162
10u/6.3V_8
PR223
0_6

PC161
0.1u/50V_6

8207A_VBST

+0.75V_DDR_VTT

VIN

8207A_DH
PC167
10u/6.3V_8

PC166
10u/6.3V_8

8207A_LX
5

2.25A

8207A_DL

+
PC49
4.7u/25V_8

PC158
4.7u/25V_8

PC160
100u/25V_6X5.8

20

+1.5VSUS

VTTSNS

GND

DRVL

LL

DRVH

VBST

PQ53
AOL1448
PGND

18

CS_GND

17

CS

16

PU11
RT8207L

V5IN

15

V5FILT

14

PGOOD

13

PR99
7.15K/F_4

PR84
*4.7_6

+5V_S5

NC

PR100
5.1/F_6
PC61
1u/10V_4
PR102
100K/F_4

12

S5

VDDQSET

S3

11

FOR DDR III

COMP

10

NC

+5V_S5

VDDQSNS

PC62
0.033u/50V_6

0.15A

VTTREF

+SMDDR_VREF

S5_1.8V
S3_1.8V
0_6

PR101

PR228
*0_4

0_6

PC172
*33p/50V_6

PR226
10K/F_4

+1.5V_SUS
1 Volt +/- 5%
TDC : 12A
PEAK : 16A
OCP : 18A
Width : 480mil

PC60
1u/10V_4

PQ51
AOL1718
PC45
*680p/50V_6

PC150
560u/2.5V

+3V
HWPG_1.5V <27>

PR225
620K/F_4

PR238

PL11
1uH
+1.5VSUS

1
2
3

MODE

PC159
2200p/50V_6

VTTGND

VLDOIN

VTT

GND

1
2
3

19

22

21

23

25

24

VIN (For RT8207A

SUSON

<27>

MAINON

<27,31,34>

400KHZ ) close to pc2008

+5V_S5

Vout = (PR150/PR149) X 0.75 + 0.75

S5_1.8V

PR227
10K/F_4

PR224
*0_4

AO1718 Rdson=3.8~4.3mOhm
L(ripple current)
=(19-1.5)*1.5/(1u*400k*19)
~3.454A
Vtrip= (18-3.454/2)*4.3mohm=0.0699V
RILIM=Vtrip/10u=6.997K

8207A_SET

S3_1.8V

5
6
7
8

+1.5VSUS

<29,34> MAIND

MAIND

4
PQ59
AO4468

S5

+1.5VSUS

REF

ON

ON

VTT
ON

S3

ON

ON

OFF

S4/S5

OFF

OFF

OFF

3
2
1

S3
S0

+1.5V

2.03A
A

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Rev
1A

DDR 1.5V(RT8207A)
Date:
5

Sheet

Monday, March 14, 2011

1

32

of

35

Int_VGA

[PWM]

<6> GFX_VID0
<6> GFX_VID1

+1.05V

+1.05V

<6> GFX_VID2

OCP:25A
Ri=2.49K
Change Ri can adjust OCP point
LL=7.03mv/A
Rdroop=8.87K
Change Rdroop can adjust loadline

<6> GFX_VID3
1

PR78
*0_4

<6> GFX_VID4

PR76
*0_4

PR70
*0_4

PR69
*0_4

PR67
*0_4

PR65
*0_4

PR64
*0_4

<6> GFX_VID5
<6> GFX_VID6

PC149
*0.01u/25V_4
2
1

62881_GND

<6>

GFX_ON

<6> GFX_DPRSLPVR

GFX_VID6

PR215

100K_4

PR217

0_4

PR81

0_4

GFX_VID5

GFX_VID4

GFX_VID3

GFX_VID2

GFX_VID1

GFX_VID0

PR221
0_6

47K/F_4

PR87

8.06K/F_4

62881VW

1
2

PC141
2.2n/50V_4

GFX_VID0

21

OCP:25A
22A

+5V_S5

RBIAS

VID0

20

PQ50
AOL1448

VW

VCCP

+VGFX_AXG

19

PR88
8.87K/F_4

PQ49
AOL1718

15 62881UGATE

PR62
*2.2/F_4
+

BOOT

PR213
3.65K/F_4

PR63
1_6
62881BOOT

PC38
0.22u/25V_6

PR66
2.61K/F_4

PC142
560u/2.5V

PR211
10K_6_NTC

PR68

PR77
*10K/F_4

GFX_IMON <6>
11K/F_4

PC44
*0.22u/10V_4
PC40
0.15U/10V_4

VSS_AXG_SENSE <6>

62881_GND
PR214

PC151
0.1u/10V_4

VIN

*SHORT_PAD_4
PC148
0.22u/25V_6
62881_GND

PC36
10u/6.3V_8

Close to Phase
Inductor

*2.2n/50V_4

1000p/50V_4

PC143
560u/2.5V

PC35

GFX_IMON

62881_GND

14

IMON
13

VIN
12
62881VIN

VDD

ISUM-

11

PC155

62881VDD

62881RTN

10

PC157
330p/50V_4

62881ISUM+

PC156
330p/50V_4

150p/50V_4

RTN

Rdroop

PC52

ISUM+

UGATE
VSEN

62881ISUM-

62881VSEN

16 62881PHASE

VSSP

FB

PL10
0.56uH

17

ISL62881HRTZ-T

18 62881LGATE

LGATE

PU3

COMP

PHASE

PC51
100P/50V_4

4.7u/6.3V_6
62881COMP 5

62881FB

4.7u/25V_8

62881RBIAS

PC50
22p/50V_4

17.8K/F_4

PC140

PC37

1000p/50V_4

PR93

GFX_VID2

GFX_VID3

VID2

VID3

VID4

VID5

VID6

VID1

GFX_VID1

PGOOD

VR_ON

CLK_EN#

PC53

PR92
820K/F_4

4.7u/25V_8

5/26 modify power budget

1
2
3
PR219

PC138

1
2
3

62881_GND
PR218
*150K/F_4
62881_GND

PC139
0.1u/50V_6

22

GFX_VID4

23

24

GFX_VID5

62881VR_ON

GFX_VID6

25

26

29

28
DPRSLPVR

GND

1
62881PGOOD

GND

PR90
0_4

GND

PR89
*100K_4

<27> HWPG_GFX

31

30

+3V

27

62881DPRSLPVR

62881_GND

VIN

62881_GND

PC147
*0.1u/10V_4

62881_GND

+5V_S5

Ri

PC154
*180P/50V_4

PR216
2.49K/F_4

PR212
10_6
PC152
1u/6.3V_4

PR220
*100/F_4

62881_GND

2
PR72
82.5/F_4

PC43
0.01u/25V_4

Close to Pin9 and Pin10

Parallel

PR82

10/F_4

PR80
0_4
VSS_AXG_SENSE <6>
4

PR85

10/F_4

PR83
0_4
VCC_AXG_SENSE <6>

Quanta Computer Inc.

PROJECT : ZQH
Size
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
A

Document Number

Rev
1A

+VGFX_AXG (ISL62881)
Date:

Monday, March 14, 2011

33

Sheet
H

of

35

1.76A

PQ60
AO4468

+1.8V

8
7
6
5

PC190
10u/6.3V_8

+3V_S5
PC191
0.1u/25V_6

PU12
G9334

PC193
10u/6.3V_8

DRV

FB

EN

VCC

HWPG_1.8V <27>
MAINON

MAINON <27,31,32>

+5VPCU

PR260
47/F_6

Rh

PGD

GND

Rg

PR259
100/F_4

PR257
100K_4

PR258
261/F_4

PC192
10u/6.3V_8

+3V_S5

1
2
3

+1.8V
1.8 Volt +/- 5%
TDC : 0.76A
PEAK : 1.01A
Width : 40mil

PC195

PC194
0.1u/25V_6

PR261
*100K_4

33n/50V_6

Vout1 = (1+Rg/Rh)*0.5

For EC control thermal protection (output 3.3V)

VIN
PU10B
LM393
PD8
SW1010CPT

VIN

+3V

+0.75V_DDR_VTT

+5V

+1.5V

+1.8V

+15V

PR205
1M_6

Thermal protection

PQ45
AO3409

PR128
1M_4

PR118
22_8

PR119
22_8

PR121
22_8

PR120
22_8

PR122
*22_8

PR123
1M_4

VL

Need fine tune

for thermal protect point

PQ22
DMN601K-7

PQ24
*DMN601K-7

PQ25
DMN601K-7

PC68
*2.2n/50V_4

2
PQ23
DMN601K-7

2
PQ21
DMN601K-7

2
PQ20
DMN601K-7

<4,29>

PC125
0.1u/50V_6

PR189
200K/F_4

2
PQ39
DMN601K-7

PU10A
LM393

PC119
0.1u/50V_6

2.469V

Note placement position

S5_ON

<29,32>

PR194
200K_6
PR188
1.54K/F_4

PR187
10K_6_NTC

PR136
1M_4

PR127
*100K/F_6

VL
SYS_SHDN#

PQ26
DTC144EU

<27,31,32> MAINON

PR201
SHORT0603

PQ44
DTC144EU

MAIND

S5_ON 2

<27,29> S5_ON

2
PQ40
DMN601K-7

PR192
200K/F_4
A

MAIND

MAINON_ON_G

Quanta Computer Inc.

PROJECT : ZQH
Size

Document Number

Date:

Monday, March 14, 2011

Rev
1A

Discharge/1.8V)
5

34
Sheet
1 7/7 modify

of

35