Imaging the Heart with Ultrasound

Low-Power Receive-Electronics for a Miniature 3D Ultrasound Probe

Zili Yu
Electronic Instrumentation Laboratory
Delft University of Technology

Bits&Chips Hardware Conference 2012

Introduction
Heart Diseases
No.1 cause of death globally. (World Health Organization 2011)

In 2008, about 17.3 million people died from heart diseases, representing 30% of the global death.

Accurate diagnosis is of vital importance!!

Echocardiography
use ultrasound to visualize the inner structure of the heart.

Safe, low cost and good quality.

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Echocardiography Basics
Two Types of Echocardiography:
Trans-Thoracic Echocardiography (TTE) outside the body attenuation due to the ribs and lungs, etc.

Trans-Esophageal Echocardiography (TEE)

(Available by http://en.wikipedia.org)

inside the body less attenuation

Imaging Principle
Tx Rx
Control
& Signal processing

Display

Electrical Domain

energy

Mechanical Domain
symbol

Piezoelectric transducer

From 2D to 3D

1D array

2D plane slow small element count

2D array (matrix)

3D volume fast large element count

3D Trans-Esophageal Echocardiography (TEE)

Challenges: Size Temperature Interconnection
Hierachical design:

1 eurocent

(1) A proper system partitioning. (2) An optimal signal processing algorithm.

Limited space (L: 2 cm, W: 1 cm, H: 1 cm)
Large number of elements (> 2000 elements)

(3) Simple and low-power circuit implementation.

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System Partitioning
Separation of Transmit (Tx) and Receive (Rx) transducers

Low voltage echo signal ( < 1Vrms ) Rx Tx

High voltage pulses (>100V)

Both Tx and Rx transducers can be optimized for their specific roles. Protection circuitry is no longer needed.

System Block Diagram

Receive-Signal Features
Typical signal level: 10V ~ 100mV Frequency: several MHz. Dynamic range: 80dB, time-gain-compensation (TGC) is needed. Time delay: signals should be aligned in time-domain.

A D G

B E H

C F I

Dynamic Range

Time Delay
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Rx Signal Processing Architecture

To reduce the design complexity, simplifications are made in the timegain-compensation (TGC) scheme and micro-beamforming methodology.

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The Time-Gain-Compensation Scheme

Ideal compensation:

Very fine gain steps

Complicated electronics.

Four-step compensation: Discrete gain settings (0dB/12dB/26dB/40dB).

Timing is determined by an external control signal (2-bit control). Very simple electronics!
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Micro-beamforming Scheme

Delay division: a coarse delay, common for all elements of a group, and a fine delay for each individual element within a group.

Pre-steering is applied in such a way that all groups get the same delay pattern, which has the advantage that the delay-control circuit can be shared among all groups.

Example: Delay profile for a 99 matrix transducer.

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LNA and TGC Amplifier

LNA

Single transistor implementation

TGC amplifier

Differential pair with source degeneration

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TGC Amplifier

V/I converter I/V converter Source follower

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Gain=2RL/RS

0dB/12dB/26dB/40dB

TGC Amplifier: Simple V/I Converter

Conventional transconductance stage with source degeneration

i=GmVin =Vin [gm/(1+gmRS)] Vin Vin/RS

when RS >> 1/gm

RS

Accurate V/I conversion requires either a high value for Rs or gm.

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TGC Amplifier: Accurate V/I Conversion

IS1

Trans-conductance stage with CASFVF structure [1]

Feedback loop boosts gm1 by a factor of gm2ro2
Vcm

Vin

M1 M3 Vout

Vbias

Minimize the parasitic capacitance by careful layout.

M2

iout

CASFVF: CAScoded-Flipped-Voltage-Follower
[1] J.Ramirez-Angulo, S.G. Ivan Padilla, et al., Comparison of Conventional and New Flipped Voltage Structure With Increased Input/Output Swing and Current Sourcing/Sinking Capabilities, IEEE International Midwest Symposium on Circuits and Systems, pp.1276-1291, 2005.

CC

IS2

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TGC Amplifier: Kelvin Switches

Eliminate the errors due to the ON-resistance of the MOS switches.

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TGC Amplifier: I/V Conversion

Cascoded current mirrors are used to reduce gain errors due to channel length modulation.

Gain=2RL/RS
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TGC Amplifier: Measurement Results

Die micrograph and layout of the prototype

Gain measurement for 4 gain settings (4.5 MHz ~ 7.5 MHz) Gain error less than 1 dB for all settings.

Input referred noise voltage < 50 Vrms (4.5 MHz ~ 7.5 MHz, 40 dB gain setting).
Power consumption: 130 W when driving a 250 fF load.
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Micro-Beamformer: Design Choices

Analog beamforming vs. Digital beamforming

Digital beamformer requires an ADC for every transducer element power hungry! In our design, analog beamforming is employed.

Digital Beamformer

Analog Beamformer

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Analog Delay Line

Types of analog delay lines:

CCD principle difficult to implement in a standard CMOS process.

Cascaded filter cells with constant group delays Gain errors with the filter cells accumulate and result in different gains for different delay settings.

Our design choice: an analog delay line using the pipeline-operated sample-and-hold principle [1].

[1] T.K. Song, J.F. Greenleaf, Ultrasonic dynamic focusing using an analog FIFO and asynchronous sampling, IEEE Transaction s on Ultrasonics, Ferroelectrics and Frequency Control, vol. 41, no. 3, pp.326-332, 1994.

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Pipeline-Operated S/H Delay Line

Nyquist law Settling time Maximum delay Parallel processing

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Analog -beamformer with current domain summation

A beamforming cell with V/I converter

Die micrograph

480 W per delay line

Measured delay function Measured beamforming function
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Analog -beamformer with charge-domain summation

A 9-channel beamformer with charge domain summation

Die micrograph

2.4 mW for 9 channels

Measured delay function Measured summation function

270 W per delay line

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Ultrasound Receiver Realization: 9-channel Receiver

Block diagram of the 9-channel Receiver IC

Die Micrograph

500 W per channel

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Transducer-to-ASIC Interconnection Method

Piezo-electric transducer

Ground foil
Electrical conductive glue Buffer layer Silicon chip with matrix pattern pads

Illustration of the interconnection scheme

Matrix transducer built on a test chip

Complete transducer-to-ASIC interconnection structure Impedance measurement

Good yield has been achieved!

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Conclusions
Solutions
system level design signal processing methodology circuit implementation Interconnection design

Evaluations
Simulations Measurement of prototypes

Outlook
optimization integration

simple & flexible!

Proof of concept

Goal: a fully functional 3D TEE probe!

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Acknowledgements
Oldelft Ultrasound B.V.
Biomedical Engineering Department, Erasmus MC

Research group Acoustical Imaging, TU Delft

Electronic Instrumentation Lab, TU Delft

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