Registers

By : Eng. Lina

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2008 The McGraw-Hill Companies, Inc. All rights reserved.

Benefits of registers

Flip-flops are limited because they can store only one bit. Most computers work with integers and single-precision floatingpoint numbers that are 32 /64-bits long. A register is an extension of a flip-flop that can store multiple bits. Registers are commonly used as temporary storage in a processor. They are faster and more convenient than main memory. More registers can help speed up complex calculations.

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A basic register

Basic registers are easy to build. Registers are made using multiple flip-flops . We can store multiple bits just by putting a bunch of flipflops together! A 4-bit register is shown on the right, and its internal implementation is below. This register uses D flip-flops its easy to store data without worrying about flip-flop input equations. All the flip-flops share a common CLK and CLR (RESET) signals.

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Registers

Another way to represent a 4-bit register I0 You could see the timing diagram in the following Slide .

D R D R

A0

I1

A1

I2

D R

A2

I3 CLK
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D R

A3

Reset

Registers CLK I3

I0

D R

A0

I2
I1 I0 A3 A2 A1 A0
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I1

D R

A1

I2

D R

A2

I3
Note: New data has to go in with every clock 5

D R

A3

CLK Reset

Adding a parallel load operation

The input D3-D0 is copied to the output Q3-Q0 on every clock cycle. How can we store the current value for more than one cycle? Lets add a load input signal LD to the register. If LD = 0, the register keeps its current contents. If LD = 1, the register stores a new value, taken from inputs D3-D0.

LD 0 1

Q(t+1) Q(t) D3-D0

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Shift Register

The binary information in a register can be - in addition to storing-can be moved from stage to stage within the register or into or out of the register upon application of clock pulses. This type of bit movement or shifting is essential for certain arithmetic and logic operations used in microprocessors. Shift Register :a group of FFs arranged so that binary numbers stored in the FFs can be shifted from one FF to the next FF, for every clock pulse.

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Shift registers

A shift register shifts its output once every clock cycle.

Q0(t+1) = SI Q1(t+1) = Q0(t) Q2(t+1) = Q1(t) Q3(t+1) = Q2(t)

SI is an input that supplies a new bit to shift into the register. For example, if on some positive clock edge we have: SI = 1 Q0-Q3 = 0110 then the next state will be: Q0-Q3 = 1011

The current Q3 (0 in this example) will be lost on the next cycle.

8

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Shift direction
Q0(t+1) = SI Q1(t+1) = Q0(t) Q2(t+1) = Q1(t) Q3(t+1) = Q2(t)

The circuit and example make it look like the register shifts right.
Present Q0-Q3 ABCD SI X Next Q0-Q3 XABC

But it really depends on your interpretation of the bits. If you consider Q3 to be the most significant bit instead, then the register is shifting in the opposite direction!
Present Q3-Q0 DCBA SI X Next Q3-Q0 CBAX

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Shift Registers Classification

Shift registers can be classified into: Shift right registers. Shift left registers. Serial in/Serial out shift registers. Serial in/Parallel out shift registers. Parallel in/Serial out shift registers. Parallel in/Parallel out shift registers. Universal shift registers.

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Serial/Parallel Data Conversion

Shift registers can be used to convert from serialto-parallel or the reverse from parallel-to-serial.

Parallel out Parallel out

Serial in

10 01 10 01 11 11 11 1 1 1 0 1 0 1 1 1 1
Parallel in

Serial out Serial out

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2008 The McGraw-Hill Companies, Inc. All rights reserved.

QUIZ
Q#1This represents a ___ register. Q#2This represents a ___ register. Q#3This represents a ___ register. Q#4- This represents a ___ register. a. Parallel-in, parallel-out a. Parallel-in, parallel-out a. Parallel-in, serial a. Parallel-in, serialout out b. Serial-in, parallel-out b. Serial-in, serial-out b. parallel-out b. Serial-in, Parallel-in, parallel-out
ANS: serial-in parallel-out ANS: serial-in serial-out ANS: parallel-in serial-out ANS: parallel-in parallel-out

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2008 The McGraw-Hill Companies, Inc. All rights reserved.

Serial-in / Parallel-output Shift Register

1 1 0 0 0 1 0 1
Inputs here: Clock input: (1) Data Clock Pulse 2 3 4 6 7 Positive-edge Clock Pulse 1 5 8 (2) Clock Clear input: triggering (3) Clear Active = 0 =1 0 Clear Deactivated = 1
Data = =0 1 Data

Parallel outputs here. Order= A B C D

4-bit serial-in parallel out shift right shift register

Note the use of D FFs. Clock (CLK) inputs wired in parallel. Clear (CLR) inputs can be activated with LOW or disabled with HIGH. Preset (PS) inputs deactivated.
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2008 The McGraw-Hill Companies, Inc. All rights reserved.

QUIZ
QUESTION #7 #2 #3 #4 #6 #5 QUESTION #1 What is the 4-bit output (bit A on left, D on right) after pulse 6? 1? 2? 3? 5? 4? This is a ___ type shift register. A. Serial-in, parallel out A: Serial-in, parallel-out A: 0100 1000 1100 0000 A: 0010 1001 B. Parallel-in, serial-out

Data Data = =1 1 0 0 Data Data = 1 Clock ClockPulse Pulse Pulse 2 4 3 Clock Clock Pulse 6 5 1 Clear Clear Clear = = =1 1 1 Clear 0

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2008 The McGraw-Hill Companies, Inc. All rights reserved.

Serial input / Serial output Shift Registers

4-Bit Shift Register

Serial SI D Input

SO Serial Output

CLK

Serial Input

Serial Output

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Serial input / Serial output Shift Registers Q3 D Q D Q Q2 D Q Q1 D Q Q0

SI

SO

CLK
CLK SI Q3 Q2 Q1
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How SISO Shift register work

In order to get the data out of the register, they must be shifted out serially. This can be done destructively or non-destructively. For destructive readout, the original data is lost and at the end of the read cycle, all flip-flops are reset to zero.

How SISO Shift register work

To avoid the loss of data, an arrangement for a non-destructive reading can be done by adding two AND gates, an OR gate and an inverter to the system. The construction of this circuit is shown below. Read =0 Write= 1

The data is loaded to the register when the control line is HIGH =1 (i.e WRITE).
The data can be shifted out of the register when the control line is LOW (ie READ).

Serial data transfer

One application of shift registers is converting between serial data and parallel data. Computers typically work with multiple-bit quantities. ASCII text characters are 8 bits long. Integers, single-precision floating-point numbers, and screen pixels are up to 32 bits long. But sometimes its necessary to send or receive data serially, or one bit at a time. Some examples include: Input devices such as keyboards and mice. Output devices like printers. Any serial port, USB or Firewire device transfers data serially.

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Receiving serial data

To receive serial data using a shift register: The serial device is connected to the registers SI input. The shift register outputs Q3-Q0 are connected to the computer. The serial device transmits one bit of data per clock cycle. These bits go into the SI input of the shift register. After four clock cycles, the shift register will hold a four-bit word. The computer then reads all four bits at once from the Q3-Q0 outputs.

serial device

computer
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Sending data serially

To send data serially with a shift register, you do the opposite: The CPU is connected to the registers D inputs. The shift output (Q3 in this case) is connected to the serial device. The computer first stores a four-bit word in the register, in one cycle. The serial device can then read the shift output. One bit appears on Q3 on each clock cycle. After four cycles, the entire four-bit word will have been sent.

computer

serial device

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COUNTERS

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Counters

A Counter : is a register that goes through a prescribed series of states It stores (and sometimes displays) the number of times a particular event or process has occurred, often in relationship to a clock signal. the flip-flop s values themselves, serves as the output in a counter. The output value increases by one on each clock cycle. After the largest value, the output wraps around back to 0. Using two bits, wed get something like this:
Present State A B 0 0 1 1 0 1 0 1 Next State A B 0 1 1 0 1 0 1 0

00 1 11

01 1

10

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Benefits of counters

Counters can act as simple clocks to keep track of time. You may need to record how many times something has happened. How many bits have been sent or received? How many steps have been performed in some computation? All processors contain a program counter, or PC. Common tasks of counter Count up or down Increment or decrement count Divide frequency As temporary memory Applications: COUNTERS Watches Clocks Alarms Web browser refresh
SYNCHRONOUS

ASYNCHRONOUS

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Classifications of Counters

Asynchronous Counters

Only the first flip-flop is clocked by an external clock. All

subsequent flip-flops are clocked by the output of the preceding flip-flop. Asynchronous counters are slower than synchronous counters because of the delay in the transmission of the pulses from flipflop to flip-flop. Asynchronous counters are also called ripple-counters because of the way the clock pulse ripples it way through the flip-flops.

Synchronous Counters

All flip-flops are simultaneously clocked by an external clock. Synchronous counters are faster than asynchronous counters

because of the simultaneous clocking. Synchronous counters are an example of a state machines design.

Characteristics of Counters
Binary counter Counter that follows a binary sequence N bit binary counter counts in binary from n to 2n-1

Number of bits (4-bit, 8-bit, etc.) Maximum count 4 bit = 24 = 0000 to 1111 in binary 8 bit = 28 = 0000 0000 to 1111 1111 in binary Modulus of counter-number of states Decade counter 4-bit 8-bit Up or down counter

QUIZ
1. A 4-bit counter will count from binary 0000 to __________. 1111

2. Counters can be designed to count up or downward or devised to be self-stopping. (True or False)

True

Ripple Counter
In Ripple Counters :
All the states of the FF do not change at the same time. When the output state of the preceding FF changes it will trigger the next state to change. due to the way the FFs respond one after another it is a kind of rippling effect.

Ripple Counter
Binary Output

Clock Input

0 0 1 1 0 1 0 1

Pulse 8 1 2 3 4 5 6 7

All J-K PS and CLR inputs This On flip-flops the 4-bit next counter clock has pulse 16(8) states all FFs and in the are each willwill count toggle from because binary 0000 will through receive 1111 TOGGLE MODE INACTIVE a H-to-L and then pulsereset one back after to 0000. another. Watch Thethe counter counthas ripple a modulus thru the ofcounter. 16.

Ripple Counter With Waveforms

Binary Output Clock Input

0 1 0 0 1 0 1

Pulse 5 1 2 3 4

Clock input
FFs triggered on 1s output H-to-L pulse. CLK toggles 1s FF. 1s FF toggles 2s FF. 2s output 2s FF toggles 4s FF. 4s output

QUIZ
Q#1After pulse 1 the output of the ripple Q#2After pulse 2 the output of the ripple Q#3After pulse 8 the output of the ripple Q#4After pulse 15 the output of the ripple counter will be binary ___. counter will be binary ___. counter counterwill willbe bebinary binary___. ___.

0 0 0 1 0 0 1 0 0 1 0 1
Input Pulse PulsePulses 15 1 2 8