[ ]

Acceptor() Accessibility Acoustic Boundary Layer activation energy ADC(Automatic Defect Classification) Adhesion Adsorption AIII-BV, III-V, semiconductors ALCVD Align () P . . The extent to which facilities are barrier free and useable by persons with disabilities, including wheelchair users. The layer that shields a surface from being cleaned. This layer thickness is a function of the frequency and the viscosity of the fluid. defines reaction kinetics of the process; expressed in units of eV. Defects found by wafer inspection systems are classified by the system into several categories based on their physical and optical properties. The molecular attraction exerted between the surfaces of unlike bodies in contact. Adsorption is a surface phenomenon that some products exhibit, whereby they form a physiochemical bond with substances. Not to be confused with absorption. III-V semiconductors are synthesized using elements from 3rd and 5th group of periodic table; e.g. GaAs, GaP, GaN, GaAlAs. Atomic Layer Chemical Vapor Deposition A processing tool used to transfer lithographic patterns from a photomask to a silicon wafer. Four types of aligners are in use within Harris: contact, proximity, projection, and steppers. Contact aligners were the earliest type, and have the disadvantage of bringing the photomask in direct contact with the wafer, thereby inviting particulate contamination. The other types avoid direct mask contact and bring increasing line-width control and resolution. See also lithography, mask and stepper. . . . etch in which etch rate in the directional normal to the surface is mucl higher than in direction paralle to the surfacelno undercutting.

Aligner

Alloy Aluminum()

anisotropic etching

anisotropic etching lateral distortion of pattern is minimized;needed to define very tight geometries. A baking process AAA baking process typically used to incorporate doping atoms into the silicon crystal lattice. Positive elektrode of an electric discharge Atmospheric Pressure CVD refers to systems whose deposition environments operate at or near atmospheric pressure. Typically, wafers are placed horizontally on belt-driven flat susceptors which move through the deposition zone. Belt speed and gas flow determine the film thickness. 193 nm wavelength; suitable for 150 nm (0.15 micron) geometry exposure. 193 nm wavelength; suitable for 150 nm (0.15 micron) geometry exposure. Deep UV PHST base polymer ArF resist ArF resist . ArF resist , dry , developer . aromatic ring 193 nm alicyclic group metha- crylate polymer . The film phototool(s) to be installed into the dieset creating the circuit image. The ratio of depth to width of a via or contact structure. process of chemical vapor deposition carried out at atmospheric pressure; typically results in the inferior film quality and conformality of coating as compared to Low Pressure CVD (LPCVD). dopant atoms evaporating from semiconductor surface region during high temperature treatments can be reintroduced into semicondutor causing undesired variations in dopant concentration at the surface; highly undesired in high-temperature epitaxial deposition processes.

Annealing Anode

APCVD

ArF excimer laser ArF excimer laser

ArF resist

ARTWORK Aspect Ratio Atmospheric Pressure CVD, APCVD

autodoping

breakdown due to current increase caused by avalanche multiplication of charge carriers. generation of electron-hole pairs due to impact ionization in a depleted region of a semiconductor (e.g. in a reverse-biased p-n junction)which avalanche multiplication causes other impact ionization events thus further increasing the number of carriers. avalanche breakdown B/W MONITORS Black and White monitors for viewing images taken by CCD cameras.

Barrier Bias

A physical layer designed to prevent intermixing of the layers above and below the barrier layer PR An IC technology combining the linearity and speed advantages of bipolar and the low-power advantages of CMOS on a single IC. BiCMOS can operate at either ECL (emitter-coupled-logic) or TTL (transistortransistor-logic) levels, and is ideal for mixed-signal devices. BiCMOS is a successor to CMOS which in turn has been a successor to MOS and bipolar circuits. A general term to refer to bipolar and MOS on one chip. Sometimes used interchangeably with BiCMOS. ,, , . NPN PNP . A structural feature produced as a result of the lifting of the edges of the nitride layer during subsequent oxidation. This feature can lead to problems during LOCOS The area surrounding the core plasma in a fusion reactor. The fusion reactor blanket is packed with tritium breeder containing lithium, and produces tritium based on a reaction between the neutrons produced by nuclear fusion and the lithium. The energy of the neutrons becomes heat energy inside the blanket and is extracted for use in power generation, etc. The blanket also plays the role of shielding radiation output from the fusion reactor. fundamental relationship describing transport of free carriers in semiconductors. fundamental relationship describing transport of free carriers in semiconductors. a layer in contact with solid surfaces immersed in gaseous of liquid medium; within boundary layer characteristics of the medium are different than in its bulk. BPSG is an oxide primarily used as a field dielectric. It is deposited in a PECVD reactor using a mixture of SiH4, B2H6, and PH3 with N2O in a temperature and pressure controlled environment. BPSG is used principally because of its lower melting point (viscous flow temperature) compared to other oxides.

BiCMOS

BiMOS

Bipolar Trabsistor

Bird's Beak

Blanket

Boltzmann transport equation Boltzmann transport equation boundary layer

BPSG

BPSG BPSG can be deposited over delineated polysilicon and can flow at temperatures low enough to not significantly alter the dopant profiles in the underlying device silicon. This smoothing improves metal-level step coverage. BPSG is not a good passivation material because it is hydroscopic in nature. A defect in which two adjacent areas connect because of misprocessing such as poor lithography, particle contamination, under-develop, or etch problems. A conductive region between two less conductive regions. A measure of the misalignment between adjacent scan areas when using the vector scan technique. An electrical device which stores electrical charge or energy. . Name of the negative electrode of an electrical discharge. The low pressure portion of a low frequency wave creates a small bubble or cavity in the solution. These bubbles are filled with vapor and are oscillated by the sonic energy. These bubbles collapse resulting in cavitation. Cavitation has sufficient power to overcome the particle to substrate adhesion forces. The threshold pressure required to initiate cavitation is a strong function of the pulse width and the power input. Charged Coupled Device (referring to hardware in cameras that convert grey scale data to video images). Critical Dimension is the width of a patterned line or the distance between two lines of the sub-micron sized circuits in a chip. A type of Scanning Electron Microscope used to measure critical dimension. The region separating the source and drain of a field-effect transistor (FET). The channel is designed to be normally "on" (conducting) for depletion-mode FETs, or normally "off" (insulating) for enhancementmode FETs. With the application of a voltage to the gate electrode, the conducting properties of the channel are altered, thereby controlling the current across the channel. The length of the channel is an important parameter in determining the current of the FET, as well as its speed. See also drain, gate, and source.

Bridge Burried Contact Butting Error capacitor Carrier cathode

Cavitation

CCD CCD(charge coupled device) CD(Critical Dimension) CD-SEM

channel

Charge carrier chuck Cleaning Cluster Tool

CMOS

A device which holds and often heats a wafer during CVD or etch processing. Removal of unwanted material (residues, polymers) from the wafer surface. A tool capable of performing a series of processes on a wafer using between two and five individual process chambers and an automated wafer loading and transfer mechanism. P- Channel N-Channel transistor IC Chemical Mechanical Polishing is a process that uses an abrasive, corrosive slurry to physically grind flat the microscopic topographic features on a partly processed wafer (planarization) so that subsequent processes can begin from a flat surface. Colours used in printing to reproduce colour photos. The colours are Cyan, Magenta, Yellow, and Black, or Key Colour. Equipment used to spin photoresist onto wafers An aqueous solution that contains fine particles. When an acid is added the particles become charged and can form regular patterns (Coulombkristalle). A substance that is capable of burning, but has a flash point greater than 37.8C (100F). Contrast flammable. A material which efficiently transfers an electrical charge because it has a excess of unbound electrons and easily gives them up In an oxide layer, a metal "wire" that allows electrical connection between metal and silicon layers. These are typically made of tungsten metal. See also interconnect.

CMP

CMYK coater Colloidal Suspension

combustible

conductor

contact plug

a process where vias and trenches are etched into insulating material. Copper Damascene/Dual Copper is then filled into all the vias and trenches and sanded back so Damascene the conducting materials are only left in the vias and trenches. corrosive cryogenic aerosol A gas or liquid that will produce a irreversible degenerative chemical reaction when combined with other materials. high velocity frozen particles of inert gases such as CO2 and Ar; used to remove particles from the wafer surface.

CVD

Chemical Vapor Deposition; the most common thin film deposition method in advanced semiconductor manufacturing; deposited species are formed as a results of chemical reaction between gaseous reactants at elevated temperature in the vicinity of the substrate; solid product of the reaction is deposited on the surface of the substrate; used to deposit films of semiconductors (crystalline and non-crystalline), insulators as well as metals; variations of CVD processes include Atmospheric Pressure CVD (APCVD), Low Pressure CVD (LPCVD)and Plasma Enhanced CVD (EPCVD). The Czochralski or CZ crystal growth technique is the most frequently used method for producing large single crystals of silicon (also germanium or gallium-arsenide). In the CZ method a cylindrical single crystal is pulled vertically from silicon melt in a heated crucible.

Czochralski

The growth is initiated by dipping a small seed crystal in the melt, and after the thermal equilibrium is reached, the crystal is pulled upwards so that it grows with a constant diameter. At the same time, the crystal rod and the crucible are rotated in opposite directions. These crystal rods are cut into thin wafers and processed to be used in integrated circuit (IC) manufacturing.

Damascene

An integrated circuit process where a metal conductor pattern is embedded in a dielectric film on the silicon substrate, resulting in a planar interconnection layer. The creation of a damascene structure most often involves chemical mechanical polishing of a nonplanar surface resulting from multiple process steps. The opaque background area surrounding clear geometries on a photomask. a model describing kinetics of thermal oxidation of silicon for oxides thicker than about 30 nm; based on chemical reaction between silicon and oxidizing species; assumes surface reaction controlled oxide growth in early stage of oxidation (linear regime) and controlled by diffusion of oxidizing species through the oxide during extended oxidation (parabolic regime); one among the best established models in silicon processing. defines the distance in semiconductor over which local electric field affects distribution of free charge carriers; decreases with increasing concentration of free charge carriers.

dark dield

Deal - Grove model

Debye length

Depletion Layer

Deposition

Developer DI water DI water DI water

In a semiconductor, a region in which the charge-carrier charge density is not sufficient to neutralize the net fixed-charge density of donors and acceptors. The next layer on the wafer. In chemical vapor deposition, gaseous or vaporous chemicals are used to deposit a thin film on a wafer surface. Physical vapor deposition uses a high voltage electrical charge to attract a thin layer of material from a target, usually metal, onto the wafers surface. 1 : equipment that uses liquids to remove exposed positive photoresist from wafers or substrates. 2 : the liquid used to remove exposed positive resist. Ultra-pure water which has had unwanted ions removed, such as calcium and magnesium. Ultra-pure water which has had unwanted ions removed, such as calcium and magnesium. Ultra-pure water which has had unwanted ions removed, such as calcium and magnesium. A flammable corrosive liquid used in the CVD process to create silicon dioxide and silicon nitride and the growth of epitaxial silicon layers. Dichlorosilane is a Chlorine containing material and will react to any contact with moisture to form Hydrochloric Acid. time needed by a semiconductor to return to electrical neutrality after carrier injection or extraction. The process of baking or bonding new thin layers onto the silicon wafer. This is done using diffusion furnaces, high-pressure oxidation and rapid thermal processing. To make weaker by adding water or some other liquid . P N . The initial planning of engineering experiments in order to minimize cost, reduce experimental errors, and ensure statistical validity of the results. A plus or minus deviation from a defined reference plane wherein the required resolution for photolithography is still achievable. Also known as Depth of Field N . . .

dichlorosilane(H2SiCl2)

dielectric relaxation time Diffusion Dilute Diode() DOE(Design of Experiments) DOF(Depth of Focus)

Donor

Dopants

3 5 , Conductivity type

Doping

P N ION IMPLANTATION , dopant . ion implantation dose , dose . , (FET) most-often a plasma process used to remove photoresist and residues from the wafer surface. etching process carried out in the gas-phaselcan be either purely chemical(plasma etching),purely physical(ion millin) or combination of both(Reactive Ion Etching) Common name for plasmas that, besides electrons and ions, contain macroscopic particles of nanometer to micrometer size. As a rule, such particles are negatively charged. Particles of 10 micron diameter can carry 5,000 elementary charges. By their electrical interaction these highly charged particles can form a liquid or solid state (plasma crystal). The master pattern or reticle used in DUV projection lithography (generally, wavelengths between 248 nm and 193 nm). The mask contains the pattern that is to be printed on the wafer, usually magnified at 4X. high density plasma generated using Electron Cyclotron Resonance; used in etching applications. The lithography equipment which uses an optical system to expose the resist on a photomask blank. The diffusion of electrons in electric fields set up in the lead while the circuit is in operation. It occurs in aluminum and is exhibited as a field nature, not as a process defect. The metal thins and eventually separates completely, causing an opening in the circuit.

Dose Drain Dry Celan dry etching

Dusty Plasma

DUV Mask

ECR plasma Electro Mask

Electromigaration

. . a direct-write lithography technique using a beam of electrons to expose Electron Beam lithography resist on a wafer. Electron 1 : image mask used in conjunction with E-beam exposure tools; generally of two types: stencil, which is used with proximity E-beam and cell projection tools, and scatterer, which is used with projection E-beam tools (for example, SCALPEL).2 : a photomask produced on an E-beam mask writer to differentiate from a mask produced with other tools. A deposition process in which metals are removed from a chemical solution and deposited on a charged surface.

Electron Beam Mask

electroplating

Electrostatic

Electrostatic Discharge

ellipsometer

An electrical characteristic typically used here with reference to attractive forces or electrical discharge through a spark 1 : a sudden electric current flow, such as between a human body and a metal oxide semiconductor semiconductor, with potential damage to the component. 2 : the transfer of electrostatic charge between bodies at different electrostatic potentials Equipment used to measure the thickness and refractive index of dielectric films. 1 . 2NPN , PNP ,NPN N+ N+ In packaging, the process of sealing or covering a circuit for mechanical and environmental protection. . . N . process in which thin layer of single crystal material is deposited on single crystal substrate; epitaxial growth occurs in such way that the crystallographic structure of the substrate is reproduced in the growing material; also crystalline defects of the substrate are reproduced in the growing material. process of chemical vapor deposition in which species to be deposited are generated in plasma; as a result deposition using the same source gases is taking place at lower wafer temperature then in conventional CVD in which high temperature is needed to break bonds and to release desired species from input gases; somewhat lower film quality than in the case of pure thermal Low Pressure Chemical vapor Deposition (LPCVD). 1 : a sudden electric current flow, such as between a human body and a metal oxide semiconductor semiconductor, with potential damage to the component. 2 : the transfer of electrostatic charge between bodies at different electrostatic potentials etching is taking place preferentially in one direction; key requirement in definition of very fine geometrical features. one material is etchied at much higher rate than others. material featuring drastically different etch characteristics than material to be etched; layer of "etch stop" material is placed underneath etched material to stop etching process.

Emitter

encapsulation Epitaxial

epitaxy

epitaxy by CVD

ESD(electrostatic Discharge)

etch anisotropy etch selectivity Etch stop

evaporation

common technique used to deposit thin film materials; material to be deposited is heated in vacuum, 10-6 Torr - 10-7 Torr range, until it melts and starts evaporating; vapor of material is condensing on the cooler substrate exposed to the vapor; common technique in thin film metal deposition; not suitable for high melting point materials. The process of using heat (either an electric filament or an electron beam) and high-vacuum (between 5x10-5 Torr and 1x10-7 Torr) to to vaporize a metal source. The evaporating source material condenses on the surface of the cooler wafers. chemical laser; lasers capable of generating very shortwavelength (below 200 nm) UV radiation; e.g. KrF (248 nm), ArF (193 nm), F2 (157 nm); feature very highly uniform beam (uniformity of intensity across the beam diameter); commonly used a source of UV in ultra-high resolution photolithography.

evaporation

excimer laser

panel exposure area A setup parameter that allows the operator to choose which side to EXPOSURE SIDE expose; Top, Bottom, or Both. . FET(Field Effect Transistor) , . . Bonding of chips with contact pads, face down, by solder bump Flip Chip connections Low pressure gas discharge in a mixture of the rare gas argon and mercury vapour. In the positive column of this discharge, the mercury Fluorescent tube atom is excited by electron impact to emit ultraviolet radiation. A layer of luminescent material on the inner tube wall converts the UV-radiation to visible light. Low pressure gas discharge in a mixture of the rare gas argon and mercury vapour. In the positive column of this discharge, the mercury Fluorescent tube atom is excited by electron impact to emit ultraviolet radiation. A layer of luminescent material on the inner tube wall converts the UV-radiation to visible light. reduces dielectric constant (positive impact if lower k is the goal); fluorine in SiO2 facilitates boron penetration (negative impact). Food Dispense A technique used to dispense substance onto a wafer. EXPOSURE AREA g - line lithography photolithography using 436 nm wavelength UV radiation for exposure.

GaAs-on-Si

Epitaxial growth of GaAs on Si using an interface layer with lattice structure between GaAs and Si (e.g. strontium titanate - a dielectric which bonds to to both the GaAs and Si featuring lattice structure halfway between the two; allows integration of Si based IC technology (electronic functions)with GaAs based optical devices(photonic functions)as well as makes available large diameter GaAs substrates for any other device application. III-V compound semiconductor, after silicon second the most common semiconductor, energy gap Eg = 1.43 eV - direct, crystal structure - zinc blend, lattice constant 0.565 nm, index of refraction 3.3, density 5.32 g/cm3, dielectric constant 12.9, intrinsic carrier concentration 2.1 x 106 cm-3, mobility of electrons and holes at 300 K - 8500 and 400 cm2/V-s, thermal conductivity 0.46 W/cm-oC, thermal expansion coefficient 6.86 x 10-6 1/oC; thermally unstable above 600 oC due to As evaporation; does not form sufficient quality native oxide, due to direct bandgap commonly used to fabricate light emitting devices, also foundation of the variety of high-speed devices; bandgap can be readily engineered by forming ternary compound based on GaAs, e.g. AlGaAs, mechanically fragile. In glass tubes filled with a gas at low pressure (below 10 mbar) an electric current can flow at moderate applied voltages (500 - 1,000 V), which causes intense luminous phenomena. Such gas discharges are widely used e.g. as neon tubes. see also: fluorescent tube. metal (conductor)-oxide structure part of the MOS structure in MOSFETs. boundary between grains in pollyctrystalline material. P/N . A type of beam used for electron lithography techniques. Normally one fourth the smallest pattern dimension. Term used to describe the communication of the exposure system to adjacent in line equipment. Heat treatment of a wafer after develop to fully harden the photoresist prior to etch. Contrast soft bake. A high performance transistor typically used in GaAs or SiGe technologies. High Density Plasma

gallium arsenide, GaAs

Gas Discharge

Gate() gate stack grain boundary Grow junction Guassian round beam HAND SHAKE hard bake HBT(Heterostructure Bipolar Transistor) helicon plasma

HEMT(High Electron Mobility Transistor) Hole Hydrocarbon i - line lithography

A high performance transistor typically used in GaAs or InP technologies. . . An organic chemical composed only of hydrogen and carbon. Gaseous or volatile hydrocarbons are flammable. photolithography using 365 nm wavelength for exposure. conventional resist , cresol movolak resin i-line diazonaphtaquinone compound(DNQ) photoactive conpound(PAC) . Novolak resist novolak DNQ PAC DNQ acid resist . Refers to the light source required by the CCD cameras for artwork target focus and clarity. during ion implantation accelerated ions collide with host atoms and displace them from their original lattice sites; after implantation crystallographic order of the implanted material is being restored by an anneal at the temperature of 800 oC and higher. kinetic energy of implanted ions established through acceleration determines depth of solid penetration by the ions. Refers to material produced within a company or organisation. Eg. Not using outside services. A soft metal element used for p-type doping in ion implant processes. . . dielectric material (insulator)in between adjacent interconnect metal lines in multilevel metallization scheme in advanced very high packing density integrated circuits, ILD should feature as low dielectric constant as possible to avoid capacitive coupling, and thus, "cross talk" between metal lines. ( .)

i-line resist

ILLUMINATOR

implantation damage

implantation energy In house Indium Ingot()

inter-layer, inter-level dielectric, ILD

Ion

lithography technique in which resist is exosed by accelerated ions; due ion beam lithography, IBL to the limited scattering of ions in the resist IBL may offer higher resolution than e-beam lithography. ions accelerated toward solid surface penetrate solid up to certain depth (see "projected range") determined by ion energy; used to introduce ion implantation dopants, to form buried layers and to modify solid surfaces; the most common technique of dopant introduction in advanced semiconductor manufacturing.

ionization energy

Isolation Isotropic etch Junction Junction Transistor killer defect KrF excimer laser

energy needed to ionize dopant atom in semiconductor, i.e. to have dopant atom to release one free electron (donor) or one free hole (acceptor). . IR . etch in which rate of etching reaction is the same in any direction; nondirectional N P . P/N . FET . material or device layout defect causing catastrophic failure of the device 248 nm wavelength; suitable for 180 nm (0.18 (m) exposure. Deep UV resist (chemically amplified) resist , resist 100% resist protecting-deprotecting . IBM resist PHST(polyhydroxystyrene) resin photoacid generator(PAG) contrast . resist PAG t-BOC protecting group deprotecting post expo- sure bake (PEB) . Irving Langmuir developed a method, to determine electron temperature and density from the current-voltage characteristic of small additional electrodes in plasma discharges. This technique is used in many variations to diagnose laboratory and space plasmas. a condition that can occur in CMOS where Parasitic NPN and PNP Transistors are both Conducting and remain Conduction once the disturbance that started the Conduction is removed. a Transistor of any type where Conduction is along the top surface of the Semiconductor. Example are Lateral PNP, Lateral DMOS, Lateral SCR, etc.

KrF resist

Langmuir Probe

latch Up

Lateral

A geometric effect which occurs in lithography methods involving a mask. As the radiation source is concentrated in a single point, and the mask is seperated from the substrate, the angle at which the radiation passes through the mask differs. In the center of the wafer, the radiation Lateral Magnificaion Error is perpendicular to the wafer, but out towards the edges of the wafer the angle is acute. Therefore, a general enlargement of the features takes place, with features further out from the center being enlarged more than features closer in. Another geometric effect in such systems is shadow printing. lithography a process in which a masked pattern is projected onto a photosensitive coating that covers a substrate. Also called photolithography. LOCal Oxidation of Silicon - oxidation of selected areas of a silicon wafer by masking off the oxidation reaction from other regions. A thin uniform silicon dioxide, SiO2, layer is initially formed and then a layer of silicon nitride, Si3N4, is deposited. The silicon nitride is photolithographically patterned and then a relatively thick silicon dioxide layer is grown in the openings in the silicon nitride. The silicon nitride blocks oxidation wherever silicon nitride is present. Following oxidation the silicon nitride layer is stripped off the wafer. The thin initial silicon dioxide layer is used to prevent stress from direct contact between silicon and silicon nitride. LOCOS is widely used to isolated MOSFETs with minimum linewidths >350nanometers. dielectric material featuring dielectric constant k lower than 3.9 which is k of SiO2; used to insulate adjacent metal lines (interlayer dielectric, ILD) in advance microdevices; low k reduces capacitive coupling ("cross talk") between lines. ( ). N . . . PR . ,,, . A method of cleaning or etching through which the liquid media being employed is mechanically agitated with frequency acoustic energy to improve control or to accelerate the process. Megasonics are used in some wet benches.

LOCOS

low-k dielectric, low k

Majority Carrier

Mask

megasonic

MEMS

metalization Micron

A set of technologies that uses microelectronic techniques to fabricate a wide range of devices on a microscopic scale. Such devices may include structures such as filters, channels or wells with electrodes, to more complex devices such as actuators and sensors with embedded electronics. The use of sputtering or CVD processes to create conductors by applying a thin layer of metal (usually aluminum) to a device. . 1 .

microwave plasma, MW plasma generated using microwave frequency signal; typically 2.45 GHz. plasma Minority Carrier P minority carrier A type of charge carrier constituting less than one-half of the total charge-carrier concentration (for example, electrons in p-type material). Contrast majority carrier. The velocity of a charged particle attained under the action of an applied electric field. Units are cm2/V-sec. A method to produce epitaxial wafers containing Gallium (Ga), Arsenic (As), Indium (In), Phosphorus (P) and Aluminium (Al). The MOCVD process is used commercially to prepare semiconductor devices such as GaAs, InAs, and others. In the process an organo-metallic precursor, contained in a stainless steel bubbler, is brought into the vapor state, usually by heating, and then transported via an inert carrier gas to a hot substrate surface where it decomposes forming an epitaxial coating of the metal, metal oxide, or metal nitride on the substrate. The organic portion of the organo-metallic passes out of the reaction zone as a gas. Metal Oxide Semiconductor . . A unit of measure equaling 1/1,000,000,000 (one billionth) of a meter used in the measurement of the wavelength of light. A unit of measure equaling 1/1,000,000,000 (one billionth) of a meter used in the measurement of the wavelength of light. A toxic gas used as a fluoride source in plasma processes, for etching polysilicon, silicon nitride, tungsten silicide and tungsten films, and for cleaning of CVD chambers. A nontoxic, nonflammable, mildly oxidizing gas used in combination with silane for CVD of silicon nitride layers.

mobility

MOCVD

MOS MOSFET nanometer nanometer nitrogen trifluoride nitrous oxide

N-Type

. N V . . In semiconductor terms referencing the production of silicon dioxide: When a material combines at high temperature (> 800F) with oxygen at a molecular level to produce a third material. Silicon dioxide, a dielectric, or non-conducting film, grown or deposited on the surface of a wafer.. An insulating film applied to the surface of a wafer. No definition at the current time P N pieces of various materials (silicon, silica, skin flakes, colonies of bacteria, etc.) present in the process environment; even ultra-small particles(<0.1 (m) on the Si surface may cause catastrophic damage; no effort is spared to prevent particle contamination (clean-room technology); most commonly removed by APM clean. instrument used to measure number of particles in the volume of air or process gas or number of particles per unit area of the semiconductor wafer. The data describing the circuit layout. The size measure of shapes in the circuit layout. A thin plastic sheet mounted a short distance away from the surface of a reticule to insure that any microscopic dust that settles on the reticle will be out of focus during exposure and not create defects.

Oxidation

oxide Oxide Etching P/N Junction, P/N

particle

particle counter Pattern Data Pattern Dimension pellicle

a mask that uses regions of shifted phase to improve stepper imaging performance. Resolution is improved to some extent, but it is generally phase shifting mask(PSM) viewed as a technique for improving depth of focus. Phosphine(PH) Phosphorus(P) Phosphorus Oxychloride(POCI) [SEMATECH] Also called phase shift mask. IC N Polymer, Solvent, Sensitizer . Sensitizer Polymer .

Photo Resist

Photo Resist Pattern , Pin Hole . A tool that offers a unique, hybrid approach to OPC that combines the benefits of rules- and model-based OPC in order to apply the optimal amount of OPC for photomask manufacturability and wafer yield. It integrates Numerical's hybrid OPC engine with the CATS(TM) MDP tool, the industry standard for manufacturing data preparation, and a multithreading capability. mask used in photolithography to block resist exposure in selected areas; consists of chrome opaque areas supported by very high quality quartz plate transparent to UV radiation. a photomask having an opaque background and transparent images. a photomask that maintains the same geometric orientation of the array on its surface as that of a referenced photomask, but is of the opposite polarity, as a correct positive mask to a correct negative mask. A correct negative mask is a reverse polarity mask of a correct positive mask. 1 : an operation in which patterns or images are produced on a glass plate to create a mask. [SEMATECH] 2 : the practice of photolithography. [SEMATECH] 3 : the name of an area or a group that performs photolithography.[SEMATECH] . PR PR . The dieset. A device that holds the phototool a photomask having transparent background and opaque images. 1 : minute defect or void in a film, mask, or photoresist, usually the result of contaminants. 2 : a small opening that extends through a covering, such as a photoresist coating or an oxide layer on a wafer. Smoothing or milling the surface of a wafer device layer. See CMP. Plasma chemistry makes extensive use of the fact that chemical reactions in the gas phase or at surfaces can occur at low process temperature when the atoms are excited by a gas discharge.

Photolynx

photomask photomask negative

photomask,reverse polarity

photomasking

Photoresist,PR PHOTOTOOL FIXTURE phtomask positive

pinhole

Planarization

Plasma Chemistry

Plasma Enhanced Chemical Vapor Deposition, PECVD Plasma Etching Plasma Immersion Ion Implantation, PIII PMS

process of chemical vapor deposition carried out at atmospheric pressure; typically results in the inferior film quality and conformality of coating as compared to Low Pressure CVD (LPCVD). The use of energised gases to chemically remove a surface. terms describing plasma processing mode in which wafer is located away from plasma, and hence, is not directly exposed to plasma; desired reactions are implemented by directing plasma generated species toward the wafer. Abbreviation for the "Pantone Matching System". The printing industries special colour standard. The basic structure formed by the intimate contact of p-type and n-type semiconductors. The important characteristic of a p-n junction is that it will conduct electric current with one polarity of applied voltage (forward bias) but will not conduct with the opposite polarity (reverse bias).

p-n junction

Poisson equation polishing Positive Column

fundamental relationship defining potential and electric field distribution in semiconductor. process applied to either reduce roughness of the wafer surface or to remove excess material from the surface; typically mechanical-chemical process using chemically reactive slurry. This is the self-sustaining part of a gas discharge, where ionisation by electron impact is balanced by diffusion losses. , PR.

Positive PR( PR)

P-Type Radio Frequency, RF, plasma raster scan

. AZ-1350 PR. . P- 4 3-A . plasma generated using microwave frequency signal; typically 2.45 GHz. scanning mode in which beam is moving back and forth over the entire substrate and turned on over designated area and then turned off until it will arrive at the next designated area. variation of plasma etching in which during etching semiconductor wafer is placed in the RF powered electrode; wafer takes on potential which accelerateds etching species extacted drom plasma toward the etched surfacelchemical etching reaction is preferentially taking place in the direction normal to the surface.

Reactive Ion Etching

Reactive Ion Etching etching is more anisotropic than in plasma ethcing but is less selectivity; leaves etched surface damaged;the most common ethcing mode in semiconductor manufacturing recipe The computer program, rules, specifications, operations, and procedures performed each time to produce a wafer that contains functional die. Examples are the setup recipe and the process recipe. A silicon wafer that has been processed, then stripped, sometimes polished, and then cleaned; can be reprocessed for a different use. See also test wafer. terms describing plasma processing mode in which wafer is located away from plasma, and hence, is not directly exposed to plasma; desired reactions are implemented by directing plasma generated species toward the wafer. the post-etch polymers on the wafer left after a post-etch process such as STI-etch, gate-etch, metal-etch, via-etch, trench-etch, and contactetch the removal of all remaining residues left on the wafer after the implant or etch process. on a wafer, the loss of adhesion of a resist coating to its substrate.[SEMI P3-90] Also called photo lifting. on a wafer,buildup of a resist in round,multicolored rings; generated by particles or bubble bursts. resolution enhancement techniques a very flat glass plate that contains the patterns to be reproduced on a wafer; the image may be equal to or larger than the final projected image. Typical reticle substrate material is quartz, and typical magnifications are 10, 5, and 1 times final size. The reticle is used in a stepper. [SEMATECH] rapid thermal chemical vapor deposition. The practice of cleaning a silicon wafer surface by oxidizing the surface and completely removing the oxide layer by etching and thereby removing surface contaminants. Scattering with Angular Limitations Projection Electron Beam Lithography. standard centimeter cube per minute; 1 cm3 of gas per minute at 0 oC and atmospheric pressure; a unit of gas flow in semiconductor equipment.</textarea>

reclaim wafer

remote plasma, downstream plasma

Residue Residue Removal resist lifting Resist rings RET

reticle

RTCVD sacrificial etchback SCALPEL sccm

Shadow Printing

A geometric effect which occurs in lithography methods involving a mask. If the exposing radiation cannot be tightly focused, then a small zone of "shadow" is created at the edges of surface features which is only partially exposed. This effect reduces the attainable resolution of such lithography systems. Another geometric effect in such systems is lateral magnification error. A film compound of silicon with a refractory metal. Common silicide semiconductor films (used as interconnects) include tantalum, tungsten, titanium and molybdenum. dielectric material with energy gap = 5 eV and density ~3.0 g/cm3; excellent mask (barrier) against oxidation of Si; commonlly used in silicon integrated circuit manufacturing primarily in LOCOS process; not used as a gate dielectric due to inferior interface with silicon and bulk defects; properties depend on deposition method: dielectric strength ~107 V/cm, dielectric constant k ~6-7, bulk resistivity 1015-1017 ohmcm. low-k material used as interlayer dielectric (ILD) with copper metallization; type of semiconductor resin; spin-on, aromatic hydrocarbon polymer with a k value of 2.65; features high glass transition temperature and excellent resistance to copper migration. semiconductor dielectric resins; polymer low dielectric constant (k=2.65) material; fluorine-free; thermal stability >450 oC. a liquid containing suspended abrasive component; used for lapping, polishing and grinding of solid surfaces; common in CMP process. Heat treatment of resist-coated wafers (typically at 80-100 C) to drive off solvents before the wafer is exposed. Contrast hard bake. This consists of a soft varnish, which does not dry completely. The etcher draws on a piece of paper applied to the plate which has been soaked in this product. The varnish sticks to the paper in those places where drawing strokes have been made. When the paper is removed the varnish is thereby removed from the plate in those areas. The action of an acid on the plate produces a soft and sensitive image in printing. related terms: soft-ground, lift-ground etching. A novel substrate for high-performance, low-power, and radiation-hard CMOS applications that offers process simplification, improved scalability, latch-up free and soft-error free operation, improved subthreshold slope, and drastic reduction in parasitic capacitances.

Silicide

silicon nitride, Si3N4

SiLK

SiLK

slurry

soft bake

Soft varnish

SOI

SOI See also SIMOX and bonded process. . , , , . Although not a strictly correct definition, in this context a product (aqueous or organic) designed to clean a component or assembly by dissolving the contaminants present on its surface. FET . A technique used to coat wafers with a given substance. The substance is first dispensed onto the wafer by way of flood dispense or spread dispense. The wafer can either be stationary (see static dispense) or moving (see dynamic dispense). Once the substance has been dispensed, the wafer is spun up to high speed and the substance spreads evenly and dries. The higher the spin acceleration, the more uniform the coating. Alternatives include: vapor priming (in some cases). Use of ion bombardment to remove a film from the surface a wafer.

Solid State Solid State Electronic Solvent Source

Spin Coating

sputter etch

resist exposure mode in lithographic processes in which the same step and repeat projection pattern exposed on the surface of the wafer in the series of consecutive exposures instead of the exposure of the entire wafer. Step Coverage The ratio of the thickness of a film along its walls to the thickness at the bottom of the step. Photo equipment used to transfer a reticle pattern onto a wafer. Because of its limited field of view, low throughput, and high cost, such equipment is usually used only for feature size smaller than 1.5 microns, where resolution and line-width control are critical. Most of Harris' advanced wafer processes use steppers for maximum dimensional control. A process to isolate transistors or isolate the field area. The process involves etching trenches between the transistors and growing a CVD oxide inside of the trenches. It is widely replacing the LOCOS technique as geometries shrink. See STI Diagram. a structure comprising of several epitaxial layers of lattice mismatched materials thin enough to avoid formation of dislocation (pseudomorphic films); strain affects electronic properties of materials involved; by controlling thickness of each film and its chemical composition the SLS structures can be designed to perform several unusual electronic and photonic functions in various device configurations. Exposure material.

Stepper

STI(Shallow Junction Isolation)

Strained layer supperlattice, SLS

SUBSTRATE

TEOS

Tetraethyl Orthosilicate, Si(OC2H5)4; gaseous compound commonly used in CVD SiO2 processes; good conformality of coating; relatively inert material, liquid at room temperature; thermally decomposes at around 700 oC to form SiO2; plasma enhancement lowers temperature of deposition to below 500 oC. 1 : a wafer that is exposed to all of the conditions of process characterization, including, but not limited to, actual etch conditions or actual film deposition conditions. Also called monitor wafer. 2 : a silicon wafer suitable for process monitoring during semiconductor manufacturing. See also reclaim wafer. growth of native oxide of the solid through oxidation of solid surface at elevated temperature; results from chemical reaction of solid's atoms with oxygen containing species; thermal oxidation of silicon results in a very high quality silicon dioxide, SiO2, formed on the silicon surface; most other semiconductors do not form device quality thermal oxide. dielectric material featuring dielectric constant k=20-85. A unit of measure for the pressure exerted by 1 mm of mercury, equal to 1/760th of standard atmospheric pressure .

Test wafer

thermal oxidation, thermal oxide

titanium oxide, TiO3 torr

"Transfer Resistor" . , , . A deeply etched area used to isolate one area from another or to form a trench storage capacitor on a silicon wafer. Highly disordered state of a fluid or plasma containing a large number of Turbulence interacting eddies or waves Unipolar Transistor FET . UV Lamp The ultra-violet (Hg-Xe) lamp used in the lamphouse. UV WINDOW UV light blocking window Used to sense a vacuum at the vacuum cups to ensure the panel is held VACUUM CUP SENSORS correctly. High energy protons and electrons from the solar wind are trapped in Van Allen Radiation Belt the Earth's magnetic field by the mirror effect and form two belts at altitudes between 1,000 and 25,000 km. Transistor A technique used to coat wafers with a given substance. The substance is first vaporized, and then the wafer is exposed to the vapor. Advantages are more efficient use of substance, decreased contamination from particles in original solution, and that multiple wafer can be coated simultaneously. Alternatives include: spin coating.

vapor priming

variable shape beam vector scan Via

volatile memory

wet etching

scanning mode in e-beam lithoghraphy in which shape of the beam is changing depending on the geometry of exposed area. scanning mode in which beam in moving only within areas which are to be scanned. Holes through dielectric layers, opened by etching. Metal will be deposited in the via to form a plug and create an interconnect between two metal lines. A memory device that does not retain stored information when power is interrupted. Examples include DRAM's and SRAM's. Contrast nonvolatile memory. ethcing process in semiconductor processing relying on chemical reaction in the liquid phaselhighly isotropic but can be very selective.liquid phase lithography method using X-ray to exposed the resist; due to shorter wavelength of X-ray radiation (0.4 - 4 nm) allows higher resolution than photolithography which uses longerwavelength UV irradiation; requires special mask and resists. -ray lithography , E-beam lithography optical lithography , Post-optical lithography . , . optical lithography X-ray lithography . X-ray lithography , . 1972 MIT H.Smith NTT, SORTEC , IBM mask used in X-ray lithography; uses gold as an opaque material, gold pattern (defined using e-beam lithography) is supported by a thin membrane made out of material transparent to X-rays of given wavelength, e.g. Si3N4, SiC and others, which is supported at the edges by properly etched Si wafer. in semiconductor industry synonymous with "manufacturing yield", i.e. number defining percentage of operational devices out of all devices manufactured. potential of solid surface interacting with ambient featuring specific chemical composition.

X-ray lithography

X-Ray Lithography

X-ray mask

yield zeta potential :