VHDL CODE FOR COUNTER ON 7-SEGMENT

INTRODUCTION
The 7 segment display allows us to provide information to the user. Fig. below shows the 4 digit 7 segment displays. A seven-segment display, or seven-segment indicator, is a form of electronic display device for displaying decimal numerals that is an alternative to the more complex dot-matrix displays. Seven-segment displays are widely used in digital clocks, electronic meters, and other electronic devices for displaying numerical information. A seven segment display, as its name indicates, is composed of seven elements. Individually on or off, they can be combined to produce simplified representations of the arabic numerals. The seven segments are arranged as a rectangle of two vertical segments on each side with one horizontal segment on the top, middle, and bottom.

Figure 1.1 7-Segment Display Seven segment display detail and cathode pattern to display the Decimal digits. The segments of a 7-segment display are referred to by the letters A to G, as shown in Fig.

THE 7-SEGMENT DISPLAY FORMAT

In practice current limiting resistors of about 470 to 220O ohms would be connected in series between the decoder/driver chip and each LED display segment to limit the maximum current flow. Different display decoders or drivers are available for the different types of
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VHDL CODE FOR COUNTER ON 7-SEGMENT display available, e.g. 74LS48 for common-cathode LED types, 74LS47 for common-anode LED types, or the CMOS CD4543 for liquid crystal display (LCD) types. Liquid crystal displays (LCDs) have one major advantage over similar LED types in that they consume much less power and nowadays, both LCD and LED displays are combined together to form larger Dot-Matrix Alphanumeric type displays which can show letters and characters as well as numbers in standard Red or Tri-colour outputs. Presently, the price drop of LCDs tend to overtake the market, there are a still few applications for which these devices are more suited. For large numeric displays, like clocks, railway station displays, low -cost measuring devices or very stressing environments the led based displays are better, and cheaper. The most simple led display available is the seven segment display, it consists of 7 led rectangular boxes called 'segments' and are arranged forming the number 8, because of its simple construction it is very robust and can function in very low or high temperatures, can withstand vibrations, mechanical shocks without problems, for what the LCD would fail to work or even get permanently damaged. If we look at one digit we can see 10pins each segment and the small dot are LEDs, each of them has one terminal connected to a common pin, from this comes the name common anode or common cathode, and the other terminal is connected to a standalone pin, since the common pin is doubled, we have the 10 pins for each digit. Lets take as example the common anode type, to light the segments we need to connect the positive supply rail to the common pin, and pull to ground the segments, each segment depending on its size can handle a few miliamps, after all we are talking about LEDs not bulbs. Thats fine if you need just one number to display, but how can these digits be connected to form a multi-digit display? The first approach is to connect each segment to a micro-controller pin, this way for each digit you need 8 pins and isnt elegant at all. The other solution is to connect each corresponding segment from the digits to a common bus, and power the digits one at a time, thus multiplexing the data.

The individual segments of a seven-segment display. A seven segment display, as its name indicates, is composed of seven elements. Individually on or off, they can be combined to produce simplified representations of the Arabic numerals. Often the seven segments are
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VHDL CODE FOR COUNTER ON 7-SEGMENT arranged in an oblique (slanted) arrangement, which aids readability. In most applications, the seven segments are of nearly uniform shape and size (usually elongated hexagons, though trapezoids and rectangles can also be used), though in the case of adding machines, the vertical segments are longer and more oddly shaped at the ends in an effort to further enhance readability. Each of the numbers 0, 6, 7 and 9 may be represented by two or more different glyphs on seven-segment displays. LED-based 7-segment display showing the 16 hex digits.The seven segments are arranged as a rectangle of two vertical segments on each side with one horizontal segment on the top, middle, and bottom. Additionally, the seventh segment bisects the rectangle horizontally. There are also fourteen-segment displays and sixteen-segment displays (for full alphanumeric); however, these have mostly been replaced by dot-matrix displays.

Figure 1.2 Decimal Numbers The segments of a 7-segment display are referred to by the letters A to G, as shown to the right, where the optional DP decimal point (an "eighth segment") is used for the display of non-integer numbers. The animation to the left cycles through the common glyphs of the ten decimal numerals and the six hexadecimal "letter digits" (AF). It is an image sequence of a "LED" display, which is described technology-wise in the following section. Notice the variation between uppercase and lowercase letters for AF; this is done to obtain a unique, unambiguous shape for each letter (otherwise, a capital D would look identical to an 0 (or less likely O) and a capital B would look identical to an 8). Seven segments are, effectively, the fewest required to represent each of the ten Hindu-Arabic numerals with a distinct and recognizable glyph. Bloggers have experimented with six-segment and even five-segment displays with such novel shapes as curves, angular blocks and serifs for segments; however,

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VHDL CODE FOR COUNTER ON 7-SEGMENT these often require complicated and/or non-uniform shapes and sometimes create unrecognizable glyphs.

Figure 1.3 7-Segment Display Format for Common Anode As illustrated in the figure, each digit of the display has 7 segments called a, b, c, d, e, f, g as well as a decimal point dp. In fact every segment (and the decimal point) is an LED (light emitting diode). Consequently, every digit consists of 8 diodes. The two terminals of an LED are called the anode and the cathode. In the 7 segment display all of the anodes are tied together. So to light up a segment, we have to supply a positive voltage to the anode and Gnd to the respective cathode.

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VHDL CODE FOR COUNTER ON 7-SEGMENT

OPERATION OF SEVEN SEGMENT

Figure 2.1 Driver Circuit diagram for 7-Segment Display The decoder block converts the given input signal into an 8 line code corresponding to the a to g segments and the decimal point which controls the segments to display the desired number. For example if the line corresponding to f and e are activated then segments f and e of the display glows indicating a 1. If the input quantity is an anal ogue signal then it must be converter into digital format using an ADC before applying to the decoder. If the input signal is digital then there is no need for the ADC and the decoder alone will convert the particular input code into the 8 line code compatible to the seven segment LED display. The purpose of the driver stage is to provide the necessary current drive in order to drive the LED seven segment display. If the decoder stage is powerful enough to drive the display, then the driver stage is not required. A typical 7 segment display driver stage consists of an array (8 nos ) transistor or FET based switches. For example consider the line a . The a output of the decoder is connected to the input terminal (base/gate) of the corresponding switching element inside the driver stage. The same line is buffered by the switching element and is available as output line a of the driver. This output is connected to the corresponding a element of the display. The driver can be arranged in sinking or sourcing mode.

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VHDL CODE FOR COUNTER ON 7-SEGMENT

SSD Display Possibilities

Decimal Digits 0-9

Select Alpha Characters

Simple Messages

Figure 2.2 Numbers and Alphanumeric Characters

BASIC LED OPERATIONS

There are two types of LED 7-segment displays: common cathode (CC) and common anode (CA). The difference between the two displays is the common cathode has all the cathodes of the 7-segments connected directly together and the common anode has all the anodes of the 7-segments connected together. Shown below is a common anode seven segment. To understand how a seven-segment display works, we must review how an LED works. To Turn an LED ON . 1. The ANODE must be at a higher voltage potential (1.5v) than the CATHODE. 2. The amount of current flowing through the LED will determine the brightness of the LED. 3. The amount of current is controlled by a series resistor. (not shown).

CATHODE
()

(+)

ANODE Current Flow

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VHDL CODE FOR COUNTER ON 7-SEGMENT

COUNTER
A counter is one of the most useful and versatile sub systems in a digital system. A counter can be described as tallying device that tallies or count some number of events. A counter is driven by a clock can be employed for counting the number of clock cycles. Since the clock pulse occur at fixed and known intervals, the counter can be used as a digital instrument to measure time and therefore period or frequency.

Figure 3.1 Counter used in counting of Cricket Balls

TYPES OF COUNTERS
Basically the counter is of two types 1. Asynchronous counter 2. Synchronous counter

ASYNCHRONOUS COUNTER
A Digital counter in which all the Flip-Flops are not triggered simultaneously. In this counter, trailing edged triggered Flip-Flops are used .Flip-Flops are connected in such a way that output of Flip-Flop is fed to the successive Flip-Flop clock input.

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VHDL CODE FOR COUNTER ON 7-SEGMENT

Figure 3.2 Asynchronous Counter

OPERATION OF SYNCHRONOUS COUNTER Three Trailing edge triggered flip- flops connected to form a asynchronous or ripple counter are shown. The counter is initially reset to 000. When the first clock pulse is applied ff1 toggles at the negative going edge of this pulse. Therefore q0 goes from low to high .this becomes a positive going signal at the clock input of ff2. So ff2 is not affected and hence the state of the counter after one clock pulse is 001. At the negative going edge of the second clock pulse ff1 toggles. So q0 changes from high to low and this negative going signal applied to clock of ff 2, activates ff2 and hence q1 goes from low to high thus we get output 010. In this way it will count up to 111 at the seventh clock pulse, and at the eighth clock pulse all ff reset to 0. In this counter, input of flip-flop is obtained from its preceding flip-flop so trigger moves from first flip-flop to last flip-flop like a ripple in water that is why this counter is called the ripple counter.

SYNCHRONOUS COUNTER The ripple counter is simplest to build, but there is a limit to its highest operating frequency. This drawback has been overcome in synchronous counter by triggering every flip flop in
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VHDL CODE FOR COUNTER ON 7-SEGMENT synchronism with the clock. So in this counter, setting time is equal to the propagation delay time of a single flip flop. Since in this counter, every flip flop is triggered in synchronism with the clock. So it is called synchronous counter

Figure 3.3 Synchronous Counter

OPERATION OF SYNCHRONOUS COUNTER Circuit diagram of a 3-bit synchronous counter is shown above. In this counter two and gate are also used with three t-flip-flops. All the flip-flop are triggered by the same clock signal. T-input terminal of flip-flop a is supplied with high level signal, so flip-flop a toggles just at the end of every pulse.t-input of flip-flop b is supplied with the and gate a1, and gate a1 turns on only output of flip-flop a is high and only during the outputs of flip-flop c for this duration flip-flop b toggles. Flip-flop c supplied with the and gate a2, and gate a2 turns on only when output of flip-flop b & and gate a1 are high and only during this period flip-flop c toggles. Initially all flip flop are reset to zero, so output is 000. But just at the end of first clock pulse, flip flop a toggles and output qa changes from logic 0 to 1, which also turns on and gate a1.this does make any change in the output states of flip flop b and flip flop c because t input terminals of flip flop b and c were at logic 0, before the arrival of the first clock pulse. Input terminal t of the flip flop a and b are at logic 1 before the arrival of second clock pulse, so They toggle just at the end of second clock pulse.
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VHDL CODE FOR COUNTER ON 7-SEGMENT

APPLICATIONS
1. Counters as the name suggest is specifically used where we need to do calculations e.g. in calculators etc 2. In generating sequential pulses. 3. These devices are used in the following type of machines: packaging, production, printing, plastic molding, metalworking, food processing, portable equipment and meters. 4. In Electronic preset counter, Totalizing counters, Mechanical Counters

OUTPUT

Figure 3.4 Output of Seven Segment Display in Counting Process

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VHDL CODE FOR COUNTER ON 7-SEGMENT

REFERENCES
[1] A Anand Kumar, Fundamentals Of Digital Circuits. [2] R.P.Jain, Modern Digital Electronics, Eleventh Reprint 2007, Tata Mcgraw-Hill. [3] J.B.Gupta, Electronics Devices And Circuits. [4] Warren O. Rogers, Power Plant Signalling System, Power and the Engineer. [5] Maxim Integrated. "Driving 7-Segment Displays. [6] Johansson, Staffan. "New frequency counting principle improves resolution"

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VHDL CODE FOR COUNTER ON 7-SEGMENT

VHDL CODE
First, determine the inputs and outputs for the problem. Next, implement the design using VHDL in ISE 9.1, simulate your design and configure it into the board.

1. The libraries and entity:

library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; use ieee.std_logic_unsigned.all; entity c09 is port ( rst,clk: in std_logic; op0,op1,op2,op3: out std_logic_vector(6 downto 0)); end c09;

2. The architecture that describes input and output signal for various components.

Architecture count of c09 is component sec_clk Port ( clk rst op ); end component; : in std_logic; : in std_logic; : out std_logic

component seg7 port(m: in integer range 0 to 15; num: out std_logic_vector(6 downto 0)); end component;
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VHDL CODE FOR COUNTER ON 7-SEGMENT 3. Signal declaration signal flag: std_logic; signal a: integer range 0 to 10; signal b: integer range 0 to 10; signal c: integer range 0 to 10; signal d: integer range 0 to 10; begin c1: sec_clk port map(clk,rst,flag);

4. Start our design using the next process for working with the user input. process(rst,flag) variable m0: integer range 0 to 10:=0; variable m1: integer range 0 to 10:=0; variable m2: integer range 0 to 10:=0; variable m3: integer range 0 to 10:=0; begin if rst='0' then m0:=0; m1:=0; m2:=0; m3:=0;

elsif flag'event and flag='1' then

a<=m0; b<=m1; c<=m2; d<=m3;

if m0 /= 9 then

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VHDL CODE FOR COUNTER ON 7-SEGMENT m0:= m0 + 1; elsif m0=9 and m1 /= 9 then m0:=0; m1:= m1 + 1; elsif m1=9 and m2 /= 9 and m0=9 then m1:=0; m0:=0; m2:= m2 + 1; elsif m2=9 and m3/= 9 and m0=9 and m1=9 then m1:=0; m0:=0; m2 :=0; m3 := m3 + 1;

elsif m3=9 then m0:=0; m1:=0; m2:=0; m3:=0; end if; end if; end process;

z0: seg7 port map(a,op0); z1: seg7 port map(b,op1); z2: seg7 port map(c,op2); z3: seg7 port map(d,op3); end count;

5. Finish the VHDL code, simulation and implementation of your counter.

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