US 20130019216A1

(19) United States (12) Patent Application Publication (10) Pub. No.: US 2013/0019216 A1
Vasudevan et al.

(43) Pub. Date:

(52)

Jan. 17, 2013

(54)

INTEGRATION OF DATA MINING AND STATIC ANALYSIS FOR HARDWARE DESIGN VERIFICATION

U.S.Cl. ..................................................... .. 716/106

(57)

ABSTRACT

(75) Inventors: Shobha Vasudevan, Champaign, IL

(US); David Sheridan, San Jose, CA

(US); Lingyi Liu, Champaign, IL (US);

Hyung Sul Kim, Urbana, IL (US)

(73) Assignee:

The Board of Trustees of the

University of Illinos, Urbana, IL (U S)

(21) Appl. No.: 13/433,909 (22) (60)

Filed: Mar. 29, 2012

A method of generating assertions for veri?cation of a hard Ware design expressed at a register transfer level (RTL) includes running simulation traces through the design to gen erate simulation data; extract domain-speci?c information about the design for variables of interest; execute a data mining algorithm With the simulation data and the domain speci?c information, to generate a set of candidate assertions

Related US. Application Data

Provisional application No. 61/506,255, ?led on Jul. 1 1, 201 1.
Publication Classi?cation

for variable(s) of interest through machine learning With respect to the domain-speci?c information, the candidate assertions being likely invariants; conduct formal veri?cation on the design With respect to each candidate assertion by
outputting as invariants the candidate assertions that pass veri?cation; iteratively feed back into the algorithm a coun terexample trace generated by each failed candidate asser tion, each counterexample trace including at least one addi

tional variable in the design not previously input into the data

(51)

Int. Cl.

mining algorithm, to thus increase coverage of a state space of

G06F 1 7/50

(2006.01)

the design.
100

104

Feasible Static Execution Traces

ASSERTlONS

102

110

>

Generator

Data

A-Miner

Likely invariants
CounterExamples

Formal
. .

ANA?
Evaluation

Ver'fe'

and Ranking invariants ;

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