74F583 4-Bit BCD Adder

April 1988 Revised March 1999

74F583 4-Bit BCD Adder

General Description
The F583 high-speed 4-bit, BCD full adder with internal carry lookahead accepts two 4-bit decimal numbers (A0 A3, B0B3) and a Carry Input (Cn). It generates the decimal sum outputs (S0S3), and a Carry Output (Cn+4) if the sum is greater than 9. The 'F583 is the functional equivalent of the 82S83.

Features
I Adds two decimal numbers I Full internal lookahead I Fast ripple carry for economical expansion I Sum output delay time 16.5 ns max I Ripple carry delay time 8.5 ns max I Input to ripple delay time 14.0 ns max I Supply current 60 mA max

Ordering Code:
Order Number 74F583SC 74F583PC Package Number M16B N16E Package Description 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Logic Symbols Connection Diagram

IEEE/IEC

Unit Loading/Fan Out

74F Pin Names A0A3 B0B3 Cn S0S3 Cn + 4 Description U.L. Input IIH/IIL 20 A/1.2 mA 20 A/1.2 mA 20 A/0.6 mA 1 mA/20 mA 1 mA/20 mA HIGH/LOW Output IOH/IOL A Operand Inputs B Operand Inputs Carry Input Sum Outputs Carry Output 1.0/2.0 1.0/2.0 1.0/1.0 50/33.3 50/33.3

1999 Fairchild Semiconductor Corporation

DS009570.prf

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Functional Description
The F583 4-bit binary coded (BCD) full adder performs the addition of two decimal numbers (A0A3, B0B3). The lookahead generates the BCD carry terms internally, allowing the 'F583 to then do BCD addition correctly. For BCD numbers 0 through 9 at A and B inputs, the BCD sum forms at the output. In the addition of two BCD numbers totalling a number greater than 9, a valid BCD number and a carry will result.

For input values larger than 9, the number is converted from binary to BCD. Binary to BCD conversion occurs by grounding one set of inputs, An or Bn, and applying any 4bit binary number to the other set of inputs. If the input is between 0 and 9, a BCD number occurs at the output. If the binary input falls between 10 and 15, a carry term is generated. Both the carry term and the sum are the BCD equivalent of the binary input. Converting binary numbers greater than 16 may be achieved through cascading 'F583s.

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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Absolute Maximum Ratings(Note 1)

Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCCPin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) 0.5V to VCC 0.5V to +5.5V 0.5V to +7.0V 0.5V to +7.0V 30 mA to +5.0 mA 65C to +150C 55C to +125C 55C to +175C 55C to +150C

Recommended Operating Conditions

Free Air Ambient Temperature Commercial Supply Voltage Commercial +4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.

0C to +70C

DC Electrical Characteristics
Symbol VIH VIL VCD VOH VOL IIH IBVI IIL IOS ICEX ICCL Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input LOW Current Output Short-Circuit Current Output HIGH Leakage Current Power Supply Current 40 60 0.6 1.2 150 250 60 mA A mA Max Max Max mA Max VIN = 0.5V (Cn) VIN = 0.5V (An, Bn) VOUT = 0V VOUT = VCC VO = LOW 20 100 A A Max Max VIN = 2.7V VIN = 7.0V 74F 10% VCC 74F 5% VCC 74F 10% VCC 2.5 2.7 0.5 V Min 2.0 0.8 1.2 74F Typ Max V V V V Min Min Recognized as a HIGH Signal Recognized as a LOW Signal IIN = 18 mA IOH = 1 mA IOH = 1 mA IOL = 20 mA Units VCC Conditions

AC Electrical Characteristics
74F TA = +25C Symbol Parameter VCC = +5.0V CL = 50 pF Min tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay An or Bn to Sn Propagation Delay Cn to Cn+4 Propagation Delay An or Bn to Cn+4 2.5 2.5 2.5 2.5 4.0 4.0 Typ 13.0 11.0 6.5 5.0 11.0 8.0 Max 16.5 14.0 8.5 6.5 14.0 10.5 Min 2.5 2.5 2.5 2.5 4.0 4.0 Max 17.5 15.0 9.5 7.5 15.0 11.5 ns ns ns 74F TA, VCC = Com CL = 50 pF Units

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Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M16B

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E

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74F583 4-Bit BCD Adder

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