You are on page 1of 1

Institute of Electrical and Electronics Engineers (IEEE) Hyderabad Section

Joint Chapter of Circuits and Systems and Electron Devices Societies (CAS/EDS)
Presents

Technical Talk on

Smart Grids and the Future of Low Power Design


By, Mr. Srikanth Jadcherla, Chairman and CEO, Seer Akademi.
Abstract: Date: Saturday, 27th April 2013 Time: 11.00 A.M to 12.30 P.M Venue: Seminar Hall, ECE Department, Vasavi College of Engineering Ibrahimbagh, Hyderabad. Registration: Electronic devices are some of the key components in both the load and generation side of the energy gap. Almost every nation in the world, developed or developing, is going through massive overhauls in its energy policies. These trends and regulations, such as the recent Energy Star guidelines, Smart Grid developments and Alternate Energy will fundamentally impact System on chip (SoC) designs for the next 5-10 years. ICs and SoCs will be at the center of implementing not only the new energy efficiency guidelines, but also play a vital role in monitoring, managing and monetizing energy. Hence, the classical view of looking at Low Power Design is long gone. This talk is an intense technical look at emerging trends and practices in the dynamics of energy efficiency from the point of view of loads, sources and transmission networks. We will discuss trends such as local and alternate energy sources, direct DC transmission, Smart Grids and interactive loads/load groups. An integrated global-local power management view, which will form the basis for a hardware/software platform to manage this infrastructure will be presented. The analogies and contrasts between classic Low Power Design and emerging Energy Management techniques at the macro level will be covered. Multi-disciplinary solutions to the energy gap, which will in turn impact Smart Grid development will also be discussed. A brief discussion on how educational and research organizations must realign their expertise and infrastructure to deal with the challenges of this era will be done.

Registration for this tutorial is free.


Registration is open to all. There are limited seats available and interested persons are requested to register in advance by sending email to kaleemfatima@gmail.com latest by 25th April 2013. For any further details please contact: Dr. P.A.Govindacharyulu Vice Chair, IEEE CAS/EDS joint Chapter pagovindacharyulu@gmail.com Dr. Kaleem Fatima, Secretary, IEEE CAS/EDS joint Chapter 96180 73463, Kaleemfatima@gmail.com

About the Speaker:


Srikanth Jadcherla is one of the worlds leading experts on Low Power design, a serial entrepreneur, green evangelist and angel investor. He is currently, the Chairman of Seer Akademi, which is a pioneer in modernizing Indias engineering education system Seer Akademi runs one of the top VLSI programs in India today. Previously, he was Group Director of the Low Power Verification Group at Synopsys. He came to Synopsys as part of the ArchPro acquisition, where he was founder and CTO. Prior to ArchPro, he was an IC designer and architect at companies such as WSI, Intel, Jasmine and Synopsys. He is a veteran of low power designs and pioneer of many energy efficiency techniques and principles. At Intel, he worked on power management architectures ranging from servers to ultra mobile laptop platforms. he received an Intel Achievement Award for his work on low power and is the author of 12 patents. He is an honorary green evangelist/technical advisor to various companies ranging from solar energy suppliers to real estate developers. Recently, he has been advocating new paradigms in energy efficient design in semiconductor systems worldwide from both the supply and demand side of energy consumption. His articles on low power design and energy efficiency have been published in a wide range of industry publications. He is the primary author of the book: Verification Methodology Manual for Low Power. Mr. Jadcherla holds a bachelors degree in electrical engineering from IIT Madras in India, and a masters degree in computational science and engineering from the University of California, Santa Barbara. Mr. Jadcherla is also an active Angel investor, serial entrepreneur and green evangelist. He is a Charter member of TiE.

You might also like