2202

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 9, SEPTEMBER 2009

Evaluation of Three-Phase Transformerless Photovoltaic Inverter Topologies

Tamas Kerekes, Member, IEEE, Remus Teodorescu, Senior Member, IEEE, Marco Liserre, Senior Member, IEEE, Christian Klumpner, Senior Member, IEEE, and Mark Sumner, Senior Member, IEEE

AbstractThis paper analyzes and compares three transformerless photovoltaic inverter topologies for three-phase grid connection with the main focus on the safety issues that result from the lack of galvanic isolation. A common-mode model, valid at frequencies lower than 50 kHz, is adopted to study the leakage current paths. The model is validated by both simulation and experimental results. These will be used to compare the selected topologies, and to explain the inuence of system unbalance and the neutral conductor inductance on the leakage current. It will be demonstrated that the later has a crucial inuence. Finally, a comparison of the selected topologies is carried out, based on the adopted modulation, connection of the neutral and its inductance, effects of unbalance conditions, component ratings, output voltage levels, and lter size. Index TermsInverters, modulated (PWM) inverters. leakage currents, pulsewidth-

Fig. 1. Grid-connected PV system including the parasitic capacitance to ground of the PV array.

I. INTRODUCTION RID-CONNECTED photovoltaic (PV) systems have an important role in distributed power generation. With the help of governmental incentives, their usage becomes more and more widespread within the community. According to the latest International Energy Agency (IEA) Photovoltaic Power Systems (PVPSs) report [1], the annual rate of growth of the cumulative installed capacity in the IEA PVPS countries was at 36% in 2006, slightly lower than for the previous year, when it was at an impressive 42%. Germany is still the leader in the grid-connected PV market, with more than 950 kWp of installations in the year 2006, a bit more than the previous year (860 kWp). The majority of these installations were rooftop systems due to the high buyback rates of the Renewable Energy Market Act that set a feed-in tariff of 0.518 EUR/kWh in the case of new PV installations, and this rate is guaranteed for a period of 20 years [1]. Most of the single-phase installations are small-scale PV systems of up to 56 kWp. A single-phase system means that there is a pulsating ac power on the output, whilst the input is a smooth dc. Large dc capacitors are required that decrease the lifetime and reliability of the whole system [2]. On the other hand, in

Manuscript received June 5, 2008; revised September 5, 2008 and Feburary 17, 2009. Current version published August 28, 2009. Recommended for publication by Associate Editor T. Shimizu. T. Kerekes and R. Teodorescu are with the Institute of Energy Technology, Aalborg University, Aalborg 9220, Denmark (e-mail: tak@iet.aau.dk; ret@iet.aau.dk). M. Liserre is with the Politecnico di BariDipartimento di Elettrotecnica ed Elettronica, Bari 70125, Italy. C. Klumpner and M. Sumner are with the Department of Electrical and Electronic Engineering, The University of Nottingham, Nottingham NG7 2RD, U.K. Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TPEL.2009.2020800

a three-phase system, there is constant ac power on the output, which means that there is no need for large capacitors, leading to smaller cost, and a higher reliability and lifetime of the whole system. Also, the power output of these systems can be higher, reaching up to 1015 kWp in case of rooftop applications. For safety reasons, most PV systems have a galvanic isolation, either in the dcdc boost converter in the form of a highfrequency transformer, or on the ac output side, in the form of a bulky low-frequency transformer. Both of these added galvanic isolations increase the cost and size of the whole system, and decrease the overall efciency. A higher efciency, smaller size and weight, and a lower price for the inverter are possible in the case where the isolation transformer is omitted [3], [7], [11]. These transformerless solutions offer all the aforementioned advantages, but there are some safety issues caused by the solar panel parasitic capacitance to ground, which is formed between the PV array terminals and the frame, which is normally grounded. Fig. 1 shows a typical grid-connected PV system with the modeled parasitic capacitances (CG -PV ), marked with gray lines, present at the dc+ and dc terminals of the PV array, as mentioned in [9] and [15]. The German standard, VDE0126-1-1, deals with grid-connected PV systems, and gives the requirements for limits regarding ground leakage and fault currents [12]. The aim of this paper is to offer a comprehensive analysis of the three-phase transformerless converter with respect to the problem of the leakage current. Three topologies are compared: the three-phase full-bridge dc/ac voltage-source inverter (VSI) (3FB), which is one of the simplest and most widely used topology. The second one is the three-phase full-bridge VSI with a split capacitor on the input side (3FB-SC), same as the 3FB, but in this topology, the middle point of the dc-link capacitors is connected to the grid neutral. Finally, the third topology is the three-phase-modularized neutral-point-clamped VSI topology (3xNPC), known for the high conversion efciency and low harmonic content of its output [17].

0885-8993/$26.00 2009 IEEE

KEREKES et al.: EVALUATION OF THREE-PHASE TRANSFORMERLESS PHOTOVOLTAIC INVERTER TOPOLOGIES

2203

Fig. 2. Three-phase grid-connected PV system showing the most important components (with galvanic isolation).

In Section II, the common model of the three-phase transformerless inverter is presented to study the inuence of the common-mode voltage on the leakage ground current. In Section III, the model is validated by simulation and experimental result. In Section IV, experimental results will be presented in the case of the NPC conguration to validate the simulation model. Finally, in Section V, all the topologies are compared in terms of adopted modulation, connection of the neutral and its inductance, effects of unbalance conditions, component ratings, output voltage levels, and lter size. II. THREE-PHASE INVERTER LEAKAGE CURRENT PATH STUDY PV systems usually have an isolation transformer between the PV panels and the grid. Fig. 1 shows such a system, including the parasitic capacitance of the PV array (CG -PV ) connected between ground and each terminal of the PV array. In order to show the path for the common-mode current, the stray elements are added to the system in Fig. 2 [15]. 1) CA G , CB G , and CC G are the stray capacitances between the converter output points and ground, present for all three legs of the inverter; these depend on the connection between the switches and the grounded heatsink. 2) CG -PV is the parasitic capacitance, also called as leakage capacitance. 3) Ct represents the stray capacitance between the transformers primary and secondary windings. 4) LA , LB , and LC are the output inductances used to control the current injected into the grid. 5) Lc A , Lc B , and Lc C represent the series inductances of the phases. 6) LcN represents the series inductance of the neutral when connected. 7) LcG represents the inductance between the ground connection of the inverter and the grid. In order to adapt the model to the need of studying the leakage current (limited to 50 kHz) rather than a general common-mode current that can have higher frequencies content, the base capacitance at 50 kHz should be calculated. The base impedance for the system under investigation is Zb = V2 S (1)

Fig. 3. Three-phase grid-connected PV system with the inverter modeled as a voltage source (without galvanic isolation).

where V is the rms value of the three-phase grid voltage and S is the apparent power of the three-phase converter. The equivalent base capacitance can be calculated for a frequency of f = 50 kHz (i.e., the frequency limit for the performed analysis) Cb 50 kHz = 103 b Zb (2)

where b is the base frequency and is equal to 314 rad/s. If we consider a 15-kVA inverter, where Zb is 11 , from (2) it is possible to calculate Cb 50 kHz resulting in 0.3 F, then all the capacitances smaller than 1% of Cb 50 kHz (3 nF in the example) can be neglected, because they have a reactance 100 times bigger than the base capacitive reactance and their inuence can be neglected at frequencies below 50 kHz. In a grid-connected PV system with isolation transformer, the common-mode current can only nd its path through the stray capacitances of the transformer (Ct ). Due to the fact that this capacitance has values of the order of 100 pF, the common-mode current at frequencies lower than 50 kHz will be strongly reduced, and the higher frequencies can be ltered by the electromagnetic interference (EMI) lter [15]. Mainly, this is the reason why in case of PV systems with galvanic isolation (with a transformer), the low-frequency leakage current behavior is not inuenced by the converter topology or modulation technique. On the other hand, in case of transformerless PV systems, the common-mode behavior is greatly inuenced by the chosen topology or pulsewidth modulation (PWM). In this case, as also shown in Fig. 3, the PV is directly connected to the grid, and common-mode voltages present at the PV panel terminals lead to leakage ground currents. A. Model of Common-Mode and Differential-Mode Voltages In order to analyze the system regarding common-mode and differential-mode behavior, rst, it is necessary to consider the following steps. In case of a three-phase system with no neutral connection, the common-mode and differential-mode voltages will be derived between two phases J and K, with J = K and J, K = {A, B, C}.

2204

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 9, SEPTEMBER 2009

Fig. 4. Model showing the common-mode and differential-mode voltages J, K = {A, B, C}.

Fig. 6. Simple model showing the common-mode voltage for the three-phase system.

capacitors (CK G and CJ G shown in Fig. 4) can be neglected, due to the fact that the two legs of the inverter are the same in most cases. In case the stray capacitors CK G and CJ G are not equal, then their inuence is very small, due to their small size and can be neglected, so they are not shown in Fig. 5. As presented in (7), Vab 1 can be different from zero in case of difference between the inductor values
Fig. 5. Simplied model of common-mode voltage for phases A and B.

Vab 1 = VAB The common-mode voltage is dened as the average of the sum of voltages between the outputs and the common reference. In this case, the common reference is taken to be the negative terminal of the PV (marked with Q). The common-mode voltage for phase J and K is dened as VJ Q + VK Q . (3) Vcm -J K = 2 The differential-mode voltage is dened as the difference between the two voltages Vdm -J K = VJ Q VK Q = VJ K . (4)

LB LA . 2 (LB + LA )

(7)

Therefore, the total common-mode voltage, including the contribution from inductor unbalance, is dened by (8) Vcm m tot = Vcm m 3 + where Vcm m 3 = Vcm m -AB + Vcm m -BC + Vcm m -CA 3 VA Q + VB Q + VC Q . = 3 Vab 1 + Vbc 1 + Vca 1 3 (8)

From (3) and (4), the voltages between the converter output terminals and the reference point Q can be expressed as Vdm -J K + Vcm -J K (5) 2 Vdm -J K + Vcm -J K . (6) VK Q = 2 Using (5) and (6), a common-mode model for the system can be derived, as shown in Fig. 4. Using Thevenins theorem, the model in Fig. 4 can be rearranged as reported in Fig. 5. In this way, the simplied model of the common-mode voltage is obtained for phases A and B, showing the voltage source for the common mode as well as the voltage source representing the contribution given by the differential-mode voltage and the unbalance of the grid-side inductances, as explained in the following. In case there is unbalance between the output inductors (LA = LB = LC ), there is also common-mode voltage generated by the differential-mode voltage, and this also contributes to the total common-mode behavior of the system. The inuence of the VJ Q =

(9)

Equation (8) is used to predict the total common-mode voltage, due to the modulation strategy and unbalance for the system. Fig. 6 presents the simplied model, showing the commonmode voltage sources for the three-phase system. The common-mode voltage described by (9) charges and discharges the parasitic capacitance CG -PV , and the current through this capacitance depends on the amplitude and frequency content of the voltage across the capacitor, as well as the value of the leakage capacitance [9]. This resulting leakage capacitance value depends on many factors [10]: 1) PV panel and frame structure; 2) surface of cells and distance between cells; 3) module frame; 4) weather conditions; 5) humidity; 6) dust or salt covering the PV panel; 7) type of electromagnetic compatibility (EMC) lter.

KEREKES et al.: EVALUATION OF THREE-PHASE TRANSFORMERLESS PHOTOVOLTAIC INVERTER TOPOLOGIES

2205

Fig. 8.

Three-phase full-bridge topology.

Fig. 7.

PV inverter control strategy for grid interconnection. Fig. 9. Grid current and voltage for phase A in the case of a system with transformer (with galvanic isolation).

III. THREE-PHASE PV-SYSTEM BEHAVIOR IN TERMS OF LEAKAGE CURRENT Fig. 7 shows the control of the PV-system under investigation. Usually, PV systems employ a current control loop in order to have quasi-sinusoidal current and unity power factor. An LCL-lter is installed on the grid-side and the dynamics of the current should be well damped [5], in order to not have highfrequency ripple, either caused by nonltered PWM or caused by undamped resonance of the LCL-lter. In fact, this ripple could be confused with the effect of the leakage current. A suitable Maximum Power Point Tracking algorithm (MPPT) [6] (shown in Fig. 7) guarantees the maximum power extraction from the PV-panels [4]. An anti-islanding algorithm is adopted too [8] to prevent the PV-system from energizing a portion of the utility grid when the grid is switched-off. In case of the simulations, the switching frequency was set to fsw = 10 kHz, which was also the frequency of the current control loop. In order to simplify the simulation, the PV array was modeled with a dc voltage source and Vdc = 650 V. The input-side dc-link capacitance Cdc = 1 mF and ESR = 0.150 . The grid-side LCL-lter has been considered with capacitors in delta connection for the 3FB and 3FB-SC, and in star connection for the 3xNPC with the middle point connected to the neutral line (Lf = 3 mH lter inductance and Cf = 4.5 F lter capacitance). The grid parameters are: frequency fg = 50 Hz, rms voltage Vg = 230 V, grid inductance Lg = 50 H, grid resistance Rg = 0.5 , and grid capacitance Cg = 1 F. The leakage capacitance between the cells and the grounded frame was modeled with a simple capacitance between the PV array terminals and ground. This capacitance, as mentioned in [10], can have values up to 50150 nF/kW, depending on the atmospheric conditions and size/structure of the panels. The value of the simulated leakage capacitance was chosen to be CG -PV = 100 nF for each terminal of the array.

Fig. 10. Grid current and voltage for phase A in the case of a transformerless system (without galvanic isolation).

A three-phase control strategy is used in case of the 3FB and 3FB-SC. The 3xNPC has three individual single-phase controls on each phase. A. Three-Phase Full-Bridge VSI (3FB) This topology, presented in Fig. 8, is the simplest and most widely used one for general applications with three-phase systems. Simulation results for grid voltage and current for phase A are shown in Figs. 9 and 10. In order to show that the current control performs as expected, two simulation cases are selected. The graph in Fig. 9 shows the grid current in case of a system with galvanic isolation between the PV array and ac grid, when no current is owing through the leakage capacitance. The graph in Fig. 10 represents the same grid current, with the difference that, in this case, there is no galvanic separation between the PV array and ac grid, and the leakage current has a path through ground. As seen in Fig. 11, there are high-frequency components in the common-mode voltage. Due to the high-frequency switching between Vdc , the generated leakage current will be very high. A Fast Fourier Transform (FFT) of the ground leakage current, presented in Fig. 12, reveals the harmonic components having 4.5 A amplitude at the switching frequency and 0.4 A at twice the switching frequency. The rms value of the simulated leakage current has been calculated and is 3.2 A, which is very high, well above the 300 mA threshold level stated in the VDE 0126-1-1 standard,

2206

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 9, SEPTEMBER 2009

Fig. 11. Simulation results for a transformerless 3FB. (a) DC+ terminal voltage to ground. (b) Leakage ground current.

Fig. 14. Simulation results for 3FB-SC, showing (a) the dc+ terminal voltage to ground and (b) the leakage ground current in milliamperes.

Fig. 12.

FFT of ground leakage current for 3FB topology without transformer.

Fig. 13.

Three-phase full-bridge VSI with split capacitor topology.

Fig. 15. Simulation results for 3FB-SC with staggered PWM, showing (a) the dc+ terminal voltage to ground and (b) the leakage ground current in milliamperes.

regarding ground leakage currents and fault currents in case of grid-connected PV systems [12]. B. Three-Phase Full-Bridge VSI With Split Capacitor (3FB-SC) The 3FB-SC topology, presented in Fig. 13, is similar to the previous one, with the difference being the input dc-link capacitor and PV array, and is split into two halves, and the middle point is connected to the neutral point of the grid. This topology is equivalent to three independent single-phase halfbridge inverters. The same current control used by the 3FB is also applied in this case for the control of the switches. For the PWM modulation, two strategies will be used. The rst one is the PWM using a single triangular carrier signal for all three phases, and

the second PWM will use three triangular signals displaced by 120 , also referred as interleaved PWM, the aim being to have the switching harmonics in the grid current that cancels out in the neutral current [14]. By using the interleaved triangular signals for the PWM, the common-mode voltage for the three phases can be reduced. The simulation results in Figs. 14 and 15 show that the voltage uctuations present at dc+ and dc are much smaller, than in the case of the 3FB-SC, due to the connection of the capacitors middle point to the neutral line that holds its potential to zero. As seen in Figs. 14 and 15, the terminal voltage to ground has very little ripple. This means that with this topology, the leakage current is greatly reduced, having peak values of a few milliamperes, slightly smaller for the interleaved PWM. In both cases, the rms value of the leakage current has been calculated

KEREKES et al.: EVALUATION OF THREE-PHASE TRANSFORMERLESS PHOTOVOLTAIC INVERTER TOPOLOGIES

2207

Fig. 16. Modularized topology, based on three single-phase neutral-pointclamped inverters.

to be 0.23 mA for the 3FBSC and slightly smaller, 0.13 mA, for the interleaved PWM. Both cases have the leakage current well below the standard requirement of 300 mA. C. Three-Phase Neutral-Point-Clamped VSI (3xNPC) Multilevel converters, like the NPC shown in Fig. 16 [17], are interesting for renewable applications due to the following advantages with respect to the standard six-switches full-bridge inverter. 1) The voltage stress on switches is reduced, due to the series connection of the switches and thus voltage sharing. 2) The output-phase voltage has more than two levels, thereby having a lower harmonic content. 3) The output lter size is smaller because of lower dv/dt. 4) Better overall efciency because switching losses are reduced due to the fact that lower voltage (600 V) switches are used. Using the aforementioned criteria, a three-phase version of this topology was taken into consideration and simulated. Each leg is controlled individually as it would be done in case of a single-phase three-level inverter, having three separate current controllers for each phase. Hence, the output current is always synchronized with its own phase voltage. As seen in Fig. 17, simulation results conrm that this topology is also suitable to be used as inverter in a three-phase transformerless PV system, having almost no voltage ripple present at the terminals of the PV panel, and leading to a very small leakage current to ground. In this case also, the leakage current is calculated to have an rms value of 0.7 mA, which is well below the standard requirement, making it an excellent solution for transformerless PV systems. D. Leakage Current in Case of Unbalance Filter Inductance Condition As mentioned in Section II-A, the total common-mode voltage is also inuenced by the output lter inductors. Unbalance between the phases leads to a common-mode voltage component inuenced by the difference between the inductors on the phases. Fig. 18 presents the two cases: the case of no unbalance is shown in the top subplot, and the unbalance condition is shown in the other two subplots, which present the commonFig. 17. Simulation results for 3xNPC, showing the dc+ terminal voltage to ground (upper gure) and the leakage ground current (lower gure).

Fig. 18. Total common-mode voltage 3FB topology, unbalanced condition. (a) NO unbalance common-mode voltage. (b) UNBALANCE simulated common-mode voltage. (c) UNBALANCE calculated equivalent commonmode voltage.

mode voltage in case of simulation (subplot in the middle) and calculation based on the equations from Section II-A. As seen in Fig. 18, the simulated voltage matches the modeled commonmode voltage, in case of unbalance conditions, when LA = 1.3 LB . In case the neutral line is connected, from the point of view of the common-mode model, the three-phases of the inverter can be modeled as three individual single phases, as presented in [15], and the result is a constant total common-mode voltage, leading to very low leakage ground current, as shown in the rst subplot in Fig. 19, which represents the simulation results for the 3FB-SC and 3xNPC topologies.

2208

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 9, SEPTEMBER 2009

Fig. 20.

Electrical circuit of the experimental setup.

Fig. 19. Total common-mode voltage 3FBSC topology, unbalanced condition (L 1 = 10 H in the neutral). (a) NO unbalance common-mode voltage. (b) UNBALANCE simulated common-mode voltage. (c) UNBALANCE calculated equivalent common-mode voltage.

In case there is some inductance present in the neutral line, for example, due to the EMI lter, the total common-mode voltage is not constant anymore. A small inductance of LcN = 10 H present in the neutral can lead to high-frequency commonmode voltage that would generate leakage ground currents that could reach amplitudes greater than the threshold stated in the German standard regarding grid connection of PV systems: VDE0126-1-1 [12]. The bottom two subplots in Fig. 19 present the simulated and calculated common-mode voltage when 10 H inductance is present in the neutral line. This results in a common-mode voltage, which is not constant any more, leading to increased leakage current ow to ground. Very high attention should be carried out for designing an inductance-free neutral connection. IV. EXPERIMENTAL RESULTS In order to verify the simulation results, an experimental setup has been done, which is made up of a single-phase NPC leg connected to the grid, tested as an inverter. In fact, the threephase NPC topology can be obtained using three independent single-phase inverters, like the one shown in Fig. 20, connected through the common neutral. Fig. 21 shows the picture of the experimental setup made up of the grid-connected NPC inverter. For the LCL lter on the grid side, Lf = 3 mH inductors were used with a Cf = 4.5 F capacitor. Furthermore, the sensors, gate drivers and the Texas Instruments (TI) Digital Signal Processor (DSP) are shown, which are used for the control of the system. The experimental setup has the components reported in Table I. The used current control is the same as in the case of the simulations. Fig. 22 shows the common-mode voltage of the NPC topology. As measured on Ch3, the common-mode voltage, measured between the dc+ terminal and the ground connection, is constant, showing no high-frequency variations.

Fig. 21. Picture showing the most important components of the experimental setup, the scheme of which is reported in Fig. 20. TABLE I PARAMETERS OF THE EXPERIMENTAL SETUP

An FFT of the common-mode voltage conrms that only the dc component is present. This means that the leakage ground current generated by this topology is very low, as also shown in case of the simulations. To validate the model presented in Section II-A, the commonmode voltage in case of three-phase inverters has been measured for the 3FB and 3FB-SC topologies. As seen in Fig. 23, the common-mode voltage matches the results presented in Fig. 18 both for the balanced and unbalanced cases. Furthermore, the common-mode voltage has been measured for the 3FB-SC topology as well. As seen in Fig. 24, the commonmode voltage is constant in case of balanced condition, while in case there is inductance present in the neutral line, the common-mode voltage is not constant, but has high-frequency

KEREKES et al.: EVALUATION OF THREE-PHASE TRANSFORMERLESS PHOTOVOLTAIC INVERTER TOPOLOGIES

2209

Fig. 22. Common-mode voltage harmonic content: channel 1: grid current [5 A/div], channel 2: grid voltage [200 V/div], channel 3: voltage between dc+ terminal and ground [100 V/div], channel M: FFT of channel 3 [100 V/div and 1.25 kHz/div].

Fig. 24. Total common-mode voltage 3FB-SC topology, balanced condition (channel 3) and unbalanced condition (channel R1).

Fig. 23. Total common-mode voltage 3FB topology, balanced condition (channel R1) and unbalanced condition (channel R2).

components that could lead to ground leakage currents, as discussed in Section II-A. V. COMPARISON This section proposes an overall comparison, reported in Table II, of the three topologies considering not only the behavior in terms of leakage current to ground, but also the number of switching devices, passive components, size of the output lter, and other auxiliary devices. In terms of power devices, it can be said that the 3xNPC needs twice the switching elements and six extra diodes than the other two topologies. The advantage in this case is that the switching elements need only half of the voltage rating compared to those in case of the 3FB and 3FB-SC.

Regarding the voltage balancing control, in case only the middle point of the capacitors is connected to the neutral line and the middle point of the PV array is left unconnected, then an extra function is required to manage the voltage unbalance of the input capacitors. This unbalance is a result of the direct connection of the capacitance to the load, in which case, the load current is drawn from the capacitance and not from the PV array, causing a voltage unbalance between the upper and lower capacitances [13]. As already pointed out, the most important aspect for the transformerless PV systems, and as a consequence, the main topic of the paper, is the ground leakage current. As detailed in Table II, the 3FB has high common-mode voltage, and therefore, the leakage current is very high, having a calculated rms values of 3.2 A, in case the galvanic isolation is missing. On the contrary, the 3FB-SC and 3xNPC topologies have almost no voltage uctuation. Because of the small voltage ripple, the leakage ground current complies with the requirement stated in the VDE 0126-1-1 standard [12]. Moreover, lower ripple in the grid current is obtained in the case of the 3FB topology with galvanic isolation. In fact, there is no path for the leakage ground current to ow and the homopolar triple harmonics of the grid current are cancelled, resulting in lower harmonic distortion of the grid current. On the other hand, in case of transformerless grid connection, the highest grid current ripple (5 A) is in case of the 3FB topology, while in case of the 3FB-SC, the grid current ripple is only 2.5 A, and in the case of the 3xNPC topology, it is only 1.25 A. In order to comply with IEEE 929 standard, different LCL lters are needed in the three cases. Using the design criteria reported in [16], the required LCL components in terms of overall reactive power are reported in Table II. Particularly, it is evident that in the 3xNPC case, the lter size is 20% smaller than in case of the 3FB. Together with a higher efciency, up to 98%, it makes the 3xNPC the most effective topology for a transformerless PV converter.

2210

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 9, SEPTEMBER 2009

TABLE II COMPARISON FOR THE DIFFERENT TOPOLOGIES

VI. CONCLUSION In this paper, a detailed analysis of the problem of the leakage current in transformerless converters has been carried out. The adopted common-mode model of the system has revealed that connecting the supply neutral to the middle of the dc-link capacitors will result in low ripple voltage at both dc-link terminals of the array, leading to a very low leakage current level, well below the VDE 0126-01-01 standard requirement of 300 mA. Hence, both 3FB-SC and 3xNPC topologies are suitable, from the leakage current point of view, as transformerless PV inverters. However, the presence of inductance in the neutral line can lead to high-frequency components in the common-mode voltage, leading to leakage ground currents, higher than the allowed level given in the standards. Therefore, it is crucial that the neutral line has very low inductance in case of transformerless PV systems. REFERENCES
[1] Trends in photovoltaic applications , Survey report of selected IEA countries between 1992 and 2006, Rep. IEA-PVPS T1-16, 2007. [2] G. Petrone, G. Spagnuolo, R. Teodorescu, M. Veerachary, and M. Vitelli, Reliability issues in photovoltaic power processing systems, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 25692580, Jul. 2008. [3] R. Gonzalez, E. Gubia, J. Lopez, and L. Marroyo, Transformerless singlephase multilevel-based photovoltaic inverter, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 26942702, Jul. 2008. [4] M. Liserre, A. Pigazo, A. DellAquila, and V. M. Moreno, An antiislanding method for single-phase inverters based on a grid voltage sensorless control, IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 14181426, Oct. 2006. [5] M. Liserre, R. Teodorescu, and F. Blaabjerg, Stability of photovoltaic and wind turbine grid-connected inverters for a large set of grid impedance values, IEEE Trans. Power Electron., vol. 21, no. 1, pp. 263272, Jan. 2006. [6] S. Jain and V. Agarwal, A single-stage grid connected inverter topology for solar PV systems with maximum power point tracking, IEEE Trans. Power Electron., vol. 22, no. 5, pp. 19281940, Sep. 2007. [7] R. Gonz alez, J. L opez, P. Sanchis, and L. Marroyo, Transformerless inverter for single-phase photovoltaic systems, IEEE Trans. Power Electron., vol. 22, no. 2, pp. 693697, Mar. 2007.

[8] L. Asiminoaei, R. Teodorescu, F. Blaabjerg, and U. Borup, Implementation and test of an online embedded grid impedance estimation technique for PV inverters, IEEE Trans. Ind. Electron., vol. 52, no. 4, pp. 1136 1144, Aug. 2005. [9] M. Calais and V. Agelidis, Multilevel converters for single-phase grid connected photovoltaic systems, an overview, in Proc. ISIE 1998, pp. 172178. [10] H. Schmidt, B. Burger, and C. Siedle, Gef ahrdungspotenzial transformatorloser WechselrichterFakten und Ger uchte, in Proc. 18th Symp. Photovoltaische Sonnenenergie, Staffelstein, Germany, 2003, pp. 8998. [11] T. Kerekes, R. Teodorescu, and U. Borup, Transformerless photovoltaic inverters connected to the grid, in Proc. APEC 2007, Feb. 25Mar. 01, pp. 17331737. [12] Automatic Disconnection Device Between a Generator and the Public Low-Voltage Grid, Paragraph 4.7.1. Photovoltaik, DKE Deutsche Kommission Elektrotechnik Elektronik Informationstechnik im DIN UND VDE, Standard DIN VDE 0126-1-1, Feb., 2006. [13] S. Monge, S. Somavilla, J. Bordonau, and D. Boroyevich, Capacitor voltage balance for neutral-point-clamped converter using the virtual space vector concept with optimized spectral performance, IEEE Trans. Power Electron., vol. 22, no. 4, pp. 11281135, Jul. 2007. [14] L. Yu-Tzung and T. Ying-Yu, Digital control of a multi-phase interleaved PWM inverter with minimal total harmonic distortion, in Proc. IEEE PESC 2007, pp. 503509. [15] E. Gub a, P. Sanchis, A. Urs ua, J. Lopez, and L. Marroyo, Ground currents in single-phase transformerless photovoltaic systems, Prog. Photovoltaics: Res. Appl., vol. 15, pp. 629650, 2007. [16] M. Liserre, F. Blaabjerg, and S. Hansen, Design and control of an LCLlter based three-phase active rectier, IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 12811291, Sep./Oct. 2005. [17] A. Nabae, I. Takahashi, and H. Akagi, A new neutral-point-clamped PWM inverter, IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp. 518523, Sep./Oct. 1981.

Tamas Kerekes (S06M09) was born in Cluj-Napoca, Romania, in 1978. He received the Electrical Engineer diploma from the Technical University of Cluj-Napoca, Cluj-Napoca, in 2002, and the Master of Science degree in power electronics and drives from the Institute of Energy Technology, Aalborg University, Aalborg, Denmark, where he is currently working toward the Ph.D. degree.

KEREKES et al.: EVALUATION OF THREE-PHASE TRANSFORMERLESS PHOTOVOLTAIC INVERTER TOPOLOGIES

2211

Remus Teodorescu (S94M99SM02) received the Dipl.Ing. degree in electrical engineering from the Polytechnical University of Bucharest, Bucharest, Romania, in 1989, and the Ph.D. degree in power electronics from the University of Galati, Galati, Romania, in 1994. Since 1998, he has been with the Power Electronics Section, Institute of Energy Technology, Aalborg University, Aalborg, Denmark, where he is currently a Full Professor, and the Founder and the Coordinator of the Green Power Laboratory, and is engaged in the development and testing of grid converters for renewable energy systems. He is also the Coordinator of the Vestas Power Program. He has authored or coauthored more than 120 papers, one book, and three patents (pending). His current research interests include design and control of power converters used in renewable energy systems, distributed generation of mainly wind power and photovoltaics, computer simulations, and digital control implementation. Prof. Teodorescu is an Associate Editor for the IEEE POWER ELECTRONICS LETTERS and the Chair of the IEEE Danish Joint Industrial Electronics Society/ Power Electronics Society/Industry Applications Society (IAS) Chapter. He is a corecipient of the Technical Committee Prize Paper Awards at the IEEE IAS Annual Meeting 1998 and the ABB Prize Paper Award at the IEEE Optim 2002.

Christian Klumpner (S00M02SM08) was born in Resita, Romania, in 1972. He received the Ph.D. degree in electrical engineering from the Politehnica University of Timisoara, Timisoara, Romania, in 2001. From 2001 to 2003, he was a Research Assistant Professor in the Institute of Energy Technology, Aalborg University, Aalborg, Denmark. Since October 2003, he has been a Lecturer at the School of Electrical Engineering, University of Nottingham, Nottingham, U.K. His current research interests include power electronics and ac drives, with special focus on direct power conversion (matrix converters). Dr. Klumpner received the Isao Takahashi Power Electronics Award in 2005 at the International Power Electronics Conference organized by the Institute of Electrical Engineers of Japan (IEEJ) in Niigata. He is also a recipient of the 2007 IEEE Richard M. Bass Outstanding Young Power Electronics Engineer Award.

Marco Liserre (S00M02SM07) received the M.Sc. and Ph.D. degrees in electrical engineering from the Polytechnic of Bari, Bari, Italy, in 1998 and 2002, respectively. Since January 2004, he has been an Assistant Professor with the Polytechnic of Bari, where he is engaged in teaching courses of power electronics, industrial electronics, and electrical machines. He has authored or coauthored more than 127 technical papers, 28 of them published or to be published in international peer-reviewed journals, and three chapters of a book. He has been a visiting Professor at Aalborg University, Denmark, Alcala de Henares, Spain, and at Christian-Albrechts University of Kiel, Germany. He has been giving lectures in different universities and tutorials for the following conferences: IEEE Power Electronics Specialists Conference (PESC) 2008, International Symposium on Industrial Electronics (ISIE) 2008, European Conference on Power Electronics and Applications (EPE) 2007, Anual Conference of the IEEE Industrial Electronics Society (IECON) 2006, ISIE 2006, and IECON 2005. His current research interests include industrial electronics applications to distributed power generation systems based on renewable energies. Dr. Liserre is a senior member of the following societies: Industrial Electronics Society (IES), Power Electronics Society, and Industry Applications Society. He was a Reviewer for international conferences and journals. Within the IES, he has been responsible for student activities, an AdCom member, an Editor of the newsletter, and responsible for region 8 membership activities. He has been involved in the IEEE conferences organization in different capacities. He is an Associate Editor of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS. He is the Founder and the Editor-in-Chief of the IEEE INDUSTRIAL ELECTRONICS MAGAZINE. He is the Founder and the Chairman of the Technical Committee on Renewable Energy Systems of the IEEE Industrial Electronics Society. He has been a Guest Co-Editor-in-Chief of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS for the Special Section Voltage and current control of power converters. He is also an Organizer and a Guest Co-Editor-in-Chief of the new Special Section on Renewable Energy Systems of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS. He has received the IES 2009 Early Career Award. He will be the Co-Chairman of the International Symposium on Industrial Electronics (ISIE 2010), that will be held in Bari on July 4-7, 2010.

Mark Sumner (M93SM05) received the B.Eng. degree in electrical and electronic engineering from Leeds University, Leeds, U.K., in 1986, and the Ph.D. degree from the University of Nottingham, Nottingham, U. K., in 1990. He was with Rolls Royce, Ltd., Ansty. He was a Research Assistant at Nottingham University, where he was appointed as a Lecturer in October 1992 and is currently an Associate Professor and a Reader in the Power Electronic Systems, and is engaged in research work on induction motor drives. His research interests cover control of power electronic systems including sensorless motor drives, diagnostics and prognostics for drive systems, power electronics for enhanced power quality and novel power system fault-location strategies.