IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO.

12, DECEMBER 2000

1877

A CMOS Nested-Chopper Instrumentation Amplifier with 100-nV Offset

Anton Bakker, Kevin Thiele, and Johan H. Huijsing, Fellow, IEEE
AbstractA CMOS nested-chopper instrumentation amplifier is presented with a typical offset of 100 nV. This performance is obtained by nesting an additional low-frequency chopper pair around a conventional chopper amplifier. The inner chopper pair removes the 1 noise, while the outer chopper pair reduces the residual offset. The test chip is free from 1 noise and has a thermal noise of 27 nV/ Hz consuming a total supply current of 200 A. Index TermsChopper amplifiers, instrumentation amplifiers, low-offset amplifiers, offset cancellation techniques.

I. INTRODUCTION N many applications, such as sensor interfaces, the overall performance of the system is limited by the offset and noise of the input amplifiers. This problem has been growing in the past years, because of the shift from bipolar to CMOS pronoise and offset. cesses which have significantly higher Also a conventional offset-cancellation technique such as trimming, which is widely used in bipolar technology, is much less beneficial in CMOS technology because it can not reduce the noise. Solutions that can remove both offset and noise are found in the dynamic offset-cancellation techniques. Examples of these are the autozero and chopper techniques, which will be explained in this paper. Derivatives of these techniques are found in all commercial ultra-low-offset CMOS operational amplifiers. Typical offset figures of these kinds of operational amplifiers are in the range of 10 V. Although these offset figures are already very low, still some applications require an even lower offset. In this paper, an instrumentation amplifier for read-out of a spinning-current Hall plate is described [1]. This Hall plate is integrated in a standard CMOS process and has an offset of less than 500 nV. The offset of the instrumentation amplifier needs therefore to be well below this 500 nV. This paper discusses the design and realization of this ultra-low-offset instrumentation amplifier. A new dynamic offset-cancellation technique is shown that can reduce the offset of a CMOS amplifier to typically 100 nV.

Fig. 1.

Noise power spectrum of standard CMOS operational amplifier.

II. DYNAMIC OFFSET-CANCELLATION TECHNIQUES A. Offset and Noise in CMOS Amplifiers A conventional CMOS amplifier has a typical input-referred noise spectrum, as shown in Fig. 1. For rather high frequencies, the noise can be considered as frequency independent or white. This is usually called the thermal noise floor. At low frequencies, the noise power is increasing almost linearly with denoise. creasing frequency and is therefore commonly called noise becomes dominant over The frequency at which the noise corner frequency . the white noise is called the At very low frequencies, offset becomes the dominant error. Although offset is usually modeled as a time-invariant voltage source, it may change due to aging and temperature variations. This implies that it has a certain bandwidth and can therefore be considered as a very low-frequency noise source. B. Classification Due to historical reasons, some confusion has arisen in the naming conventions of the different dynamic offset-cancellation techniques. Nowadays, it is generally accepted to distinguish two main groups: autozeroing and chopping [2][4]. The fundamental difference between them is the offset handling. While the autozero principle first measures the offset and subtracts it in a next phase, chopping modulates the offset to higher frequencies, which will be explained further in this paper. In data books and literature, many derivatives of these two basic offset-cancellation techniques can be found, like correlated double-sampling [2], [4], ping-pong opamps [5], [6], self-calibrating opamps [7], synchronous detection, the twoor three-signal approach [8], and dynamic element matching (DEM). The name chopper stabilization is even used for both autozeroing and chopping techniques [2], [9]. Table I shows the above-mentioned techniques classified into the two main groups: autozeroing and chopping. The next para-

Manuscript received April 17, 2000; revised July 15, 2000. A. Bakker and K. Thiele are with Philips Semiconductors, Sunnyvale, CA 94088 USA. J. H. Huijsing is with the Electronic Instrumentation Laboratory, Delft Institute of MicroElectronics and Submicron Technology (DIMES), Delft University of Technology, The Netherlands. Publisher Item Identifier S 0018-9200(00)10050-2.

00189200/00$10.00 2000 IEEE

1878

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 12, DECEMBER 2000

TABLE I CLASSIFICATION OF DYNAMIC OFFSET-CANCELLATION TECHNIQUES

Fig. 3. Noise power spectrum of autozeroed amplifier.

Fig. 2. Principle of autozero technique.

graphs will discuss the basic characteristics of the autozero and the chopper technique. C. Autozero Technique The principle of the autozero technique is shown in Fig. 2. The main characteristic of the autozero technique and its derivatives is that the offset cancellation is done in two phases. A samwhen the offset is measured and sampled on pling phase and an amplification phase when the sampled offset is subtracted from the input signal and amplified. This technique is very well-known and an improved derivative is applied in all commercially available chopper-stabilized opamps. The reason to mention it here is the noise performance of this technique. Besides the offset, the autozero technique also removes the noise of the amplifier, which makes sense because offset noise. To remove all the can be considered as low-frequency noise the autozeroing frequency should be higher than noise corner frequency. The typical noise power specthe trum of an autozero amplifier is shown in Fig. 3. The residual noise at frequencies lower than is almost white. However, it is not equal to the thermal noise floor, as it is increased by the ratio of the unity-gain bandwidth of the amplifier and the autozeroing frequency . The reason for this is that due to the sampling action, high-frequency components are folded back to the baseband. The higher the bandwidth of the amplifier, the more . A more precise explananoise is sampled on the capacitor tion is given by Enz et al. in [2]. In practical situations, the ratio is somewhere between three and five. This is the fundamental reason why, for example, chopper-stabilized opamps always have rather high noise figures in the order of 70 nV/ Hz. D. Chopper Technique The principle of the chopper technique is shown in Fig. 4. is modulated to the chopping frequency, The input signal amplified and modulated back to the baseband. The offset is

modulated only once and appears at the chopping frequency and its odd harmonics. These frequency components need to be removed by a low-pass filter. Next to the frequency domain, the chopping principle can also be explained in the time-domain. is periodically inverted by the In that case, the input signal first multiplier or chopper. After amplification, the inverted and amplified signal is inverted for the second time, resulting again in a dc signal. The offset is periodically inverted only once and therefore appears as a square wave at the output. In contrast to the increased white noise component of autozero amplifiers, the baseband noise of chopper amplifiers is almost equal to the wideband thermal noise, assuming again noise corner that the chopping frequency is higher than the frequency. The typical noise power spectrum of a chopper amnoise components plifier is shown in Fig. 5. The folded are omitted for simplicity. The reason why the residual noise of a chopper amplifier is fundamentally lower than that of an autozero amplifier is that the input signal of a chopper amplifier is not sampled, which makes it impossible for wideband thermal noise to fold back into the baseband. The lower noise of the chopper technique is the main reason to use this technique for read-out of our spinning-current Hall plate. However, the residual offset of the chopper technique is still too high for this application. The rest of this paper will therefore focus on techniques to further reduce this residual offset of a chopper amplifier. E. Origins of Offset in Chopper Amplifiers The residual offset of a chopper amplifier is in the order of a few tens of V. To be able to reduce this offset, first the origins of the offset need to be explored. The residual offset of a chopper amplifier originates mainly from the spikes of the input chopper [2]. In turn, these spikes originate from the charge injection mismatch of the switches. After demodulation of the spikes a residual offset occurs. This is schematically shown in Fig. 6. It can be seen that the residual is determined by the number of the spikes and the offset energy content of the spikes. This energy content is dictated and the mismatch in parasitic caby the input impedance and the pacitive coupling between the chopping signal . There are three main input lines, which is presented by options to reduce the residual offset: 1) lowering the chopping frequency; 2) lowering the input impedance; or 3) lowering the charge injection. However, lowering the chopping frequency is not a real solution, because the chopping frequency should be

BAKKER et al.: CMOS NESTED-CHOPPER INSTRUMENTATION AMPLIFIER

1879

Fig. 4.

Chopping principle including signals in frequency and time domain.

Fig. 5. Noise power spectrum of chopper amplifier.

higher than the noise corner frequency to remove the noise. The input resistance is dictated by the input signal source and can usually not be lowered by the designer. Charge injection is mainly dictated by the process choice and can be minimized by the designer by using small transistors that are well matched. The final conclusion is that except for careful layout design, the designer can not improve the residual offset in a straightforward manner. F. Techniques to Reduce the Residual Offset An interesting nonstraightforward method to reduce the residual offset is shown by Menolfi et al. [10]. They remark that the energy content of the spikes is mainly located at higher harmonics of the chopping frequency, while the energy of the modulated signal is mainly located at the fundamental of the chopping frequency. If the modulated signal that includes the spikes is low-pass or bandpass filtered, almost all spikes are removed, while only a small part of the signal is lost. This idea is schematically shown in Fig. 7. Compared to a conventional chopper amplifier, a bandpass filter is added within the of this bandpass filter is amplifier. The center frequency . The quality factor equal to the chopping frequency should be high, to increase the attenuation of the unwanted

Fig. 6. Residual offset caused by spikes. (a) Spike signal. (b) Demodulation signal. (c) Demodulated spike.

spikes. However, a high introduces gain accuracies if there and . For a mismatch between is a mismatch between and of 1%, a good compromise value for is between three and five. This value gives a residual offset of 500 nV which is the best reported value so far. As already mentioned before, the major drawback of this circuit is the gain accuracy. This gain accuracy is dependent on the quality factor and the and . This implies that already in a matching between relatively small temperature range, large deviations in accuracy will occur. The accuracy can also not be improved by applying feedback because of stability problems caused by the phase response of the bandpass filter. In conclusion, this technique significantly reduces the residual offset at the cost of reduced gain accuracy.

1880

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 12, DECEMBER 2000

Fig. 7.

Chopper amplifier with bandpass filter to improve residual offset.

Fig. 8. Nested chopper amplifier principle.

III. NESSTED-CHOPPER TECHNIQUE A new technique to reduce the residual offset of a chopper amplifier is shown in Fig. 8, which will be referred to as the nested-chopper technique. The basic idea is to consider a conventional chopper amplifier as a regular amplifier without noise and a reduced offset. The offset of this amplifier can be reduced by applying another pair of choppers, but now operating at a much lower frequency. This frequency can be much lower noise corner frequency, because the noise is althan the ready removed by the inner pair of choppers. Because the outer pair is working at a much lower frequency the residual offset due to spikes of these choppers is much lower. The corresponding signals of the nested-chopper amplifier are shown in Fig. 9. The phase relationship of both signals is not important. This implies in practical situations that both signals will have synchronous edges. The spikes that are generated by the high chopping freare modulated by the output chopper with a quency . The average energy of the spikes has befrequency come zero now, resulting in a residual offset that is theoretically zero. If we take into account the spikes generated by the low-frequency choppers, the theoretically achievable improveand . For ment in residual offset is the ratio of and of 2 kHz and 20 Hz, practical values of respectively, the residual offset will be 100 times less. This implies that it should be possible to reduce the residual offset to less than 100 nV. Compared to the above-mentioned bandpass chopper amplifier, the nested-chopper amplifier can be fed back, which implies that the gain-accuracy can be very high over a wide temperature range. Also the implementation is very simple as only one extra pair of choppers and a clock signal are needed. A disadvantage is that the maximum input signal frequency is . However, a bandwidth of a few tens of reduced to half Hertz is sufficient for many data-acquisition applications. The conclusion on the proposed nested-chopper amplifier technique is that the offset can be reduced to values as low as

Fig. 9. Reduction of residual offset by nested chopper amplifier. (a) Spikes after first demodulator. (b) Low-frequency modulation signal. (c) Spikes after second demodulator.

100 nV, without increasing the noise and with the possibility to apply feedback. IV. REALIZATION To test and prove this theory, an instrumentation amplifier employing the proposed nested-chopper technique is designed. The schematic is shown in Fig. 10. A major problem in testing low-offset amplifiers is the effect of parasitic thermocouples at the input when connecting an external test signal. To avoid disturbances by these thermocouple effects, we tested the system with an on-chip spinning-current magnetic Hall sensor [1]. Switching off the Hall plates bias current makes the signal at the input of the amplifier zero without changing the source impedance. The amplification , , factor of the amplifier is determined by resistors and is set to 100. and

BAKKER et al.: CMOS NESTED-CHOPPER INSTRUMENTATION AMPLIFIER

1881

Fig. 10.

Nested chopper instrumentation amplifier with spinning-current Hall sensor input.

Fig. 11.

Detailed schematic of chopper opamp including feedback resistors.

The low-pass filter is a first-order one with a 3-dB roll-off frequency of 3 Hz. This low-pass filter is added externally, because of the required large RC constant. In a commercial version, this low-pass filter can be integrated on the chip by making it a part of an integrating A/D converter, such as a sigmadelta A/D converter. The instrumentation amplifier can be divided in two equal amplifiers. One of these amplifiers is shown in detail in Fig. 11. The amplifier is a four-stage operational amplifier. The first , and is a low-gain stage which is formed by low-noise stage. This stage has a gain of approximately twenty. The noise performance is optimized firstly by using resistors and instead of an active load and secondly by choosing and in such a a high over ratio of input transistors way that they are biased in weak inversion. The first stage deter-

mines the overall noise performance and has an equivalent input thermal noise of approximately 15 nV/ Hz while drawing only , 35- A tail current. The second stage consists of and is optimized for high gain and low transconducand tance. The high gain is necessary to reduce the influence of offsets of the subsequent stages outside the choppers. The reason for the low transconductance is to have a low unity-gain frequency which implies an intrinsic filtering of the modulated offset. This will be discussed more elaborately later. The low transconductance is achieved by using a small tail current of only 500 nA and a very low W/L ratio. The first two stages of the amplifier are kept fully differential to reduce effects of charge injection of the chopper switches. To define the common-mode and , a common-mode control voltage on the drains of circuit is necessary. This is done by measuring the common-

1882

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 12, DECEMBER 2000

Fig. 13. Input referred offset versus chophigh frequency; resolution of measurement is 50 nV. Fig. 12. Microphotograph of the test chip. TABLE II PERFORMANCE SUMMARY

mode current through and , and use this value to and . However, in the figure this is control the currents omitted for simplicity. , and and The third stage is formed by acts as a Miller stage. This stage splits the dominant poles of the high-gain second and third stages. The fourth stage is formed by and and has a gain of approximately one. One of the reasons for the Miller stage is to assure stability of the opamp. However, this stage also acts as a low-pass filter for the modulated offset of the first two stages. To have the most aggressive filtering, the transconductance of the first two stages should be as low as possible. However, the first stage should have a high transconductance to achieve low noise performance, which implies a trade-off. The second stage has therefore a transconductance that is made as low as possible without being a dominant noise source for the whole amplifier. With a gain of 20 of the first amplifier, the transconsuctance of the second amplifer can be 400 times lower to still not be the dominant noise source. For our circuit, the transconductance is set to 700 A/V and for the second of the first stage, equals 2 A/V. The unity-gain frequency is given by stage, , which equals 400 kHz. For an amplication set by R41 and R42 ton100, this gives an amplifier bandwidth of 4 kHz. The open-loop dc gain is more than 130 dB. The current consumption of the instrumentation amplifier is 200 A. A chip microphotograph is shown in Fig. 12. The circuit is implemented in a single-poly double-metal 1.6- m CMOS process. The die area is 6 mm . A large part of the die area is occupied by the two 16-pF metal1metal2 capacitors. These capacitors could not be made out of MOS capacitors, because they need to be very linear, because of the switching. Because our process lacks the availability of double-poly linear capacitors, metal1metal2 capacitors were the only possible implementation. The higher chopping frequency is applied externally. The is derived from lower chopping frequency by a frequency divider of 128. The divider value can also be changed to 512 for test purposes.

V. MEASUREMENT RESULTS Nine chips from two different batches have been tested. The has been measured for input referred offset versus between 2 and 50 kHz. Experimental results values of is 2 kHz and a corresponding show that for of 16 Hz, the input referred offset is below 100 nV for all nine samples. It also shows a significant increase for higher frequenbetween 2 and 8 kHz are cies. The results for values of shown in Fig. 13. The minimal value of 2 kHz is exactly equal noise corner frequency. to the A remarkable result is that the offset is not dependent on , but on . The reason for this seems to be the mismatch of the on-resistance of the low-frequency chopper switches. This is explained in Fig. 14. If the input impedances are not exactly equal, the area under the spikes do not completely cancel. This results in a residual offset due to the highfrequency spikes that is not exactly zero. If this is true, the dominant contribution to the residual offset does not come from the low-frequency choppers but from the high-frequency ones. This explains why the residual has approximately the value that could . be expected from theory, but is still dependent on The noise is measured in a bandwidth of 0.13 Hz and was found to be 27 nV/ Hz, which is in very good concordance with the simulated thermal noise. The common-mode rejection ratio is also measured in a 0.13-Hz band and was found to be over

BAKKER et al.: CMOS NESTED-CHOPPER INSTRUMENTATION AMPLIFIER

1883

Fig. 14.

Explanation of the result that the residual offset is dependent on f

140 dB. This shows again the excellent common-mode rejection ratio (CMRR) performance of chopper amplifiers, which was already known from previous designs [2]. A performance summary is shown in Table II. VI. CONCLUSION In this paper, a nested-chopper technique is presented and compared with other dynamic offset-cancellation techniques. It is shown that this new technique can significantly reduce the offset of conventional chopper amplifiers at the cost of only one additional chopper pair. A nested-chopper instrumentation amplifier for a spinning-current Hall plate is realized and measurement results show a residual offset of only 100 nV. This offset value is the lowest ever reported. A disadvantage is the limita. tion of the maximum input signal frequency to half However, a bandwidth of a few tens of hertz is sufficient for many data-acquisition applications. REFERENCES
[1] A. Bakker, A. A. Bellekom, S. Middelhoek, and J. H. Huijsing, Low-offset low-noise 3.5-mW CMOS spinning-current Hall effect sensor with integrated chopper amplifier, in Proc. Eurosensors XIII, Sept. 1999, pp. 10451048. [2] C. C. Enz and G. C. Temes, Circuit techniques for reducing the effects of opamp imperfections: Autozeroing, correlated double sampling, and chopper stabilization, Proc. IEEE, vol. 84, pp. 15841614, Nov. 1996. [3] C. C. Enz, E. A. Vittoz, and F. Krummenacher, A CMOS chopper amplifier, IEEE J. Solid-State Circuits, vol. SC-22, pp. 335342, June 1987. [4] K. C. Hsieh, P. R. Gray, D. Senderowicz, and D. G. Messerschmitt, A low-noise chopper stabilized differential switched-capacitor filtering technique, IEEE J. Solid-State Circuits, vol. SC-16, pp. 708715, Dec. 1981. [5] C. G. Yu and R. L. Geiger, An automatic offset compensation scheme with ping-pong control for CMOS operational amplifiers, IEEE J. Solid-State Circuits, vol. 29, pp. 601610, May 1994. [6] I. E. Opris and G. T. A. Kovacs, A rail-to-rail ping-pong opamp, IEEE J. Solid-State Circuits, vol. 31, pp. 13201324, Sept. 1996. [7] (1999, May) TLC4501, Self-calibrating operational amplifier. Texas Instruments Inc., Dallas, TX. [Online]. Available: http://www.ti.com [8] G. C. M. Meijer, Concepts and focus point for intelligent sensor systems, Sensors and Actuators, vol. 41, pp. 183191, 1994. [9] (1999, June) LTC1050, Precision chopper stabilized operational amplifier with internal capacitors. Linear Technology, Milpitas, CA. [Online]. Available: http://www.linear.com

[10] C. Menolfi and Q. Huang, A fully integrated CMOS instrumentation amplifier with submicrovolt offset, IEEE J. Solid-State Circuits, vol. 34, pp. 415420, Mar. 1999.

Anton Bakker was born in Amsterdam, The Netherlands, on July 11, 1968. In 1991, he received the M.Sc. degree in electrical engineering from the Delft University of Technology, Delft, The Netherlands. In 1996, he started his Ph.D. project on CMOS smart temperature sensors. During this research period, he designed a number of temperature sensors for Philips Semiconductors, Sunnyvale, CA. He received the Ph.D. degree from Delft University in 2000. In 1991, he joined the Werkgroep Elektrotechnisch Practicum, where he developed a laboratory course for second-year students on the design of complex integrated circuits. In 1993, he joined the Electronic Instrumentation Laboratory where he was involved in a European Project (ESPRIT) on the design of an ultra-low-power tempersature sensor. During this project, he spent three months at CSEM, Neuchtel, Switzerland, to implement his design. He is currently with Philips Semiconductors.

Kevin Thiele, biography and photograph not available at time of publication.

Johan H. Huijsing (SM81F97) was born in Bandung, Indonesia, on May 21, 1938. He received the M.Sc. degree in electrical engineering from the Delft University of Technology, Delft, The Netherlands, in 1969, and the Ph.D. degree from the same university in 1981. He has been an Assistant and Associate Professor in electronic instrumentation with the Faculty of Electrical Engineering, Delft University of Technology, since 1969, where he became a full Professor in the Chair of electronic instrumentation in 1990. From 1982 through 1983, he was a Senior Scientist at Philips Research Labs, Sunnyvale, CA. Since 1983, he has been a Consultant for Philips. His research work is particulary focused on the systematic analysis and design of operational amplifiers and integrated smart sensors. He is author or co-author of some 150 scientific papers, 20 patents and four books, and co-editor of five books. He is initiator and Co-Chairman of the International Workshop on Advances in Analog Circuit Design, which has been held annually since 1992. He is Chairman of the biannual National Workshop on Sensor Technology, since 1991, and Chairman of the Dutch STW Platform on Sensor Technology.