High Performance Hardware Implementation of AES Using Minimal Resources AIM: The main aim of the project is to design

High Performance Hardware Implementation of AES Using Minimal Resources A!S"RA#": Increasing need of data protection in computer networks led to the development of several cryptographic algorithms hence sending data securely over a transmission link is critically important in many applications. Hardware implementation of cryptographic algorithms are physically secure than software implementations since outside attackers cannot modify them. In order to achieve higher performance in todays heavily loaded communication networks, hardware implementation is a wise choice in terms of better speed and reliability. This paper presents the hardware implementation of Advanced ncryption !tandard "A !# algorithm using $ilin%& virte%' (ield )rogrammable *ate Array "()*A#. In order to achieve higher speed and lesser area, !ub +yte operation, Inverse !ub +yte operation, ,i% -olumn operation and Inverse ,i% -olumn operations are designed as .ook /p Tables "./Ts# and 0ead 1nly ,emories "01,s#. This approach gives a throughput of 2.34*bps utili5ing only 67 of total slices in %c'vl%668t929 ff662: target device.

V.Mallikarjuna (Project manager)

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(ig; )roposed architecture of encryption module.

(ig; )roposed architecture of <ecryption module.

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"%%$S: $ilin% =.>I! , ,odelsim:.4c. APP$I#A"I%) A'*A)"A(ES: The proposed design serves as the best high speed encryption algorithm and is thus suitable for various applications. ,oreover with less area utili5ation, the proposed design can be embedded with other larger designs as well. RE+ERE)#ES: ,. *oswami and !. ?annojiya, @High )erformance ()*A Implementation of A ! Algorithm with 6>A9+it ?eys,B )roc. I Int. -onf. Advances -omputing -omm., vol. 6, Himarpur, India, >866, pp.>A69>A:. (I)!96=3, CI!T 9 Cational Institute of !tandards and Technology, @Announcing the A<DAC- < C-0E)TI1C !TAC<A0< "A !#,B http;FFcsrc.nist.govFpublicationsFfipsFfips6=3Ffips96=3.pdf, >886. G. Gei, -. Hie and $. (ei, @An Implementation of A ! Algorithm on ()*A,B I 6:6'96:63. /. ?ret5schmar, A. Astarloa, H. .a5aro, /. +idarte and H. Himene5, @0obustness analysis of different A ! implementations on !0A, based ()*As,B Int. -onf. on 0econfigurable -omputing and ()*As, pp. >''9>:8.
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=th Int. -onf. on (u55y !ystems and ?nowledge discover, pp.

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 H. <aeme and D. 0ijmen, @A ! proposal; 0ijndael,B CI!T A ! )roposal.

V.Mallikarjuna (Project manager)

ISO: 9001- 2008 CERTIFIED COMPANY

Na'()r

Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &