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IRF530

Data Sheet February 2002

14A, 100V, 0.160 Ohm, N-Channel Power MOSFETs [ /Title (IRF53 0, RF1S5 30SM) /Subject (14A, 100V, 0.160 Ohm, NChannel Power MOSFETs) /Autho r () /Keywords (14A, 100V, 0.160 Ohm, NChannel Power MOSFETs, Intersil Corporation, TO220AB , TO263AB
These are N-Channel enhancement mode silicon gate power eld effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specied level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17411.

Features
14A, 100V rDS(ON) = 0.160 Single Pulse Avalanche Energy Rated SOA is Power Dissipation Limited Nanosecond Switching Speeds Linear Transfer Characteristics High Input Impedance Related Literature - TB334 Guidelines for Soldering Surface Mount Components to PC Boards

Ordering Information
PART NUMBER IRF530 PACKAGE TO-220AB BRAND IRF530

Symbol
D

NOTE: When ordering, use the entire part number.


S

Packaging
JEDEC TO-220AB
SOURCE DRAIN GATE DRAIN (FLANGE)

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2002 Fairchild Semiconductor Corporation

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
IRF530 Rev. B1

IRF530
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specied IRF530 100 100 14 10 56 20 79 0.53 69 -55 to 175 300 260 UNITS V V A A A V W W/oC mJ oC
oC oC

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg

CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specication is not implied.

NOTE: 1. TJ = 25oC to 150oC.

Electrical Specications
PARAMETER

TC = 25oC, Unless Otherwise Specied SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured from the Contact Screw on Tab To Center of Die Measured from the Drain Lead, 6mm (0.25in) from Package to Center of Die Modified MOSFET Symbol Showing the Internal Devices Inductances
D LD

TEST CONDITIONS ID = 250A, VGS = 0V (Figure 10) VGS = VDS, ID = 250A VDS = 95V, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC VDS > ID(ON) x rDS(ON) MAX, VGS = 10V VGS = 20V ID = 8.3A, VGS = 10V (Figures 8, 9) VDS 50V, ID = 8.3A (Figure 12) VDD = 50V, ID 14A, RG 12, RL = 3.4 MOSFET Switching Times are Essentially Independent of Operating Temperature

MIN 100 2 14 5.1 -

TYP 0.14 7.6 12 35 25 25 18 4 7 600 250 50 3.5

MAX 4.0 25 250 500 0.16 15 65 70 59 30 -

UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH

Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain Miller Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance

VGS = 10V, ID = 14A, VDS = 0.8 x Rated BVDSS Ig(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V, f = 1MHz (Figure 11)

4.5

nH

Internal Source Inductance

LS

Measured from the Source Lead, 6mm (0.25in) From Header to Source Bonding Pad

G LS S

7.5

nH

Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient

RJC RJA Free Air Operation

1.9 62.5 -

oC/W oC/W

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2002 Fairchild Semiconductor Corporation IRF530 Rev. B1

IRF530
Source to Drain Diode Specications
PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 2) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode
G D

MIN -

TYP -

MAX 14 56

UNITS A A

Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES:

VSD trr QRR

TJ = 25oC, ISD = 14A, VGS = 0V (Figure 13) TJ = 25oC, ISD = 14A, dISD/dt = 100A/s TJ = 25oC, ISD = 14A, dISD/dt = 100A/s

5.5 0.17

120 0.6

2.5 250 1.3

V ns C

2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 530H, RG = 25, peak IAS = 14A (Figures 15, 16).

Typical Performance Curves


1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25

Unless Otherwise Specied

15

ID, DRAIN CURRENT (A)

12

0 125 50 75 100 TC , CASE TEMPERATURE (oC) 150 175 25 50 75 100 125 150 175 TC , CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE

ZJC, TRANSIENT THERMAL IMPEDANCE

10

0.5 0.2 0.1 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 10-3 10-2 0.1 1 10

0.1

0.05 0.02 0.01 SINGLE PULSE

0.01 10-5

10-4

t P, RECTANGULAR PULSE DURATION (s)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

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2002 Fairchild Semiconductor Corporation IRF530 Rev. B1

IRF530 Typical Performance Curves


10 3 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) 10s 100s 10 1ms 10ms 1 TC = 25oC TJ = 175oC SINGLE PULSE 1 10 10 2 VDS, DRAIN TO SOURCE VOLTAGE (V) 10 3

Unless Otherwise Specied (Continued)

25 VGS = 10V VGS = 8V VGS = 7V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 15 VGS = 6V 10 VGS = 5V 5 VGS = 4V 0 0 10 20 30 40 50 VDS, DRAIN TO SOURCE VOLTAGE (V)

20

ID, DRAIN CURRENT (A)

10 2

0.1

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA

FIGURE 5. OUTPUT CHARACTERISTICS

IDS(ON), DRAIN TO SOURCE CURRENT (A)

25

100

PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX

VGS = 8V VGS = 7V

PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V

ID, DRAIN CURRENT (A)

20 VGS = 10V 15

10

VGS = 6V

10 VGS = 5V 5 VGS = 4V 0 0 1 2 3 4 5

175oC 1

25oC

0.1 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS

FIGURE 7. TRANSFER CHARACTERISTICS

1.5 rDS(ON), ON-STATE RESISTANCE ()

1.2

NORMALIZED ON RESISTANCE

PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX

3.0

2.4

PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 14A

0.9

1.8

0.6 VGS = 10V 0.3 VGS = 20V 0 12 24 36 48 60

1.2

0.6

0 ID, DRAIN CURRENT (A)

0 -60 -40 -20

20

40

60

80 100 120 140 160 180

TJ , JUNCTION TEMPERATURE (oC)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE

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2002 Fairchild Semiconductor Corporation IRF530 Rev. B1

IRF530 Typical Performance Curves


1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A

Unless Otherwise Specied (Continued)

1500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD

1.15 C, CAPACITANCE (pF)

1200

1.05

900 CISS

0.95

600

0.85

300

COSS CRSS

0.75 -60 -40 -20

20

40

60

80 100 120 140 160 180

0 1

10 VDS, DRAIN TO SOURCE VOLTAGE (V)

102

TJ , JUNCTION TEMPERATURE (oC)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

10

25oC

ISD, SOURCE TO DRAIN CURRENT (A)

gfs, TRANSCONDUCTANCE (S)

PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V

100

PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX

10

175oC

175oC 1

25oC

0 0 5 10 15 20 25 I D , DRAIN CURRENT (A)

0.1 0 0.4 0.8 1.2 1.6 VSD , SOURCE TO DRAIN VOLTAGE (V) 2.0

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT

FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20 ID = 14A VGS, GATE TO SOURCE (V) 16 VDS = 20V 12 VDS = 80V 8 VDS = 50V

0 0 6 12 18 24 30 QG , GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

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2002 Fairchild Semiconductor Corporation IRF530 Rev. B1

IRF530 Test Circuits and Waveforms


VDS tP IAS VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG
+

BVDSS L VDS VDD

VDD

0V

IAS 0.01

0 tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON td(ON) tr VDS RL 90%

tOFF td(OFF) tf 90%

RG DUT

VDD

10% 90%

10%

VGS 0 10%

50% PULSE WIDTH

50%

VGS

FIGURE 17. SWITCHING TIME TEST CIRCUIT

FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

CURRENT REGULATOR

VDS (ISOLATED SUPPLY)

VDD Qg(TOT) Qgd Qgs VGS

12V BATTERY

0.2F

50k

SAME TYPE AS DUT 0.3F

D G DUT

VDS 0

Ig(REF) 0 IG CURRENT SAMPLING RESISTOR

S VDS ID CURRENT SAMPLING RESISTOR

IG(REF) 0

FIGURE 19. GATE CHARGE TEST CIRCUIT

FIGURE 20. GATE CHARGE WAVEFORMS

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2002 Fairchild Semiconductor Corporation IRF530 Rev. B1

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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

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PRODUCT STATUS DEFINITIONS Definition of Terms


Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Preliminary

No Identification Needed

Full Production

Obsolete

Not In Production

Rev. H4

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