Professional Documents
Culture Documents
Please enter your name and registration ID, then start answering for the questions and finally press submit button at the end to submit your answers. ******************************************************************************************* * Required Name * Registration ID * 1) The BCD number for decimal 16 is ________.
A] C B] D C] C + D D] 1
3) How many exclusive-NOR gates would be required for an 8-bit comparator circuit?
A] 4 B] 6 C] 8 D] 10
5) A classification of ICs with complexities of 100 to 10,000 equivalent gates per chip is known as ________.
A] All inputs are LOW. B] Any input is LOW. C] Any input is HIGH. D] All inputs are HIGH.
7) A "floating" TTL input may be defined as: A] Unused input that is tied to Vcc through a 1 k resistor. B] Unused input that is tied to used inputs. C] Unused input that is tied to the ground. D] Unused input that is not connected.
8) The contents of the accumulator after this operation MOV A,#2BH ORL A,00H will be:
A] 1B H B] 2B H C] 3B H D] 4B H
A] the data are shifted one bit per clock pulse. B] the data are loaded one bit per clock pulse. C] the data are transferred per clock pulse. D] None of the above
10) Which statement best describes the given figure, and what is the function of the terminal labeled EN?
A] Quad two-input multiplexer. EN is the enable input, which requires an active LOW for the device to work. B] Quad two-bit multiplier, EN is the active HIGH trigger. C] Dual quad-input multiplexer, which requires an active LOW on the EN terminal for the device to work. D] Quad two-input AND gate, which requires an active LOW on the EN input to enable all the gates.
12) What is the frequency of a clock waveform if the period of that waveform is 1.25 s?
13) Assign the proper even parity bit to the code 1100001.
A] 1 MB B] 1 GB C] 2 GB
D] 4 GB
15) What type of logic circuit is shown below and what logic function is being performed?
A] It is an NMOS AND gate. B] It is a CMOS AND gate. C] It is a CMOS NOR gate. D] It is a PMOS NAND gate.
16) A D flip-flop utilizing a PGT clock is in the CLEAR state. Which of the following input actions will cause it to change states?
17) An RC circuit used in a 74122 retriggerable one-shot has an REXT of 100 k and a CEXT of 0.005 F. The pulse width is ________.
A] 70 s B] 16 s C] 160 s D] 32 s
18) The device that places its input data onto one of several outputs is a ________.
A] AND B] exclusive-OR
C] Exclusive-NOR D] NAND