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BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, PILANI, HYDERABAD CAMPUS INSTRUCTION DIVISION, FIRST SEMESTER 2013-2014 COURSE HANDOUT

(PART II)

Date: 1/8/13 In addition to part-I (General Handout for all courses appended to the time-table), this portion gives further specific details regarding the course. Course No. Course Title Instructor-in-charge : ECE C313/ EEE C424 : Microelectronic Circuits : M. SUBHA

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Scope and Objective of the Course: The objective of this course is to develop an ability to analyze and design integrated electronic circuits. The course aims at thorough understanding of electronic circuits & building blocks necessary for effective realizations of integrated circuits. The course also includes the practical component.

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Text Book: Adel. S. Sedra, Kenneth C Smith, Microelectronic Circuits, Oxford University Press, Fifth Edition, 2004. Reference books (i) Richard. C. Jaeger, Microelectronic Circuit Design, Tata McGraw-Hill Companies Inc., International Edition. (ii) R.Jacob.Baker, Harry.W.Li, David.Boyce, CMOS circuit Design Layout and simulation.IEEE Press series on Microelectronic Systems, PHI.

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Course Plan : Topic Introduction to Amplifiers Learning Objective Characteristic of Amplifiers No. of Lectures 2 2 3 Ref. From the Text Book (Article) Text chapter-1 1.4, 1.5,1.6 Text ch- 4.1 4.3 Text Ch 4--4.5, 4.6, 4.7, 4.8, 4.9 Text Ch 5--5.5, 5.6, 5.7, 5.8, 5.9 Text --Ch.7.1-7.7

Models of MOSFET, MOS device physics physics of MOSFET Integrated circuit MOSFET IC MOSFET Amplifier circuits, and Amplifier design Frequency response Integrated circuit BJT Discrete and IC BJT Amplifiers, frequency Amplifier Design response and BJT models Differential amplifiers Design of differential amplifiers

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Passive and active current Design of IC bias mirrors. circuits

Text Ch.6.12

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Feedback Operational Amplifiers

Study of feedback Design and characterization of an integrated circuit OP-AMP

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Text Ch.8.1-8.7 Text Ch. 9

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Stability & frequency Techniques for compensation in OP AMP, stability of opamp in Noise feedback mode. Illustrative examples of integrated electronic systemsan overview Building of electronic systems Total

Text ch-8.8-8.11

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To be announced

(42)

6. Evaluation Scheme: EC No. 1 2 3 4 Components Test-1 Test-2 Surprise Test Comprehensive Exam 3 hrs. Duration 60 mts. 60 mts. Marks 75 75 30 120 Date & Time 23/9, 12.00--1.00 PM 28/10, 12.00--1.00 PM 14/12, 2.00 5.00 PM Remarks CB OB CB / OB

7. Chamber Consultation Hour: To be announced in the class 8. Make-up Policy: Make-up for any component will be given only in genuine cases. In all cases prior intimation must be given to IC

9. Notices: All notices related to the course will be put on the EEE/ECE Notice board or CMS only.

Instructor-in-charge ECE C313/ EEE C424

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