ECEN 3233 Digital Logic Design Fall 2010 Exam 2

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All questions must be answered on test paper!

1. (15 pts) Circle the essential prime implicants for Sum of Products in the K-Map. Write a Boolean expression for F(A, B, C, D). Make sure that your solution does not cause your hardware to glitch.

F CD 00 01 11 10

AB

00 1 0 0 1

01 1 0 0 1

11 1 1 0 0

10 0 0 0 0

F=

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2. (10 pts) Circle the essential prime implicants for Sum of Products in the K-Map. Write a Boolean expression for F(A, B, C, D).

F CD 00 01 11 10

AB

00 1 0 0 0

01 X 1 1 X

11 1 1 0 0

10 1 0 X 0

F=

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3. (25 pts) A 4 bit counter (CD4CE) and a clocked D register or latch are provided. Clock (CLK) and D_input inputs are shown below. Draw the waveforms for the output Q_output when the clocked element is a level high (1) sensitive latch, or when the clocked element is positive (rising) edge sensitive register.

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CLK

t D_input

t Q_output level high (1) sensitive latch

t Q_output positive edge sensitive register

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4. (50 pts) Julius received a word that his best friend, Pete, got into trouble again. This time, Pete managed to get himself kidnapped by aliens. Fortunately for Julius, the aliens mother ship was still stationed on earth. Dr. Johnson was nice enough to provide Julius with an invisible exo suit to save his dear friend. Julius managed to gain entrance to the mother ship and located Pete in his cell with no problems at all using his ninja skills that he just learned by watching 1990s ninja movies. To free Pete, Julius had to program his Spartan-3E board to overwrite the lock mechanism that the aliens used. The lock mechanism came with an input and output terminal. The output terminal had a 3-bit output and the input terminal could handle up to 100,000,000 bits (any unused bits will be defaulted to 0). When Julius probed the lock mechanism, he found a bunch of weird numbers coming out from the output terminal, and did not know where to start. Using a universal language translator that Julius bought from a website 1 month ago, Julius managed to gain info on how to overwrite the lock mechanism by listening to the guards. The first guard told the second guard that the lock mechanism generated numbers every 20 ns. 1. The code started when the 3-bit input was 010. 2. The next 3-bit number that came afterwards was usually a decoy pattern as it didnt have a 1 as its least significant bit; hence only numbers that had a 1 as its least significant bit may be considered a valid number. 3. The first valid number after 010 must be saved. 4. When the second valid number came, it must be multiplied with the first valid number. 5. The third valid number must be smaller than the result performed in step 4, otherwise the next generated valid number must be considered as the new first valid number, hence going back to step 3. 6. The fourth valid number must be added to the third valid number. 7. If the result from step 4 is bigger than the result from step 6, subtract the result from step 4 with the result from step 6. Otherwise add those two results together. 8. Output your result to your output ports. 9. At anytime, the pattern 010 may pop, when this happens, you must restart your steps by going back to step 1. Help Julius by writing a Verilog code and User Constraint File (UCF) as efficiently as possible to save his friend Pete, and save the day!!! You may assume that any addition, multiplication, and subtraction operation in Verilog may take less than one clock cycle, 20 ns. You may also assume that you can synchronize your FPGA clock with the aliens lock mechanisms clock. Page 5 of 7

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